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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/llvm-project.
from a2b144fc740 [TableGen] Make CheckImmAllOnesVMatcher and CheckImmAllZero [...] adds 369a011cee0 [lldb] [test] Make 2lwp_process_SIGSEGV test more portable adds bfec0d610cb [AArch64] Add tests for saddsat/ssubsat; NFC adds 0dc8c52d4e9 [X86] Remove dead code from the handler for INTR_TYPE_SCALA [...] adds 93e15dfacce [X86] Make lowering of intrinsics with rounding mode strict [...] adds 66c9690ad6e [X86] Remove unused variable. NFC adds 7d8260feb60 [CGP] fix comments; NFC adds 26e06e859e2 [x86] add x86-specific opcodes to extractelement scalarizat [...] adds 0affb5822f1 Quiet command regex instructions during batch execution adds a135fd5562d Remove redundant extractBooleanFlip argument. NFC adds 4cf8cdc51d1 [X86] Remove VCVTSI2SDZrrb_Int as it shouldn't exist. adds d8ebbe4a763 [X86] Remove unneeded isel patterns from VCVTSI2SDZ and VCV [...] adds a5820cbd20f Add test case for add to sub post legalization. NFC adds 428dcd5c3f2 [PowerPC] Remove the override of isMachineVerifierClean() t [...] adds b7e6bfe5790 [X86] Begin removing matching of FROUND_CURRENT and FROUND_ [...] adds 704303a2a19 [X86] Split the VFIXUPIMM/VFIXUPIMMS nodes into a current r [...] adds 4c544ca993f [X86] Rename X86ISD::CMPM_RND and X86ISD::FSETCCM_RND to _S [...] adds 6059b1737ec [X86] Rename the CVTT*_RND ISD nodes to _SAE and remove the [...] adds 244ffcdf0d0 [X86] Rename X86ISD::CVTPH2PS_RND to CVTPH2PS_SAE. Remove S [...] adds ba7d6545260 [X86] Rename _RND versions of RANGE/REDUCE/GETMANT/RDNSCALE [...] adds a0b5338834f [X86] Split RCP28/RSQRT/GETEXP/EXP2 ISD opcodes into SAE an [...] adds ecbc141dbf3 [X86] Split SCALEF(S) ISD opcodes into a version without ro [...] adds f19d6a4073b [X86] Add SCALAR_SINT_TO_FP/SCALAR_UINT_TO_FP ISD opcodes w [...] adds dc488767b2a [X86] Use 'UseAVX' in place of 'HasAVX, NoAVX512'. NFC adds f1e7482e69d [X86] Remove apparently unneeded patterns for storing a bit [...] adds 00afa193f1e [X86] Enable sse2_cvtsd2ss intrinsic to use an EVEX encoded [...] new 5bca7ff98a1 [clangd] Add TOC section to clangd doc. new 8b911934f3d [Support/Endian] Add support for endian-specific enums new 021b27fbcfe Attempt to fix build errors caused by r355812
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Summary of changes: clang-tools-extra/docs/clangd/Extensions.rst | 2 + clang-tools-extra/docs/clangd/Features.rst | 2 + clang-tools-extra/docs/clangd/Installation.rst | 2 + lldb/include/lldb/Core/IOHandler.h | 2 +- lldb/include/lldb/Expression/REPL.h | 2 +- lldb/lit/Commands/command-regex-delete.test | 2 +- lldb/lit/Commands/command-regex-unalias.test | 2 +- .../netbsd-core/2lwp_process_SIGSEGV.amd64 | Bin 15816 -> 16344 bytes .../netbsd-core/2lwp_process_SIGSEGV.amd64.core | Bin 121208 -> 121216 bytes .../postmortem/netbsd-core/2lwp_process_SIGSEGV.c | 7 +- .../postmortem/netbsd-core/TestNetBSDCore.py | 6 +- .../Commands/CommandObjectBreakpointCommand.cpp | 4 +- lldb/source/Commands/CommandObjectCommands.cpp | 10 +- lldb/source/Commands/CommandObjectTarget.cpp | 4 +- lldb/source/Commands/CommandObjectType.cpp | 8 +- .../Commands/CommandObjectWatchpointCommand.cpp | 4 +- lldb/source/Core/IOHandler.cpp | 2 +- lldb/source/Expression/REPL.cpp | 2 +- .../Python/ScriptInterpreterPython.cpp | 4 +- .../Python/ScriptInterpreterPython.h | 2 +- llvm/include/llvm/Support/Endian.h | 11 + llvm/include/llvm/Support/SwapByteOrder.h | 8 + llvm/lib/CodeGen/CodeGenPrepare.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 +- llvm/lib/Target/PowerPC/PPCTargetMachine.h | 4 - llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 3 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 420 +++++---- llvm/lib/Target/X86/X86ISelLowering.h | 54 +- llvm/lib/Target/X86/X86InstrAVX512.td | 460 +++++----- llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 148 ++-- llvm/lib/Target/X86/X86InstrInfo.cpp | 1 - llvm/lib/Target/X86/X86InstrSSE.td | 30 +- llvm/lib/Target/X86/X86IntrinsicsInfo.h | 331 +++---- llvm/test/CodeGen/AArch64/sadd_sat.ll | 73 ++ llvm/test/CodeGen/AArch64/sadd_sat_vec.ll | 923 ++++++++++++++++++++ llvm/test/CodeGen/AArch64/ssub_sat.ll | 74 ++ llvm/test/CodeGen/AArch64/ssub_sat_vec.ll | 965 +++++++++++++++++++++ llvm/test/CodeGen/X86/addcarry.ll | 26 + .../CodeGen/X86/avx512-fma-intrinsics-upgrade.ll | 48 +- llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll | 48 +- .../CodeGen/X86/avx512-intrinsics-fast-isel.ll | 40 +- llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 144 +-- llvm/test/CodeGen/X86/avx512-intrinsics-x86_64.ll | 24 +- llvm/test/CodeGen/X86/avx512-intrinsics.ll | 228 ++--- .../CodeGen/X86/avx512dq-intrinsics-upgrade.ll | 8 +- llvm/test/CodeGen/X86/avx512dq-intrinsics.ll | 24 +- llvm/test/CodeGen/X86/extractelement-fp.ll | 14 +- llvm/test/CodeGen/X86/fma-fneg-combine.ll | 12 +- llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll | 42 +- llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll | 71 +- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 66 +- llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 66 +- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 66 +- llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 66 +- llvm/unittests/Support/EndianTest.cpp | 9 + 56 files changed, 3371 insertions(+), 1219 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/sadd_sat.ll create mode 100644 llvm/test/CodeGen/AArch64/sadd_sat_vec.ll create mode 100644 llvm/test/CodeGen/AArch64/ssub_sat.ll create mode 100644 llvm/test/CodeGen/AArch64/ssub_sat_vec.ll