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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project.
from c2fca2d9afa Fix variable ‘LookedUpGetterSetter’ set but not used warnin [...] adds 0ac296322f0 [lldb] [test] Un-XFAIL tests that work on NetBSD 9 adds 7f152543e4f [LV] Apply sink-after & interleave-groups as VPlan transfor [...] adds f092e80939f RegisterCoalescer - fix uninitialized variables. NFCI. adds 6976a0e8266 RegisterCoalescer - remove duplicate variable to fix Wshado [...] adds 58236e6fa6c Reduce scope of variable to silence cppcheck warning. NFC adds b0d0928241a YAMLParser - fix SimpleKey uninitialized variable warnings. NFCI. adds 1dbcf8ba8a0 Try to fix sphinx "Could not lex literal_block as "llvm"" warning. adds c2751737e58 [X86] Handle MO_ConstantPoolIndex in X86AsmPrinter::PrintOperand adds 89453d186dc [NFC]: Fix PVS Studio warning in LoopNestAnalysis Summary:T [...] adds d890620fb27 [MC] Clean up MacroInstantiation. NFC adds 811a031c36f CodeGenRegBank - make functions const to fix cppcheck warnings. adds eb79d2da8a5 Path - fix uninitialized variable warnings. NFCI. adds b96ebc0a424 PODSmallVector - fix MSVC uninitialized variable warnings. NFCI. adds 616a7f6ca0a TableGen - fix uninitialized variable warnings. NFCI. adds a3c715e9788 Twine - fix uninitialized variable warnings. NFCI. adds 446581a3002 [NFC][Codegen] Add `x u% C1 == C2` with C1 u<= C2 tautologi [...] adds 6c94068da99 [Driver] Remove unused variable. NFC. adds 4ff246fef25 Remove unused variable (which allows us to remove vector in [...] adds ef02831f0a4 [InstCombine] avoid crash from deleting an instruction that [...] adds be0fead7bff [RISCV][NFC] Add CFI-related tests adds 1c737f54bee [RISCV] Fix CFA when doing split sp adjustment with fp adds b0ac26a6326 Revert "[InstCombine] avoid crash from deleting an instruct [...] adds bcca123bd0c Docs: Updates Sphinx Quickstart template for new contributors adds 7874db75ef4 [NFC][Codegen] Add `x u% C1 == C2` with C1 u> C2 non-tautol [...]
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Summary of changes: clang/lib/Driver/ToolChains/Darwin.cpp | 1 - .../command/TestWatchpointCommandLLDB.py | 1 - .../command/TestWatchpointCommandPython.py | 2 - .../condition/TestWatchpointConditionCmd.py | 1 - .../test/lang/c/bitfields/TestBitfields.py | 2 - llvm/docs/GlobalISel/Pipeline.rst | 4 +- llvm/docs/SphinxQuickstartTemplate.rst | 103 ++--- llvm/include/llvm/ADT/Twine.h | 4 +- llvm/include/llvm/Analysis/VectorUtils.h | 9 +- llvm/include/llvm/Demangle/ItaniumDemangle.h | 2 +- llvm/include/llvm/Support/Path.h | 16 +- llvm/lib/Analysis/LoopCacheAnalysis.cpp | 6 +- llvm/lib/CodeGen/RegisterCoalescer.cpp | 25 +- llvm/lib/MC/MCParser/AsmParser.cpp | 18 +- llvm/lib/Support/YAMLParser.cpp | 8 +- llvm/lib/TableGen/TGLexer.h | 10 +- llvm/lib/TableGen/TGParser.h | 2 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 42 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 1 + .../Vectorize/LoopVectorizationPlanner.h | 9 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 214 +++++----- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 44 ++- llvm/lib/Transforms/Vectorize/VPlan.cpp | 23 +- llvm/lib/Transforms/Vectorize/VPlan.h | 16 + llvm/test/CodeGen/AArch64/urem-seteq-nonzero.ll | 247 ++++++++++++ .../test/CodeGen/AArch64/urem-seteq-vec-nonzero.ll | 118 ++++++ .../CodeGen/AArch64/urem-seteq-vec-tautological.ll | 127 ++++++ llvm/test/CodeGen/RISCV/frame-info.ll | 245 +++++++++++- llvm/test/CodeGen/RISCV/large-stack.ll | 8 +- llvm/test/CodeGen/RISCV/vararg.ll | 260 +++++++++++- llvm/test/CodeGen/X86/pr43952.ll | 16 + llvm/test/CodeGen/X86/urem-seteq-nonzero.ll | 434 +++++++++++++++++++++ llvm/test/CodeGen/X86/urem-seteq-vec-nonzero.ll | 434 +++++++++++++++++++++ .../CodeGen/X86/urem-seteq-vec-tautological.ll | 347 ++++++++++++++++ .../LoopVectorize/first-order-recurrence.ll | 35 ++ .../interleaved-accesses-uniform-load.ll | 49 +++ llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 1 + llvm/utils/TableGen/CodeGenRegisters.h | 8 +- llvm/utils/TableGen/FixedLenDecoderEmitter.cpp | 3 +- 39 files changed, 2617 insertions(+), 278 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/urem-seteq-nonzero.ll create mode 100644 llvm/test/CodeGen/AArch64/urem-seteq-vec-nonzero.ll create mode 100644 llvm/test/CodeGen/AArch64/urem-seteq-vec-tautological.ll create mode 100644 llvm/test/CodeGen/X86/pr43952.ll create mode 100644 llvm/test/CodeGen/X86/urem-seteq-nonzero.ll create mode 100644 llvm/test/CodeGen/X86/urem-seteq-vec-nonzero.ll create mode 100644 llvm/test/CodeGen/X86/urem-seteq-vec-tautological.ll create mode 100644 llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform [...]