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from d049b8952bf [CodeGenPrepare][x86] shift both sides of a vector select w [...] new c6fce1250e5 [AMDGPU] gfx10 conditional registers handling
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Summary of changes: lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 20 +- lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + lib/Target/AMDGPU/SIFrameLowering.cpp | 22 +- lib/Target/AMDGPU/SIISelLowering.cpp | 102 ++++++-- lib/Target/AMDGPU/SIInsertSkips.cpp | 20 +- lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 216 ++++++++++++----- lib/Target/AMDGPU/SIInstrInfo.h | 2 + lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- lib/Target/AMDGPU/SILowerControlFlow.cpp | 81 +++++-- lib/Target/AMDGPU/SILowerI1Copies.cpp | 68 ++++-- lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 87 +++++-- lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 51 ++-- lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 5 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 29 ++- lib/Target/AMDGPU/SIRegisterInfo.h | 15 ++ lib/Target/AMDGPU/SIShrinkInstructions.cpp | 25 +- lib/Target/AMDGPU/SIWholeQuadMode.cpp | 50 ++-- test/CodeGen/AMDGPU/mubuf-legalize-operands.mir | 285 +++++++++++++++-------- 19 files changed, 787 insertions(+), 308 deletions(-)