This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository llvm.
from 0ef3663 vec perm can go down either pipeline on P8. No observable cha [...] new b89cc7e Revert "In visitSTORE, always use FindBetterChain, rather tha [...]
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: include/llvm/Target/TargetLowering.h | 3 - lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 742 +++++++------- lib/CodeGen/TargetLoweringBase.cpp | 2 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 2 +- lib/Target/ARM/ARMISelLowering.h | 5 - test/CodeGen/AArch64/argument-blocks.ll | 4 +- test/CodeGen/AArch64/arm64-abi.ll | 5 +- test/CodeGen/AArch64/arm64-memset-inline.ll | 4 +- test/CodeGen/AArch64/arm64-variadic-aapcs.ll | 2 +- test/CodeGen/AArch64/merge-store.ll | 3 +- test/CodeGen/AArch64/vector_merge_dep_check.ll | 3 +- test/CodeGen/AMDGPU/debugger-insert-nops.ll | 24 +- test/CodeGen/AMDGPU/insert_vector_elt.ll | 6 +- test/CodeGen/AMDGPU/merge-stores.ll | 24 +- test/CodeGen/AMDGPU/private-element-size.ll | 12 +- test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 17 +- test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll | 3 +- test/CodeGen/ARM/alloc-no-stack-realign.ll | 100 +- test/CodeGen/ARM/gpr-paired-spill.ll | 18 +- test/CodeGen/ARM/ifcvt10.ll | 2 + test/CodeGen/ARM/illegal-bitfield-loadstore.ll | 54 +- test/CodeGen/ARM/static-addr-hoisting.ll | 6 +- test/CodeGen/BPF/undef.ll | 65 +- test/CodeGen/MSP430/Inst16mm.ll | 2 +- test/CodeGen/Mips/cconv/arguments-float.ll | 24 +- test/CodeGen/Mips/cconv/arguments-varargs.ll | 44 +- test/CodeGen/Mips/fastcc.ll | 76 +- test/CodeGen/Mips/load-store-left-right.ll | 126 ++- test/CodeGen/Mips/micromips-li.ll | 2 +- test/CodeGen/Mips/mips64-f128-call.ll | 15 +- test/CodeGen/Mips/mips64-f128.ll | 2 +- test/CodeGen/Mips/mno-ldc1-sdc1.ll | 46 +- test/CodeGen/Mips/msa/f16-llvm-ir.ll | 14 +- test/CodeGen/Mips/msa/i5_ld_st.ll | 32 +- test/CodeGen/Mips/o32_cc_byval.ll | 54 +- test/CodeGen/Mips/o32_cc_vararg.ll | 4 +- test/CodeGen/PowerPC/anon_aggr.ll | 59 +- test/CodeGen/PowerPC/complex-return.ll | 12 +- test/CodeGen/PowerPC/jaggedstructs.ll | 52 +- test/CodeGen/PowerPC/ppc64-align-long-double.ll | 41 +- test/CodeGen/PowerPC/structsinmem.ll | 28 +- test/CodeGen/PowerPC/structsinregs.ll | 60 +- test/CodeGen/SystemZ/unaligned-01.ll | 5 +- test/CodeGen/Thumb/2010-07-15-debugOrdering.ll | 2 +- test/CodeGen/Thumb/stack-access.ll | 26 +- test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll | 2 +- test/CodeGen/X86/2012-11-28-merge-store-alias.ll | 2 +- test/CodeGen/X86/MergeConsecutiveStores.ll | 17 +- test/CodeGen/X86/avx512-mask-op.ll | 4 + test/CodeGen/X86/chain_order.ll | 4 +- .../CodeGen/X86/clear_upper_vector_element_bits.ll | 400 ++++---- test/CodeGen/X86/combiner-aa-0.ll | 20 + test/CodeGen/X86/combiner-aa-1.ll | 23 + test/CodeGen/X86/copy-eflags.ll | 17 +- test/CodeGen/X86/dag-merge-fast-accesses.ll | 12 +- .../X86/dont-trunc-store-double-to-float.ll | 6 +- .../extractelement-legalization-store-ordering.ll | 15 +- test/CodeGen/X86/i256-add.ll | 350 ++----- test/CodeGen/X86/i386-shrink-wrapping.ll | 5 +- test/CodeGen/X86/illegal-bitfield-loadstore.ll | 38 +- test/CodeGen/X86/live-range-nosubreg.ll | 5 +- test/CodeGen/X86/longlong-deadload.ll | 2 + test/CodeGen/X86/merge-consecutive-loads-128.ll | 20 +- test/CodeGen/X86/merge-consecutive-loads-256.ll | 8 +- .../X86/merge-store-partially-alias-loads.ll | 8 +- test/CodeGen/X86/pr18023.ll | 31 + test/CodeGen/X86/split-store.ll | 27 +- test/CodeGen/X86/stores-merging.ll | 11 +- test/CodeGen/X86/vector-compare-results.ll | 730 +++++++------- test/CodeGen/X86/vector-shuffle-variable-128.ll | 1060 +++++++++++--------- test/CodeGen/X86/vector-shuffle-variable-256.ll | 233 +++-- test/CodeGen/X86/vectorcall.ll | 4 +- test/CodeGen/X86/win32-eh.ll | 157 ++- test/CodeGen/XCore/varargs.ll | 2 +- 74 files changed, 2546 insertions(+), 2499 deletions(-) create mode 100644 test/CodeGen/X86/combiner-aa-0.ll create mode 100644 test/CodeGen/X86/combiner-aa-1.ll create mode 100644 test/CodeGen/X86/pr18023.ll