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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/gcc.
from bb04f9f23ac tree-optimization/106189 - avoid division by zero exception adds 8a1e05b7618 aarch64: Lower vcombine to GIMPLE adds f023cc54e86 aarch64: Consolidate simd type lookup functions adds c906efc700d aarch64: Move vreinterpret definitions into the compiler adds 67248ad043b Improve ptr_derefs_may_alias_p for the case of &STRING_CST adds 2615502971c Handle non constant ranges in irange pretty printer. adds 2333b58c989 c++: ICE with erroneous template redeclaration [PR106311] adds 78017eaa369 docs: fix crossing declaration of @defmac and @hook. adds 87ce0f1fd65 docs: fix previsou commit
No new revisions were added by this update.
Summary of changes: gcc/config/aarch64/aarch64-builtins.cc | 334 ++- gcc/config/aarch64/arm_neon.h | 3155 -------------------- gcc/cp/pt.cc | 5 +- gcc/doc/tm.texi | 12 +- gcc/doc/tm.texi.in | 4 +- gcc/testsuite/g++.dg/template/redecl5.C | 5 + gcc/testsuite/gcc.dg/tree-ssa/evrp4.c | 2 +- .../aarch64/advsimd-intrinsics/combine.c | 18 + gcc/tree-ssa-alias.cc | 4 +- gcc/value-range-pretty-print.cc | 33 +- gcc/value-range-pretty-print.h | 2 +- gcc/value-range.cc | 8 + 12 files changed, 361 insertions(+), 3221 deletions(-) create mode 100644 gcc/testsuite/g++.dg/template/redecl5.C create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/combine.c