[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (d050479be51 -> a612e34c147)

24 Jun 2019


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig
in repository toolchain/ci/llvm-project.
from  d050479be51 Natural MSVC visualization of constructors
      adds  780c374b205 Remove reliance on toCharUnitsFromBits rounding down.
      adds  1fa07ebd929 Fix TBAA representation for zero-sized fields and unnamed b [...]
      adds  64b0924531c Revert [CommandLine] Remove OptionCategory and SubCommand c [...]
      adds  bc85dbe2ba7 Disable -Wignored-attributes for now
      adds  5f4ae7c4571 [Support] Fix build under Emscripten
      adds  2a31c9ba677 Fix placement of -Wno-ignored-attributes
      adds  08c699a1105 MSVC visualizers for type aliases
      adds  cf92a1f6eb1 Add noexcept throughout <atomic>
      adds  6281ccea02d Revert "builtins: relax __iso_volatile_{load,store}32"
      adds  de2b633a4a0 Add super fast _IsSame trait for internal use.
      adds  8d7924560ea Disable test by default
      adds  cadd826d0af [X86][SelectionDAG] Cleanup and simplify masked_load/masked [...]
      adds  6ddc7912b0e [SelectionDAG] Remove the code that attempts to calculate t [...]
      adds  6620e3b2f69 SlotIndexes: simplify IdxMBBPair operators
      adds  13a5ae58fcf [InstCombine] squash is-power-of-2 that uses ctpop
      adds  f955d5f623d SlotIndexes: delete unused functions
      adds  d22a2a9a726 [IndVars] Remove dead instructions after folding trivial loop exit
      adds  3f8264b0628 [Tests] Autogen and improve test readability
      adds  9bc3141dc2d Fix test for 32-bit targets.
      adds  c8d94e78899 [X86] Fix isel pattern that was looking for a bitcasted loa [...]
      adds  e2291f5af92 Fix typo in comment; NFC
      adds  3359a17b3ae Apply new meta-programming traits throughout the library.
      adds  fb2bd4a9398 Use C++11 implementation of unique_ptr in C++03.
      adds  c6094f0495b [GN] Generation failure caused by trailing space in file name
      adds  e8da65c698e [X86] Turn v16i16->v16i8 truncate+store into a any_extend+t [...]
      adds  2fb6b0f2baf [ELF][PPC][X86] Use [-2**(n-1), 2**n) to check overflows fo [...]
      adds  9771f500f29 PR42362: Fix auto deduction of template parameter packs fro [...]
      adds  8c1b73591fa [llvm-readobj/llvm-readelf] - Eliminate the elf-groups.x86_ [...]
      adds  a94c18fc200 Follow up of rL363913. NFC.
      adds  bb6d0b8e7b0 [Support] Fix error handling in DataExtractor::get[US]LEB128
      adds  a5bb7b6c20e [libcxx] [test] Read files as bytestrings to fix py3 encodi [...]
      adds  3519d5535a4 [docs][llvm-nm] Improve symbol code documentation
      adds  fe8017621ea [ARM] Add MVE interleaving load/store family.
      adds  853dfab799f [OpenCL] Remove more duplicates from opencl-c.h
      adds  b502a44110f [OpenCL] Restore ATOMIC_VAR_INIT
      adds  078d711908a [sancov] Avoid unnecessary unique_ptr
      adds  2c5ff946277 [docs][llvm-nm] Add missing options to documentation
      adds  512b1187794 [Scalarizer] Add scalarizer support for smul.fix.sat
      adds  485a421876d [ConstantFolding] Use hasVectorInstrinsicScalarOpd. NFC
      adds  69144a925e7 [DAGCombine] visitMUL - allow shift by zero in MulByConstant.
      adds  ca89eb5f9c9 [clangd] Improve SelectionTree string representation
      adds  b617b0808de [InstCombine] SliceUpIllegalIntegerPHI - bail on out of ran [...]
      adds  942404d01b7 AMDGPU: Cleanup checking when spills need emergency slots
      adds  15e678e8438 [CUDA][HIP] Don't set comdat attribute for CUDA device stub [...]
      adds  f27f794d473 [InstCombine] add tests for funnel-shift to bswap; NFC
      adds  60957cb74c8 AMDGPU: Fold frame index into MUBUF
      adds  5dbd9228c44 AMDGPU/GlobalISel: Fix RegBankSelect for s1 sext/zext/anyext
      adds  89efefb170e [InstCombine] reduce funnel-shift i16 X, X, 8 to bswap X
      adds  2bc35b79380 Hexagon: Rename Register class
      adds  db26bcda8cb [OPENMP]Relax the test checks to pacify 32bit buildbots, NFC.
      adds  3260ef16bbd [AMDGPU] Remove unused variable AllSGPRSpilledToVGPRs. NFC
      adds  e3a676e9adb CodeGen: Introduce a class for registers
      adds  906d494b6e7 [analyzer] Fix JSON dumps for ExplodedNodes
      adds  faeaedf8e93 GlobalISel: Remove unsigned variant of SrcOp
      adds  f8f1ace5bb9 ARC: Fix -Wimplicit-fallthrough
      adds  ae171f1e9fe Hexagon: Rename another copy of Register class
      adds  3a4a60eb6a7 [analyzer] print() JSONify: ProgramPoint revision
      adds  9f4c7e8170c [bindings/go] Add debug information accessors
      adds  f8a841b88e2 AMDGPU/GlobalISel: Fix selecting G_IMPLICIT_DEF for s1
      adds  cf6917c6bdc [X86] Regenerate fast fadd reduction tests. NFCI
      adds  f948f6b8628 [clang][NewPM] Remove exception handling before loading pgo [...]
      adds  f336eb344c6 [clang][NewPM] Add RUNS for tests that produce slightly dif [...]
      adds  0f0bbbd4bbf [AArch64] Regenerate merge-store tests. NFCI.
      adds  de1ce8230d2 [AArch64] Regenerate 2velem tests. NFCI.
      adds  fd7d0d4e3ff [AArch64] Regenerate vcvt tests. NFCI.
      adds  033774e144b [X86] Cleanups and safety checks around the isFNEG
      adds  7fccb2ac5e3 [X86] Don't a vzext_movl in LowerBuildVectorv16i8/LowerBuil [...]
      adds  d2fdb956e04 [AMDGPU] Allow any value in unused src0 field in v_nop
      adds  9c01eaff6aa Move common functionality from processwindows into processdebugger
      adds  6e04b92c896 [llvm-objdump] Match GNU objdump on symbol types shown in d [...]
      adds  8fcd5ade3e5 AMDGPU/GlobalISel: Split VALU s64 G_ZEXT/G_SEXT in RegBankSelect
      adds  318b6dafca2 [PowerPC][UpdateTestChecks] powerpc- triple support
      adds  14d0b646b7b AMDGPU/GlobalISel: RegBankSelect for amdgcn.class
      adds  dbb6c031753 AMDGPU/GlobalISel: Select G_TRUNC
      adds  09ede9d65f1 [ABI] Implement Windows ABI for x86_64
      adds  4412d83959f Remove flag for no longer supported MSVC version
      adds  fe3f15cf900 [SLP] Support unary FNeg vectorization
      adds  b2f09391cf8 [Tests] Add cases where we're failing to discharge provably [...]
      adds  ea08248b2bc [CodeGen] Add missing vector type legalization for ctlz_zero_undef
      adds  b1f01e27ec0 [clang-doc] Add basic support for templates and typedef
      adds  73901961ee1 [ABI] Remove unused variables in ABIWindows_x86_64
      adds  94b43160963 [InstCombine] Regenerate test pr17827. NFCI.
       new  9c8282a9b33 llvm-symbolizer: Add a FRAME command.
       new  a612e34c147 Augment location information when dumping the AST to JSON.
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 clang-tools-extra/clang-doc/BitcodeReader.cpp      |    2 +
 clang-tools-extra/clang-doc/BitcodeWriter.cpp      |    4 +-
 clang-tools-extra/clang-doc/BitcodeWriter.h        |    1 +
 clang-tools-extra/clang-doc/Representation.h       |    1 +
 clang-tools-extra/clang-doc/Serialize.cpp          |   33 +-
 clang-tools-extra/clangd/Selection.cpp             |   13 +-
 .../unittests/clang-doc/BitcodeTest.cpp            |    1 +
 .../unittests/clang-doc/ClangDocTest.cpp           |    2 +
 .../unittests/clang-doc/SerializeTest.cpp          |   78 +-
 clang/include/clang/AST/JSONNodeDumper.h           |   15 +-
 clang/include/clang/Basic/Builtins.def             |    4 +-
 clang/lib/AST/JSONNodeDumper.cpp                   |   77 +-
 clang/lib/Analysis/ProgramPoint.cpp                |    3 +-
 clang/lib/CodeGen/CGExprConstant.cpp               |    3 +-
 clang/lib/CodeGen/CodeGenModule.cpp                |    5 +
 clang/lib/CodeGen/CodeGenTBAA.cpp                  |    4 +
 clang/lib/Headers/opencl-c-base.h                  |    7 +-
 clang/lib/Headers/opencl-c.h                       |   29 -
 clang/lib/Sema/SemaTemplate.cpp                    |    5 +-
 clang/lib/StaticAnalyzer/Core/ExprEngine.cpp       |    8 +-
 clang/test/AST/ast-dump-comment-json.cpp           |  589 ++---
 clang/test/AST/ast-dump-decl-json.c                |  630 +++--
 clang/test/AST/ast-dump-decl-json.m                |  544 ++---
 clang/test/AST/ast-dump-enum-json.cpp              |  187 +-
 clang/test/AST/ast-dump-expr-json.c                | 1448 +++++-------
 clang/test/AST/ast-dump-expr-json.cpp              | 2468 ++++++++------------
 clang/test/AST/ast-dump-expr-json.m                | 1369 ++++-------
 clang/test/AST/ast-dump-funcs-json.cpp             |  427 ++--
 clang/test/AST/ast-dump-if-json.cpp                |  300 +--
 clang/test/AST/ast-dump-macro-json.c               |  106 +-
 clang/test/AST/ast-dump-namespace-json.cpp         |   89 +-
 .../AST/ast-dump-record-definition-data-json.cpp   | 1386 +++++------
 clang/test/AST/ast-dump-records-json.cpp           | 1145 ++++-----
 clang/test/AST/ast-dump-stmt-json.c                | 1487 +++++-------
 clang/test/AST/ast-dump-stmt-json.cpp              | 1866 ++++++---------
 clang/test/AST/ast-dump-stmt-json.m                |  246 +-
 clang/test/AST/ast-dump-template-decls-json.cpp    |  724 +++---
 clang/test/AST/ast-dump-temporaries-json.cpp       |  103 +-
 clang/test/AST/ast-dump-types-json.cpp             |   66 +-
 clang/test/AST/multistep-explicit-cast-json.c      |  144 +-
 clang/test/AST/multistep-explicit-cast-json.cpp    |  360 +--
 clang/test/Analysis/dump_egraph.c                  |   14 +-
 clang/test/CodeGen/pgo-sample.c                    |   13 +-
 clang/test/CodeGen/tbaa-struct.cpp                 |    8 +-
 clang/test/CodeGen/tbaa.cpp                        |    8 +-
 clang/test/CodeGenCXX/ms-intrinsics.cpp            |   17 -
 clang/test/CodeGenCXX/no-unique-address.cpp        |   16 +
 clang/test/CodeGenCXX/tail-padding.cpp             |    8 +-
 clang/test/CodeGenOpenCL/convergent.cl             |   10 +-
 clang/test/Headers/opencl-c-header.cl              |    4 +
 clang/test/OpenMP/parallel_codegen.cpp             |    4 +-
 clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp |   15 +
 clang/utils/ClangVisualizers/clang.natvis          |   51 +
 libcxx/CMakeLists.txt                              |    4 +-
 libcxx/include/__tuple                             |    2 +-
 libcxx/include/atomic                              |   56 +-
 libcxx/include/cmath                               |    2 +-
 libcxx/include/functional                          |    6 +-
 libcxx/include/math.h                              |   74 +-
 libcxx/include/memory                              |  208 +-
 libcxx/include/optional                            |  101 +-
 libcxx/include/tuple                               |   52 +-
 libcxx/include/type_traits                         |  176 +-
 .../libcxx/type_traits/lazy_metafunctions.pass.cpp |   58 +-
 .../meta/stress_tests/stress_test_is_same.sh.cpp   |   57 +
 .../unique.ptr.ctor/pointer_deleter.fail.cpp       |    4 -
 libcxx/utils/libcxx/test/format.py                 |   14 +-
 lld/ELF/Arch/PPC.cpp                               |    3 +
 lld/ELF/Arch/PPC64.cpp                             |   12 +-
 lld/ELF/Arch/X86_64.cpp                            |    4 +-
 lld/ELF/Target.h                                   |    2 +-
 lld/test/ELF/Inputs/i386-reloc-16-error.s          |    3 -
 lld/test/ELF/Inputs/i386-reloc-16.s                |    3 -
 lld/test/ELF/Inputs/i386-reloc-8-error.s           |    3 -
 lld/test/ELF/Inputs/i386-reloc-8.s                 |    3 -
 lld/test/ELF/Inputs/x86-64-reloc-16-error.s        |    3 -
 lld/test/ELF/Inputs/x86-64-reloc-16.s              |    3 -
 lld/test/ELF/Inputs/x86-64-reloc-8-error.s         |    3 -
 lld/test/ELF/Inputs/x86-64-reloc-8.s               |    3 -
 lld/test/ELF/aarch64-abs16.s                       |    8 +-
 lld/test/ELF/aarch64-abs32.s                       |    8 +-
 lld/test/ELF/aarch64-prel16.s                      |    4 +-
 lld/test/ELF/aarch64-prel32.s                      |    4 +-
 lld/test/ELF/i386-reloc-16.s                       |   27 +-
 lld/test/ELF/i386-reloc-8.s                        |   27 +-
 lld/test/ELF/ppc32-reloc-addr.s                    |   10 +-
 lld/test/ELF/ppc64-addr16-error.s                  |   13 -
 lld/test/ELF/ppc64-reloc-addr.s                    |   25 +
 lld/test/ELF/x86-64-reloc-16.s                     |   14 -
 lld/test/ELF/x86-64-reloc-8-16.s                   |   25 +
 lld/test/ELF/x86-64-reloc-8.s                      |   14 -
 .../lldbutil/iter/TestRegistersIterator.py         |    1 -
 lldb/source/API/SystemInitializerFull.cpp          |    3 +
 lldb/source/Plugins/ABI/CMakeLists.txt             |    1 +
 .../Plugins/ABI/SysV-x86_64/ABISysV_x86_64.cpp     |   15 +-
 .../ABI/Windows-x86_64/ABIWindows_x86_64.cpp       | 1805 ++++++++++++++
 .../Plugins/ABI/Windows-x86_64/ABIWindows_x86_64.h |   99 +
 .../Plugins/ABI/Windows-x86_64/CMakeLists.txt      |   10 +
 .../Plugins/Process/Windows/Common/CMakeLists.txt  |    1 +
 .../Process/Windows/Common/ProcessDebugger.cpp     |  572 +++++
 .../Process/Windows/Common/ProcessDebugger.h       |  101 +
 .../Process/Windows/Common/ProcessWindows.cpp      |  473 +---
 .../Process/Windows/Common/ProcessWindows.h        |   21 +-
 .../Windows/Common/RegisterContextWindows.cpp      |   19 +-
 .../Common/x64/RegisterContextWindows_x64.cpp      |  172 +-
 llvm/bindings/go/llvm/dibuilder.go                 |   90 +
 llvm/bindings/go/llvm/ir.go                        |    3 +
 llvm/cmake/modules/HandleLLVMOptions.cmake         |    4 -
 llvm/docs/CommandGuide/llvm-nm.rst                 |  197 +-
 llvm/include/llvm/Analysis/VectorUtils.h           |    9 +-
 llvm/include/llvm/CodeGen/CallingConvLower.h       |    2 +-
 .../include/llvm/CodeGen/GlobalISel/CallLowering.h |   24 +-
 .../llvm/CodeGen/GlobalISel/CombinerHelper.h       |    5 +-
 .../include/llvm/CodeGen/GlobalISel/IRTranslator.h |   14 +-
 .../GlobalISel/LegalizationArtifactCombiner.h      |   30 +-
 .../llvm/CodeGen/GlobalISel/LegalizerHelper.h      |   22 +-
 .../llvm/CodeGen/GlobalISel/MIPatternMatch.h       |    2 +-
 .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h     |   25 +-
 llvm/include/llvm/CodeGen/MachineInstrBuilder.h    |    2 +-
 llvm/include/llvm/CodeGen/MachineOperand.h         |    5 +-
 llvm/include/llvm/CodeGen/MachineRegisterInfo.h    |    6 +-
 llvm/include/llvm/CodeGen/Register.h               |   60 +
 llvm/include/llvm/CodeGen/SlotIndexes.h            |   75 +-
 .../include/llvm/CodeGen/SwiftErrorValueTracking.h |   15 +-
 llvm/include/llvm/CodeGen/TargetRegisterInfo.h     |    2 +-
 llvm/include/llvm/CodeGen/VirtRegMap.h             |    4 +-
 llvm/include/llvm/DebugInfo/DIContext.h            |   13 +
 llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h   |    5 +
 llvm/include/llvm/DebugInfo/PDB/PDBContext.h       |    3 +
 llvm/include/llvm/DebugInfo/Symbolize/DIPrinter.h  |    2 +
 .../llvm/DebugInfo/Symbolize/SymbolizableModule.h  |    2 +
 llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h  |    3 +
 llvm/include/llvm/Support/CommandLine.h            |   46 +-
 llvm/include/llvm/Target/TargetSelectionDAG.td     |    4 +-
 llvm/lib/Analysis/ConstantFolding.cpp              |   29 +-
 llvm/lib/Analysis/VectorUtils.cpp                  |   10 +-
 .../AsmPrinter/DbgEntityHistoryCalculator.cpp      |    4 +-
 llvm/lib/CodeGen/GlobalISel/CallLowering.cpp       |    8 +-
 llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp     |   10 +-
 llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp       |  224 +-
 llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp    |  376 +--
 llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp   |   26 +-
 llvm/lib/CodeGen/LiveDebugValues.cpp               |    4 +-
 llvm/lib/CodeGen/MachineOperand.cpp                |    2 +-
 llvm/lib/CodeGen/MachineRegisterInfo.cpp           |    6 +-
 llvm/lib/CodeGen/RegAllocGreedy.cpp                |    4 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |   27 +-
 .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp   |   18 +-
 .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp   |    2 +-
 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp |    2 +-
 llvm/lib/CodeGen/SlotIndexes.cpp                   |   17 +-
 llvm/lib/CodeGen/SwiftErrorValueTracking.cpp       |   24 +-
 llvm/lib/CodeGen/TargetInstrInfo.cpp               |    6 +-
 llvm/lib/DebugInfo/DWARF/DWARFContext.cpp          |  119 +
 llvm/lib/DebugInfo/PDB/PDBContext.cpp              |    5 +
 llvm/lib/DebugInfo/Symbolize/DIPrinter.cpp         |   23 +
 .../DebugInfo/Symbolize/SymbolizableObjectFile.cpp |    8 +
 .../DebugInfo/Symbolize/SymbolizableObjectFile.h   |    2 +
 llvm/lib/DebugInfo/Symbolize/Symbolize.cpp         |   23 +
 llvm/lib/Support/CommandLine.cpp                   |  107 +-
 llvm/lib/Support/DataExtractor.cpp                 |   28 +-
 llvm/lib/Support/Unix/Path.inc                     |    3 +
 llvm/lib/Target/AArch64/AArch64CallLowering.cpp    |   42 +-
 llvm/lib/Target/AArch64/AArch64CallLowering.h      |    8 +-
 llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp   |    6 +-
 .../Target/AArch64/AArch64InstructionSelector.cpp  |  210 +-
 .../AArch64/AArch64RedundantCopyElimination.cpp    |    4 +-
 llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp    |    2 +-
 llvm/lib/Target/AArch64/AArch64RegisterInfo.h      |    2 +-
 llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp      |   38 +-
 llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h        |    8 +-
 .../Target/AMDGPU/AMDGPUInstructionSelector.cpp    |   89 +-
 llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |    1 +
 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp     |   32 +-
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |  169 +-
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h    |    3 +-
 llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp      |    2 +-
 llvm/lib/Target/AMDGPU/R600Packetizer.cpp          |    4 +-
 llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp        |    2 +-
 llvm/lib/Target/AMDGPU/R600RegisterInfo.h          |    2 +-
 llvm/lib/Target/AMDGPU/SIFoldOperands.cpp          |   54 +-
 llvm/lib/Target/AMDGPU/SIFrameLowering.cpp         |   19 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.h               |    5 +
 llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp      |   10 +-
 llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp          |   79 +-
 llvm/lib/Target/AMDGPU/SIRegisterInfo.h            |   14 +-
 llvm/lib/Target/AMDGPU/VOP1Instructions.td         |    2 +-
 llvm/lib/Target/ARC/ARCOptAddrMode.cpp             |    2 +-
 llvm/lib/Target/ARC/ARCRegisterInfo.cpp            |    8 +-
 llvm/lib/Target/ARC/ARCRegisterInfo.h              |    2 +-
 llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp        |    4 +-
 llvm/lib/Target/ARM/ARMBaseRegisterInfo.h          |    2 +-
 llvm/lib/Target/ARM/ARMCallLowering.cpp            |   50 +-
 llvm/lib/Target/ARM/ARMCallLowering.h              |    6 +-
 llvm/lib/Target/ARM/ARMInstrMVE.td                 |  134 ++
 llvm/lib/Target/ARM/ARMInstrThumb2.td              |    4 +-
 llvm/lib/Target/ARM/ARMLegalizerInfo.cpp           |    2 +-
 llvm/lib/Target/ARM/ARMRegisterInfo.td             |    9 -
 llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp     |  105 +-
 .../Target/ARM/Disassembler/ARMDisassembler.cpp    |   36 +
 .../lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp |   14 +
 llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h  |    3 +
 llvm/lib/Target/BPF/BPFRegisterInfo.cpp            |    2 +-
 llvm/lib/Target/BPF/BPFRegisterInfo.h              |    2 +-
 .../lib/Target/Hexagon/HexagonConstPropagation.cpp |  177 +-
 llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp   |    4 +-
 llvm/lib/Target/Hexagon/HexagonGenMux.cpp          |    4 +-
 llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp    |   66 +-
 llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp    |    2 +-
 llvm/lib/Target/Hexagon/HexagonRegisterInfo.h      |    2 +-
 llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp        |    4 +-
 llvm/lib/Target/Lanai/LanaiRegisterInfo.h          |    4 +-
 llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp      |    2 +-
 llvm/lib/Target/MSP430/MSP430RegisterInfo.h        |    2 +-
 llvm/lib/Target/Mips/MipsCallLowering.cpp          |   90 +-
 llvm/lib/Target/Mips/MipsCallLowering.h            |   20 +-
 llvm/lib/Target/Mips/MipsInstructionSelector.cpp   |   43 +-
 llvm/lib/Target/Mips/MipsMachineFunction.cpp       |    4 +-
 llvm/lib/Target/Mips/MipsMachineFunction.h         |    4 +-
 llvm/lib/Target/Mips/MipsRegisterInfo.cpp          |    2 +-
 llvm/lib/Target/Mips/MipsRegisterInfo.h            |    2 +-
 llvm/lib/Target/Mips/MipsSEISelLowering.cpp        |   16 +-
 llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp        |    2 +-
 llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h          |    2 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |  104 +-
 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp           |   16 +-
 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp        |    4 +-
 llvm/lib/Target/PowerPC/PPCRegisterInfo.h          |    4 +-
 llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp        |    2 +-
 llvm/lib/Target/RISCV/RISCVRegisterInfo.h          |    2 +-
 llvm/lib/Target/Sparc/SparcRegisterInfo.cpp        |    2 +-
 llvm/lib/Target/Sparc/SparcRegisterInfo.h          |    2 +-
 llvm/lib/Target/SystemZ/SystemZElimCompare.cpp     |    6 +-
 llvm/lib/Target/SystemZ/SystemZISelLowering.cpp    |   54 +-
 llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp       |    8 +-
 llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp    |    6 +-
 llvm/lib/Target/SystemZ/SystemZRegisterInfo.h      |    2 +-
 .../Target/WebAssembly/WebAssemblyRegisterInfo.cpp |    4 +-
 .../Target/WebAssembly/WebAssemblyRegisterInfo.h   |    2 +-
 llvm/lib/Target/X86/X86CallLowering.cpp            |   38 +-
 llvm/lib/Target/X86/X86CallLowering.h              |    6 +-
 llvm/lib/Target/X86/X86FrameLowering.cpp           |   20 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   52 +-
 llvm/lib/Target/X86/X86InstrAVX512.td              |   40 +-
 llvm/lib/Target/X86/X86InstrFragmentsSIMD.td       |   62 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp               |    6 +-
 llvm/lib/Target/X86/X86InstrSSE.td                 |    8 +-
 llvm/lib/Target/X86/X86RegisterInfo.cpp            |    2 +-
 llvm/lib/Target/X86/X86RegisterInfo.h              |    8 +-
 llvm/lib/Target/XCore/XCoreRegisterInfo.cpp        |    4 +-
 llvm/lib/Target/XCore/XCoreRegisterInfo.h          |    2 +-
 .../Transforms/InstCombine/InstCombineAndOrXor.cpp |   23 +
 .../Transforms/InstCombine/InstCombineCalls.cpp    |    7 +
 llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp |    5 +
 llvm/lib/Transforms/Scalar/IndVarSimplify.cpp      |   10 +-
 llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp    |   32 +-
 llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll     | 2101 +++++++++++++----
 llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll          |  143 +-
 llvm/test/CodeGen/AArch64/merge-store.ll           |   44 +-
 .../AMDGPU/GlobalISel/inst-select-implicit-def.mir |  160 +-
 .../AMDGPU/GlobalISel/inst-select-trunc.mir        |  373 +++
 ...t-anyext.mir => regbankselect-amdgcn.class.mir} |   18 +-
 .../AMDGPU/GlobalISel/regbankselect-anyext.mir     |  216 +-
 .../AMDGPU/GlobalISel/regbankselect-sext.mir       |  286 ++-
 .../AMDGPU/GlobalISel/regbankselect-zext.mir       |  283 ++-
 llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll      |   41 +
 llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir         |  134 ++
 .../test/CodeGen/AMDGPU/frame-index-elimination.ll |   13 +-
 .../test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll |   26 +
 .../CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll    |    3 +-
 llvm/test/CodeGen/PowerPC/varargs.ll               |   63 +-
 llvm/test/CodeGen/PowerPC/vec_clz.ll               |   89 +-
 .../CodeGen/X86/avx512-intrinsics-fast-isel.ll     |   38 +-
 llvm/test/CodeGen/X86/combine-mul.ll               |   24 +
 .../test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll |    6 +-
 llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll      |    6 +-
 llvm/test/CodeGen/X86/vec_clz.ll                   |   85 +
 llvm/test/CodeGen/X86/vector-reduce-fadd-fast.ll   |    4 +-
 llvm/test/CodeGen/X86/vector-trunc-widen.ll        |    4 +-
 llvm/test/CodeGen/X86/vector-trunc.ll              |    4 +-
 llvm/test/MC/ARM/mve-interleave.s                  |  270 +++
 llvm/test/MC/Disassembler/AMDGPU/nop.txt           |    3 +
 llvm/test/MC/Disassembler/AMDGPU/vop1.txt          |    3 +
 llvm/test/MC/Disassembler/AMDGPU/vop1_vi.txt       |    3 +
 llvm/test/MC/Disassembler/ARM/mve-interleave.txt   |  267 +++
 .../IndVarSimplify/eliminate-comparison.ll         |    8 +-
 .../Transforms/IndVarSimplify/eliminate-exit.ll    |  193 ++
 .../Transforms/IndVarSimplify/eliminate-trunc.ll   |    8 -
 .../Transforms/IndVarSimplify/floating-point-iv.ll |  141 +-
 llvm/test/Transforms/InstCombine/fsh.ll            |   47 +-
 llvm/test/Transforms/InstCombine/ispow2.ll         |   26 +-
 llvm/test/Transforms/InstCombine/phi-shifts.ll     |   26 +
 llvm/test/Transforms/InstCombine/pr17827.ll        |   12 +-
 llvm/test/Transforms/SLPVectorizer/X86/phi3.ll     |    6 +-
 .../SLPVectorizer/X86/propagate_ir_flags.ll        |   26 +-
 llvm/test/Transforms/Scalarizer/intrinsics.ll      |   17 +-
 .../X86/elf-disassemble-dynamic-symbols.test       |   59 +-
 .../tools/llvm-readobj/Inputs/elf-groups.x86_64    |  Bin 4384 -> 0 bytes
 llvm/test/tools/llvm-readobj/elf-groups.test       |  134 +-
 llvm/test/tools/llvm-readobj/print-section.test    |    8 -
 llvm/test/tools/llvm-symbolizer/frame-fortran.s    |  230 ++
 llvm/test/tools/llvm-symbolizer/frame-types.s      |  532 +++++
 llvm/test/tools/llvm-symbolizer/frame.s            |  687 ++++++
 llvm/tools/llvm-objdump/llvm-objdump.cpp           |   19 +-
 llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp     |   31 +-
 llvm/tools/sancov/sancov.cpp                       |   22 +-
 llvm/unittests/CodeGen/GlobalISel/GISelMITest.h    |    4 +-
 .../CodeGen/GlobalISel/MachineIRBuilderTest.cpp    |   18 +-
 .../CodeGen/GlobalISel/PatternMatchTest.cpp        |   26 +-
 llvm/unittests/Support/CommandLineTest.cpp         |   60 +-
 llvm/unittests/Support/DataExtractorTest.cpp       |   10 +
 llvm/unittests/Support/TargetParserTest.cpp        |   12 +-
 llvm/utils/UpdateTestChecks/asm.py                 |    3 +-
 .../gn/secondary/compiler-rt/lib/builtins/BUILD.gn |    2 +-
 314 files changed, 18264 insertions(+), 13269 deletions(-)
 delete mode 100644 clang/test/CodeGenCXX/ms-intrinsics.cpp
 create mode 100644 libcxx/test/libcxx/utilities/meta/stress_tests/stress_test_is_s [...]
 delete mode 100644 lld/test/ELF/Inputs/i386-reloc-16-error.s
 delete mode 100644 lld/test/ELF/Inputs/i386-reloc-16.s
 delete mode 100644 lld/test/ELF/Inputs/i386-reloc-8-error.s
 delete mode 100644 lld/test/ELF/Inputs/i386-reloc-8.s
 delete mode 100644 lld/test/ELF/Inputs/x86-64-reloc-16-error.s
 delete mode 100644 lld/test/ELF/Inputs/x86-64-reloc-16.s
 delete mode 100644 lld/test/ELF/Inputs/x86-64-reloc-8-error.s
 delete mode 100644 lld/test/ELF/Inputs/x86-64-reloc-8.s
 delete mode 100644 lld/test/ELF/ppc64-addr16-error.s
 create mode 100644 lld/test/ELF/ppc64-reloc-addr.s
 delete mode 100644 lld/test/ELF/x86-64-reloc-16.s
 create mode 100644 lld/test/ELF/x86-64-reloc-8-16.s
 delete mode 100644 lld/test/ELF/x86-64-reloc-8.s
 create mode 100644 lldb/source/Plugins/ABI/Windows-x86_64/ABIWindows_x86_64.cpp
 create mode 100644 lldb/source/Plugins/ABI/Windows-x86_64/ABIWindows_x86_64.h
 create mode 100644 lldb/source/Plugins/ABI/Windows-x86_64/CMakeLists.txt
 create mode 100644 lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
 create mode 100644 lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.h
 create mode 100644 llvm/include/llvm/CodeGen/Register.h
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
 copy llvm/test/CodeGen/AMDGPU/GlobalISel/{regbankselect-anyext.mir => regbankselec [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir
 create mode 100644 llvm/test/CodeGen/X86/vec_clz.ll
 create mode 100644 llvm/test/MC/ARM/mve-interleave.s
 create mode 100644 llvm/test/MC/Disassembler/ARM/mve-interleave.txt
 create mode 100644 llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll
 create mode 100644 llvm/test/Transforms/InstCombine/phi-shifts.ll
 delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/elf-groups.x86_64
 delete mode 100644 llvm/test/tools/llvm-readobj/print-section.test
 create mode 100644 llvm/test/tools/llvm-symbolizer/frame-fortran.s
 create mode 100644 llvm/test/tools/llvm-symbolizer/frame-types.s
 create mode 100644 llvm/test/tools/llvm-symbolizer/frame.s
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (d050479be51 -> a612e34c147)