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from 29c8649d15f [X86] EltsFromConsecutiveLoads - remove duplicate check for [...] new a628c38932e GlobalISel: Define the full family of FP min/max instructions new 2e07d5cebb4 GlobalISel: Legalization for G_FMINNUM/G_FMAXNUM new 899d0e64382 [CodeExtractor] Simplify findAllocas, NFC new 0edfaf6dd29 [CodeExtractor] Fix sinking of allocas with multiple bitcas [...] new 9762d9b9791 MC: AArch64: Add support for pg_hi21_nc relocation specifier.
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Summary of changes: include/llvm/CodeGen/GlobalISel/LegalizerHelper.h | 3 + include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 6 + include/llvm/CodeGen/GlobalISel/Utils.h | 11 + include/llvm/Support/TargetOpcodes.def | 12 + include/llvm/Target/GenericOpcodes.td | 56 +++ include/llvm/Transforms/Utils/CodeExtractor.h | 10 + lib/CodeGen/GlobalISel/IRTranslator.cpp | 8 + lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 46 ++ lib/CodeGen/GlobalISel/Utils.cpp | 25 + lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 2 + lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 56 ++- lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 2 + lib/Transforms/Utils/CodeExtractor.cpp | 186 ++++--- .../irtranslator-fp-min-max-intrinsics.ll | 88 ++++ .../GlobalISel/legalizer-info-validation.mir | 18 + .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir | 533 +++++++++++++++++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir | 533 +++++++++++++++++++++ test/MC/AArch64/adrp-relocation2.s | 7 + .../CodeExtractor/live_shrink_multiple.ll | 2 +- .../sink-multiple-bitcasts-of-allocas-pr42451.ll | 74 +++ 20 files changed, 1600 insertions(+), 78 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir create mode 100644 test/MC/AArch64/adrp-relocation2.s create mode 100644 test/Transforms/HotColdSplit/sink-multiple-bitcasts-of-allocas- [...]