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from 6e5a196399d libstdc++: Always return a sentinel<I> from __gnu_test::tes [...] new 2171a9207f5 aarch64: Fix SVE PCS failures for BE & ILP32 new 3669677425f aarch64: Add Armv8.6 SVE matrix multiply support new 02fcd8ac408 aarch64: Add svbfloat16_t support to arm_sve.h new 896dff99e18 aarch64: Add Armv8.6 SVE bfloat16 support
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/ChangeLog | 156 ++++++++ gcc/config/aarch64/aarch64-c.c | 7 +- gcc/config/aarch64/aarch64-modes.def | 13 +- gcc/config/aarch64/aarch64-option-extensions.def | 40 ++- gcc/config/aarch64/aarch64-sve-builtins-base.cc | 90 ++++- gcc/config/aarch64/aarch64-sve-builtins-base.def | 75 ++-- gcc/config/aarch64/aarch64-sve-builtins-base.h | 20 ++ gcc/config/aarch64/aarch64-sve-builtins-shapes.cc | 285 +++++++++++++-- gcc/config/aarch64/aarch64-sve-builtins-shapes.h | 10 + gcc/config/aarch64/aarch64-sve-builtins-sve2.cc | 1 - gcc/config/aarch64/aarch64-sve-builtins-sve2.def | 6 +- gcc/config/aarch64/aarch64-sve-builtins-sve2.h | 1 - gcc/config/aarch64/aarch64-sve-builtins.cc | 49 ++- gcc/config/aarch64/aarch64-sve-builtins.def | 2 + gcc/config/aarch64/aarch64-sve-builtins.h | 1 + gcc/config/aarch64/aarch64-sve.md | 214 ++++++++++- gcc/config/aarch64/aarch64-sve2.md | 14 +- gcc/config/aarch64/aarch64.c | 8 +- gcc/config/aarch64/aarch64.h | 15 +- gcc/config/aarch64/arm_sve.h | 1 + gcc/config/aarch64/iterators.md | 116 +++++- gcc/doc/invoke.texi | 4 + gcc/testsuite/ChangeLog | 395 +++++++++++++++++++++ .../aarch64/sve/acle/general-c++/mangle_1.C | 2 + .../aarch64/sve/acle/general-c++/mangle_2.C | 2 + .../gcc.target/aarch64/pragma_cpp_predefs_2.c | 109 +++++- .../gcc.target/aarch64/sve/acle/asm/bfdot_f32.c | 67 ++++ .../aarch64/sve/acle/asm/bfdot_lane_f32.c | 86 +++++ .../gcc.target/aarch64/sve/acle/asm/bfmlalb_f32.c | 67 ++++ .../aarch64/sve/acle/asm/bfmlalb_lane_f32.c | 86 +++++ .../gcc.target/aarch64/sve/acle/asm/bfmlalt_f32.c | 67 ++++ .../aarch64/sve/acle/asm/bfmlalt_lane_f32.c | 86 +++++ .../gcc.target/aarch64/sve/acle/asm/bfmmla_f32.c | 46 +++ .../sve/acle/asm/{clasta_f16.c => clasta_bf16.c} | 30 +- .../sve/acle/asm/{clastb_f16.c => clastb_bf16.c} | 30 +- .../gcc.target/aarch64/sve/acle/asm/cnt_bf16.c | 52 +++ .../gcc.target/aarch64/sve/acle/asm/create2_1.c | 10 + .../gcc.target/aarch64/sve/acle/asm/create3_1.c | 11 + .../gcc.target/aarch64/sve/acle/asm/create4_1.c | 12 + .../gcc.target/aarch64/sve/acle/asm/cvt_bf16.c | 96 +++++ .../gcc.target/aarch64/sve/acle/asm/cvtnt_bf16.c | 90 +++++ .../gcc.target/aarch64/sve/acle/asm/dup_bf16.c | 41 +++ .../aarch64/sve/acle/asm/dup_lane_bf16.c | 108 ++++++ .../aarch64/sve/acle/asm/dupq_lane_bf16.c | 48 +++ .../aarch64/sve/acle/asm/{ext_f16.c => ext_bf16.c} | 42 +-- .../gcc.target/aarch64/sve/acle/asm/get2_bf16.c | 55 +++ .../gcc.target/aarch64/sve/acle/asm/get3_bf16.c | 108 ++++++ .../gcc.target/aarch64/sve/acle/asm/get4_bf16.c | 179 ++++++++++ .../gcc.target/aarch64/sve/acle/asm/insr_bf16.c | 22 ++ .../gcc.target/aarch64/sve/acle/asm/lasta_bf16.c | 21 ++ .../gcc.target/aarch64/sve/acle/asm/lastb_bf16.c | 21 ++ .../aarch64/sve/acle/asm/{ld1_s16.c => ld1_bf16.c} | 96 ++--- .../gcc.target/aarch64/sve/acle/asm/ld1ro_bf16.c | 120 +++++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1rq_bf16.c | 137 +++++++ .../aarch64/sve/acle/asm/{ld2_f16.c => ld2_bf16.c} | 120 +++---- .../aarch64/sve/acle/asm/{ld3_f16.c => ld3_bf16.c} | 144 ++++---- .../aarch64/sve/acle/asm/{ld4_f16.c => ld4_bf16.c} | 168 ++++----- .../sve/acle/asm/{ldff1_u16.c => ldff1_bf16.c} | 48 +-- .../gcc.target/aarch64/sve/acle/asm/ldnf1_bf16.c | 154 ++++++++ .../sve/acle/asm/{ldnt1_s16.c => ldnt1_bf16.c} | 96 ++--- .../aarch64/sve/acle/asm/{len_f16.c => len_bf16.c} | 6 +- .../gcc.target/aarch64/sve/acle/asm/mmla_f32.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/mmla_f64.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/mmla_s32.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/mmla_u32.c | 46 +++ .../aarch64/sve/acle/asm/reinterpret_bf16.c | 207 +++++++++++ .../aarch64/sve/acle/asm/reinterpret_f16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_f32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_f64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s8.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u8.c | 17 + .../aarch64/sve/acle/asm/{rev_f16.c => rev_bf16.c} | 12 +- .../aarch64/sve/acle/asm/{sel_f16.c => sel_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/set2_bf16.c | 41 +++ .../gcc.target/aarch64/sve/acle/asm/set3_bf16.c | 63 ++++ .../gcc.target/aarch64/sve/acle/asm/set4_bf16.c | 87 +++++ .../sve/acle/asm/{splice_f16.c => splice_bf16.c} | 18 +- .../aarch64/sve/acle/asm/{st1_f16.c => st1_bf16.c} | 96 ++--- .../aarch64/sve/acle/asm/{st2_f16.c => st2_bf16.c} | 120 +++---- .../aarch64/sve/acle/asm/{st3_f16.c => st3_bf16.c} | 144 ++++---- .../aarch64/sve/acle/asm/{st4_u16.c => st4_bf16.c} | 168 ++++----- .../sve/acle/asm/{stnt1_s16.c => stnt1_bf16.c} | 96 ++--- .../aarch64/sve/acle/asm/sudot_lane_s32.c | 97 +++++ .../gcc.target/aarch64/sve/acle/asm/sudot_s32.c | 45 +++ .../gcc.target/aarch64/sve/acle/asm/tbl_bf16.c | 30 ++ .../aarch64/sve/acle/asm/test_sve_acle.h | 49 +++ .../sve/acle/asm/{trn1_f16.c => trn1_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u8.c | 32 ++ .../sve/acle/asm/{trn2_f16.c => trn2_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/undef2_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef3_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef4_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef_1.c | 7 + .../aarch64/sve/acle/asm/usdot_lane_s32.c | 97 +++++ .../gcc.target/aarch64/sve/acle/asm/usdot_s32.c | 46 +++ .../gcc.target/aarch64/sve/acle/asm/usmmla_s32.c | 46 +++ .../sve/acle/asm/{uzp1_f16.c => uzp1_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c | 32 ++ .../sve/acle/asm/{uzp2_f16.c => uzp2_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c | 32 ++ .../sve/acle/asm/{zip1_f16.c => zip1_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u8.c | 32 ++ .../sve/acle/asm/{zip2_f16.c => zip2_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/general-c/mmla_1.c | 58 +++ .../gcc.target/aarch64/sve/acle/general-c/mmla_2.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_3.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_4.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_5.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_6.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_7.c | 10 + .../sve/acle/general-c/ternary_bfloat16_1.c | 24 ++ .../sve/acle/general-c/ternary_bfloat16_lane_1.c | 30 ++ .../sve/acle/general-c/ternary_bfloat16_lanex2_1.c | 30 ++ .../sve/acle/general-c/ternary_bfloat16_opt_n_1.c | 24 ++ .../sve/acle/general-c/ternary_intq_uintq_lane_1.c | 32 ++ .../acle/general-c/ternary_intq_uintq_opt_n_1.c | 37 ++ .../sve/acle/general-c/ternary_uintq_intq_1.c | 37 ++ .../sve/acle/general-c/ternary_uintq_intq_lane_1.c | 32 ++ .../acle/general-c/ternary_uintq_intq_opt_n_1.c | 37 ++ .../gcc.target/aarch64/sve/pcs/annotate_1.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_2.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_3.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_4.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_5.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_6.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_7.c | 8 + gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c | 2 +- .../sve/pcs/{args_5_be_s16.c => args_5_be_bf16.c} | 16 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u8.c | 2 +- .../sve/pcs/{args_5_le_f16.c => args_5_le_bf16.c} | 16 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u8.c | 2 +- .../sve/pcs/{args_6_be_u16.c => args_6_be_bf16.c} | 32 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u8.c | 2 +- .../sve/pcs/{args_6_le_u16.c => args_6_le_bf16.c} | 32 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_7.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_9.c | 2 +- .../gcc.target/aarch64/sve/pcs/gnu_vectors_1.c | 12 +- .../gcc.target/aarch64/sve/pcs/gnu_vectors_2.c | 10 +- .../gcc.target/aarch64/sve/pcs/return_1.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_1024.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_128.c | 4 +- .../gcc.target/aarch64/sve/pcs/return_1_2048.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_256.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_512.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_2.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_3.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_4.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_1024.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_128.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_2048.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_256.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_512.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_1024.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_128.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_2048.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_256.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_512.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_6.c | 16 +- .../gcc.target/aarch64/sve/pcs/return_6_1024.c | 24 +- .../gcc.target/aarch64/sve/pcs/return_6_128.c | 23 +- .../gcc.target/aarch64/sve/pcs/return_6_2048.c | 24 +- .../gcc.target/aarch64/sve/pcs/return_6_256.c | 24 +- .../gcc.target/aarch64/sve/pcs/return_6_512.c | 24 +- .../gcc.target/aarch64/sve/pcs/return_7.c | 28 ++ .../gcc.target/aarch64/sve/pcs/return_8.c | 29 ++ .../gcc.target/aarch64/sve/pcs/return_9.c | 33 ++ .../gcc.target/aarch64/sve/pcs/saves_2_be_nowrap.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_2_be_wrap.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_2_le_nowrap.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_2_le_wrap.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/saves_3.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_4_be.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_4_le.c | 2 +- .../gcc.target/aarch64/sve/pcs/stack_clash_2_128.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_1.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u8.c | 2 +- .../gcc.target/aarch64/sve2/acle/asm/tbl2_bf16.c | 30 ++ .../sve2/acle/asm/{tbx_s16.c => tbx_bf16.c} | 20 +- .../aarch64/sve2/acle/asm/whilerw_bf16.c | 50 +++ .../aarch64/sve2/acle/asm/whilewr_bf16.c | 50 +++ gcc/testsuite/lib/target-supports.exp | 2 +- 322 files changed, 8922 insertions(+), 1069 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfdot_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfdot_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmlalb_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmlalb_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmlalt_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmlalt_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmmla_f32.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{clasta_f16.c => clasta_bf16.c} (50%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{clastb_f16.c => clastb_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/cnt_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/cvt_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/cvtnt_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dup_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dup_lane_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dupq_lane_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ext_f16.c => ext_bf16.c} (52%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/get2_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/get3_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/get4_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/insr_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lasta_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lastb_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ld1_s16.c => ld1_bf16.c} (51%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1rq_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ld2_f16.c => ld2_bf16.c} (54%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ld3_f16.c => ld3_bf16.c} (53%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ld4_f16.c => ld4_bf16.c} (54%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ldff1_u16.c => ldff1_bf16.c} (55%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ldnf1_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ldnt1_s16.c => ldnt1_bf16.c} (51%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{len_f16.c => len_bf16.c} (59%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mmla_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mmla_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mmla_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mmla_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/reinterpret_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{rev_f16.c => rev_bf16.c} (52%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{sel_f16.c => sel_bf16.c} (51%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/set2_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/set3_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/set4_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{splice_f16.c => splice_bf16.c} (55%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{st1_f16.c => st1_bf16.c} (51%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{st2_f16.c => st2_bf16.c} (55%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{st3_f16.c => st3_bf16.c} (53%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{st4_u16.c => st4_bf16.c} (53%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{stnt1_s16.c => stnt1_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sudot_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sudot_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/tbl_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{trn1_f16.c => trn1_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_u8.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{trn2_f16.c => trn2_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn2q_u8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/usdot_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/usdot_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/usmmla_s32.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{uzp1_f16.c => uzp1_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{uzp2_f16.c => uzp2_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{zip1_f16.c => zip1_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_u8.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{zip2_f16.c => zip2_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_u8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_bfl [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_bfl [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_bfl [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_bfl [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_int [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_int [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_uin [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_uin [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_uin [...] copy gcc/testsuite/gcc.target/aarch64/sve/pcs/{args_5_be_s16.c => args_5_be_bf16.c} (83%) copy gcc/testsuite/gcc.target/aarch64/sve/pcs/{args_5_le_f16.c => args_5_le_bf16.c} (82%) copy gcc/testsuite/gcc.target/aarch64/sve/pcs/{args_6_be_u16.c => args_6_be_bf16.c} (72%) copy gcc/testsuite/gcc.target/aarch64/sve/pcs/{args_6_le_u16.c => args_6_le_bf16.c} (71%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/tbl2_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/{tbx_s16.c => tbx_bf16.c} (54%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/whilerw_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/whilewr_bf16.c