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from fbdb03fa563 [RISCV] Implement lowering of ISD::SELECT new ba7bdbf84e7 [RISCV] Support and tests for a variety of additional LLVM [...]
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Summary of changes: lib/Target/RISCV/RISCVISelLowering.cpp | 106 +++++- lib/Target/RISCV/RISCVISelLowering.h | 2 + lib/Target/RISCV/RISCVInstrInfo.td | 20 + lib/Target/RISCV/RISCVMCInstLower.cpp | 8 + test/CodeGen/RISCV/addc-adde-sube-subc.ll | 30 ++ test/CodeGen/RISCV/alu32.ll | 4 + test/CodeGen/RISCV/blockaddress.ll | 28 ++ test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 547 ++++++++++++++++++++++++++++ test/CodeGen/RISCV/div.ll | 134 +++++++ test/CodeGen/RISCV/i32-icmp.ll | 114 ++++++ test/CodeGen/RISCV/indirectbr.ll | 36 ++ test/CodeGen/RISCV/jumptable.ll | 63 ++++ test/CodeGen/RISCV/mul.ll | 81 ++++ test/CodeGen/RISCV/rem.ll | 29 ++ test/CodeGen/RISCV/rotl-rotr.ll | 38 ++ test/CodeGen/RISCV/sext-zext-trunc.ll | 296 +++++++++++++++ test/CodeGen/RISCV/shifts.ll | 45 +++ 17 files changed, 1566 insertions(+), 15 deletions(-) create mode 100644 test/CodeGen/RISCV/addc-adde-sube-subc.ll create mode 100644 test/CodeGen/RISCV/blockaddress.ll create mode 100644 test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll create mode 100644 test/CodeGen/RISCV/div.ll create mode 100644 test/CodeGen/RISCV/i32-icmp.ll create mode 100644 test/CodeGen/RISCV/indirectbr.ll create mode 100644 test/CodeGen/RISCV/jumptable.ll create mode 100644 test/CodeGen/RISCV/mul.ll create mode 100644 test/CodeGen/RISCV/rem.ll create mode 100644 test/CodeGen/RISCV/rotl-rotr.ll create mode 100644 test/CodeGen/RISCV/sext-zext-trunc.ll create mode 100644 test/CodeGen/RISCV/shifts.ll