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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/llvm-project.
from 24215fec9a6 [NFC][VE] format VEInstrInfo adds 95a9b828f3d AMDGPU/GlobalISel: Fix mem size in test adds e4bc55bd94b AMDGPU/GlobalISel: Reduce indentation adds eacca482446 [Concepts] Instantiate invented template type parameter typ [...] adds fad012bce1c Reland "[lldb] Increase the rate at which ConstString's mem [...] adds 8c16d8b235b Revert "[Concepts] Instantiate invented template type param [...] adds e78fb556c55 [InstCombine] reassociate splatted vector ops adds b99ed5c0b4f [Hexagon] Rename FeatureHasPreV65 to FeaturePreV65 adds 68cf574857c [FPEnv][AArch64] Add lowering of f128 STRICT_FSETCC adds 1ca740387b9 [OpenMP][OMPIRBuilder] Add Directives (master and critical) [...] adds 84959ae47f4 [Concepts] Instantiate invented template type parameter typ [...] adds 9dcfc7cd64a Revert "[OpenMP][OMPIRBuilder] Add Directives (master and c [...] adds 00b22df71d8 AMDGPU: Fix extra type mangling on llvm.amdgcn.if.break adds a9ee3ffbc07 [X86] Move BEXTR DemandedBits handling inside SimplifyDeman [...] adds 241c9a50b45 [X86] Add some initial BEXTR combine tests adds 7d4c23b349f [clang-tidy] Fix a false positive about C++17 deduced class [...] adds 07c9f7574d6 [VE] vaarg functions callers and callees adds 5c2e6207b7c [InstCombine] regenerate complete test checks; NFC adds cb8e69148db [OPENMP50]Basic parsing/sema analysis for order(concurrent) [...] adds 028579b51e5 [X86] FUCOMI/FCOMI instructions should Def FPSW not FPCW. adds 1cc3db1a660 build_llvm_package.bat: Use a short form of the git revision adds 8ead5df0b11 [X86] computeKnownBitsForTargetNode - add BEXTR support (PR39153) adds be9fe6aa8bd [VE] (fp)trunc+store & load+(fp)ext isel adds b3d7d1061dc Declare __builtin_strlen in StringRef.h as constexpr adds 333f2ad8b84 [Alignment][NFC] Use Align for getMemcpy/Memmove/Memset adds ad7b908b4ef [libFuzzer] Make dataflow and focus functions more user friendly. adds ff837aa63cd Actually, don't try to use __builtin_strlen in StringRef.h [...] adds 8c0e715eb28 [X86] BEXTR SimplifyDemandedBitsForTargetNode - length == 0 [...] adds 61621f826a5 [TargetLowering] SimplifyDemandedBits - add basic KnownBits [...] adds bdfcdb1fb3f HexagonOptAddrMode::changeStore - fix null dereference warn [...] adds b2e884bee7e [InstCombine] add tests for casted phi; NFC adds 05297b7cbe9 [AMDGPU] getMemOperandsWithOffset: add resource operand for [...] adds bed4d9c8979 [ThinLTO] More efficient export computation (NFC) adds a781521867e [OPENMP50]Codegen support for order(concurrent) clause. adds 6c3252e5211 [OPENMP][DOCS]Update status of conditional lastprivate, NFC. adds a59954051ef [InstCombine] Fix unused variable warning; NFC adds 9eb74f609d6 [Examples] Link BitReader in ThinLtoJIT example adds 1cc4f8d1724 [ARM] Expand vector reduction intrinsics on soft float adds 789a46f2d74 [CodeGenModule] Assume dso_local for -fpic -fno-semantic-in [...] adds e6c9ab4fb74 [InstCombine] Rename worklist methods; NFC adds 878cb38a5c4 [InstCombine] Add replaceOperand() helper adds 3ece5a23bd5 [X86] getTargetShuffleMask - use getConstantOperandVal help [...] adds 7c3becf4231 [IRBuilder] Remove unnecessary NoFolder methods; NFCI adds dbc96b518b6 Revert "[CodeGenModule] Assume dso_local for -fpic -fno-sem [...] adds 23e3c3df260 [IRBuilder] Add missing NoFolder::CreatePointerBitCastOrAdd [...] adds 575a975afda [SimplifyLibCalls] Remove unused IRBuilder argument; NFC adds 31574d38ac5 [SVE] Fix bug in simplification of scalable vector instructions adds 388de9dfcdf [LoopUtils] Make duplicate method a utility. [NFCI] adds 398b4ed87d4 [clang] detect switch fallthrough marked by a comment (PR43465) adds 5b0c8dd3a4f [lldb] Delete ClangForward.h adds 3014efe0719 [lldb] Remove unused parameter from ValueObject::GetExpressionPath adds 0ad18bf37b2 [llvm-objdump] Suppress spurious warnings when parsing Mach [...] adds a05441038a3 Revert "[SVE] Fix bug in simplification of scalable vector [...] adds 105642af5ee Add PassManagerImpl.h to hide implementation details adds 221c5af4e4f Fix a -Wbitwise-conditional-parentheses warning in _LIBUNWI [...] adds f26ff8c9df7 [TargetRegisterInfo] Make the heuristic to skip region spli [...] adds cd7650c1861 GlobalISel: Implement fewerElementsVector for G_SEXT_INREG adds b911b99052e [AArch64][GlobalISel] Don't reconvert to p0 in convertPtrAd [...] adds 2bd46444d73 [AArch64][GlobalISel] Walk through G_AND in TB(N)Z bit calculation adds eda6b2e2b3f [MLIR][Linalg] Allow fusion of more than 2 linalg ops. adds 0da755df85d [MLIR][Linalg] Use GenericLoopNestRangeBuilder in tiling code. adds 0fbaf3a7c23 [clang-doc] Improving Markdown Output adds 77e71c52172 [AIX] Don't use a zero fill with a second parameter adds 80e63c17c0a Revert "[clang-doc] Improving Markdown Output" adds 726446a0096 AMDGPU: Fix splitting wide f32 s.buffer.load intrinsics adds 2758ae41aec AMDGPU/GlobalISel: Allow selecting s128 load/stores adds 0d6fccb460e [GWP-ASan] Allow late initialisation if single-threaded. adds cb7b661d3d3 AMDGPU: Analyze divergence of inline asm adds 5521236a180 [analyzer] Re-land 0aba69e "Add test directory for scan-build." adds 4b05fc248b0 [analyzer] Suppress linker invocation in scan-build tests. adds 47cda0cb36b scudo: Use more size classes in the malloc_free_loop benchmarks. adds 15f54d348bc [NFC] Factor out function to detect if an attribute has an [...] adds 3b4d24d7701 [mlir] Accept an LLVM::LLVMFuncOp in the builder of LLVM::CallOp adds 9944ef42696 Omit "Contents of" headers when -no-leading-headers is specified. adds d05e4ff4afd [ARM] MVE vector reduction fadd and fmul tests. NFC adds 9831e5c7b9f Fix LLVM_ENABLE_MODULES build after TypeSize.h change adds c25938d57b1 Refactor CommandObjectTargetSymbolsAdd::AddModuleSymbols adds 0e362d82b97 Improve help text for (lldb) target symbols add adds f8c4d70d113 Fix modules build after PassManagerImpl.h addition adds 7d3aace3f52 AMDGPU: Add flag to control mem intrinsic expansion adds 37910fd0e1f [AArch64][GlobalISel] Fold G_SHL into TB(N)Z bit calculation adds 2ddff6fab02 [libFuzzer] Minor documentation fixes. adds 2252cac694f [ANDGPU] getMemOperandsWithOffset: support BUF non-stack-ac [...] adds 9effe38b225 [AArch64][GlobalISel] Fold G_XOR into TB(N)Z bit calculation adds ac430336318 [OpenMP] [DOCS] Update OMP5.0 feature status table [NFC] adds 7b90cdedd1d [lldb/DataExtractor] Fix UB shift in GetMaxS64Bitfield adds bb6646ce0a2 [lldb/DataExtractor] Use an early return in GetMaxS64Bitfield, NFC adds 63e65082219 [lldb/StringPrinter] Simplify StringPrinterBufferPointer, NFC adds 28c91219c7e [compiler-rt] implement sigaltstack interception adds 246097a091b [TestKernVerStrLCNOTE] Strengthen a check. NFC. adds 9c726e9d905 Reland "[AArch64] Fix data race on RegisterBank initialization." adds 9a40670a0a4 Revert "Reland "[AArch64] Fix data race on RegisterBank ini [...] adds c7768ce5222 [X86] Update the haswell and broadwell scheduler informatio [...] adds 5327b917e3b DebugInfo: Add missing test coverage for DW_OP_convert in loclists adds 0dc634babf9 hwasan_symbolize: warn about missing symbols at most once p [...] adds 6da6153759a hwasan_symbolize: allow 0x in the address field adds 552a8fe12bd DebugInfo: Check DW_OP_convert in loclists with Split DWARF adds 4f281f04745 DebugInfo: Fix convert-loclist.ll to handle different targe [...] adds 031f83fb820 DebugInfo: Simplify emitDebugLocEntry by never passing a null CU adds bc3f87cc029 Xfail this test temporarily until AdrianM or I can debug wh [...] adds 1ced28cbe75 DebugInfo: Hash DW_OP_convert in loclists when using Split DWARF adds ea4652ebeb2 Fix unused variable warning (NFC) adds c3a47221e05 [X86] Don't emit two X86ISD::COMI/UCOMI nodes when handling [...] adds e211a7d2aaf Re-land "[lldb/Test] Make substrs argument to self.expect o [...] adds c1912c7542d [lldb/Test] Use arrays instead of sets for build_and_run_expr adds 70cea38ff7f [lldb/Test] Sort substr for TestDataFormatterStdMap.py adds 4c05019dc0c [lldb/Test] Fix typo in TestDataFormatterStdMap.py adds 98594a44aaa [lldb] [ObjectFile/ELF] Fix negated seg ids on 32-bit arches adds 035eb393f7d Update TTI's getUserCost to return TCC_Free on freeze adds 0c16a22a2eb [lldb/Test] Fix substr order in asan & ubsan tests adds 904d54de9ba [lldb/Test] Sort substr for TestDataFormatterStdMap.py (2/2) adds 8413116bf10 [X86] Use X86ISD::SUB instead of X86ISD::CMP in some places. adds 7ef37a5f999 [mlir] Initial support for type constraints in the declarat [...] adds fbba6395171 [mlir][ODS] Refactor BuildableType to use $_builder as part [...] adds abe6d1174df [mlir] Emit a fatal error when the assembly format is invalid adds 4581d974161 [X86] Remove some uncovered and possibly broken code from c [...] adds e53bbf12132 [GVN] Add GVNOption to control load-pre more fine-grained. new cd14b4a62bd [X86] Remove unneeded code that looks for (and (i8 (X86setcc_c))
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .../clang-tidy/misc/UnusedUsingDeclsCheck.cpp | 10 + .../checkers/misc-unused-using-decls-cxx17.cpp | 30 + clang/docs/OpenMPSupport.rst | 22 +- clang/include/clang/AST/OpenMPClause.h | 79 +++ clang/include/clang/AST/RecursiveASTVisitor.h | 5 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 6 +- clang/include/clang/Basic/OpenMPKinds.def | 28 + clang/include/clang/Basic/OpenMPKinds.h | 7 + clang/include/clang/Sema/Sema.h | 6 + clang/lib/AST/OpenMPClause.cpp | 7 + clang/lib/AST/StmtProfile.cpp | 1 + clang/lib/Basic/OpenMPKinds.cpp | 18 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 18 +- clang/lib/Parse/ParseOpenMP.cpp | 3 +- clang/lib/Sema/AnalysisBasedWarnings.cpp | 36 ++ clang/lib/Sema/SemaOpenMP.cpp | 73 ++- clang/lib/Sema/SemaTemplateInstantiate.cpp | 129 ++++ clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 46 +- clang/lib/Sema/TreeTransform.h | 21 + clang/lib/Serialization/ASTReader.cpp | 9 + clang/lib/Serialization/ASTWriter.cpp | 7 + .../multidirectory_project/directory1/file1.c | 9 + .../multidirectory_project/directory2/file2.c | 5 + .../scan-build/Inputs/single_null_dereference.c | 5 + .../Analysis/scan-build/exclude_directories.test | 40 ++ clang/test/Analysis/scan-build/help.test | 24 + clang/test/Analysis/scan-build/html_output.test | 36 ++ clang/test/Analysis/scan-build/lit.local.cfg | 18 + .../Analysis/scan-build/plist_html_output.test | 26 + clang/test/Analysis/scan-build/plist_output.test | 26 + .../OpenMP/distribute_parallel_for_ast_print.cpp | 35 +- .../OpenMP/distribute_parallel_for_messages.cpp | 21 +- .../distribute_parallel_for_simd_ast_print.cpp | 4 +- .../distribute_parallel_for_simd_misc_messages.c | 15 + clang/test/OpenMP/distribute_simd_ast_print.cpp | 4 +- clang/test/OpenMP/distribute_simd_misc_messages.c | 15 + clang/test/OpenMP/for_ast_print.cpp | 4 +- clang/test/OpenMP/for_codegen.cpp | 18 +- clang/test/OpenMP/for_misc_messages.c | 21 +- clang/test/OpenMP/for_simd_ast_print.cpp | 4 +- clang/test/OpenMP/for_simd_misc_messages.c | 15 + .../test/OpenMP/master_taskloop_simd_ast_print.cpp | 4 +- clang/test/OpenMP/parallel_for_ast_print.cpp | 4 +- clang/test/OpenMP/parallel_for_messages.cpp | 21 +- clang/test/OpenMP/parallel_for_simd_ast_print.cpp | 4 +- .../test/OpenMP/parallel_for_simd_misc_messages.c | 15 + .../parallel_master_taskloop_simd_ast_print.cpp | 4 +- clang/test/OpenMP/simd_ast_print.cpp | 4 +- clang/test/OpenMP/simd_misc_messages.c | 15 + .../test/OpenMP/target_parallel_for_ast_print.cpp | 16 +- clang/test/OpenMP/target_parallel_for_messages.cpp | 21 +- .../OpenMP/target_parallel_for_simd_ast_print.cpp | 4 +- .../target_parallel_for_simd_loop_messages.cpp | 49 +- clang/test/OpenMP/target_simd_ast_print.cpp | 4 +- clang/test/OpenMP/target_simd_loop_messages.cpp | 49 +- ...get_teams_distribute_parallel_for_ast_print.cpp | 18 +- ...rget_teams_distribute_parallel_for_messages.cpp | 23 +- ...teams_distribute_parallel_for_order_codegen.cpp | 44 ++ ...eams_distribute_parallel_for_simd_ast_print.cpp | 16 +- ..._distribute_parallel_for_simd_loop_messages.cpp | 49 +- .../target_teams_distribute_simd_ast_print.cpp | 4 +- .../target_teams_distribute_simd_misc_messages.c | 15 + clang/test/OpenMP/taskloop_simd_ast_print.cpp | 4 +- clang/test/OpenMP/taskloop_simd_misc_messages.c | 15 + .../teams_distribute_parallel_for_ast_print.cpp | 16 +- .../teams_distribute_parallel_for_messages.cpp | 26 +- ...eams_distribute_parallel_for_simd_ast_print.cpp | 4 +- ...teams_distribute_parallel_for_simd_messages.cpp | 20 + .../OpenMP/teams_distribute_simd_ast_print.cpp | 4 +- .../test/OpenMP/teams_distribute_simd_messages.cpp | 20 + clang/test/Sema/fallthrough-comment.c | 20 + .../instantiate-abbreviated-template.cpp | 29 + clang/tools/libclang/CIndex.cpp | 1 + .../include/sanitizer/linux_syscall_hooks.h | 6 +- compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.cpp | 5 + compiler-rt/lib/fuzzer/FuzzerTracePC.cpp | 8 +- .../lib/gwp_asan/guarded_pool_allocator.cpp | 3 + compiler-rt/lib/gwp_asan/tests/CMakeLists.txt | 3 +- compiler-rt/lib/gwp_asan/tests/late_init.cpp | 25 + compiler-rt/lib/hwasan/scripts/hwasan_symbolize | 9 +- .../sanitizer_common_interceptors.inc | 19 + .../sanitizer_common/sanitizer_common_syscalls.inc | 17 + .../sanitizer_platform_interceptors.h | 1 + .../sanitizer_platform_limits_posix.cpp | 1 + .../sanitizer_platform_limits_posix.h | 1 + .../standalone/benchmarks/malloc_benchmark.cpp | 6 +- compiler-rt/test/fuzzer/dataflow.test | 6 + .../{target-function.test => focus-function.test} | 4 +- compiler-rt/test/msan/sigaltstack.cpp | 20 + libunwind/src/UnwindCursor.hpp | 5 +- lldb/include/lldb/Core/ClangForward.h | 133 ---- lldb/include/lldb/Core/ValueObject.h | 2 +- lldb/include/lldb/Core/ValueObjectRegister.h | 2 +- lldb/include/lldb/DataFormatters/StringPrinter.h | 28 +- lldb/include/lldb/Utility/DataExtractor.h | 8 +- .../commands/add-dsym/uuid/TestAddDsymCommand.py | 1 + .../commands/target/basic/TestTargetCommand.py | 1 + .../test/functionalities/asan/TestMemoryHistory.py | 11 +- .../test/functionalities/asan/TestReportData.py | 5 +- .../libstdcpp/map/TestDataFormatterStdMap.py | 90 +-- .../functionalities/ubsan/basic/TestUbsanBasic.py | 7 +- .../lang/c/global_variables/TestGlobalVariables.py | 1 + lldb/packages/Python/lldbsuite/test/lldbtest.py | 10 +- .../lc-note/kern-ver-str/TestKernVerStrLCNOTE.py | 2 +- .../Python/lldbsuite/test/types/TestLongTypes.py | 16 +- .../lldbsuite/test/types/TestLongTypesExpr.py | 16 +- lldb/source/API/SBValue.cpp | 4 +- lldb/source/Commands/CommandObjectFrame.cpp | 3 +- lldb/source/Commands/CommandObjectTarget.cpp | 194 +++--- lldb/source/Core/ValueObject.cpp | 12 +- lldb/source/Core/ValueObjectRegister.cpp | 1 - lldb/source/DataFormatters/StringPrinter.cpp | 16 +- lldb/source/DataFormatters/ValueObjectPrinter.cpp | 14 +- .../ExpressionParser/Clang/ASTResultSynthesizer.h | 9 +- .../ExpressionParser/Clang/ASTStructExtractor.h | 1 - .../ExpressionParser/Clang/ClangDeclVendor.h | 5 +- .../Clang/ClangExpressionDeclMap.h | 1 - .../ExpressionParser/Clang/ClangExpressionHelper.h | 6 +- .../ExpressionParser/Clang/ClangExpressionParser.h | 9 +- .../Clang/ClangExpressionVariable.h | 5 +- .../ExpressionParser/Clang/ClangFunctionCaller.h | 1 - .../Clang/ClangModulesDeclVendor.h | 1 - .../ExpressionParser/Clang/ClangUserExpression.h | 1 - .../ExpressionParser/Clang/ClangUtilityFunction.h | 1 - .../Plugins/ExpressionParser/Clang/IRForTarget.h | 5 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 2 - .../LanguageRuntime/ObjC/ObjCLanguageRuntime.h | 1 - .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 4 +- .../Plugins/SymbolFile/DWARF/DWARFASTParserClang.h | 1 - .../Plugins/TypeSystem/Clang/TypeSystemClang.h | 1 - lldb/source/Target/Process.cpp | 5 +- lldb/source/Target/StackFrame.cpp | 34 +- lldb/source/Utility/ConstString.cpp | 32 +- lldb/source/Utility/DataExtractor.cpp | 27 +- lldb/unittests/Utility/DataExtractorTest.cpp | 9 + llvm/docs/LibFuzzer.rst | 4 +- llvm/examples/ThinLtoJIT/CMakeLists.txt | 1 + llvm/include/llvm/ADT/StringRef.h | 3 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 3 + .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 19 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 5 + llvm/include/llvm/CodeGen/SelectionDAG.h | 40 +- llvm/include/llvm/CodeGen/TargetCallingConv.h | 10 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 7 + llvm/include/llvm/IR/Attributes.h | 3 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/IR/NoFolder.h | 29 +- llvm/include/llvm/IR/PassManager.h | 119 +--- llvm/include/llvm/IR/PassManagerImpl.h | 157 +++++ llvm/include/llvm/MC/MCAsmInfo.h | 16 +- llvm/include/llvm/Support/KnownBits.h | 7 + llvm/include/llvm/Support/TypeSize.h | 1 + .../Transforms/InstCombine/InstCombineWorklist.h | 57 +- llvm/include/llvm/Transforms/Scalar/GVN.h | 7 + .../llvm/Transforms/Scalar/LoopPassManager.h | 49 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 25 + llvm/include/llvm/module.modulemap | 1 + llvm/lib/Analysis/CGSCCPassManager.cpp | 1 + llvm/lib/Analysis/LoopAnalysisManager.cpp | 1 + llvm/lib/CodeGen/AsmPrinter/ByteStreamer.h | 2 +- llvm/lib/CodeGen/AsmPrinter/DIEHash.cpp | 5 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 13 +- llvm/lib/CodeGen/CallingConvLower.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 67 +- llvm/lib/CodeGen/RegAllocGreedy.cpp | 20 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 45 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 39 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 6 + llvm/lib/CodeGen/TargetRegisterInfo.cpp | 22 +- llvm/lib/IR/AttributeImpl.h | 5 +- llvm/lib/IR/Attributes.cpp | 11 +- llvm/lib/IR/PassManager.cpp | 1 + llvm/lib/IR/Verifier.cpp | 7 + llvm/lib/MC/MCAsmStreamer.cpp | 25 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 18 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 125 +++- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 21 +- llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp | 12 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 251 ++++---- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 72 ++- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 5 +- llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 19 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 16 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 2 +- llvm/lib/Target/ARC/ARCISelLowering.cpp | 10 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 9 +- llvm/lib/Target/Hexagon/Hexagon.td | 14 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 13 +- llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 11 +- llvm/lib/Target/Lanai/LanaiISelLowering.cpp | 6 +- llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 12 +- llvm/lib/Target/Mips/MipsISelLowering.cpp | 18 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 19 +- .../Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 1 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 68 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 12 +- llvm/lib/Target/Sparc/SparcISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- llvm/lib/Target/VE/VECallingConv.td | 13 + llvm/lib/Target/VE/VEISelLowering.cpp | 123 +++- llvm/lib/Target/VE/VEISelLowering.h | 2 + llvm/lib/Target/VE/VEInstrInfo.cpp | 108 ++++ llvm/lib/Target/VE/VEInstrInfo.h | 17 + llvm/lib/Target/VE/VEMachineFunctionInfo.h | 11 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 217 +++---- llvm/lib/Target/X86/X86InstrCompiler.td | 7 - llvm/lib/Target/X86/X86InstrFPStack.td | 2 +- llvm/lib/Target/X86/X86SchedBroadwell.td | 42 +- llvm/lib/Target/X86/X86SchedHaswell.td | 74 +-- llvm/lib/Target/X86/X86SelectionDAGInfo.cpp | 7 +- llvm/lib/Target/XCore/XCoreISelLowering.cpp | 23 +- llvm/lib/Transforms/IPO/FunctionImport.cpp | 99 +-- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 7 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 36 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 6 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 21 +- .../Transforms/InstCombine/InstCombineInternal.h | 15 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 39 +- .../InstCombine/InstCombineMulDivRem.cpp | 18 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 10 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 2 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 12 +- .../InstCombine/InstCombineVectorOps.cpp | 7 +- .../InstCombine/InstructionCombining.cpp | 83 ++- llvm/lib/Transforms/Scalar/GVN.cpp | 10 + .../lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp | 4 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 29 +- llvm/lib/Transforms/Utils/KnowledgeRetention.cpp | 5 + llvm/lib/Transforms/Utils/LoopUtils.cpp | 42 ++ llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 14 +- .../DivergenceAnalysis/AMDGPU/inline-asm.ll | 108 ++++ .../AArch64/GlobalISel/load-addressing-modes.mir | 25 +- .../AArch64/GlobalISel/opt-fold-and-tbz-tbnz.mir | 113 ++++ .../AArch64/GlobalISel/opt-fold-shift-tbz-tbnz.mir | 114 ++++ .../AArch64/GlobalISel/opt-fold-xor-tbz-tbnz.mir | 188 ++++++ llvm/test/CodeGen/AArch64/GlobalISel/select.mir | 4 +- llvm/test/CodeGen/AArch64/fp-intrinsics.ll | 192 +++++- .../AMDGPU/GlobalISel/artifact-combiner-sext.mir | 43 +- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 25 +- .../AMDGPU/GlobalISel/inst-select-load-global.mir | 31 +- .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 25 +- .../AMDGPU/GlobalISel/inst-select-store-global.mir | 31 +- .../GlobalISel/legalize-extract-vector-elt.mir | 54 +- .../AMDGPU/GlobalISel/legalize-load-constant.mir | 39 +- .../AMDGPU/GlobalISel/legalize-sext-inreg.mir | 697 +++++++-------------- llvm/test/CodeGen/AMDGPU/bswap.ll | 14 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 4 +- llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll | 16 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 41 +- llvm/test/CodeGen/AMDGPU/diverge-switch-default.ll | 2 +- llvm/test/CodeGen/AMDGPU/inline-asm.ll | 27 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll | 2 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 12 +- .../AMDGPU/lower-mem-intrinsics-threshold.ll | 123 ++++ llvm/test/CodeGen/AMDGPU/merge-stores.ll | 2 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 6 +- llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll | 4 +- llvm/test/CodeGen/AMDGPU/sdiv.ll | 207 +++--- llvm/test/CodeGen/AMDGPU/shl.ll | 10 +- .../AMDGPU/si-annotatecfg-multiple-backedges.ll | 4 +- llvm/test/CodeGen/AMDGPU/smrd.ll | 35 +- .../ARM/vecreduce-fadd-legalization-soft-float.ll | 63 ++ llvm/test/CodeGen/PowerPC/aix-nonzero-zerofill.ll | 10 + llvm/test/CodeGen/Thumb2/mve-vecreduce-fadd.ll | 369 +++++++++++ llvm/test/CodeGen/Thumb2/mve-vecreduce-fmul.ll | 353 +++++++++++ llvm/test/CodeGen/VE/fp_extload_truncstore.ll | 23 + llvm/test/CodeGen/VE/sext_zext_load.ll | 360 +++++++++++ llvm/test/CodeGen/VE/truncstore.ll | 74 +++ llvm/test/CodeGen/VE/va_arg.ll | 63 ++ llvm/test/CodeGen/VE/va_callee.ll | 152 +++++ llvm/test/CodeGen/VE/va_caller.ll | 47 ++ llvm/test/CodeGen/X86/combine-bextr.ll | 63 ++ llvm/test/DebugInfo/X86/convert-loclist.ll | 68 ++ llvm/test/Transforms/GVN/PRE/pre-load-in-loop.ll | 45 ++ llvm/test/Transforms/InstCombine/cast_phi.ll | 246 +++++++- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 35 +- llvm/test/Transforms/LoopVectorize/induction.ll | 2 +- .../tools/llvm-mca/X86/Broadwell/resources-avx2.s | 56 +- .../tools/llvm-mca/X86/Haswell/resources-avx2.s | 42 +- .../tools/llvm-objdump/X86/macho-cstring-dump.test | 15 +- llvm/tools/llvm-objdump/MachODump.cpp | 11 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 2 +- llvm/unittests/IR/PassManagerTest.cpp | 1 + llvm/utils/release/build_llvm_package.bat | 4 +- mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 3 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 23 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td | 9 +- mlir/include/mlir/Dialect/SPIRV/SPIRVLogicalOps.td | 7 +- mlir/include/mlir/Dialect/VectorOps/VectorOps.td | 19 +- mlir/include/mlir/IR/OpBase.td | 21 +- mlir/include/mlir/TableGen/OpTrait.h | 3 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 43 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 20 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 64 +- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 83 +-- mlir/lib/Dialect/VectorOps/VectorOps.cpp | 46 -- mlir/lib/TableGen/Type.cpp | 14 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 2 +- mlir/test/Dialect/Linalg/fusion.mlir | 99 ++- mlir/test/Dialect/SPIRV/ops.mlir | 8 +- mlir/test/mlir-tblgen/op-format-spec.td | 26 +- mlir/tools/mlir-tblgen/OpFormatGen.cpp | 203 +++++- 307 files changed, 7244 insertions(+), 2780 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/misc-unused-using-de [...] create mode 100644 clang/test/Analysis/scan-build/Inputs/multidirectory_project/di [...] create mode 100644 clang/test/Analysis/scan-build/Inputs/multidirectory_project/di [...] create mode 100644 clang/test/Analysis/scan-build/Inputs/single_null_dereference.c create mode 100644 clang/test/Analysis/scan-build/exclude_directories.test create mode 100644 clang/test/Analysis/scan-build/help.test create mode 100644 clang/test/Analysis/scan-build/html_output.test create mode 100644 clang/test/Analysis/scan-build/lit.local.cfg create mode 100644 clang/test/Analysis/scan-build/plist_html_output.test create mode 100644 clang/test/Analysis/scan-build/plist_output.test create mode 100644 clang/test/OpenMP/target_teams_distribute_parallel_for_order_co [...] create mode 100644 clang/test/Sema/fallthrough-comment.c create mode 100644 clang/test/SemaTemplate/instantiate-abbreviated-template.cpp create mode 100644 compiler-rt/lib/gwp_asan/tests/late_init.cpp rename compiler-rt/test/fuzzer/{target-function.test => focus-function.test} (87%) create mode 100644 compiler-rt/test/msan/sigaltstack.cpp delete mode 100644 lldb/include/lldb/Core/ClangForward.h create mode 100644 llvm/include/llvm/IR/PassManagerImpl.h create mode 100644 llvm/test/Analysis/DivergenceAnalysis/AMDGPU/inline-asm.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-and-tbz-tbnz.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-shift-tbz-tbnz.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-xor-tbz-tbnz.mir create mode 100644 llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics-threshold.ll create mode 100644 llvm/test/CodeGen/ARM/vecreduce-fadd-legalization-soft-float.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-nonzero-zerofill.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-vecreduce-fadd.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-vecreduce-fmul.ll create mode 100644 llvm/test/CodeGen/VE/fp_extload_truncstore.ll create mode 100644 llvm/test/CodeGen/VE/sext_zext_load.ll create mode 100644 llvm/test/CodeGen/VE/truncstore.ll create mode 100644 llvm/test/CodeGen/VE/va_arg.ll create mode 100644 llvm/test/CodeGen/VE/va_callee.ll create mode 100644 llvm/test/CodeGen/VE/va_caller.ll create mode 100644 llvm/test/CodeGen/X86/combine-bextr.ll create mode 100644 llvm/test/DebugInfo/X86/convert-loclist.ll create mode 100644 llvm/test/Transforms/GVN/PRE/pre-load-in-loop.ll