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from b216ff2 AMDGPU: Convert image intrinsic uses in tests new b5f0660 AMDGPU: Fix asserting on 0 dmask for image intrinsics new 3ba5a60 DwarfExpression: Defer emitting DWARF register operations unt [...] new eb45ecd Don't compose DWARF expressions with multiple subregisters.
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Summary of changes: lib/CodeGen/AsmPrinter/DwarfExpression.cpp | 77 +++++--- lib/CodeGen/AsmPrinter/DwarfExpression.h | 10 + lib/Target/AMDGPU/SIISelLowering.cpp | 58 ++++++ test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll | 10 + test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll | 122 ++++++++++++ test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll | 219 +++++++++++++++++++++ ...lit-superreg.mir => split-superreg-complex.mir} | 23 +-- 7 files changed, 483 insertions(+), 36 deletions(-) copy test/DebugInfo/MIR/ARM/{split-superreg.mir => split-superreg-complex.mir} (89%)