This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project.
from 16976cb9253 [X86] Minor cleanups to addShuffleComments in X86MCInstPrin [...] adds fc532c1a0dc Remove some non-determinism from the `Darwin/duplicate_os_l [...] adds 1b6d29e06b0 [Driver] Fix BooleanFFlag identifiers to use 'f' 'fno_' pre [...] adds 07e8a780d81 [X86] Add pseudo instructions to use MULX with a single des [...] adds a23d1e9aff4 [llvm-objdump] Simplify reportError() and prepend outs().flush() adds 439d27d79f5 [llvm-objdump] Move llvm:: to llvm::objdump:: and qualifyin [...] adds d04eb253c71 [llvm-objdump] Delete unneeeded namespace llvm {} adds ce1fadca608 [ELF][docs] Update supported targets adds 8857822452c [X86] Move MMX_SET0 pattern into the instruction definition. NFC adds efc5857b0b1 [X86] Autogenerate complete checks. NFC adds 1ecf39d607a [X86] Fix a place where we created MOVQ2DQ with a DstVT oth [...] adds af1accdd860 [X86] Teach computeKnownBitsForTargetNode that the upper ha [...] adds a4dd45b7d09 [DAGCombiner] Move debug message and statistic update into [...] adds 7c3b8077cc3 [X86] Add DAG combine to turn (v2i64 (scalar_to_vector (i64 [...] adds dbda87186ec [X86] Remove unneeded bitconverts from isel patterns. NFC adds 234eba90f4f AMDGPU: Add setTruncStoreAction for vector i64 types made l [...] adds d4751f35560 [AMDGPU] Precommit tests for D80813 adds 2768edfff19 [AMDGPU] Propagate fast-math flags when lowering FSIN and FCOS adds af3abbf7bd2 [NFC][PowerPC] Add a new case to test phi-node-elimination pass adds bfdf9ef009a Revert "[NFC][PowerPC] Add a new case to test phi-node-elim [...] adds ec25a71eb7f [ScheduleDAG] Avoid unnecessary recomputation of topologica [...] adds 45ebe38ffc4 [X86][AVX] Pad small shuffle inputs in combineX86ShufflesRe [...] adds d33ba1aa0b5 [X86][AVX] getFauxShuffleMask - don't widen shuffle inputs [...] adds 129c501aa91 [PhaseOrdering] add scalarization test for PR42174; NFC adds 15b281d7805 [X86][AVX] Add test case described in D79987 adds f0463268470 [X86] getFauxShuffleMask/getTargetShuffleInputs - make Sele [...] adds e31f2a894a7 [VectorCombine] add tests for scalarizing binop-with-constant; NFC adds 4a2673d79fd [X86][AVX] Add SimplifyMultipleUseDemandedBits VBROADCAST h [...] adds 91b45fb527a [PhaseOrdering] add test for hoisting/CSE (PR46115); NFC adds bfdc2552664 [utils] change update_test_checks.py use of 'TMP' value names adds 95f65a7c6ce AArch64/GlobalISel: Fix incorrect ptrmask usage for alignment adds f23ddbe3c3a clang-tidy and clang-query wont crash with invalid command [...] adds dfbfdc96f9e [utils] update expected strings in tests; NFC adds f4b0ebb89b3 Revert "clang-tidy and clang-query wont crash with invalid [...] adds 59521256915 clang-tidy and clang-query wont crash with invalid command [...] adds 0cf5ef176b5 Change some extraneous /// comments to // comments inside m [...] adds 8f2f613a6ec [X86][AVX] combineX86ShufflesRecursively - peekThroughOneUs [...] adds 22e50833e95 [X86][AVX] Reduce unary target shuffles width if the upper [...] adds 8abe830093f [X86] Rewrite how X86PartialReduction finds candidates to c [...] new 403d5a5e351 [test][compiler-rt] Avoid LD_PRELOAD for "outer" dynamic linkers new c15d5d12c62 [Driver] NFC: Use Twine temp to replace std::string local
The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clang-query/tool/ClangQuery.cpp | 14 +- .../clang-tidy/tool/ClangTidyMain.cpp | 15 +- .../test/clang-query/invalid-command-line.cpp | 4 + .../infrastructure/invalid-command-line.cpp | 4 + clang/include/clang/Driver/Options.td | 6 +- clang/lib/Driver/ToolChains/Gnu.cpp | 5 +- .../Inputs/mangled_names.c.expected | 20 +- .../Inputs/mangled_names.c.funcsig.expected | 20 +- .../TestCases/Darwin/duplicate_os_log_reports.cpp | 2 + .../asan/TestCases/Linux/preinstalled_signal.cpp | 16 +- lld/docs/index.rst | 8 +- llvm/include/llvm/CodeGen/ScheduleDAG.h | 4 + llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 2 +- llvm/lib/CodeGen/ScheduleDAG.cpp | 8 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 18 +- .../lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 20 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 26 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 94 +-- llvm/lib/Target/X86/X86InstrArithmetic.td | 10 + llvm/lib/Target/X86/X86InstrMMX.td | 57 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 20 + llvm/lib/Target/X86/X86PartialReduction.cpp | 367 ++++++------ .../CodeGen/AArch64/GlobalISel/legalize-vaarg.mir | 4 +- llvm/test/CodeGen/AMDGPU/llvm.sin.ll | 72 +++ llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll | 50 ++ llvm/test/CodeGen/X86/atomic-unordered.ll | 32 +- .../CodeGen/X86/avx512-intrinsics-fast-isel.ll | 32 +- llvm/test/CodeGen/X86/i128-mul.ll | 4 +- llvm/test/CodeGen/X86/madd.ll | 4 +- llvm/test/CodeGen/X86/mmx-cvt.ll | 2 - llvm/test/CodeGen/X86/oddshuffles.ll | 67 +++ llvm/test/CodeGen/X86/pr23246.ll | 10 +- llvm/test/CodeGen/X86/pr35636.ll | 12 +- llvm/test/CodeGen/X86/sad.ll | 2 +- llvm/test/CodeGen/X86/vec_insert-7.ll | 7 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 114 +--- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 3 +- .../Transforms/PhaseOrdering/X86/scalarization.ll | 78 +++ llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll | 214 +++++++ .../X86/insert-binop-with-constant.ll | 643 +++++++++++++++++++++ llvm/tools/llvm-objdump/COFFDump.cpp | 1 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 61 +- llvm/tools/llvm-objdump/llvm-objdump.h | 4 +- llvm/utils/UpdateTestChecks/common.py | 6 +- mlir/lib/Transforms/DialectConversion.cpp | 20 +- 46 files changed, 1660 insertions(+), 526 deletions(-) create mode 100644 clang-tools-extra/test/clang-query/invalid-command-line.cpp create mode 100644 clang-tools-extra/test/clang-tidy/infrastructure/invalid-comman [...] create mode 100644 llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/scalarization.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll