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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os_LTO in repository toolchain/ci/llvm-project.
from cb42bb355061 llvm-dwarfdump: pretty type printing: print fully qualifie [...] adds def15c5fb6a1 [SCEV] Support negative values in signed/unsigned predicat [...] adds 74670e79b0a0 [libc] Add implementations of div, ldiv, lldiv and imaxdiv. adds 471217cff8e5 Revert "Revert "[IndVars] Replace PHIs if loop exits on 1s [...] adds e9d34c54290e [NFC] Add assert and test showing that revert of D109596 w [...] adds 5252aa2981ba [libc][obvious] Make *abs and *div functions buildable in [...] adds f5b8f1247cd9 [libc][obvious] Add inttypes.h and stdlib.h as deps to *di [...] adds 966922320f09 [lldb] Remove two #ifndef linux from Platform.cpp adds 9a2255dfa012 [mlir][NFC] Add explicit "::mlir" namespace to tblgen gene [...] adds ec03bbe8a74a [mlir] Fix bug in partial dialect conversion adds 76cb876563d0 [MLIR] Simplex::appendVariable: early return if count == 0 adds 4b80f0125adc [CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016 adds 7f6a4826ac49 [CaptureTracking] Allow passing LI to PointerMayBeCaptured [...] adds bdcf4b9b9620 [MLIR][Linalg] Make detensoring cost-model more flexible. adds 92904cc68fbc [lldb] [gdb-remote] Remove unused arg from GDBRemoteRegist [...] adds f6e0edc23e61 [lldb] [gdb-remote] Recognize aarch64v type from gdbserver adds 92c9b28347c3 Revert "[AArch64][SVE] Teach cost model that masked loads/ [...] adds 798e4bfbeda8 [mlir] Fix integration tests failures introduced in D108505 adds 13aa102e0769 AArch64: use ldp/stp for 128-bit atomic load/store in v.84 [...] adds ca3bebd8440f [OpenCL] Supports optional writing to 3d images in C++ for [...] adds 15feaaa359c7 Add myself as a code owner for SYCL support adds eb3af1e77341 [clang][NFC] Remove dead code adds c8cb7f611fdf [NewPM] Make InlinerPass (aka 'inline') a parameterized pass adds e4c46ddd91eb [GlobalISel] Improve elimination of dead instructions in l [...] adds b1099120ff96 [lldb] [gdb-remote] Always send PID when detaching w/ mult [...] adds d6929aaa67c7 [mlir][openacc] Make use of the second counter extension i [...] adds ea17b15f2dcd [MCA] InstructionTables::execute() - use const-ref iterato [...] adds 4ab7c0d3fa06 [X86] X86TargetTransformInfo - remove unnecessary if-else [...] adds 7fc12b822c5d MachOObjectFile - checkOverlappingElement - use const-ref [...] adds 6d7b3d6b3a8d Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source adds 7b68c0725d89 pre-commit test for D109767 adds 817e23d481be [update_mir_test_checks.py] Use -NEXT FileCheck directories adds 3f90df22f1b7 [ARM] MVE reverse shuffles. adds fae57a6a9795 [Clang] [Fix] Clang build fails when build directory conta [...] adds 4737dcbc83e0 [lldb] [test] Add unittest for DynamicRegisterInfo::Finalize() adds ec50d351ffdd [lldb] [DynamicRegisterInfo] Unset value_regs/invalidate_r [...] adds 6de19ea4b626 Thread safety analysis: Drop special block handling adds 68914dc99083 [JITLink] Adopt forEachRelocation() helper in ELF x86-64 b [...] adds e8d81d80f660 [JITLink] Adopt forEachRelocation() helper in ELF RISCV ba [...] adds 680592b5d0a7 [AMDGPU] Regenerate checks adds f988f680649a [Analysis] Add support for vscale in computeKnownBitsFromOperator adds 5dee50111c13 [analyzer] Move docs of SmartPtr to correct subcategory adds 6db928b8f31b [mlir][linalg] Fusion on tensors. adds 444a5f304f6c [clangd] Bail-out when an empty compile flag is encountered adds 228dd20c3f1e [OpenCL] Supports atomics in C++ for OpenCL 2021 adds 5b47256fa540 [X86] Add test to show the effect caused by D109607. NFC adds 227673398c2d [X86] Always check the size of SourceTy before getting the [...] adds 5661317f864a [flang] Put intrinsic function table back into order adds bc69dd62c04a [SLP]Improve graph reordering.
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clangd/CompileCommands.cpp | 14 +- clang-tools-extra/clangd/Compiler.cpp | 2 + .../clangd/unittests/CompileCommandsTests.cpp | 7 + .../clangd/unittests/CompilerTests.cpp | 11 + clang/CODE_OWNERS.TXT | 4 + clang/cmake/modules/AddClang.cmake | 12 +- clang/docs/analyzer/checkers.rst | 27 +- clang/lib/Analysis/ThreadSafety.cpp | 57 +- clang/lib/CodeGen/TargetInfo.cpp | 14 +- .../Frontend/CreateInvocationFromCommandLine.cpp | 1 + clang/lib/Headers/opencl-c-base.h | 4 +- clang/lib/Headers/opencl-c.h | 76 +- clang/lib/Sema/SemaType.cpp | 10 +- clang/lib/StaticAnalyzer/CMakeLists.txt | 7 + clang/test/CodeGen/X86/va-arg-sse.c | 101 ++ .../CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c | 8 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c | 8 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c | 8 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_len-bfloat.c | 4 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_len.c | 44 +- clang/test/Misc/opencl-c-3.0.incorrect_options.cl | 2 + clang/test/PCH/thread-safety-attrs.cpp | 11 +- clang/test/SemaCXX/warn-thread-safety-analysis.cpp | 19 +- clang/test/SemaOpenCL/unsupported-image.cl | 3 +- clang/tools/driver/CMakeLists.txt | 2 +- flang/lib/Evaluate/intrinsics.cpp | 9 +- flang/unittests/Evaluate/intrinsics.cpp | 4 +- libc/config/linux/aarch64/entrypoints.txt | 16 +- libc/config/linux/api.td | 47 + libc/config/linux/x86_64/entrypoints.txt | 10 +- libc/spec/stdc.td | 30 +- libc/src/__support/integer_operations.h | 7 + libc/src/inttypes/CMakeLists.txt | 11 + libc/src/inttypes/imaxdiv.cpp | 21 + .../integer_operations.h => inttypes/imaxdiv.h} | 16 +- libc/src/stdlib/CMakeLists.txt | 81 +- libc/src/stdlib/div.cpp | 21 + .../integer_operations.h => stdlib/div.h} | 16 +- libc/src/stdlib/ldiv.cpp | 21 + .../integer_operations.h => stdlib/ldiv.h} | 16 +- libc/src/stdlib/lldiv.cpp | 21 + .../integer_operations.h => stdlib/lldiv.h} | 16 +- libc/test/src/inttypes/CMakeLists.txt | 13 + libc/test/src/inttypes/imaxdiv_test.cpp | 15 + libc/test/src/stdlib/CMakeLists.txt | 39 + libc/test/src/stdlib/DivTest.h | 37 + libc/test/src/stdlib/div_test.cpp | 15 + libc/test/src/stdlib/ldiv_test.cpp | 15 + libc/test/src/stdlib/lldiv_test.cpp | 15 + .../Process/Utility/DynamicRegisterInfo.cpp | 8 +- .../Plugins/Process/Utility/DynamicRegisterInfo.h | 2 +- .../gdb-remote/GDBRemoteCommunicationClient.cpp | 14 +- .../gdb-remote/GDBRemoteRegisterContext.cpp | 23 +- .../Process/gdb-remote/GDBRemoteRegisterContext.h | 2 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 3 + lldb/source/Target/Platform.cpp | 14 +- .../gdb_remote_client/TestGDBRemoteClient.py | 43 + .../gdb_remote_client/TestGDBServerTargetXML.py | 6 + lldb/unittests/Process/Utility/CMakeLists.txt | 3 +- .../Process/Utility/DynamicRegisterInfoTest.cpp | 126 ++ llvm/CMakeLists.txt | 2 +- llvm/cmake/modules/AddLLVM.cmake | 12 +- llvm/include/llvm/Analysis/CaptureTracking.h | 11 +- llvm/include/llvm/CodeGen/GlobalISel/Utils.h | 11 + llvm/include/llvm/Transforms/IPO/Inliner.h | 3 + .../llvm/Transforms/Vectorize/SLPVectorizer.h | 3 +- llvm/lib/Analysis/CaptureTracking.cpp | 17 +- llvm/lib/Analysis/ScalarEvolution.cpp | 5 +- llvm/lib/Analysis/ValueTracking.cpp | 26 + llvm/lib/CodeGen/GlobalISel/Legalizer.cpp | 18 +- llvm/lib/CodeGen/GlobalISel/Utils.cpp | 34 + llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 133 +- llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp | 246 ++- llvm/lib/MCA/Stages/InstructionTables.cpp | 2 +- llvm/lib/Object/MachOObjectFile.cpp | 6 +- llvm/lib/Passes/PassBuilder.cpp | 31 + llvm/lib/Passes/PassRegistry.def | 13 +- llvm/lib/Target/AArch64/AArch64.td | 5 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 92 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 4 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 2 + .../Target/AArch64/AArch64TargetTransformInfo.cpp | 2 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 2 + .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 54 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 31 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 11 +- llvm/lib/Transforms/IPO/Inliner.cpp | 8 + llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 17 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 1364 +++++++++----- .../Analysis/CostModel/AArch64/masked_ldst_vls.ll | 51 - .../CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll | 6 +- .../AArch64/GlobalISel/artifact-find-value.mir | 5 - .../CodeGen/AArch64/GlobalISel/legalize-add.mir | 1 - .../CodeGen/AArch64/GlobalISel/legalize-and.mir | 31 +- .../CodeGen/AArch64/GlobalISel/legalize-bswap.mir | 5 +- .../AArch64/GlobalISel/legalize-extload.mir | 3 - .../GlobalISel/legalize-extract-vector-elt.mir | 10 +- .../AArch64/GlobalISel/legalize-extracts.mir | 1 - .../AArch64/GlobalISel/legalize-inserts.mir | 646 ++++--- .../AArch64/GlobalISel/legalize-load-store.mir | 21 +- .../AArch64/GlobalISel/legalize-merge-values.mir | 15 +- .../GlobalISel/legalize-phi-insertpt-decrement.mir | 18 +- .../CodeGen/AArch64/GlobalISel/legalize-phi.mir | 16 +- .../CodeGen/AArch64/GlobalISel/legalize-sadde.mir | 2 - .../CodeGen/AArch64/GlobalISel/legalize-saddo.mir | 2 - .../AArch64/GlobalISel/legalize-saddsat.mir | 55 +- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 10 +- .../AArch64/GlobalISel/legalize-shuffle-vector.mir | 38 +- .../CodeGen/AArch64/GlobalISel/legalize-ssube.mir | 2 - .../CodeGen/AArch64/GlobalISel/legalize-ssubo.mir | 2 - .../AArch64/GlobalISel/legalize-ssubsat.mir | 55 +- .../CodeGen/AArch64/GlobalISel/legalize-uadde.mir | 2 - .../CodeGen/AArch64/GlobalISel/legalize-uaddo.mir | 2 - .../AArch64/GlobalISel/legalize-unmerge-values.mir | 10 +- .../CodeGen/AArch64/GlobalISel/legalize-usube.mir | 2 - .../CodeGen/AArch64/GlobalISel/legalize-usubo.mir | 2 - .../CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll | 212 +++ llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 2 +- llvm/test/CodeGen/AArch64/v8.4-atomic-128.ll | 194 ++ .../GlobalISel/artifact-combiner-extract.mir | 76 +- .../AMDGPU/GlobalISel/artifact-combiner-trunc.mir | 3 - .../artifact-combiner-unmerge-values.mir | 38 +- .../AMDGPU/GlobalISel/artifact-combiner-zext.mir | 8 +- ...bug-legalization-artifact-combiner-dead-def.mir | 3 - .../AMDGPU/GlobalISel/inst-select-fma.s32.mir | 144 +- .../CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 2 - .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 82 +- .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 45 +- .../CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir | 8 - .../CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir | 2 - .../GlobalISel/legalize-build-vector.s16.mir | 12 - .../AMDGPU/GlobalISel/legalize-concat-vectors.mir | 9 +- .../AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir | 1 - .../GlobalISel/legalize-extract-vector-elt.mir | 52 +- .../CodeGen/AMDGPU/GlobalISel/legalize-extract.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 43 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 58 +- .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir | 32 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir | 12 - .../CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir | 55 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir | 12 - .../CodeGen/AMDGPU/GlobalISel/legalize-fma.mir | 73 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir | 42 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir | 42 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 58 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir | 2 - .../CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir | 135 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir | 239 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir | 12 - .../CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir | 12 - .../CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir | 54 +- .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 15 +- .../GlobalISel/legalize-implicit-def-s1025.mir | 2 - .../AMDGPU/GlobalISel/legalize-implicit-def.mir | 3 - .../GlobalISel/legalize-insert-vector-elt.mir | 71 +- .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir | 39 +- .../legalize-llvm.amdgcn.image.dim.a16.ll | 18 - .../legalize-llvm.amdgcn.image.load.2d.d16.ll | 188 +- .../legalize-llvm.amdgcn.image.load.2d.ll | 48 +- .../legalize-llvm.amdgcn.image.store.2d.d16.ll | 4 - .../AMDGPU/GlobalISel/legalize-load-constant.mir | 318 ++-- .../AMDGPU/GlobalISel/legalize-load-flat.mir | 253 +-- .../AMDGPU/GlobalISel/legalize-load-global.mir | 1889 +++++--------------- .../AMDGPU/GlobalISel/legalize-load-local.mir | 609 +++---- .../AMDGPU/GlobalISel/legalize-load-private.mir | 296 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 103 +- .../CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir | 1 - .../AMDGPU/GlobalISel/legalize-memcpyinline.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-memset.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-mul.mir | 2 - .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-phi.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir | 195 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir | 234 +-- .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 24 +- .../AMDGPU/GlobalISel/legalize-sext-inreg.mir | 52 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir | 1 - .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 43 +- .../AMDGPU/GlobalISel/legalize-shuffle-vector.mir | 16 +- .../GlobalISel/legalize-shuffle-vector.s16.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smax.mir | 23 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smin.mir | 23 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir | 198 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir | 195 +- .../AMDGPU/GlobalISel/legalize-store-global.mir | 72 +- .../CodeGen/AMDGPU/GlobalISel/legalize-store.mir | 68 +- .../CodeGen/AMDGPU/GlobalISel/legalize-sub.mir | 2 - .../CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir | 23 +- .../CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir | 175 +- .../CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir | 162 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir | 23 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir | 23 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir | 68 +- .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 150 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir | 248 ++- .../CodeGen/AMDGPU/GlobalISel/legalize-usube.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir | 169 +- .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 54 +- .../CodeGen/ARM/GlobalISel/arm-legalize-fp.mir | 16 +- .../CodeGen/Mips/GlobalISel/legalizer/bitwise.mir | 4 - .../Mips/GlobalISel/legalizer/constants.mir | 10 +- .../CodeGen/Mips/GlobalISel/legalizer/trunc.mir | 1 - .../GlobalISel/legalizer/zextLoad_and_sextLoad.mir | 1 - .../Mips/GlobalISel/legalizer/zext_and_sext.mir | 1 - llvm/test/CodeGen/Thumb2/mve-shuffle.ll | 66 +- llvm/test/CodeGen/Thumb2/mve-shufflemov.ll | 66 +- .../X86/GlobalISel/legalize-ashr-scalar.mir | 4 - .../X86/GlobalISel/legalize-lshr-scalar.mir | 4 - .../CodeGen/X86/GlobalISel/legalize-shl-scalar.mir | 4 - llvm/test/CodeGen/X86/GlobalISel/select-phi.mir | 256 +-- .../IndVarSimplify/eliminate-backedge.ll | 96 +- .../IndVarSimplify/eliminate-exit-no-dl.ll | 5 +- .../Transforms/IndVarSimplify/floating-point-iv.ll | 4 +- .../Transforms/IndVarSimplify/negative_ranges.ll | 4 +- llvm/test/Transforms/InstCombine/icmp-vscale.ll | 88 + llvm/test/Transforms/InstSimplify/vscale.ll | 15 + .../LoopVectorize/AArch64/sve-widen-phi.ll | 18 +- .../AArch64/transpose-inseltpoison.ll | 84 +- .../Transforms/SLPVectorizer/AArch64/transpose.ll | 84 +- llvm/test/Transforms/SLPVectorizer/X86/addsub.ll | 42 +- .../Transforms/SLPVectorizer/X86/crash_cmpop.ll | 6 +- llvm/test/Transforms/SLPVectorizer/X86/extract.ll | 6 +- .../SLPVectorizer/X86/jumbled-load-multiuse.ll | 12 +- .../Transforms/SLPVectorizer/X86/jumbled-load.ll | 22 +- .../SLPVectorizer/X86/jumbled_store_crash.ll | 29 +- .../SLPVectorizer/X86/reorder_repeated_ops.ll | 4 +- .../SLPVectorizer/X86/split-load8_2-unord.ll | 4 +- .../X86/vectorize-reorder-alt-shuffle.ll | 9 +- .../SLPVectorizer/X86/vectorize-reorder-reuse.ll | 52 +- .../update_mir_test_checks/Inputs/x86-condbr.mir | 48 + .../Inputs/x86-condbr.mir.expected | 68 + .../lit.local.cfg | 0 .../update_mir_test_checks/x86-condbr.test | 5 + llvm/utils/update_mir_test_checks.py | 7 +- mlir/include/mlir/Conversion/SCFToGPU/SCFToGPU.h | 4 + mlir/include/mlir/Dialect/Linalg/Passes.h | 3 + mlir/include/mlir/Dialect/Linalg/Passes.td | 14 + mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 58 + mlir/include/mlir/IR/OpBase.td | 6 +- mlir/lib/Analysis/Presburger/Simplex.cpp | 2 + mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp | 30 +- mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp | 1 + mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp | 5 +- mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 1 + mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp | 86 +- .../Dialect/Linalg/Transforms/FusionOnTensors.cpp | 481 +++++ mlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp | 2 + .../Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp | 27 +- mlir/lib/Transforms/Utils/DialectConversion.cpp | 8 +- ...ilure.mlir => detensorize_while_impure_cf.mlir} | 7 +- .../Dialect/Linalg/tile-and-fuse-on-tensors.mlir | 190 ++ mlir/test/Target/LLVMIR/openacc-llvm.mlir | 2 +- mlir/test/Transforms/test-legalizer-full.mlir | 105 +- mlir/test/Transforms/test-legalizer.mlir | 67 +- mlir/test/lib/Dialect/Test/TestOps.td | 3 + mlir/test/lib/Dialect/Test/TestPatterns.cpp | 40 +- mlir/unittests/Analysis/Presburger/SimplexTest.cpp | 1 + 274 files changed, 7448 insertions(+), 7387 deletions(-) create mode 100644 clang/test/CodeGen/X86/va-arg-sse.c create mode 100644 libc/src/inttypes/imaxdiv.cpp copy libc/src/{__support/integer_operations.h => inttypes/imaxdiv.h} (50%) create mode 100644 libc/src/stdlib/div.cpp copy libc/src/{__support/integer_operations.h => stdlib/div.h} (50%) create mode 100644 libc/src/stdlib/ldiv.cpp copy libc/src/{__support/integer_operations.h => stdlib/ldiv.h} (50%) create mode 100644 libc/src/stdlib/lldiv.cpp copy libc/src/{__support/integer_operations.h => stdlib/lldiv.h} (50%) create mode 100644 libc/test/src/inttypes/imaxdiv_test.cpp create mode 100644 libc/test/src/stdlib/DivTest.h create mode 100644 libc/test/src/stdlib/div_test.cpp create mode 100644 libc/test/src/stdlib/ldiv_test.cpp create mode 100644 libc/test/src/stdlib/lldiv_test.cpp create mode 100644 lldb/unittests/Process/Utility/DynamicRegisterInfoTest.cpp delete mode 100644 llvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll create mode 100644 llvm/test/CodeGen/AArch64/v8.4-atomic-128.ll create mode 100644 llvm/test/Transforms/InstCombine/icmp-vscale.ll create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/ [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/ [...] copy llvm/test/tools/UpdateTestChecks/{update_llc_test_checks => update_mir_test_c [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-con [...] create mode 100644 mlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp rename mlir/test/Dialect/Linalg/{detensorize_while_failure.mlir => detensorize_whi [...] create mode 100644 mlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir