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from e97179bacd0 libstdc++: Improve comment for _Hashtable::_M_insert_unique_node new 7c8f36b420d RISC-V: Add testcases for unsigned imm vec SAT_SUB form1
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Summary of changes: .../riscv/rvv/autovec/binop/vec_sat_data.h | 240 +++++++++++++++++++++ .../{vec_sat_u_sub-1.c => vec_sat_u_sub_imm-1.c} | 2 +- .../{vec_sat_u_sub-1.c => vec_sat_u_sub_imm-2.c} | 2 +- .../{vec_sat_u_sub-1.c => vec_sat_u_sub_imm-3.c} | 2 +- .../{vec_sat_u_sub-1.c => vec_sat_u_sub_imm-4.c} | 2 +- ...u_add_imm-run-1.c => vec_sat_u_sub_imm-run-1.c} | 12 +- .../rvv/autovec/binop/vec_sat_u_sub_imm-run-2.c | 28 +++ .../rvv/autovec/binop/vec_sat_u_sub_imm-run-3.c | 28 +++ .../rvv/autovec/binop/vec_sat_u_sub_imm-run-4.c | 28 +++ .../gcc.target/riscv/rvv/autovec/vec_sat_arith.h | 18 ++ 10 files changed, 352 insertions(+), 10 deletions(-) copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_u_sub-1.c => vec_sa [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_u_sub-1.c => vec_sa [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_u_sub-1.c => vec_sa [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_u_sub-1.c => vec_sa [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/{vec_sat_u_add_imm-run-1.c = [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_ [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_ [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_ [...]