This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository gcc.
from 589865a8e4f testsuite: Fix -m32 gcc.target/i386/pr102464-vrndscaleph.c [...] new ed213b384fd RISC-V: Add testcases for unsigned scalar .SAT_ADD IMM form 1 new bff0d025aff RISC-V: Add testcases for unsigned scalar .SAT_ADD IMM form 2 new 6d98e88f61f RISC-V: Add testcases for unsigned scalar .SAT_ADD IMM form 3 new 7a65ab6b5f3 RISC-V: Add testcases for unsigned scalar .SAT_ADD IMM form 4
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/testsuite/gcc.target/riscv/sat_arith.h | 42 ++++++++++++++++++++ .../riscv/{sat_u_add-1.c => sat_u_add_imm-1.c} | 6 +-- .../riscv/{sat_u_add-14.c => sat_u_add_imm-10.c} | 6 +-- .../riscv/{sat_u_add-19.c => sat_u_add_imm-11.c} | 6 +-- .../riscv/{sat_u_add-20.c => sat_u_add_imm-12.c} | 6 +-- .../riscv/{sat_u_add-1.c => sat_u_add_imm-13.c} | 6 +-- .../riscv/{sat_u_add-14.c => sat_u_add_imm-14.c} | 6 +-- .../riscv/{sat_u_add-19.c => sat_u_add_imm-15.c} | 6 +-- .../riscv/{sat_u_add-20.c => sat_u_add_imm-16.c} | 6 +-- .../riscv/{sat_u_add-14.c => sat_u_add_imm-2.c} | 6 +-- .../riscv/{sat_u_add-19.c => sat_u_add_imm-3.c} | 6 +-- .../riscv/{sat_u_add-20.c => sat_u_add_imm-4.c} | 6 +-- .../riscv/{sat_u_add-1.c => sat_u_add_imm-5.c} | 6 +-- .../riscv/{sat_u_add-14.c => sat_u_add_imm-6.c} | 6 +-- .../riscv/{sat_u_add-19.c => sat_u_add_imm-7.c} | 6 +-- .../riscv/{sat_u_add-20.c => sat_u_add_imm-8.c} | 6 +-- .../riscv/{sat_u_add-1.c => sat_u_add_imm-9.c} | 6 +-- .../gcc.target/riscv/sat_u_add_imm-run-1.c | 46 ++++++++++++++++++++++ .../gcc.target/riscv/sat_u_add_imm-run-10.c | 46 ++++++++++++++++++++++ .../gcc.target/riscv/sat_u_add_imm-run-11.c | 46 ++++++++++++++++++++++ .../{sat_u_add-run-12.c => sat_u_add_imm-run-12.c} | 31 ++++++++++++--- .../gcc.target/riscv/sat_u_add_imm-run-13.c | 46 ++++++++++++++++++++++ .../gcc.target/riscv/sat_u_add_imm-run-14.c | 46 ++++++++++++++++++++++ .../gcc.target/riscv/sat_u_add_imm-run-15.c | 46 ++++++++++++++++++++++ .../{sat_u_add-run-20.c => sat_u_add_imm-run-16.c} | 31 ++++++++++++--- .../gcc.target/riscv/sat_u_add_imm-run-2.c | 46 ++++++++++++++++++++++ .../gcc.target/riscv/sat_u_add_imm-run-3.c | 46 ++++++++++++++++++++++ .../{sat_u_add-run-12.c => sat_u_add_imm-run-4.c} | 31 ++++++++++++--- .../gcc.target/riscv/sat_u_add_imm-run-5.c | 46 ++++++++++++++++++++++ .../gcc.target/riscv/sat_u_add_imm-run-6.c | 46 ++++++++++++++++++++++ .../gcc.target/riscv/sat_u_add_imm-run-7.c | 46 ++++++++++++++++++++++ .../{sat_u_add-run-12.c => sat_u_add_imm-run-8.c} | 31 ++++++++++++--- .../gcc.target/riscv/sat_u_add_imm-run-9.c | 46 ++++++++++++++++++++++ 33 files changed, 746 insertions(+), 68 deletions(-) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-1.c => sat_u_add_imm-1.c} (83%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-14.c => sat_u_add_imm-10.c} (84%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-19.c => sat_u_add_imm-11.c} (81%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-20.c => sat_u_add_imm-12.c} (80%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-1.c => sat_u_add_imm-13.c} (83%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-14.c => sat_u_add_imm-14.c} (84%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-19.c => sat_u_add_imm-15.c} (81%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-20.c => sat_u_add_imm-16.c} (80%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-14.c => sat_u_add_imm-2.c} (84%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-19.c => sat_u_add_imm-3.c} (81%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-20.c => sat_u_add_imm-4.c} (80%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-1.c => sat_u_add_imm-5.c} (83%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-14.c => sat_u_add_imm-6.c} (84%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-19.c => sat_u_add_imm-7.c} (81%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-20.c => sat_u_add_imm-8.c} (80%) copy gcc/testsuite/gcc.target/riscv/{sat_u_add-1.c => sat_u_add_imm-9.c} (83%) create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-11.c copy gcc/testsuite/gcc.target/riscv/{sat_u_add-run-12.c => sat_u_add_imm-run-12.c} (52%) create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-15.c copy gcc/testsuite/gcc.target/riscv/{sat_u_add-run-20.c => sat_u_add_imm-run-16.c} (52%) create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-3.c copy gcc/testsuite/gcc.target/riscv/{sat_u_add-run-12.c => sat_u_add_imm-run-4.c} (52%) create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-7.c copy gcc/testsuite/gcc.target/riscv/{sat_u_add-run-12.c => sat_u_add_imm-run-8.c} (52%) create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_add_imm-run-9.c