[Tcwg-commits] [llvm] branch master updated (7e6fcc775f5 -> baeee310cc5)

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from 7e6fcc775f5 [X86] Fix vmul combine for AVX1 targets. new baeee310cc5 [AArch64] Change order of candidate FMLS patterns

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Summary of changes: lib/Target/AArch64/AArch64InstrInfo.cpp | 44 +++++------ test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir | 87 +++++++++++++++++++++- 2 files changed, 105 insertions(+), 26 deletions(-)