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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project.
from 3f09c77d33d [SLP] fix typo in assert adds 377dcfd5c15 [Tests] Auto update a vectorizer test to simplify future diff adds abfe348e6b4 [test] Improve CodeGenCXX/difile_entry.cpp adds 86d6f7e90a1 Precommit tests requested for D93725 adds fc8ab254472 [Tests] Precommit tests from to simplify rebase adds 13dea030b3d [lldb] Fix some bugs in the Pipe class and add tests adds 8e8d214c4a6 [NFCI][SimplifyCFG] Prefer to add Insert edges before Delet [...] adds 894d2dbf502 [LLVM] Added OpenMP to `LLVM_ALL_RUNTIMES` adds 7be3285248b [OpenMP] Not set OPENMP_STANDALONE_BUILD=ON when building O [...] adds 407b1e65a46 [StringExtras] Add a helper class for comma-separated lists adds 02bc320545d CGDebugInfo: Delete unused DIFile* parameter adds 4739dd67e7a [LoopDeletion] Break backedge of outermost loops when known [...] adds d43a264a5dd Revert "[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())" adds 7539c75bb43 [DAGCombine] Remove the check for unsafe-fp-math when we ar [...] adds 5cf73dca77e [RISCV] Convert most of the information about RVV Pseudos i [...] adds 7f69860243e [LoopUnroll] Fix a crash adds ffa67873a3f [PowerPC] Add variants of 64-bit vector types for vec_sel. adds dcac2da1063 [IR Parser] Fix a crash handling zero width integer attributes. adds 6215c1b778f CGDebugInfo: Delete redundant test adds b8d28420885 CGDebugInfo: Delete unneeded UnwrapTypeForDebugInfo adds a40767ec885 [MLIR][SPIRV] Add (de-)serialization support for SpecConsta [...] adds 5e476061deb [NFC][AsmPrinter] Make comments for spill/reload more precise. adds 7b11f564dcf [JITLink] Rename PostAllocationPasses to PreFixupPasses. adds 131ce834e4b [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instruc [...] adds af339f89a14 Remove redundant casts. adds cddd3faf5de [CSKY] Add visibility macro to fix link error adds ee27c767bd2 [clang-format] Skip UTF8 Byte Order Mark while sorting includes adds 0c8b748f321 [ARM] Additional trunc cost tests. NFC adds 7473940bae0 [clang-format] turn on formatting after "clang-format on" w [...] adds 89878e8c966 [clang-format] Find main include after block ended with #pr [...] adds dcefcd51e01 [ARM] Update trunc costs adds b7ccaca5370 [NFC] Remove min/max functions from InstructionCost adds 97100646d1b Reapply "[clang][cli] Port DiagnosticOpts to new option par [...] adds 40abeb11f45 [NFC][InstructionCost] Change LoopVectorizationCostModel::g [...] adds 8165a034203 [ARM] Add debug messages for the load store optimizer. NFC adds 1677c86124e [clangd] Add metrics for go-to-implementation. adds c5be0e0cc0e [X86] Fix tile register spill issue. adds 675be651062 Require chained analyses in BasicAA and AAResults to be transitive adds c37f68a8885 [SVE][CodeGen] Fix legalisation of floating-point masked gathers adds 41bf338dd1e Revert rGd43a264a5dd3 "Revert "[X86][SSE] Fold unpack(hop() [...] adds 59632292663 [X86][SSE] Add missing SSE test coverage for permute(hop,ho [...] adds b72ca799823 [VE] Support intrinsic to isnert/extract_subreg of v512i1 adds d02de139324 [VE] Support additional VMRGW and VMV intrinsic instructions adds c74751d4b5b [obj2yaml] - Fix the crash in getUniquedSectionName(). adds 8ea72b38873 [clang][AArch64][SVE] Avoid going through memory for coerce [...] adds a6db7cf1ce7 [llvm-readelf/obj] - Index phdrs and relocations from 0 whe [...] adds a94497a3429 [VPlan] Move initial quote emission from ::print to ::dumpB [...] adds a5b484c4d41 [obj2yaml][test] - Improve and fix section-group.yaml test. adds d36e879c21c [lldb] Disable PipeTest.OpenAsReader on windows adds 8112a2598ce [X86][SSE] Add 'vectorized sum' test patterns adds 2e17d9c0ee7 [ARM] Add uses for locals introduced for debug messages. NFC. adds 6dcf9207df1 [AMDGPU] Fix a urem combine test to test what it was supposed to adds 4fe7b16ae3f [mlir] Remove unnecessary llvm.mlir.cast in AsyncToLLVM lowering. adds 4c372a35cd8 [mlir] Make GpuAsyncRegion pass depend on async dialect. adds 8298ec2d629 [flang][driver] Copy input files into a temp dir when testing adds df86f15f0c5 [mlir][linalg] Support parsing attributes in named op spec adds 55225471d98 [mlir][linalg] Support permutation when lowering to loop nests adds 007358239de [DAGCombiner] Use getVectorElementCount inside visitINSERT_ [...] adds c163aae45ef [attributes] Add a facility for enforcing a Trusted Comput [...] adds eb0371e403a [VPlan] Unify value/recipe printing after VPDef transition. adds 419ef38a502 Revert "[attributes] Add a facility for enforcing a Truste [...] adds d59ddba7772 [mlir] Fix gpu-to-llvm lowering for gpu.alloc with dynamic sizes. adds a46982a2551 [X86] Add nounwind to lzcnt-cmp tests adds a0f82749f4f [X86] Extend lzcnt-cmp tests to test on non-lzcnt targets adds dbd5fa1e75d [ARM] Update existing test case with +pauth targets adds a2dbf3443af [clangd] Fix -check mode doesn't respect any tidy configs. adds 97517055128 [OpenMPOpt][WIP] Expand parallel region merging adds 31732e6f52c [clangd] Remove ScratchFS from tests adds e5eb5c8a7f3 NFC: Use -LABEL more adds c161775decd [FastISel] Flush local value map on every instruction adds 4214ca96145 [X86][AVX] Attempt to fold vpermf128(op(x,i),op(y,i)) -> op [...] adds 9c0dc0b2c1c [mlir][Linalg] Fold init_tensor -> linalg.tensor_reshape. adds c15b0e2229e [Clang][Docs] Fix ambiguity in clang-offload-bundler docs adds 7200d2cf089 [NFC] Disallow unused prefixes in CodeGen/PowerPC tests. adds 3d693bd0bd7 [mlir][vector] Add memory effects to transfer_read transfer [...] adds c4486cfd556 [mlir][Linalg] Fix reshape fusion to reshape the outs inste [...] adds be179b9946f [FastISel] NFC: Remove obsolete -fast-isel-sink-local-value [...] adds ac2224c0228 [ELF] --exclude-libs: localize defined libcall symbols refe [...] adds 171771e0780 [SystemZ] Minor NFC fix in SchedModels. adds 1f9c29228ce [FastISel] NFC: Clean up unnecessary bookkeeping adds 072714b9619 [X86] Regenerate vector-constrained-fp-intrinsics.ll tests adds 35c9baa11e4 [attributes] Add a facility for enforcing a Trusted Comput [...] adds a90214760d0 [Hexagon] Custom-widen SETCC's operands adds bcec0f27a2c [AMDGPU] Deduplicate VOP tablegen asm & ins adds 74628c43053 [mlir] Add Python bindings for AffineExpr adds e79bd0b4f25 [mlir] More Python bindings for AffineMap adds 547e3eef14a [mlir] Expose MemRef layout in Python bindings adds 47567ca5fac [flang][openxx][NFC] Remove duplicated function to check re [...] adds d8c6d24359f -funique-internal-linkage-names appends a hex md5hash suffi [...] adds 43a830ed941 Introduce new quiet mode and new option handling for -print [...] adds 5464baaae8c Fix minor build issue (NFC) adds 1027a22ccd7 [SystemZ][z/OS] Fix Permission denied pattern matching adds 195728c75aa [mlir] Add structural conversion to async dialect lowering.
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clangd/XRefs.cpp | 11 + clang-tools-extra/clangd/tool/Check.cpp | 1 + .../unittests/GlobalCompilationDatabaseTests.cpp | 75 +- clang/docs/ClangOffloadBundler.rst | 4 +- clang/include/clang/Basic/Attr.td | 16 + clang/include/clang/Basic/AttrDocs.td | 25 + clang/include/clang/Basic/DiagnosticOptions.h | 12 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 7 + clang/include/clang/Driver/Options.td | 112 +- clang/include/clang/Sema/Sema.h | 5 + clang/lib/CodeGen/CGCall.cpp | 15 + clang/lib/CodeGen/CGDebugInfo.cpp | 15 +- clang/lib/CodeGen/CGDebugInfo.h | 3 +- clang/lib/Format/Format.cpp | 16 +- clang/lib/Frontend/CompilerInvocation.cpp | 165 +- clang/lib/Headers/altivec.h | 40 + clang/lib/Sema/SemaChecking.cpp | 38 + clang/lib/Sema/SemaDecl.cpp | 4 + clang/lib/Sema/SemaDeclAttr.cpp | 77 + ...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 7 +- clang/test/CodeGen/attr-arm-sve-vector-bits-call.c | 93 +- clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c | 27 +- .../CodeGen/attr-arm-sve-vector-bits-codegen.c | 27 +- clang/test/CodeGen/builtins-ppc-vsx.c | 60 + .../test/CodeGen/unique-internal-linkage-names.cpp | 20 +- clang/test/CodeGenCXX/difile_entry.cpp | 17 +- ...pragma-attribute-supported-attributes-list.test | 2 + clang/test/Sema/attr-enforce-tcb-errors.cpp | 80 + clang/test/Sema/attr-enforce-tcb.c | 65 + clang/test/Sema/attr-enforce-tcb.cpp | 70 + clang/unittests/Format/SortIncludesTest.cpp | 112 ++ .../unittests/Frontend/CompilerInvocationTest.cpp | 15 + flang/lib/Semantics/check-directive-structure.h | 15 +- flang/lib/Semantics/check-omp-structure.cpp | 3 +- flang/test/Frontend/multiple-input-files.f90 | 10 +- flang/test/Semantics/omp-device-constructs.f90 | 2 +- lld/ELF/Driver.cpp | 11 +- lld/test/ELF/lto/exclude-libs-libcall.ll | 28 + lld/test/wasm/debug-removed-fn.ll | 2 +- lldb/source/Host/posix/PipePosix.cpp | 10 +- .../Shell/SymbolFile/NativePDB/disassembly.cpp | 4 +- lldb/test/Shell/SymbolFile/NativePDB/load-pdb.cpp | 2 +- lldb/unittests/Host/CMakeLists.txt | 1 + lldb/unittests/Host/PipeTest.cpp | 51 + llvm/include/llvm/ADT/StringExtras.h | 24 + llvm/include/llvm/CodeGen/FastISel.h | 25 +- .../include/llvm/ExecutionEngine/JITLink/JITLink.h | 4 +- llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 5 +- llvm/include/llvm/IR/IntrinsicsVE.td | 18 + llvm/include/llvm/Option/OptParser.td | 1 + .../include/llvm/Passes/StandardInstrumentations.h | 14 +- llvm/include/llvm/Support/InstructionCost.h | 8 - llvm/include/llvm/Transforms/Utils/LoopUtils.h | 6 + llvm/lib/Analysis/AliasAnalysis.cpp | 4 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 6 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 17 +- llvm/lib/CodeGen/InlineSpiller.cpp | 42 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 25 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 246 +-- llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp | 2 +- .../lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp | 2 +- llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 21 +- llvm/lib/Passes/StandardInstrumentations.cpp | 52 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 11 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 14 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 195 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 1 + llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 104 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 13 + llvm/lib/Target/CSKY/TargetInfo/CSKYTargetInfo.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 1 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 87 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 1 - llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 23 +- llvm/lib/Target/RISCV/RISCVInstrFormats.td | 18 + llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 22 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 137 +- llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 18 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 43 +- llvm/lib/Target/SystemZ/SystemZScheduleZ13.td | 2 +- llvm/lib/Target/SystemZ/SystemZScheduleZ14.td | 2 +- llvm/lib/Target/SystemZ/SystemZScheduleZ15.td | 2 +- llvm/lib/Target/SystemZ/SystemZScheduleZ196.td | 2 +- llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td | 2 +- llvm/lib/Target/VE/VEInstrIntrinsicVL.td | 31 + llvm/lib/Target/X86/X86ISelLowering.cpp | 47 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 208 ++- llvm/lib/Transforms/Scalar/GVNHoist.cpp | 1 - llvm/lib/Transforms/Scalar/LoopDeletion.cpp | 51 + llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp | 2 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 2 +- llvm/lib/Transforms/Utils/Local.cpp | 8 +- llvm/lib/Transforms/Utils/LoopUnroll.cpp | 105 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 32 + llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 36 +- .../Utils/UniqueInternalLinkageNames.cpp | 5 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 55 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 2 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 72 +- llvm/lib/Transforms/Vectorize/VPlan.h | 16 +- llvm/lib/Transforms/Vectorize/VPlanSLP.cpp | 4 +- llvm/lib/Transforms/Vectorize/VPlanValue.h | 11 +- llvm/runtimes/CMakeLists.txt | 10 +- llvm/test/Analysis/CostModel/ARM/arith-overflow.ll | 48 +- llvm/test/Analysis/CostModel/ARM/cast.ll | 110 +- .../CostModel/ARM/mve-gather-scatter-cost.ll | 6 +- llvm/test/CodeGen/AArch64/arm64-abi_align.ll | 8 +- llvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll | 15 +- llvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll | 6 +- .../CodeGen/AArch64/arm64-fast-isel-intrinsic.ll | 4 +- llvm/test/CodeGen/AArch64/arm64-fast-isel.ll | 21 +- .../AArch64/arm64-patchpoint-webkit_jscc.ll | 18 +- llvm/test/CodeGen/AArch64/cfguard-checks.ll | 4 +- .../AArch64/dag-combine-insert-subvector.ll | 28 + llvm/test/CodeGen/AArch64/elf-globals-static.ll | 10 + llvm/test/CodeGen/AArch64/large-stack.ll | 3 +- .../CodeGen/AArch64/sve-masked-gather-legalize.ll | 106 ++ llvm/test/CodeGen/AArch64/swifterror.ll | 8 +- .../AMDGPU/GlobalISel/combine-urem-pow-2.mir | 8 +- llvm/test/CodeGen/AMDGPU/fneg-combines.ll | 2 +- llvm/test/CodeGen/AMDGPU/frem.ll | 6 +- llvm/test/CodeGen/ARM/fast-isel-call.ll | 72 +- llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll | 14 +- .../ARM/fast-isel-ldr-str-thumb-neg-index.ll | 18 +- llvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll | 38 +- llvm/test/CodeGen/ARM/fast-isel-select.ll | 46 +- llvm/test/CodeGen/ARM/fast-isel-vararg.ll | 6 +- llvm/test/CodeGen/ARM/fast-isel.ll | 19 +- llvm/test/CodeGen/ARM/swifterror.ll | 6 +- llvm/test/CodeGen/Hexagon/autohvx/widen-setcc.ll | 21 + llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll | 74 +- llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll | 2 +- llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll | 100 +- llvm/test/CodeGen/Mips/Fast-ISel/icmpa.ll | 32 +- llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll | 18 +- llvm/test/CodeGen/Mips/Fast-ISel/overflt.ll | 4 +- llvm/test/CodeGen/Mips/Fast-ISel/shftopm.ll | 12 +- llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll | 6 +- llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll | 10 +- .../CodeGen/Mips/emergency-spill-slot-near-fp.ll | 3 + llvm/test/CodeGen/NVPTX/fast-math.ll | 6 +- llvm/test/CodeGen/NVPTX/sqrt-approx.ll | 16 +- llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll | 4 +- llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll | 4 +- llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll | 4 +- llvm/test/CodeGen/PowerPC/elf-common.ll | 6 +- llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll | 54 +- llvm/test/CodeGen/PowerPC/lit.local.cfg | 8 + llvm/test/CodeGen/PowerPC/lower-massv.ll | 2 +- llvm/test/CodeGen/PowerPC/mcm-1.ll | 8 +- llvm/test/CodeGen/PowerPC/mcm-13.ll | 4 +- llvm/test/CodeGen/PowerPC/mcm-2.ll | 8 +- llvm/test/CodeGen/PowerPC/mcm-3.ll | 8 +- llvm/test/CodeGen/PowerPC/mcm-6.ll | 4 +- llvm/test/CodeGen/PowerPC/mcm-9.ll | 4 +- llvm/test/CodeGen/PowerPC/mcm-default.ll | 4 +- llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc32-pic.ll | 6 +- llvm/test/CodeGen/PowerPC/srem-lkk.ll | 4 +- llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll | 8 +- llvm/test/CodeGen/PowerPC/testComparesigeuc.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesigeui.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesigeull.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesigeus.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesileuc.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesileui.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesileull.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesileus.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesiltsc.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesiltsi.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesiltsll.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesiltss.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesiltuc.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesiltui.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesiltus.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllgeui.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllgeull.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllgeus.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllleuc.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllleui.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllleull.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllleus.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllltsll.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllltuc.ll | 6 +- llvm/test/CodeGen/PowerPC/testComparesllltus.ll | 6 +- llvm/test/CodeGen/PowerPC/urem-lkk.ll | 4 +- llvm/test/CodeGen/PowerPC/vec_splat.ll | 4 +- .../CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll | 10 +- llvm/test/CodeGen/PowerPC/vmladduhm.ll | 4 +- llvm/test/CodeGen/VE/VELIntrinsics/extract.ll | 33 + llvm/test/CodeGen/VE/VELIntrinsics/insert.ll | 32 + llvm/test/CodeGen/VE/VELIntrinsics/vmrg.ll | 35 + llvm/test/CodeGen/VE/VELIntrinsics/vmv.ll | 91 +- llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll | 133 ++ llvm/test/CodeGen/X86/atomic-unordered.ll | 21 +- llvm/test/CodeGen/X86/atomic64.ll | 4 +- llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll | 2 +- llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll | 4 +- llvm/test/CodeGen/X86/crash-O0.ll | 13 +- llvm/test/CodeGen/X86/fast-isel-call-cleanup.ll | 2 +- llvm/test/CodeGen/X86/fast-isel-constant.ll | 24 - llvm/test/CodeGen/X86/fast-isel-mem.ll | 16 +- llvm/test/CodeGen/X86/fast-isel-prolog-dbgloc.ll | 74 + llvm/test/CodeGen/X86/fast-isel-select.ll | 8 +- llvm/test/CodeGen/X86/horizontal-shuffle-2.ll | 266 ++- ...zontal-shuffle-2.ll => horizontal-shuffle-3.ll} | 119 -- llvm/test/CodeGen/X86/horizontal-sum.ll | 1189 ++++++++++++ llvm/test/CodeGen/X86/inreg.ll | 4 +- llvm/test/CodeGen/X86/lvi-hardening-loads.ll | 2 +- llvm/test/CodeGen/X86/lzcnt-cmp.ll | 192 +- llvm/test/CodeGen/X86/membarrier.ll | 2 +- llvm/test/CodeGen/X86/pr32241.ll | 10 +- llvm/test/CodeGen/X86/pr32256.ll | 4 +- llvm/test/CodeGen/X86/pr32284.ll | 16 +- llvm/test/CodeGen/X86/pr32340.ll | 52 +- llvm/test/CodeGen/X86/pr32345.ll | 8 +- llvm/test/CodeGen/X86/pr32484.ll | 2 +- llvm/test/CodeGen/X86/pr44749.ll | 2 - llvm/test/CodeGen/X86/sink-local-value.ll | 2 +- llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll | 36 +- llvm/test/CodeGen/X86/sqrt-fastmath.ll | 8 +- llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll | 16 +- .../X86/vector-constrained-fp-intrinsics.ll | 766 ++++---- llvm/test/CodeGen/X86/vector-trunc.ll | 8 +- llvm/test/CodeGen/X86/volatile.ll | 38 +- llvm/test/DebugInfo/COFF/lines-bb-start.ll | 1 - llvm/test/DebugInfo/Mips/delay-slot.ll | 3 +- llvm/test/DebugInfo/X86/fission-ranges.ll | 24 +- llvm/test/DebugInfo/X86/prologue-stack.ll | 2 +- .../AArch64/armv8.3a-signed-pointer.txt | 2 + llvm/test/Other/change-printer.ll | 151 ++ .../Transforms/IndVarSimplify/exit_value_test2.ll | 6 +- llvm/test/Transforms/LoopDeletion/update-scev.ll | 3 +- llvm/test/Transforms/LoopDeletion/zero-btc.ll | 375 ++++ .../Transforms/LoopUnroll/unroll-after-peel.ll | 48 + .../first-order-recurrence-complex.ll | 399 +++- llvm/test/Transforms/LoopVectorize/loop-form.ll | 123 ++ .../Transforms/LoopVectorize/vplan-printing.ll | 4 +- .../Transforms/OpenMP/parallel_region_merging.ll | 1955 +++++++++++++++++--- .../unique_symbol_names.ll | 4 +- llvm/test/tools/llvm-elfabi/fail-file-write.test | 2 +- llvm/test/tools/llvm-readobj/ELF/gnu-notes.test | 8 +- .../llvm-readobj/ELF/note-core-ntfile-bad.test | 8 +- .../tools/llvm-readobj/ELF/relocation-errors.test | 8 +- llvm/test/tools/llvm-readobj/ELF/relocations.test | 8 +- llvm/test/tools/llvm-readobj/ELF/stack-sizes.test | 30 +- llvm/test/tools/obj2yaml/ELF/section-group.yaml | 67 +- llvm/test/tools/obj2yaml/ELF/symbol.yaml | 41 + llvm/tools/llvm-readobj/ELFDumper.cpp | 13 +- llvm/tools/obj2yaml/elf2yaml.cpp | 29 +- llvm/unittests/ADT/StringExtrasTest.cpp | 14 + llvm/unittests/Support/InstructionCostTest.cpp | 4 +- llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 72 +- llvm/utils/TableGen/OptParserEmitter.cpp | 12 +- mlir/include/mlir-c/AffineExpr.h | 23 +- mlir/include/mlir-c/AffineMap.h | 16 +- mlir/include/mlir-c/Bindings/Python/Interop.h | 21 + mlir/include/mlir-c/BuiltinTypes.h | 8 +- .../mlir/Conversion/AsyncToLLVM/AsyncToLLVM.h | 16 + .../StandardToLLVM/ConvertStandardToLLVM.h | 2 +- mlir/include/mlir/Dialect/GPU/Passes.td | 1 + mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 8 + mlir/include/mlir/Dialect/Linalg/Passes.td | 22 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 58 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td | 4 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 6 +- mlir/lib/Bindings/Python/IRModules.cpp | 579 +++++- mlir/lib/Bindings/Python/IRModules.h | 29 + mlir/lib/CAPI/IR/AffineExpr.cpp | 20 + mlir/lib/CAPI/IR/AffineMap.cpp | 17 +- mlir/lib/CAPI/IR/BuiltinTypes.cpp | 11 + mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 73 +- .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp | 6 +- .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 4 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 18 +- .../Dialect/GPU/Transforms/AsyncRegionRewriter.cpp | 4 +- mlir/lib/Dialect/GPU/Transforms/PassDetail.h | 1 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 126 +- .../Dialect/Linalg/Transforms/FusionOnTensors.cpp | 99 +- mlir/lib/Dialect/Linalg/Transforms/Loops.cpp | 83 +- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 5 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 16 + mlir/lib/Parser/AttributeParser.cpp | 5 + mlir/lib/Target/SPIRV/Deserialization.cpp | 139 +- mlir/lib/Target/SPIRV/Serialization.cpp | 49 + mlir/test/Bindings/Python/ir_affine_expr.py | 275 +++ mlir/test/Bindings/Python/ir_affine_map.py | 148 ++ mlir/test/Bindings/Python/ir_types.py | 16 +- mlir/test/CAPI/ir.c | 50 +- .../lower-alloc-to-gpu-runtime-calls.mlir | 11 +- .../Conversion/VectorToSCF/vector-to-loops.mlir | 16 +- mlir/test/Dialect/Linalg/canonicalize.mlir | 36 + mlir/test/Dialect/Linalg/loop-order.mlir | 24 + mlir/test/Dialect/Linalg/reshape_fusion.mlir | 166 +- .../Linalg/reshape_linearization_fusion.mlir | 145 +- mlir/test/Dialect/SPIRV/IR/structure-ops.mlir | 14 + mlir/test/Dialect/Vector/canonicalize.mlir | 16 + mlir/test/IR/invalid-ops.mlir | 8 + mlir/test/Target/SPIRV/spec-constant.mlir | 31 + .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc | 22 + .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 180 +- openmp/cmake/OpenMPTesting.cmake | 4 +- 306 files changed, 10449 insertions(+), 3402 deletions(-) create mode 100644 clang/test/Sema/attr-enforce-tcb-errors.cpp create mode 100644 clang/test/Sema/attr-enforce-tcb.c create mode 100644 clang/test/Sema/attr-enforce-tcb.cpp create mode 100644 lld/test/ELF/lto/exclude-libs-libcall.ll create mode 100644 lldb/unittests/Host/PipeTest.cpp create mode 100644 llvm/test/CodeGen/AArch64/dag-combine-insert-subvector.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/widen-setcc.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/extract.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/insert.ll create mode 100644 llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll delete mode 100644 llvm/test/CodeGen/X86/fast-isel-constant.ll create mode 100644 llvm/test/CodeGen/X86/fast-isel-prolog-dbgloc.ll copy llvm/test/CodeGen/X86/{horizontal-shuffle-2.ll => horizontal-shuffle-3.ll} (51%) create mode 100644 llvm/test/CodeGen/X86/horizontal-sum.ll create mode 100644 llvm/test/Transforms/LoopDeletion/zero-btc.ll create mode 100644 llvm/test/Transforms/LoopUnroll/unroll-after-peel.ll create mode 100644 mlir/test/Bindings/Python/ir_affine_expr.py create mode 100644 mlir/test/Dialect/Linalg/loop-order.mlir