[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (2139958b534 -> fe5d51a4897)

4 Jan 2021


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig
in repository toolchain/ci/llvm-project.
from  2139958b534 [InstSimplify] Return poison if insertelement touches out o [...]
      adds  858b99d774f [InstSimplify] Regenerate test checks (NFC)
      adds  49c2d703d34 [X86] Make deinterleave8bitStride3 use unary CreateShuffleVector
      adds  c6ad00d7098 [InstSimplify] Return poison for out of bounds extractelement
      adds  f094d65beaa [InstSimplify] Fix addo/subo with undef (PR43188)
      adds  985f899bf2c [Target] Use llvm::append_range (NFC)
      adds  0e219b6443b [Target] Construct SmallVector with iterator ranges (NFC)
      adds  ba82c0b3157 [llvm] Call *(Set|Map)::erase directly (NFC)
      adds  766cf7f32e4 [InstSimplify] Fold division by zero to poison
      adds  edb52c626b5 [LoopUnswitch] Precommit initial partial unswitching test cases.
      adds  3715c99be9d [InstSimplify] Fold nnan/ninf violation to poison
      adds  4fc908025fd [NFC][SimplifyCFG] Add a test where we fail to preserve Dom [...]
      adds  70935b9595a [NFC][SimplifyCFG] SimplifyTerminatorOnSelect(): pull out O [...]
      adds  a7684940f0e [SimplifyCFG] SimplifyTerminatorOnSelect(): fix/tune DomTre [...]
      adds  98cd1c33e3c [NFC][SimplifyCFG] Hoist 'original' DomTree verification fr [...]
      adds  59810c51e76 [clang-tidy] Fix windows tests
      adds  6988f7a6f4a [compiler-rt] [Sanitizers] Extend ThreadDescriptorSize() fo [...]
      adds  6280bc1cc34 [Flang][openmp][5.0] Add task_reduction clause.
      adds  05e6ac4eb81 [IROutliner] Removing a duplicate addition, causing overest [...]
      adds  5c951623bc8 [IROutliner] Refactoring errors in the cost model from past [...]
      adds  f6515b05205 [PowerPC] Do not fold `cmp(d|w)` and `subf` instruction to  [...]
      adds  09b3f3f22cb [benchmark] Fixed a build error when using CMake 3.15.1 + NDK-R20
      adds  94257d12cb2 [RISCV] Remove unused method isUImm5NonZero() from RISCVAsm [...]
      adds  a65092040ad [SVE] Fix inline assembly parsing crash
      adds  74e7cb26b9a [VE] Remove VA.needsCustom checks
      adds  e43b3d1f5e0 Revert "[Sema] Fix deleted function problem in implicitly m [...]
      adds  e0905553b42 [ArgPromotion] Delay dead GEP removal until doPromotion.
      adds  685c8b537af [AARCH64] Improve accumulator forwarding for Cortex-A57 model
      adds  c287f90ccd3 [VE] Change default CPU name to "generic"
      adds  6c89f6fae49 [AArch64] Attempt to fix Mac tests with a more specific tri [...]
      adds  975b64b2937 [docs] Release notes for IsDecl in DIModule.
      adds  42652c1d6e2 [Sparc] Fixes for the internal assembler
      adds  901cc9b6f30 [ARM] Extend lowering for i64 reductions
      adds  23b41986527 [Support] Add KnownBits::icmp helpers.
      adds  d38a0258a5f [AArch64] Add patterns for FMCLA*_indexed.
      adds  060cfd97954 [AArch64][SVE]Add cost model for masked gather and scatter  [...]
      adds  4d7cb6da9fc [Sparc] SparcMCExpr::printVariantKind - fix Wcovered-switch [...]
      adds  82a29a62aba [OpenMP] Add definition/interface for target memory routines
      adds  9f8c0d15c7f DeclCXX - Fix getAs<> null-dereference static analyzer warn [...]
      adds  e9f401d8a26 [IR] CallBase::getBundleOpInfoForOperand - ensure Current i [...]
      adds  ed936aad781 [InterleavedAccess] Return correct 'modified' status.
      adds  e2d3d501ef8 [RISCV][NFC] Add additional cmov tests
       new  c367258b5cc [SimplifyCFG] Enabled hoisting late in LTO pipeline.
       new  c55b609b777 [Hexagon] Fix bad SDNodeXForm
       new  76bfbb74d38 [libomptarget][amdgpu] Call into deviceRTL instead of ockl
       new  f7463ca3cc5 [ProfileData] GCOVFile::readGCNO - silence undefined pointe [...]
       new  fe5d51a4897 [OpenMP] Add using bit flags to select Libomptarget Information
The 5 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 .../cppcoreguidelines-macro-usage-custom.cpp       |   7 +-
 ...eadability-identifier-naming-ignored-regexp.cpp |  13 +-
 clang/lib/AST/DeclCXX.cpp                          |   6 +-
 clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.cpp        |   7 +-
 clang/lib/Sema/SemaInit.cpp                        |  67 +--
 clang/lib/Sema/SemaStmt.cpp                        |  36 +-
 .../CXX/class/class.init/class.copy.elision/p3.cpp |  50 --
 clang/test/OpenMP/amdgcn_target_codegen.cpp        |  10 +-
 .../sanitizer_common/sanitizer_linux_libcdep.cpp   |   4 +-
 flang/include/flang/Parser/parse-tree.h            |   2 +-
 flang/lib/Parser/openmp-parsers.cpp                |   5 +-
 flang/lib/Parser/unparse.cpp                       |   2 +-
 flang/lib/Semantics/check-omp-structure.cpp        |   1 +
 flang/lib/Semantics/check-omp-structure.h          |   1 +
 flang/test/Semantics/omp-clause-validity01.f90     |   6 +-
 llvm/docs/ReleaseNotes.rst                         |   6 +
 llvm/include/llvm/Analysis/TargetTransformInfo.h   |   8 +
 .../llvm/Analysis/TargetTransformInfoImpl.h        |   2 +
 llvm/include/llvm/CodeGen/BasicTTIImpl.h           |   6 +-
 llvm/include/llvm/Frontend/OpenMP/OMP.td           |   1 +
 llvm/include/llvm/Support/KnownBits.h              |  31 ++
 llvm/lib/Analysis/AssumptionCache.cpp              |   4 +-
 llvm/lib/Analysis/InstructionSimplify.cpp          |  44 +-
 llvm/lib/Analysis/TargetTransformInfo.cpp          |   4 +
 llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp         |  11 +-
 llvm/lib/CodeGen/CodeGenPrepare.cpp                |   4 +-
 llvm/lib/CodeGen/InterleavedAccessPass.cpp         |  25 +-
 llvm/lib/IR/Instructions.cpp                       |   2 +-
 llvm/lib/Passes/PassBuilder.cpp                    |   5 +-
 llvm/lib/ProfileData/GCOV.cpp                      |   2 +-
 llvm/lib/Support/KnownBits.cpp                     |  69 +++
 llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp      |   3 +-
 llvm/lib/Target/AArch64/AArch64InstrInfo.td        |  21 +
 llvm/lib/Target/AArch64/AArch64SchedA57.td         |  61 ++-
 llvm/lib/Target/AArch64/AArch64SchedA57WriteRes.td |  19 +
 .../Target/AArch64/AArch64TargetTransformInfo.cpp  |  20 +
 .../Target/AArch64/AArch64TargetTransformInfo.h    |  11 +
 .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp   |   2 +-
 .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp       |   3 +-
 llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp    |   2 +-
 llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp         |   3 +-
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |   4 +-
 llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp      |   3 +-
 llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp      |   3 +-
 llvm/lib/Target/ARM/ARMISelLowering.cpp            |  56 ++-
 llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp     |   3 +-
 llvm/lib/Target/BPF/BPFAdjustOpt.cpp               |   2 +-
 llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp       |   4 +-
 llvm/lib/Target/Hexagon/HexagonPatterns.td         |   2 +-
 llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp   |   2 +-
 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp           |   8 +
 llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp |  12 +-
 llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp | 158 +++++-
 .../Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp |  30 +-
 .../Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp      |  52 +-
 llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp |  73 +--
 llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h   |   1 +
 llvm/lib/Target/Sparc/SparcAsmPrinter.cpp          |   2 +-
 llvm/lib/Target/Sparc/SparcISelLowering.cpp        |   6 +-
 llvm/lib/Target/Sparc/SparcInstr64Bit.td           |   6 +-
 llvm/lib/Target/Sparc/SparcInstrFormats.td         |   4 +-
 llvm/lib/Target/Sparc/SparcInstrInfo.td            |  25 +-
 llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp |   2 +-
 llvm/lib/Target/VE/VE.td                           |   2 +-
 llvm/lib/Target/VE/VEISelLowering.cpp              |  15 +-
 llvm/lib/Target/VE/VESubtarget.cpp                 |   2 +-
 .../WebAssembly/WebAssemblyLateEHPrepare.cpp       |   6 +-
 .../WebAssemblyLowerEmscriptenEHSjLj.cpp           |   2 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   3 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp               |   2 +-
 llvm/lib/Target/X86/X86InterleavedAccess.cpp       |  19 +-
 llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp    |   6 +-
 llvm/lib/Transforms/IPO/ArgumentPromotion.cpp      |  18 +-
 llvm/lib/Transforms/IPO/IROutliner.cpp             |   8 +-
 llvm/lib/Transforms/IPO/PassManagerBuilder.cpp     |   6 +-
 llvm/lib/Transforms/Scalar/GVN.cpp                 |   7 +-
 llvm/lib/Transforms/Scalar/GVNSink.cpp             |   4 +-
 llvm/lib/Transforms/Utils/SimplifyCFG.cpp          |  35 +-
 .../AArch64/sve-getIntrinsicInstrCost-gather.ll    |  37 ++
 .../AArch64/sve-getIntrinsicInstrCost-scatter.ll   |  40 ++
 .../AArch64/inline-asm-constraints-bad-sve.ll      |   9 +
 llvm/test/CodeGen/AArch64/neon-vcmla.ll            |  95 ++++
 .../CodeGen/Hexagon/isel-splat-vector-neg-i8.ll    |  16 +
 llvm/test/CodeGen/PowerPC/pr47830.ll               |   5 +-
 llvm/test/CodeGen/RISCV/rv32Zbt.ll                 | 560 +++++++++++++++++----
 llvm/test/CodeGen/RISCV/rv64Zbt.ll                 | 260 +++++++++-
 llvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll      | 122 +----
 llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll  | 200 +-------
 llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll      | 298 +----------
 llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll  | 534 ++------------------
 llvm/test/CodeGen/VE/Scalar/cpu.ll                 |   5 +
 llvm/test/MC/Sparc/sparc-asm-errors.s              |   6 +
 llvm/test/MC/Sparc/sparc-ctrl-instructions.s       |   7 +
 llvm/test/MC/Sparc/sparc-relocations.s             |   4 +
 .../ArgumentPromotion/dead-gep-no-promotion.ll     |  30 ++
 llvm/test/Transforms/IROutliner/opt-remarks.ll     | 108 +++-
 llvm/test/Transforms/IROutliner/outlining-calls.ll |   2 +-
 .../outlining-compatible-and-attribute-transfer.ll |   2 +-
 .../outlining-compatible-or-attribute-transfer.ll  |   2 +-
 .../Transforms/IROutliner/outlining-cost-model.ll  |   8 +
 .../IROutliner/outlining-different-constants.ll    |   2 +-
 .../IROutliner/outlining-different-structure.ll    |   2 +-
 .../IROutliner/outlining-isomorphic-predicates.ll  |   2 +-
 .../Transforms/InstCombine/add-shl-sdiv-to-srem.ll |   2 +-
 llvm/test/Transforms/InstCombine/div.ll            |  48 +-
 .../InstCombine/extractelement-inseltpoison.ll     |   4 +-
 llvm/test/Transforms/InstCombine/extractelement.ll |   4 +-
 .../Transforms/InstCombine/icmp-div-constant.ll    |  11 +-
 .../InstCombine/inselt-binop-inseltpoison.ll       |   8 +-
 llvm/test/Transforms/InstCombine/inselt-binop.ll   |   8 +-
 llvm/test/Transforms/InstCombine/rem.ll            |   2 +-
 .../sdiv-exact-by-negative-power-of-two.ll         |   2 +-
 .../InstCombine/sdiv-exact-by-power-of-two.ll      |   2 +-
 llvm/test/Transforms/InstCombine/shift.ll          |   2 +-
 llvm/test/Transforms/InstCombine/vector-udiv.ll    |   2 +-
 llvm/test/Transforms/InstCombine/vector-urem.ll    |   4 +-
 llvm/test/Transforms/InstCombine/with_overflow.ll  |   2 +-
 .../InstSimplify/2011-09-05-InsertExtractValue.ll  |  40 +-
 llvm/test/Transforms/InstSimplify/call.ll          |  32 +-
 llvm/test/Transforms/InstSimplify/div.ll           |  13 +-
 .../Transforms/InstSimplify/extract-element.ll     |  10 +-
 llvm/test/Transforms/InstSimplify/fp-nan.ll        |  20 +-
 .../Transforms/InstSimplify/fp-undef-poison.ll     |  24 +-
 llvm/test/Transforms/InstSimplify/rem.ll           |   9 +-
 llvm/test/Transforms/InstSimplify/undef.ll         |  91 ++--
 .../Transforms/InstSimplify/vscale-inseltpoison.ll |   2 +-
 llvm/test/Transforms/InstSimplify/vscale.ll        |   2 +-
 .../X86/interleave-load-extract-shuffle-changes.ll |  58 +++
 .../X86/interleavedLoad-inseltpoison.ll            |  30 +-
 .../InterleavedAccess/X86/interleavedLoad.ll       |  30 +-
 .../X86/interleavedStore-inseltpoison.ll           |  12 +-
 .../InterleavedAccess/X86/interleavedStore.ll      |  12 +-
 .../Transforms/LoopUnswitch/partial-unswitch.ll    | 461 +++++++++++++++++
 .../X86/alternate-int-inseltpoison.ll              |   2 +-
 ...inatorOnSelect-domtree-preservation-edgecase.ll |  58 +++
 .../tools/llvm-mca/AArch64/Cortex/forwarding-A57.s | 501 ++++++++++++++++++
 llvm/unittests/Support/KnownBitsTest.cpp           |  87 ++++
 llvm/utils/benchmark/include/benchmark/benchmark.h |   2 +-
 .../deviceRTLs/amdgcn/src/amdgcn_interface.h       |   2 +
 .../deviceRTLs/amdgcn/src/target_impl.hip          |   6 +-
 openmp/libomptarget/include/Debug.h                |  44 +-
 openmp/libomptarget/include/SourceInfo.h           |   9 +-
 openmp/libomptarget/plugins/cuda/src/rtl.cpp       |  28 +-
 openmp/libomptarget/src/device.cpp                 |  23 +-
 openmp/libomptarget/src/interface.cpp              |  42 +-
 openmp/libomptarget/src/private.h                  |  63 ++-
 openmp/libomptarget/test/offloading/info.c         |  35 +-
 openmp/runtime/src/include/omp.h.var               |  18 +
 openmp/runtime/src/include/omp_lib.f90.var         |  97 ++++
 openmp/runtime/src/include/omp_lib.h.var           | 107 ++++
 150 files changed, 3703 insertions(+), 1903 deletions(-)
 delete mode 100644 clang/test/CXX/class/class.init/class.copy.elision/p3.cpp
 create mode 100644 llvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost- [...]
 create mode 100644 llvm/test/Analysis/CostModel/AArch64/sve-getIntrinsicInstrCost- [...]
 create mode 100644 llvm/test/CodeGen/Hexagon/isel-splat-vector-neg-i8.ll
 create mode 100644 llvm/test/CodeGen/VE/Scalar/cpu.ll
 create mode 100644 llvm/test/Transforms/ArgumentPromotion/dead-gep-no-promotion.ll
 create mode 100644 llvm/test/Transforms/InterleavedAccess/X86/interleave-load-extr [...]
 create mode 100644 llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
 create mode 100644 llvm/test/Transforms/SimplifyCFG/SimplifyTerminatorOnSelect-dom [...]
 create mode 100644 llvm/test/tools/llvm-mca/AArch64/Cortex/forwarding-A57.s
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (2139958b534 -> fe5d51a4897)