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from 7c330fabaed [PowerPC] Try to simplify a Swap if it feeds a Splat new edab7579664 MIR: Print the register class or bank in vreg defs
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Summary of changes: lib/CodeGen/MIRPrinter.cpp | 46 +- .../AArch64/GlobalISel/arm64-callingconv-ios.ll | 16 +- .../AArch64/GlobalISel/arm64-callingconv.ll | 70 +- .../GlobalISel/arm64-irtranslator-stackprotect.ll | 4 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 794 ++++++++++----------- .../AArch64/GlobalISel/arm64-regbankselect.mir | 272 +++---- .../AArch64/GlobalISel/call-translator-ios.ll | 60 +- test/CodeGen/AArch64/GlobalISel/call-translator.ll | 150 ++-- test/CodeGen/AArch64/GlobalISel/debug-insts.ll | 4 +- test/CodeGen/AArch64/GlobalISel/dynamic-alloca.ll | 46 +- .../AArch64/GlobalISel/irtranslator-bitcast.ll | 2 +- .../AArch64/GlobalISel/irtranslator-exceptions.ll | 42 +- test/CodeGen/AArch64/GlobalISel/legalize-add.mir | 42 +- test/CodeGen/AArch64/GlobalISel/legalize-and.mir | 16 +- test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir | 20 +- .../AArch64/GlobalISel/legalize-combines.mir | 34 +- .../AArch64/GlobalISel/legalize-constant.mir | 28 +- test/CodeGen/AArch64/GlobalISel/legalize-div.mir | 40 +- .../AArch64/GlobalISel/legalize-exceptions.ll | 16 +- test/CodeGen/AArch64/GlobalISel/legalize-ext.mir | 34 +- .../AArch64/GlobalISel/legalize-extracts.mir | 54 +- test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir | 8 +- test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir | 12 +- test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir | 68 +- test/CodeGen/AArch64/GlobalISel/legalize-gep.mir | 14 +- .../GlobalISel/legalize-ignore-non-generic.mir | 2 +- .../AArch64/GlobalISel/legalize-inserts.mir | 36 +- test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir | 98 +-- .../AArch64/GlobalISel/legalize-load-store.mir | 40 +- test/CodeGen/AArch64/GlobalISel/legalize-mul.mir | 28 +- .../GlobalISel/legalize-nonpowerof2eltsvec.mir | 8 +- test/CodeGen/AArch64/GlobalISel/legalize-or.mir | 26 +- test/CodeGen/AArch64/GlobalISel/legalize-phi.mir | 105 ++- test/CodeGen/AArch64/GlobalISel/legalize-pow.mir | 4 +- test/CodeGen/AArch64/GlobalISel/legalize-rem.mir | 52 +- test/CodeGen/AArch64/GlobalISel/legalize-shift.mir | 44 +- .../CodeGen/AArch64/GlobalISel/legalize-simple.mir | 40 +- test/CodeGen/AArch64/GlobalISel/legalize-sub.mir | 14 +- test/CodeGen/AArch64/GlobalISel/legalize-undef.mir | 8 +- test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir | 30 +- test/CodeGen/AArch64/GlobalISel/legalize-xor.mir | 14 +- .../GlobalISel/localizer-in-O0-pipeline.mir | 26 +- test/CodeGen/AArch64/GlobalISel/localizer.mir | 196 ++--- test/CodeGen/AArch64/GlobalISel/no-regclass.mir | 2 +- .../AArch64/GlobalISel/regbankselect-default.mir | 315 +++----- test/CodeGen/AArch64/GlobalISel/select-binop.mir | 327 +++------ test/CodeGen/AArch64/GlobalISel/select-bitcast.mir | 70 +- test/CodeGen/AArch64/GlobalISel/select-br.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-bswap.mir | 14 +- test/CodeGen/AArch64/GlobalISel/select-cbz.mir | 8 +- .../CodeGen/AArch64/GlobalISel/select-constant.mir | 16 +- .../AArch64/GlobalISel/select-dbg-value.mir | 4 +- test/CodeGen/AArch64/GlobalISel/select-fma.mir | 14 +- .../CodeGen/AArch64/GlobalISel/select-fp-casts.mir | 154 ++-- test/CodeGen/AArch64/GlobalISel/select-imm.mir | 8 +- .../AArch64/GlobalISel/select-implicit-def.mir | 7 +- .../AArch64/GlobalISel/select-insert-extract.mir | 16 +- test/CodeGen/AArch64/GlobalISel/select-int-ext.mir | 106 +-- .../AArch64/GlobalISel/select-int-ptr-casts.mir | 51 +- .../GlobalISel/select-intrinsic-aarch64-sdiv.mir | 10 +- test/CodeGen/AArch64/GlobalISel/select-load.mir | 152 +--- test/CodeGen/AArch64/GlobalISel/select-muladd.mir | 16 +- .../AArch64/GlobalISel/select-neon-vcvtfxu2fp.mir | 8 +- test/CodeGen/AArch64/GlobalISel/select-phi.mir | 28 +- test/CodeGen/AArch64/GlobalISel/select-pr32733.mir | 6 +- test/CodeGen/AArch64/GlobalISel/select-store.mir | 135 +--- test/CodeGen/AArch64/GlobalISel/select-trunc.mir | 27 +- test/CodeGen/AArch64/GlobalISel/select-xor.mir | 44 +- test/CodeGen/AArch64/GlobalISel/select.mir | 42 +- test/CodeGen/AArch64/GlobalISel/translate-gep.ll | 66 +- .../AArch64/GlobalISel/varargs-ios-translator.ll | 4 +- test/CodeGen/AArch64/GlobalISel/vastart.ll | 2 +- test/CodeGen/AArch64/arm64-regress-opt-cmp.mir | 2 +- test/CodeGen/AArch64/regcoal-physreg.mir | 12 +- test/CodeGen/AArch64/spill-undef.mir | 18 +- .../AMDGPU/GlobalISel/amdgpu-irtranslator.ll | 2 +- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 74 +- .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 4 +- .../AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll | 22 +- test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 6 +- test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 6 +- .../AMDGPU/GlobalISel/legalize-constant.mir | 9 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 6 +- test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 6 +- test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 6 +- test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 12 +- test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 6 +- test/CodeGen/AMDGPU/clamp-omod-special-case.mir | 24 +- test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 78 +- test/CodeGen/AMDGPU/detect-dead-lanes.mir | 62 +- test/CodeGen/AMDGPU/endpgm-dce.mir | 6 +- test/CodeGen/AMDGPU/fold-cndmask.mir | 12 +- test/CodeGen/AMDGPU/fold-immediate-output-mods.mir | 16 +- test/CodeGen/AMDGPU/fold-operands-order.mir | 6 +- .../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 48 +- test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir | 14 +- test/CodeGen/AMDGPU/regcoal-subrange-join.mir | 8 +- test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 10 +- .../rename-independent-subregs-mac-operands.mir | 18 +- test/CodeGen/AMDGPU/sdwa-gfx9.mir | 30 +- test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 118 +-- test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir | 12 +- test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 22 +- .../si-instr-info-correct-implicit-operands.ll | 2 +- test/CodeGen/AMDGPU/spill-empty-live-interval.mir | 12 +- test/CodeGen/AMDGPU/twoaddr-mad.mir | 10 +- test/CodeGen/AMDGPU/vop-shrink-frame-index.mir | 28 +- test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir | 8 +- .../ARM/GlobalISel/arm-instruction-select-cmp.mir | 404 +++++------ .../GlobalISel/arm-instruction-select-combos.mir | 34 +- .../ARM/GlobalISel/arm-instruction-select.mir | 170 ++--- test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll | 718 +++++++++---------- .../CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir | 288 ++++---- test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir | 746 +++++++++---------- test/CodeGen/ARM/GlobalISel/arm-legalizer.mir | 146 ++-- .../ARM/GlobalISel/arm-select-globals-pic.mir | 32 +- .../GlobalISel/arm-select-globals-ropi-rwpi.mir | 44 +- .../ARM/GlobalISel/arm-select-globals-static.mir | 20 +- test/CodeGen/ARM/imm-peephole-arm.mir | 19 +- test/CodeGen/ARM/imm-peephole-thumb.mir | 19 +- test/CodeGen/Hexagon/cext-opt-basic.mir | 15 +- test/CodeGen/Hexagon/early-if-debug.mir | 10 +- test/CodeGen/Hexagon/expand-condsets-def-undef.mir | 3 +- test/CodeGen/Hexagon/expand-condsets-imm.mir | 3 +- test/CodeGen/Hexagon/expand-condsets-impuse.mir | 2 +- test/CodeGen/Hexagon/expand-condsets-rm-reg.mir | 4 +- test/CodeGen/Hexagon/hwloop-redef-imm.mir | 2 +- test/CodeGen/Hexagon/regalloc-liveout-undef.mir | 3 +- .../CodeGen/Hexagon/unreachable-mbb-phi-subreg.mir | 3 +- test/CodeGen/Lanai/peephole-compare.mir | 168 ++--- test/CodeGen/MIR/AArch64/atomic-memoperands.mir | 8 +- test/CodeGen/MIR/AArch64/spill-fold.mir | 4 +- test/CodeGen/MIR/AArch64/target-memoperands.mir | 6 +- test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir | 52 +- test/CodeGen/MIR/AMDGPU/fold-multiple.mir | 4 +- test/CodeGen/MIR/AMDGPU/intrinsics.mir | 2 +- test/CodeGen/MIR/AMDGPU/target-flags.mir | 4 +- .../NVPTX/floating-point-immediate-operands.mir | 8 +- test/CodeGen/MIR/X86/generic-instr-type.mir | 8 +- test/CodeGen/MIR/X86/metadata-operands.mir | 2 +- test/CodeGen/MIR/X86/roundtrip.mir | 4 +- test/CodeGen/MIR/X86/stack-object-operands.mir | 4 +- .../CodeGen/MIR/X86/subregister-index-operands.mir | 4 +- test/CodeGen/MIR/X86/subregister-operands.mir | 6 +- test/CodeGen/MIR/X86/unreachable-mbb-undef-phi.mir | 4 +- test/CodeGen/MIR/X86/virtual-registers.mir | 12 +- test/CodeGen/PowerPC/debuginfo-split-int.ll | 4 +- test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir | 16 +- test/CodeGen/PowerPC/tls_get_addr_fence1.mir | 18 +- .../X86/GlobalISel/irtranslator-callingconv.ll | 598 ++++++++-------- test/CodeGen/X86/GlobalISel/legalize-GV.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-add-v128.mir | 24 +- test/CodeGen/X86/GlobalISel/legalize-add-v256.mir | 80 +-- test/CodeGen/X86/GlobalISel/legalize-add-v512.mir | 192 ++--- test/CodeGen/X86/GlobalISel/legalize-add.mir | 30 +- .../CodeGen/X86/GlobalISel/legalize-and-scalar.mir | 26 +- test/CodeGen/X86/GlobalISel/legalize-brcond.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-cmp.mir | 40 +- test/CodeGen/X86/GlobalISel/legalize-constant.mir | 30 +- .../CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir | 54 +- test/CodeGen/X86/GlobalISel/legalize-ext.mir | 78 +- .../X86/GlobalISel/legalize-fadd-scalar.mir | 12 +- .../X86/GlobalISel/legalize-fdiv-scalar.mir | 12 +- .../X86/GlobalISel/legalize-fmul-scalar.mir | 12 +- .../X86/GlobalISel/legalize-fpext-scalar.mir | 4 +- .../X86/GlobalISel/legalize-fsub-scalar.mir | 12 +- test/CodeGen/X86/GlobalISel/legalize-gep.mir | 28 +- .../X86/GlobalISel/legalize-insert-vec256.mir | 6 +- .../X86/GlobalISel/legalize-insert-vec512.mir | 12 +- .../X86/GlobalISel/legalize-memop-scalar.mir | 53 +- .../CodeGen/X86/GlobalISel/legalize-mul-scalar.mir | 30 +- test/CodeGen/X86/GlobalISel/legalize-mul-v128.mir | 18 +- test/CodeGen/X86/GlobalISel/legalize-mul-v256.mir | 18 +- test/CodeGen/X86/GlobalISel/legalize-mul-v512.mir | 18 +- test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir | 26 +- test/CodeGen/X86/GlobalISel/legalize-phi.mir | 92 +-- test/CodeGen/X86/GlobalISel/legalize-sub-v128.mir | 24 +- test/CodeGen/X86/GlobalISel/legalize-sub-v256.mir | 24 +- test/CodeGen/X86/GlobalISel/legalize-sub-v512.mir | 24 +- test/CodeGen/X86/GlobalISel/legalize-sub.mir | 16 +- test/CodeGen/X86/GlobalISel/legalize-trunc.mir | 7 +- test/CodeGen/X86/GlobalISel/legalize-undef.mir | 24 +- .../CodeGen/X86/GlobalISel/legalize-xor-scalar.mir | 26 +- .../X86/GlobalISel/regbankselect-X86_64.mir | 51 +- test/CodeGen/X86/GlobalISel/select-GV.mir | 32 +- test/CodeGen/X86/GlobalISel/select-add-v128.mir | 32 +- test/CodeGen/X86/GlobalISel/select-add-v256.mir | 24 +- test/CodeGen/X86/GlobalISel/select-add-v512.mir | 40 +- test/CodeGen/X86/GlobalISel/select-add-x32.mir | 27 +- test/CodeGen/X86/GlobalISel/select-add.mir | 86 +-- test/CodeGen/X86/GlobalISel/select-and-scalar.mir | 40 +- test/CodeGen/X86/GlobalISel/select-blsi.mir | 22 +- test/CodeGen/X86/GlobalISel/select-blsr.mir | 22 +- test/CodeGen/X86/GlobalISel/select-brcond.mir | 22 +- test/CodeGen/X86/GlobalISel/select-cmp.mir | 208 ++---- test/CodeGen/X86/GlobalISel/select-constant.mir | 35 +- test/CodeGen/X86/GlobalISel/select-copy.mir | 26 +- test/CodeGen/X86/GlobalISel/select-ext-x86-64.mir | 67 +- test/CodeGen/X86/GlobalISel/select-ext.mir | 73 +- .../X86/GlobalISel/select-extract-vec256.mir | 16 +- .../X86/GlobalISel/select-extract-vec512.mir | 17 +- test/CodeGen/X86/GlobalISel/select-fadd-scalar.mir | 36 +- test/CodeGen/X86/GlobalISel/select-fconstant.mir | 25 +- test/CodeGen/X86/GlobalISel/select-fdiv-scalar.mir | 36 +- test/CodeGen/X86/GlobalISel/select-fmul-scalar.mir | 36 +- .../CodeGen/X86/GlobalISel/select-fpext-scalar.mir | 7 +- test/CodeGen/X86/GlobalISel/select-fsub-scalar.mir | 36 +- test/CodeGen/X86/GlobalISel/select-gep.mir | 10 +- test/CodeGen/X86/GlobalISel/select-inc.mir | 6 +- .../X86/GlobalISel/select-insert-vec256.mir | 86 +-- .../X86/GlobalISel/select-insert-vec512.mir | 76 +- .../select-intrinsic-x86-flags-read-u32.mir | 7 +- .../X86/GlobalISel/select-leaf-constant.mir | 16 +- .../X86/GlobalISel/select-memop-scalar-x32.mir | 68 +- .../CodeGen/X86/GlobalISel/select-memop-scalar.mir | 120 ++-- test/CodeGen/X86/GlobalISel/select-memop-v128.mir | 42 +- test/CodeGen/X86/GlobalISel/select-memop-v256.mir | 55 +- test/CodeGen/X86/GlobalISel/select-memop-v512.mir | 28 +- .../CodeGen/X86/GlobalISel/select-merge-vec256.mir | 26 +- .../CodeGen/X86/GlobalISel/select-merge-vec512.mir | 32 +- test/CodeGen/X86/GlobalISel/select-mul-scalar.mir | 30 +- test/CodeGen/X86/GlobalISel/select-mul-vec.mir | 150 ++-- test/CodeGen/X86/GlobalISel/select-or-scalar.mir | 40 +- test/CodeGen/X86/GlobalISel/select-phi.mir | 12 +- test/CodeGen/X86/GlobalISel/select-sub-v128.mir | 88 +-- test/CodeGen/X86/GlobalISel/select-sub-v256.mir | 80 +-- test/CodeGen/X86/GlobalISel/select-sub-v512.mir | 40 +- test/CodeGen/X86/GlobalISel/select-sub.mir | 63 +- test/CodeGen/X86/GlobalISel/select-trunc.mir | 42 +- test/CodeGen/X86/GlobalISel/select-undef.mir | 14 +- .../X86/GlobalISel/select-unmerge-vec256.mir | 20 +- .../X86/GlobalISel/select-unmerge-vec512.mir | 26 +- test/CodeGen/X86/GlobalISel/select-xor-scalar.mir | 40 +- test/CodeGen/X86/debugloc-no-line-0.ll | 2 - test/CodeGen/X86/domain-reassignment.mir | 187 ++--- test/CodeGen/X86/implicit-use-spill.mir | 2 +- test/CodeGen/X86/lea-opt-with-debug.mir | 8 +- test/CodeGen/X86/movtopush.mir | 8 +- test/CodeGen/X86/peephole-recurrence.mir | 96 +-- test/CodeGen/X86/peephole.mir | 10 +- test/CodeGen/X86/sqrt-fastmath-mir.ll | 54 +- test/CodeGen/X86/tail-dup-debugloc.ll | 4 +- test/CodeGen/X86/update-terminator-debugloc.ll | 12 +- test/CodeGen/X86/xor-combine-debugloc.ll | 10 +- 246 files changed, 5414 insertions(+), 6949 deletions(-)