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from 1a1b9267cd9 [AMDGPU] Remove unused variable AllSGPRSpilledToVGPRs. NFC new a2b05bc24df CodeGen: Introduce a class for registers
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Summary of changes: include/llvm/CodeGen/GlobalISel/CallLowering.h | 14 +-- include/llvm/CodeGen/GlobalISel/IRTranslator.h | 6 +- .../GlobalISel/LegalizationArtifactCombiner.h | 30 ++--- include/llvm/CodeGen/GlobalISel/LegalizerHelper.h | 22 ++-- include/llvm/CodeGen/GlobalISel/MIPatternMatch.h | 2 +- include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 22 ++-- include/llvm/CodeGen/MachineOperand.h | 5 +- include/llvm/CodeGen/MachineRegisterInfo.h | 6 +- include/llvm/CodeGen/Register.h | 60 ++++++++++ include/llvm/CodeGen/SwiftErrorValueTracking.h | 9 +- include/llvm/CodeGen/TargetRegisterInfo.h | 2 +- include/llvm/CodeGen/VirtRegMap.h | 4 +- .../AsmPrinter/DbgEntityHistoryCalculator.cpp | 4 +- lib/CodeGen/GlobalISel/CallLowering.cpp | 6 +- lib/CodeGen/GlobalISel/IRTranslator.cpp | 56 +++++----- lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 122 ++++++++++----------- lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 26 ++--- lib/CodeGen/LiveDebugValues.cpp | 4 +- lib/CodeGen/MachineOperand.cpp | 2 +- lib/CodeGen/MachineRegisterInfo.cpp | 6 +- lib/CodeGen/RegAllocGreedy.cpp | 4 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +- lib/CodeGen/SwiftErrorValueTracking.cpp | 6 +- lib/CodeGen/TargetInstrInfo.cpp | 6 +- lib/Target/AArch64/AArch64CallLowering.cpp | 10 +- lib/Target/AArch64/AArch64CallLowering.h | 8 +- lib/Target/AArch64/AArch64FalkorHWPFFix.cpp | 6 +- lib/Target/AArch64/AArch64InstructionSelector.cpp | 6 +- .../AArch64/AArch64RedundantCopyElimination.cpp | 4 +- lib/Target/AArch64/AArch64RegisterInfo.cpp | 2 +- lib/Target/AArch64/AArch64RegisterInfo.h | 2 +- lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 10 +- lib/Target/AMDGPU/AMDGPUCallLowering.h | 6 +- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 +- lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 28 ++--- lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 3 +- lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 2 +- lib/Target/AMDGPU/R600Packetizer.cpp | 4 +- lib/Target/AMDGPU/R600RegisterInfo.cpp | 2 +- lib/Target/AMDGPU/R600RegisterInfo.h | 2 +- lib/Target/AMDGPU/SILowerControlFlow.cpp | 10 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 +- lib/Target/AMDGPU/SIRegisterInfo.h | 2 +- lib/Target/ARC/ARCOptAddrMode.cpp | 2 +- lib/Target/ARC/ARCRegisterInfo.cpp | 4 +- lib/Target/ARC/ARCRegisterInfo.h | 2 +- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 4 +- lib/Target/ARM/ARMBaseRegisterInfo.h | 2 +- lib/Target/ARM/ARMCallLowering.cpp | 24 ++-- lib/Target/ARM/ARMCallLowering.h | 6 +- lib/Target/BPF/BPFRegisterInfo.cpp | 2 +- lib/Target/BPF/BPFRegisterInfo.h | 2 +- lib/Target/Hexagon/HexagonCopyToCombine.cpp | 4 +- lib/Target/Hexagon/HexagonGenMux.cpp | 4 +- lib/Target/Hexagon/HexagonGenPredicate.cpp | 1 + lib/Target/Hexagon/HexagonRegisterInfo.cpp | 2 +- lib/Target/Hexagon/HexagonRegisterInfo.h | 2 +- lib/Target/Lanai/LanaiRegisterInfo.cpp | 4 +- lib/Target/Lanai/LanaiRegisterInfo.h | 4 +- lib/Target/MSP430/MSP430RegisterInfo.cpp | 2 +- lib/Target/MSP430/MSP430RegisterInfo.h | 2 +- lib/Target/Mips/MipsCallLowering.cpp | 66 +++++------ lib/Target/Mips/MipsCallLowering.h | 18 +-- lib/Target/Mips/MipsRegisterInfo.cpp | 2 +- lib/Target/Mips/MipsRegisterInfo.h | 2 +- lib/Target/Mips/MipsSEISelLowering.cpp | 16 +-- lib/Target/NVPTX/NVPTXRegisterInfo.cpp | 2 +- lib/Target/NVPTX/NVPTXRegisterInfo.h | 2 +- lib/Target/PowerPC/PPCISelLowering.cpp | 104 +++++++++--------- lib/Target/PowerPC/PPCInstrInfo.cpp | 16 +-- lib/Target/PowerPC/PPCRegisterInfo.cpp | 4 +- lib/Target/PowerPC/PPCRegisterInfo.h | 4 +- lib/Target/RISCV/RISCVRegisterInfo.cpp | 2 +- lib/Target/RISCV/RISCVRegisterInfo.h | 2 +- lib/Target/Sparc/SparcRegisterInfo.cpp | 2 +- lib/Target/Sparc/SparcRegisterInfo.h | 2 +- lib/Target/SystemZ/SystemZElimCompare.cpp | 6 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 54 ++++----- lib/Target/SystemZ/SystemZInstrInfo.cpp | 8 +- lib/Target/SystemZ/SystemZRegisterInfo.cpp | 6 +- lib/Target/SystemZ/SystemZRegisterInfo.h | 2 +- lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp | 4 +- lib/Target/WebAssembly/WebAssemblyRegisterInfo.h | 2 +- lib/Target/X86/X86CallLowering.cpp | 16 +-- lib/Target/X86/X86CallLowering.h | 6 +- lib/Target/X86/X86FrameLowering.cpp | 20 ++-- lib/Target/X86/X86InstrInfo.cpp | 6 +- lib/Target/X86/X86RegisterInfo.cpp | 2 +- lib/Target/X86/X86RegisterInfo.h | 2 +- lib/Target/XCore/XCoreRegisterInfo.cpp | 4 +- lib/Target/XCore/XCoreRegisterInfo.h | 2 +- unittests/CodeGen/GlobalISel/GISelMITest.h | 4 +- .../CodeGen/GlobalISel/MachineIRBuilderTest.cpp | 18 +-- unittests/CodeGen/GlobalISel/PatternMatchTest.cpp | 10 +- 95 files changed, 553 insertions(+), 487 deletions(-) create mode 100644 include/llvm/CodeGen/Register.h