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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz in repository toolchain/ci/glibc.
from 14dbbf46a0 x86-64: Remove Prefer_AVX2_STRCMP adds d6dea8c847 arm: Use internal symbol for _dl_argv on _dl_start_user adds 613cb5c7b1 arm: Use have-mtls-dialect-gnu2 to check for ARM TLS descrip [...] adds dba44dbe54 benchtests: Make hypot input random adds b8a6ee43bb benchtests: Add hypotf adds cca75bd8b5 i386: Explain why __HAVE_64B_ATOMICS has to be 0 adds f64f4ce069 elf: Assume disjointed .rela.dyn and .rela.plt for loader adds db432f033d Use Linux 5.15 in build-many-glibcs.py adds fdcd177fd3 regex: Unnest nested functions in regcomp.c adds 6720d36b66 x86-64: Replace movzx with movzbl adds 09f214528c riscv: Build with -mno-relax if linker does not support R_RI [...] adds d3bf2f5927 elf: Do not run DSO sorting if tunables is not enabled adds 9fea0f1a2a [powerpc] Tighten contraints for asm constant parameters
No new revisions were added by this update.
Summary of changes: benchtests/Makefile | 1 + benchtests/hypot-inputs | 1015 ++++++++++++++++++++++++++++++- benchtests/hypotf-inputs | 1007 ++++++++++++++++++++++++++++++ elf/Makefile | 2 + elf/dynamic-link.h | 32 +- posix/regcomp.c | 464 +++++++------- scripts/build-many-glibcs.py | 2 +- sysdeps/arm/Makefile | 7 +- sysdeps/arm/dl-machine.h | 2 +- sysdeps/powerpc/fpu/fenv_libc.h | 8 +- sysdeps/powerpc/test-get_hwcap.c | 8 +- sysdeps/powerpc/tst-tlsifunc.c | 2 +- sysdeps/riscv/Makefile | 6 + sysdeps/riscv/configure | 30 + sysdeps/riscv/configure.ac | 16 + sysdeps/x86/atomic-machine.h | 4 + sysdeps/x86_64/multiarch/strcmp-sse42.S | 4 +- sysdeps/x86_64/strcmp.S | 4 +- 18 files changed, 2335 insertions(+), 279 deletions(-) create mode 100644 benchtests/hypotf-inputs