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from ec5c18ff129 [MI scheduler] Fix VADD and VSUB in cortex-a57 model new 6f46cf274f5 [X86][LWP] Add missing LWP itinerary class to lwpins instructions
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Summary of changes: lib/Target/X86/X86InstrInfo.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)