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from befd9c02eb7 a68: fix function type in a68_lower_revelation_ludes
new 1024d8d301f libphobos: Regenerate libdruntime/Makefile.am
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libphobos/libdruntime/Makefile.am | 44 +++++++------
libphobos/libdruntime/Makefile.in | 134 +++++++++++++++++++++++---------------
2 files changed, 105 insertions(+), 73 deletions(-)
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from 3ca909c2976 aarch64: Add support for Hisilicon's hip12 core (-mcpu=hip12)
new befd9c02eb7 a68: fix function type in a68_lower_revelation_ludes
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gcc/algol68/a68-low-clauses.cc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
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from cca779f6b4c RISC-V: Fix xtheadvector ratio attribute. [PR123870]
new 3ca909c2976 aarch64: Add support for Hisilicon's hip12 core (-mcpu=hip12)
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gcc/config/aarch64/aarch64-cores.def | 1 +
gcc/config/aarch64/aarch64-cost-tables.h | 107 +++++++++++++++
gcc/config/aarch64/aarch64-tune.md | 2 +-
gcc/config/aarch64/aarch64.cc | 1 +
gcc/config/aarch64/tuning_models/hip12.h | 227 +++++++++++++++++++++++++++++++
gcc/doc/invoke.texi | 2 +-
6 files changed, 338 insertions(+), 2 deletions(-)
create mode 100644 gcc/config/aarch64/tuning_models/hip12.h
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unknown user pushed a change to branch master
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from 9b876c724da Automatic date update in version.in
new fc47995f848 PowerPC: Support for Elliptic Curve Cryptography Instructio [...]
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gas/testsuite/gas/ppc/future.d | 22 +++++++++++
gas/testsuite/gas/ppc/future.s | 21 ++++++++++
opcodes/ppc-opc.c | 88 ++++++++++++++++++++++++++++++++++++++----
3 files changed, 124 insertions(+), 7 deletions(-)
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from 20b7be61787 contrib/check-params-in-docs.py: Make compatible with params.texi
new c3e3456007a RISC-V: Disable small memsets for xtheadvector [PR123910].
new 76053c32050 forwprop: Handle nop-conversion for maybe_ident. [PR123925]
new ecc37444062 RISC-V: Allow vector modes for xtheadvector. [PR123971]
new cca779f6b4c RISC-V: Fix xtheadvector ratio attribute. [PR123870]
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gcc/config/riscv/riscv-string.cc | 14 +++++-
gcc/config/riscv/riscv.cc | 2 -
gcc/config/riscv/vector.md | 4 +-
.../gcc.target/riscv/rvv/autovec/pr123910.c | 11 +++++
.../gcc.target/riscv/rvv/autovec/pr123925.c | 28 +++++++++++
.../riscv/rvv/xtheadvector/pr114194-rv32.c | 8 ++--
.../gcc.target/riscv/rvv/xtheadvector/pr123969.c | 19 ++++++++
.../gcc.target/riscv/rvv/xtheadvector/pr123971.c | 12 +++++
gcc/tree-ssa-forwprop.cc | 55 +++++++++++++---------
9 files changed, 120 insertions(+), 33 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr123910.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr123925.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr123969.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr123971.c
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from f40a87f0a48 Add -ffuse-ops-with-volatile-access: Adjust 'gcc.target/nvp [...]
new 5a3bf2217b6 a68: fix bit-shift standard operators [PR algol68/123959]
new afc4005aa62 a68: make SET, CLEAR and TEST bits operators zero-based
new 20b7be61787 contrib/check-params-in-docs.py: Make compatible with params.texi
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contrib/check-params-in-docs.py | 10 ++--
gcc/algol68/a68-low-bits.cc | 69 ++++++++++++++------------
gcc/algol68/a68-low-prelude.cc | 8 +--
gcc/algol68/a68.h | 2 +-
gcc/algol68/ga68.texi | 31 +++++++-----
gcc/testsuite/algol68/execute/bits-clear-1.a68 | 25 ++++++----
gcc/testsuite/algol68/execute/bits-set-1.a68 | 25 ++++++----
gcc/testsuite/algol68/execute/bits-shift-1.a68 | 9 ++++
gcc/testsuite/algol68/execute/bits-shift-2.a68 | 26 ++++++++++
gcc/testsuite/algol68/execute/bits-shift-3.a68 | 26 ++++++++++
gcc/testsuite/algol68/execute/bits-test-1.a68 | 6 +--
11 files changed, 158 insertions(+), 79 deletions(-)
create mode 100644 gcc/testsuite/algol68/execute/bits-shift-1.a68
create mode 100644 gcc/testsuite/algol68/execute/bits-shift-2.a68
create mode 100644 gcc/testsuite/algol68/execute/bits-shift-3.a68
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from 5c46b4d38a8 tree-optimization/121726 - TBAA bug with SRA of address-tak [...]
new f40a87f0a48 Add -ffuse-ops-with-volatile-access: Adjust 'gcc.target/nvp [...]
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gcc/testsuite/gcc.target/nvptx/alloca-5.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
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unknown user pushed a change to branch releases/gcc-15
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from d0f04bc0203 i386: Drop mask subst for define_insn_and_split of extend [ [...]
new aa01b849ab8 libstdc++: Use overload operator<=> when provided in relati [...]
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libstdc++-v3/include/bits/ranges_cmp.h | 7 +-
libstdc++-v3/include/bits/stl_function.h | 183 ++++++-----
libstdc++-v3/include/std/concepts | 16 +
libstdc++-v3/libsupc++/compare | 5 +-
.../comparisons_pointer_spaceship.cc | 336 +++++++++++++++++++++
5 files changed, 468 insertions(+), 79 deletions(-)
create mode 100644 libstdc++-v3/testsuite/20_util/function_objects/comparisons_poi [...]
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from bcdc17211a7 middle-end: use inner variable when determining deferred FM [...]
new 5c46b4d38a8 tree-optimization/121726 - TBAA bug with SRA of address-tak [...]
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gcc/testsuite/gcc.target/i386/pr121726.c | 117 +++++++++++++++++++++++++++++++
gcc/tree-sra.cc | 43 +++++++-----
2 files changed, 143 insertions(+), 17 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr121726.c
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from 3cc03c04c72 testsuite: aarch64: state pr122103_1.c requirements [PR123936]
new bcdc17211a7 middle-end: use inner variable when determining deferred FM [...]
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gcc/testsuite/gcc.target/aarch64/sve/pr123898.c | 17 +++++++++++++++++
gcc/tree-ssa-math-opts.cc | 25 +++++++++++++++++++++++--
2 files changed, 40 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr123898.c
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