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from 7f15a94e655 gdb: use kill() in gdbpy_interrupt for hosts with signal support
new fee7bd256f7 [gdb/testsuite] Fix overlapping CUs in gdb.dwarf2/dw2-entry [...]
new 0c2b3861935 [gdb/testsuite] Fix overlapping CUs in gdb.dwarf2/dw2-linka [...]
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Summary of changes:
gdb/testsuite/gdb.dwarf2/dw2-entry-points.c | 17 +++++++++++++++++
gdb/testsuite/gdb.dwarf2/dw2-entry-points.exp | 7 ++++---
gdb/testsuite/gdb.dwarf2/dw2-linkage-name-trust.exp | 2 +-
3 files changed, 22 insertions(+), 4 deletions(-)
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from 81e90cf63a1 readelf: Add --got-contents option
new 7f15a94e655 gdb: use kill() in gdbpy_interrupt for hosts with signal support
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gdb/extension.c | 79 +++++++++++++++++++++++++++++++++++++++--------------
gdb/python/python.c | 13 +++++++--
2 files changed, 68 insertions(+), 24 deletions(-)
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unknown user pushed a change to branch master
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from 881df7a0b1e x86: Allow by_pieces op when expanding memcpy/memset epilogue
new 79e0dbf1c44 RISC-V: Add patterns for vector-scalar IEEE floating-point min
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gcc/config/riscv/autovec-opt.md | 44 ++++++++++++++++++++--
gcc/config/riscv/vector.md | 22 +++++------
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c | 1 +
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c | 1 +
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c | 1 +
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-5-f16.c | 8 ++++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-5-f32.c | 8 ++++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-5-f64.c | 8 ++++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-6-f16.c | 6 +++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-6-f32.c | 6 +++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-6-f64.c | 6 +++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-7-f16.c | 8 ++++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-7-f32.c | 8 ++++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-7-f64.c | 8 ++++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-8-f16.c | 6 +++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-8-f32.c | 6 +++
.../gcc.target/riscv/rvv/autovec/vx_vf/vf-8-f64.c | 6 +++
17 files changed, 139 insertions(+), 14 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-5-f16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-5-f32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-5-f64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-6-f16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-6-f32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-6-f64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-7-f16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-7-f32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-7-f64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-8-f16.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-8-f32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-8-f64.c
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unknown user pushed a change to branch master
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from 207a506ee50 x86: Handle constant in any modes in setmem_epilogue_gen_val
new 881df7a0b1e x86: Allow by_pieces op when expanding memcpy/memset epilogue
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gcc/config/i386/i386-expand.cc | 4 ++++
gcc/config/i386/i386.cc | 21 +++++++++++++++++
gcc/config/i386/i386.h | 3 +++
gcc/testsuite/gcc.target/i386/memcpy-strategy-14.c | 10 +++++++++
gcc/testsuite/gcc.target/i386/memcpy-strategy-15.c | 10 +++++++++
gcc/testsuite/gcc.target/i386/memset-strategy-10.c | 24 ++++++++++++++++++++
gcc/testsuite/gcc.target/i386/memset-strategy-11.c | 9 ++++++++
gcc/testsuite/gcc.target/i386/memset-strategy-12.c | 8 +++++++
gcc/testsuite/gcc.target/i386/memset-strategy-13.c | 26 ++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/memset-strategy-14.c | 8 +++++++
gcc/testsuite/gcc.target/i386/memset-strategy-15.c | 9 ++++++++
11 files changed, 132 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/memcpy-strategy-14.c
create mode 100644 gcc/testsuite/gcc.target/i386/memcpy-strategy-15.c
create mode 100644 gcc/testsuite/gcc.target/i386/memset-strategy-10.c
create mode 100644 gcc/testsuite/gcc.target/i386/memset-strategy-11.c
create mode 100644 gcc/testsuite/gcc.target/i386/memset-strategy-12.c
create mode 100644 gcc/testsuite/gcc.target/i386/memset-strategy-13.c
create mode 100644 gcc/testsuite/gcc.target/i386/memset-strategy-14.c
create mode 100644 gcc/testsuite/gcc.target/i386/memset-strategy-15.c
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from 34262b98353 c++: -fimplicit-constexpr testcase tweak
new 62843b3453e x86-64: Improve source operand check for TLS_CALL
new 207a506ee50 x86: Handle constant in any modes in setmem_epilogue_gen_val
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Summary of changes:
gcc/config/i386/i386-expand.cc | 13 +-
gcc/config/i386/i386-features.cc | 201 +++++++++++++--------
gcc/testsuite/gcc.target/i386/memset-strategy-16.c | 9 +
gcc/testsuite/gcc.target/i386/pr121668-1b.c | 6 +
gcc/testsuite/gcc.target/i386/pr121694-1a.c | 19 ++
gcc/testsuite/gcc.target/i386/pr121694-1b.c | 6 +
6 files changed, 168 insertions(+), 86 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/memset-strategy-16.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr121668-1b.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr121694-1a.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr121694-1b.c
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from b2a6590c91b Automatic date update in version.in
new 69746a4f73b x86: add "udb" opcode (permanent official #UD in 64-bit mode)
new deefd61637c ld: drop bogus %F format modifiers
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bfd/elfxx-riscv.c | 4 +-
gas/testsuite/gas/i386/x86-64-opcode.d | 1 +
gas/testsuite/gas/i386/x86-64-opcode.s | 1 +
ld/ldlang.c | 4 +-
opcodes/i386-dis.c | 9 +-
opcodes/i386-mnem.h | 4045 ++++++++++++++++----------------
opcodes/i386-opc.tbl | 2 +
opcodes/i386-tbl.h | 343 +--
8 files changed, 2215 insertions(+), 2194 deletions(-)
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unknown user pushed a change to branch master
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from 5a7e3d44bab invoke.texi: AMD GCN - remove '(experimental)' from some gf [...]
new 34262b98353 c++: -fimplicit-constexpr testcase tweak
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gcc/testsuite/g++.dg/cpp26/decomp26.C | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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unknown user pushed a change to branch master
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from aa8ba1b0d90 install.texi: For amdgcn, clarify which llvm-* binaries are [...]
new 5a7e3d44bab invoke.texi: AMD GCN - remove '(experimental)' from some gf [...]
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gcc/doc/invoke.texi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
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from 944c3225b38 aarch64/testsuite: Fix vld2-1.c after r16-3201 [PR121713]
new 595bc6263ad i386: Fix vect-pragma-target-[12].c testcase for -march=XYZ [...]
new aa8ba1b0d90 install.texi: For amdgcn, clarify which llvm-* binaries are [...]
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gcc/doc/install.texi | 10 +++++++---
gcc/testsuite/gcc.target/i386/vect-pragma-target-1.c | 2 +-
gcc/testsuite/gcc.target/i386/vect-pragma-target-2.c | 2 +-
3 files changed, 9 insertions(+), 5 deletions(-)
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