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from 433d4dcf6 Add entry 9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b from https [...]
new fed243a55 Add entry b0de7fa4668743aec14c6ccae287ac9f8f7d343b from https [...]
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Summary of changes:
.../first_url | 2 +-
.../tcwg_flang_test/main-aarch64-Ofast-sve_vla/build_url | 2 +-
.../tcwg_flang_test/main-aarch64-Ofast-sve_vla/last_good | 1 +
3 files changed, 3 insertions(+), 2 deletions(-)
copy llvm/sha1/{43ffe2eed0d9f73789dbe213023733d164999306 => b0de7fa4668743aec14c6c [...]
copy llvm/sha1/{3cab7c555ad6451f2b1b4dc918a4b4f4e4a3e45d => b0de7fa4668743aec14c6c [...]
create mode 100644 llvm/sha1/b0de7fa4668743aec14c6ccae287ac9f8f7d343b/tcwg_flang_t [...]
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from dbdd78ef1 Add entry 9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b from https [...]
new 433d4dcf6 Add entry 9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b from https [...]
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Summary of changes:
.../sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/jira/description | 5 +++++
llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/jira/summary | 2 +-
llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/jira/yaml | 7 ++++++-
.../9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/status-summary.txt | 2 +-
llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/status.txt | 5 +++++
.../llvm-aarch64-master-O3}/details.txt | 0
.../llvm-aarch64-master-O3}/reproduction_instructions.txt | 4 ++--
.../llvm-aarch64-master-O3}/status-summary.txt | 0
.../llvm-aarch64-master-O3/status.txt | 4 ++--
.../tcwg_bmk-code_vect-cpu2017fast}/status-summary.txt | 0
.../tcwg_bmk-code_vect-cpu2017fast/status.txt | 4 ++--
11 files changed, 24 insertions(+), 9 deletions(-)
copy {binutils/sha1/18737d14799d609054994987dd75631430637a99/tcwg_bmk-code_speed-s [...]
copy llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/{tcwg_bmk-code_size-spec2k [...]
copy {binutils/sha1/18737d14799d609054994987dd75631430637a99 => llvm/sha1/9ccf8254 [...]
copy llvm/sha1/{8009bbec59d1c5d47ae06c431647ebee6d886ff2 => 9ccf82543d509bb5a0f5d0 [...]
copy {binutils/sha1/18737d14799d609054994987dd75631430637a99 => llvm/sha1/9ccf8254 [...]
copy llvm/sha1/{90fd99c0795711e1cf762a02b29b0a702f86a264 => 9ccf82543d509bb5a0f5d0 [...]
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tcwg-buildslave pushed a change to branch master
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from e9d0fbad3 Add entry 9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b from https [...]
new dbdd78ef1 Add entry 9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b from https [...]
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.../tcwg_bmk-code_vect-cpu2017fast/llvm-aarch64-master-O3/build_url | 2 +-
.../llvm-aarch64-master-O3}/last_good | 0
2 files changed, 1 insertion(+), 1 deletion(-)
copy llvm/sha1/{8009bbec59d1c5d47ae06c431647ebee6d886ff2 => 9ccf82543d509bb5a0f5d0 [...]
copy llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/{tcwg_bmk-code_size-cpu201 [...]
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unknown user pushed a change to branch master
in repository gcc.
from 519ec1cfe9d Daily bump.
new 539fcaae67c RISC-V: Support form 1 of integer scalar .SAT_ADD
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Summary of changes:
gcc/config/riscv/riscv-protos.h | 1 +
gcc/config/riscv/riscv.cc | 90 ++++++++++++++++++++++
gcc/config/riscv/riscv.md | 11 +++
gcc/testsuite/gcc.target/riscv/sat_arith.h | 17 ++++
gcc/testsuite/gcc.target/riscv/sat_arith_data.h | 85 ++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add-1.c | 30 ++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add-2.c | 32 ++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add-3.c | 31 ++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add-4.c | 30 ++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add-run-1.c | 16 ++++
gcc/testsuite/gcc.target/riscv/sat_s_add-run-2.c | 16 ++++
gcc/testsuite/gcc.target/riscv/sat_s_add-run-3.c | 16 ++++
gcc/testsuite/gcc.target/riscv/sat_s_add-run-4.c | 16 ++++
.../gcc.target/riscv/scalar_sat_binary_run_xxx.h | 26 +++++++
14 files changed, 417 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-run-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-run-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-run-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add-run-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/scalar_sat_binary_run_xxx.h
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unknown user pushed a change to branch releases/gcc-13
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from 032b6e3bea5 Daily bump.
new f364a431d5b RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls
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Summary of changes:
gcc/config/riscv/riscv.cc | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
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tcwg-buildslave pushed a change to branch master
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from cca92c592 Add entry 9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b from https [...]
new e9d0fbad3 Add entry 9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b from https [...]
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Summary of changes:
.../9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/jira/description | 5 +++++
llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/jira/summary | 2 +-
llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/jira/yaml | 7 ++++++-
.../9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/status-summary.txt | 2 +-
llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/status.txt | 5 +++++
.../tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-Os/details.txt | 5 +++++
.../llvm-arm-master-Os}/reproduction_instructions.txt | 8 ++++----
.../llvm-arm-master-Os/status-summary.txt | 1 +
.../tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-Os/status.txt | 6 +++---
.../tcwg_bmk-code_size-cpu2017rate/status-summary.txt | 1 +
.../tcwg_bmk-code_size-cpu2017rate/status.txt | 4 ++++
11 files changed, 36 insertions(+), 10 deletions(-)
create mode 100644 llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/tcwg_bmk-cod [...]
copy llvm/sha1/{8009bbec59d1c5d47ae06c431647ebee6d886ff2/tcwg_bmk-code_size-cpu201 [...]
create mode 100644 llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/tcwg_bmk-cod [...]
copy llvm/sha1/{a292e7edf8b2fc51d3e86a96ff5dff45d16bd264 => 9ccf82543d509bb5a0f5d0 [...]
create mode 100644 llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/tcwg_bmk-cod [...]
create mode 100644 llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/tcwg_bmk-cod [...]
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from ea3455e05 Add entry f044564db1cbc588d0cad4f953d38f6c787dadd4 from https [...]
new cca92c592 Add entry 9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b from https [...]
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.../tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-Os}/build_url | 2 +-
.../llvm-arm-master-Os}/last_good | 0
2 files changed, 1 insertion(+), 1 deletion(-)
copy llvm/sha1/{0524534d5220da5ecb2cd424a46520184d2be366/tcwg_bmk-code_size-cpu201 [...]
copy llvm/sha1/9ccf82543d509bb5a0f5d0551fc4d6c1913b9a9b/{tcwg_bmk-code_size-spec2k [...]
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from cf4408d38 Add entry aa7497a66c4272669fa63f7ec61a3f01aa9dabaf from https [...]
new ef7d0ab80 Add entry f044564db1cbc588d0cad4f953d38f6c787dadd4 from https [...]
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.../sha1/f044564db1cbc588d0cad4f953d38f6c787dadd4}/first_url | 2 +-
.../tcwg_aosp-code_size-dalvikvm/oriole-master/build_url | 2 +-
.../tcwg_aosp-code_size-dalvikvm/oriole-master/last_good | 1 +
3 files changed, 3 insertions(+), 2 deletions(-)
copy {aosp_superproject/sha1/69355b19a2fa9ecb991531eda5e4e84a591e8f4c => llvm/sha1 [...]
copy llvm/sha1/{2a859b20146108af84c741a509dc0e534e045768 => f044564db1cbc588d0cad4 [...]
create mode 100644 llvm/sha1/f044564db1cbc588d0cad4f953d38f6c787dadd4/tcwg_aosp-co [...]
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unknown user pushed a change to branch releases/gcc-14
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from ba9a3f105ea Check avx upper register for parallel.
new 2ac3806d546 Daily bump.
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Summary of changes:
gcc/ChangeLog | 14 ++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 7 +++++++
3 files changed, 22 insertions(+), 1 deletion(-)
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