Tcwg-commits April 2024

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2303 discussions

[gcc] branch master updated (1c89d1b9dc8 -> 85621f98d24)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 1c89d1b9dc8 libgomp.texi: Update entries in OpenMP TR12 implementation status new 85621f98d24 tree-optimization/114485 - neg induction with partial vectors The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gcc.dg/vect/pr114485.c | 18 ++++++++++++++++++ gcc/tree-vect-loop-manip.cc | 14 +++++++------- 2 files changed, 25 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vect/pr114485.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[binutils-gdb] branch master updated (1bc2544b895 -> f38e9921479)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 1bc2544b895 dlltool: replace unchecked malloc with xmalloc new fab240554b7 Re: Update objcopy's --section-alignment option new f38e9921479 MIPS HI16 and LO16 reloc howtos The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/elf32-mips.c | 40 ++++++++++++++--------------- bfd/elf64-mips.c | 74 +++++++++++++++++++++++++++--------------------------- bfd/elfn32-mips.c | 68 ++++++++++++++++++++++++------------------------- binutils/objcopy.c | 4 +-- 4 files changed, 93 insertions(+), 93 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[glibc] branch release/2.39/master updated (5a461f2949 -> 5d070d12b3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch release/2.39/master in repository glibc. from 5a461f2949 Add tst-gnu2-tls2mod1 to test-internal-extras new aa4249266e x86: Fix Zen3/Zen4 ERMS selection (BZ 30994) new 6484a92698 x86: Do not prefer ERMS for memset on Zen3+ new 5d070d12b3 x86: Expand the comment on when REP STOSB is used on memset The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: sysdeps/x86/dl-cacheinfo.h | 43 ++++++++++++---------- .../x86_64/multiarch/memset-vec-unaligned-erms.S | 4 +- 2 files changed, 26 insertions(+), 21 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[gcc] branch master updated (1baec8deb01 -> 1c89d1b9dc8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 1baec8deb01 fold-const: Handle NON_LVALUE_EXPR in native_encode_initial [...] new 1c89d1b9dc8 libgomp.texi: Update entries in OpenMP TR12 implementation status The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libgomp/libgomp.texi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[glibc] branch master updated (3db9d208dd -> 87cb1dfcd6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 3db9d208dd misc: Add support for Linux uio.h RWF_NOAPPEND flag new cb5d84f1f8 aarch64/fpu: Add vector variants of erf new bdb5705b7b aarch64/fpu: Add vector variants of cosh new b09fee1d21 aarch64/fpu: Add vector variants of acosh new 81406ea3c5 aarch64/fpu: Add vector variants of asinh new 8b67920528 aarch64/fpu: Add vector variants of atanh new eedbbca0bf aarch64/fpu: Add vector variants of sinh new 3d3a4fb8e4 aarch64/fpu: Add vector variants of tanh new 87cb1dfcd6 aarch64/fpu: Add vector variants of erfc The 8 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: math/auto-libm-test-in | 2 +- math/auto-libm-test-out-tanh | 50 +- sysdeps/aarch64/fpu/Makefile | 19 +- sysdeps/aarch64/fpu/Versions | 42 + sysdeps/aarch64/fpu/acosh_advsimd.c | 67 + sysdeps/aarch64/fpu/acosh_sve.c | 51 + sysdeps/aarch64/fpu/acoshf_advsimd.c | 78 + sysdeps/aarch64/fpu/acoshf_sve.c | 49 + sysdeps/aarch64/fpu/advsimd_f32_protos.h | 8 + sysdeps/aarch64/fpu/asinh_advsimd.c | 171 + sysdeps/aarch64/fpu/asinh_sve.c | 150 + sysdeps/aarch64/fpu/asinhf_advsimd.c | 80 + sysdeps/aarch64/fpu/asinhf_sve.c | 56 + sysdeps/aarch64/fpu/atanh_advsimd.c | 64 + sysdeps/aarch64/fpu/atanh_sve.c | 59 + sysdeps/aarch64/fpu/atanhf_advsimd.c | 79 + sysdeps/aarch64/fpu/atanhf_sve.c | 54 + sysdeps/aarch64/fpu/bits/math-vector.h | 64 + sysdeps/aarch64/fpu/cosh_advsimd.c | 108 + sysdeps/aarch64/fpu/cosh_sve.c | 105 + sysdeps/aarch64/fpu/coshf_advsimd.c | 84 + sysdeps/aarch64/fpu/coshf_sve.c | 59 + sysdeps/aarch64/fpu/erf_advsimd.c | 161 + sysdeps/aarch64/fpu/erf_data.c | 800 +++++ sysdeps/aarch64/fpu/erf_sve.c | 115 + sysdeps/aarch64/fpu/erfc_advsimd.c | 201 ++ sysdeps/aarch64/fpu/erfc_data.c | 3519 ++++++++++++++++++++ sysdeps/aarch64/fpu/erfc_sve.c | 167 + sysdeps/aarch64/fpu/erfcf_advsimd.c | 170 + sysdeps/aarch64/fpu/erfcf_data.c | 676 ++++ sysdeps/aarch64/fpu/erfcf_sve.c | 113 + sysdeps/aarch64/fpu/erff_advsimd.c | 123 + sysdeps/aarch64/fpu/erff_data.c | 544 +++ sysdeps/aarch64/fpu/erff_sve.c | 93 + sysdeps/aarch64/fpu/sinh_advsimd.c | 121 + sysdeps/aarch64/fpu/sinh_sve.c | 107 + sysdeps/aarch64/fpu/sinhf_advsimd.c | 88 + sysdeps/aarch64/fpu/sinhf_sve.c | 67 + sysdeps/aarch64/fpu/sv_erf_data.c | 1570 +++++++++ sysdeps/aarch64/fpu/sv_erff_data.c | 1058 ++++++ sysdeps/aarch64/fpu/sv_expf_inline.h | 75 + .../fpu/{expm1f_sve.c => sv_expm1f_inline.h} | 67 +- sysdeps/aarch64/fpu/sv_log1p_inline.h | 109 + sysdeps/aarch64/fpu/sv_log1pf_inline.h | 76 + sysdeps/aarch64/fpu/tanh_advsimd.c | 109 + sysdeps/aarch64/fpu/tanh_sve.c | 100 + sysdeps/aarch64/fpu/tanhf_advsimd.c | 76 + sysdeps/aarch64/fpu/tanhf_sve.c | 61 + sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c | 8 + sysdeps/aarch64/fpu/test-double-sve-wrappers.c | 8 + sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | 8 + sysdeps/aarch64/fpu/test-float-sve-wrappers.c | 8 + sysdeps/aarch64/fpu/v_exp_tail_data.c | 110 + sysdeps/aarch64/fpu/v_expf_inline.h | 71 + sysdeps/aarch64/fpu/v_expm1f_inline.h | 73 + sysdeps/aarch64/fpu/v_log1p_inline.h | 103 + sysdeps/aarch64/fpu/v_log1pf_inline.h | 78 + sysdeps/aarch64/fpu/v_math.h | 10 + sysdeps/aarch64/fpu/vecmath_config.h | 46 + sysdeps/aarch64/libm-test-ulps | 64 + sysdeps/unix/sysv/linux/aarch64/libmvec.abilist | 40 + 61 files changed, 12423 insertions(+), 69 deletions(-) create mode 100644 sysdeps/aarch64/fpu/acosh_advsimd.c create mode 100644 sysdeps/aarch64/fpu/acosh_sve.c create mode 100644 sysdeps/aarch64/fpu/acoshf_advsimd.c create mode 100644 sysdeps/aarch64/fpu/acoshf_sve.c create mode 100644 sysdeps/aarch64/fpu/asinh_advsimd.c create mode 100644 sysdeps/aarch64/fpu/asinh_sve.c create mode 100644 sysdeps/aarch64/fpu/asinhf_advsimd.c create mode 100644 sysdeps/aarch64/fpu/asinhf_sve.c create mode 100644 sysdeps/aarch64/fpu/atanh_advsimd.c create mode 100644 sysdeps/aarch64/fpu/atanh_sve.c create mode 100644 sysdeps/aarch64/fpu/atanhf_advsimd.c create mode 100644 sysdeps/aarch64/fpu/atanhf_sve.c create mode 100644 sysdeps/aarch64/fpu/cosh_advsimd.c create mode 100644 sysdeps/aarch64/fpu/cosh_sve.c create mode 100644 sysdeps/aarch64/fpu/coshf_advsimd.c create mode 100644 sysdeps/aarch64/fpu/coshf_sve.c create mode 100644 sysdeps/aarch64/fpu/erf_advsimd.c create mode 100644 sysdeps/aarch64/fpu/erf_data.c create mode 100644 sysdeps/aarch64/fpu/erf_sve.c create mode 100644 sysdeps/aarch64/fpu/erfc_advsimd.c create mode 100644 sysdeps/aarch64/fpu/erfc_data.c create mode 100644 sysdeps/aarch64/fpu/erfc_sve.c create mode 100644 sysdeps/aarch64/fpu/erfcf_advsimd.c create mode 100644 sysdeps/aarch64/fpu/erfcf_data.c create mode 100644 sysdeps/aarch64/fpu/erfcf_sve.c create mode 100644 sysdeps/aarch64/fpu/erff_advsimd.c create mode 100644 sysdeps/aarch64/fpu/erff_data.c create mode 100644 sysdeps/aarch64/fpu/erff_sve.c create mode 100644 sysdeps/aarch64/fpu/sinh_advsimd.c create mode 100644 sysdeps/aarch64/fpu/sinh_sve.c create mode 100644 sysdeps/aarch64/fpu/sinhf_advsimd.c create mode 100644 sysdeps/aarch64/fpu/sinhf_sve.c create mode 100644 sysdeps/aarch64/fpu/sv_erf_data.c create mode 100644 sysdeps/aarch64/fpu/sv_erff_data.c create mode 100644 sysdeps/aarch64/fpu/sv_expf_inline.h copy sysdeps/aarch64/fpu/{expm1f_sve.c => sv_expm1f_inline.h} (59%) create mode 100644 sysdeps/aarch64/fpu/sv_log1p_inline.h create mode 100644 sysdeps/aarch64/fpu/sv_log1pf_inline.h create mode 100644 sysdeps/aarch64/fpu/tanh_advsimd.c create mode 100644 sysdeps/aarch64/fpu/tanh_sve.c create mode 100644 sysdeps/aarch64/fpu/tanhf_advsimd.c create mode 100644 sysdeps/aarch64/fpu/tanhf_sve.c create mode 100644 sysdeps/aarch64/fpu/v_exp_tail_data.c create mode 100644 sysdeps/aarch64/fpu/v_expf_inline.h create mode 100644 sysdeps/aarch64/fpu/v_expm1f_inline.h create mode 100644 sysdeps/aarch64/fpu/v_log1p_inline.h create mode 100644 sysdeps/aarch64/fpu/v_log1pf_inline.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[glibc] branch master updated (95c70fd0d4 -> 3db9d208dd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 95c70fd0d4 manual: significand() uses FLT_RADIX, not 2 new 3db9d208dd misc: Add support for Linux uio.h RWF_NOAPPEND flag The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: manual/llio.texi | 4 ++++ misc/tst-preadvwritev2-common.c | 5 ++++- sysdeps/unix/sysv/linux/bits/uio-ext.h | 1 + 3 files changed, 9 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[gcc] branch master updated (f2ccfb2d0b2 -> 1baec8deb01)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from f2ccfb2d0b2 [MAINTAINERS] Update my email address and step down as arm [...] new 48530efdccc bitint: Handle m_bitfld_load cast in outer m_cast_condition [...] new 1baec8deb01 fold-const: Handle NON_LVALUE_EXPR in native_encode_initial [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/fold-const.cc | 2 ++ gcc/gimple-lower-bitint.cc | 20 +++++++++++++++++++- gcc/testsuite/g++.dg/cpp2a/bit-cast16.C | 16 ++++++++++++++++ gcc/testsuite/gcc.dg/bitint-103.c | 16 ++++++++++++++++ gcc/testsuite/gcc.dg/bitint-104.c | 17 +++++++++++++++++ 5 files changed, 70 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.dg/cpp2a/bit-cast16.C create mode 100644 gcc/testsuite/gcc.dg/bitint-103.c create mode 100644 gcc/testsuite/gcc.dg/bitint-104.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[binutils-gdb] branch master updated (b43b352837e -> 1bc2544b895)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from b43b352837e Memory corruption with USE_MMAP new 1bc2544b895 dlltool: replace unchecked malloc with xmalloc The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: binutils/dlltool.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[gcc] branch master updated (e152177b362 -> f2ccfb2d0b2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from e152177b362 tree-optimization/114551 - loop splitting and undefined overflow new f2ccfb2d0b2 [MAINTAINERS] Update my email address and step down as arm [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

[gcc] branch master updated (fe385c21999 -> e152177b362)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from fe385c21999 Don't set full_profile in auto-profile [PR113765] new e152177b362 tree-optimization/114551 - loop splitting and undefined overflow The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gcc.dg/torture/pr114551.c | 18 ++++++++++++++++++ gcc/tree-ssa-loop-split.cc | 22 ++++++++++++++++++++-- 2 files changed, 38 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/torture/pr114551.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 months, 3 weeks

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Tcwg-commits April 2024