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from 7d051f7d457 RISC-V: Refine the error msg for RVV intrinisc required ext
new 97d5cd87403 tree-optimization/114624 - fix use-after-free in SCCP
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gcc/testsuite/gcc.dg/torture/pr114624.c | 20 ++++++++++++++++++++
gcc/tree-scalar-evolution.cc | 4 ++--
2 files changed, 22 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.dg/torture/pr114624.c
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new 613579ff4 Add entry afe8b93ffdfef5d8879e1894b9d7dda40dee2b8d from https [...]
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llvm/sha1/afe8b93ffdfef5d8879e1894b9d7dda40dee2b8d/jira/description | 2 +-
llvm/sha1/afe8b93ffdfef5d8879e1894b9d7dda40dee2b8d/jira/yaml | 2 +-
llvm/sha1/afe8b93ffdfef5d8879e1894b9d7dda40dee2b8d/status.txt | 2 +-
.../tcwg_bmk-code_speed-spec2k6/llvm-aarch64-master-O3/status.txt | 2 +-
.../tcwg_bmk-code_speed-spec2k6/status.txt | 2 +-
5 files changed, 5 insertions(+), 5 deletions(-)
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new f6d3471d1 Add entry afe8b93ffdfef5d8879e1894b9d7dda40dee2b8d from https [...]
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.../tcwg_bmk-code_speed-spec2k6/llvm-aarch64-master-O3/build_url | 2 +-
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unknown user pushed a change to branch master
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from ecc3c386677 gdb: ignore -Wregister instead of -Wdeprecated-register
new cc7ae3ac7e7 gdb/Makefile: add gcore to the 'all' target dependency list
new 766f411f084 gdb/Makefile: rewrite dependencies for config.status target
new cb1bef582e3 gdb/Makefile: add some missing config.status dependencies
new b6a12c14513 gdb/Makefile: Print 'GEN' message, and pass SILENT_FLAG more
new ff69d6e9af3 gdb/configure: use AC_MSG_NOTICE not a direct echo call
new 76bbe1f5970 gdb/build: apply silent-rules.mk to the data-directory Makefile.in
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gdb/Makefile.in | 41 ++++++++++++++++++++++++++---------------
gdb/configure | 6 ++++--
gdb/configure.ac | 4 ++--
gdb/data-directory/Makefile.in | 40 +++++++++++++++++++++++-----------------
gdb/silent-rules.mk | 4 ++++
5 files changed, 59 insertions(+), 36 deletions(-)
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"Maxim Kuvyrkov pushed a change to branch master
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from 41dadf8b round-robin-notify.sh (generate_lnt_report): Add statistics
new f303afb4 tcwg_gnu-build.sh (rr[minor]): Bump to change dashboard format
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tcwg_gnu-build.sh | 2 +-
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"Maxim Kuvyrkov pushed a change to branch master
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from e88365fe jenkins-helpers.sh: Add get_component_dir
new 41dadf8b round-robin-notify.sh (generate_lnt_report): Add statistics
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lnt-utils.sh | 25 +++++++++++++++++++++++--
round-robin-notify.sh | 4 ++++
tcwg-lnt/tcwg-lnt-01/tcwg_check.jq | 4 +++-
tcwg-lnt/tcwg-lnt-01/tcwg_check.yaml.in | 14 +++++++++++---
tcwg-lnt/tcwg-lnt-02/tcwg_check.jq | 6 +++---
tcwg-lnt/tcwg-lnt-02/tcwg_check.yaml.in | 14 +++++++-------
tcwg-lnt/tcwg-lnt-03/tcwg_check.jq | 4 +++-
tcwg-lnt/tcwg-lnt-03/tcwg_check.yaml.in | 14 +++++++++++---
8 files changed, 65 insertions(+), 20 deletions(-)
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unknown user pushed a change to branch binutils-2_42-branch
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from c113f775f12 Automatic date update in version.in
new 6224493e457 Re: PR26978, Inconsistency for strong foo@v1 and weak foo@@v1
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bfd/linker.c | 4 ++--
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unknown user pushed a change to branch master
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from 39cb6b880f7 Darwin: Sync coverage specs with gcc/gcc.cc.
new 7d051f7d457 RISC-V: Refine the error msg for RVV intrinisc required ext
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gcc/config/riscv/riscv-vector-builtins-shapes.cc | 18 ++++--
gcc/config/riscv/riscv-vector-builtins.cc | 23 +++++--
gcc/config/riscv/riscv-vector-builtins.h | 75 +++++++++++++++++++++-
...th_intrinsic-7.c => intrinsic_required_ext-1.c} | 5 +-
.../riscv/rvv/base/intrinsic_required_ext-10.c | 11 ++++
.../riscv/rvv/base/intrinsic_required_ext-2.c | 11 ++++
.../riscv/rvv/base/intrinsic_required_ext-3.c | 11 ++++
.../riscv/rvv/base/intrinsic_required_ext-4.c | 11 ++++
.../riscv/rvv/base/intrinsic_required_ext-5.c | 11 ++++
.../riscv/rvv/base/intrinsic_required_ext-6.c | 11 ++++
.../riscv/rvv/base/intrinsic_required_ext-7.c | 11 ++++
.../riscv/rvv/base/intrinsic_required_ext-8.c | 11 ++++
.../riscv/rvv/base/intrinsic_required_ext-9.c | 11 ++++
.../rvv/base/target_attribute_v_with_intrinsic-7.c | 2 +-
.../rvv/base/target_attribute_v_with_intrinsic-8.c | 2 +-
15 files changed, 203 insertions(+), 21 deletions(-)
copy gcc/testsuite/gcc.target/riscv/rvv/base/{target_attribute_v_with_intrinsic-7. [...]
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-10.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-5.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-6.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-7.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-8.c
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/intrinsic_required_ext-9.c
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new 8a71e3a02 Add entry 370880cdcc487298fd30628cad1a3671ba1c5f5c from https [...]
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llvm/sha1/370880cdcc487298fd30628cad1a3671ba1c5f5c/jira/description | 3 ++-
llvm/sha1/370880cdcc487298fd30628cad1a3671ba1c5f5c/jira/yaml | 3 ++-
llvm/sha1/370880cdcc487298fd30628cad1a3671ba1c5f5c/status.txt | 2 +-
.../tcwg_bmk-code_speed-spec2k6/llvm-aarch64-master-O3/status.txt | 2 +-
.../tcwg_bmk-code_speed-spec2k6/status.txt | 2 +-
5 files changed, 7 insertions(+), 5 deletions(-)
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.../tcwg_bmk-code_speed-spec2k6/llvm-aarch64-master-O3/build_url | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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