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.../tcwg_gcc_check/master-aarch64/details.txt | 12 ++++++++----
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unknown user pushed a change to branch master
in repository glibc.
from 1f94147a79 timezone: sync to TZDB 2024a
new 5653ccd847 elf: Add CPU iteration support for future use in ld.so diagnostics
new 7a430f40c4 x86: Add generic CPUID data dumper to ld.so --list-diagnostics
new f8d8b1b1e6 aarch64: Enhanced CPU diagnostics for ld.so
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elf/dl-iterate_cpu.h | 136 ++++++++
manual/dynlink.texi | 119 ++++++-
sysdeps/aarch64/dl-diagnostics-cpu.c | 84 +++++
sysdeps/generic/dl-affinity.h | 54 +++
.../sysv/linux/dl-affinity.h} | 34 +-
sysdeps/x86/dl-diagnostics-cpu.c | 384 +++++++++++++++++++++
6 files changed, 793 insertions(+), 18 deletions(-)
create mode 100644 elf/dl-iterate_cpu.h
create mode 100644 sysdeps/aarch64/dl-diagnostics-cpu.c
create mode 100644 sysdeps/generic/dl-affinity.h
copy sysdeps/{x86_64/tst-plt-rewrite2.c => unix/sysv/linux/dl-affinity.h} (54%)
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unknown user pushed a change to branch master
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from 278cad85077 aarch64: Fix vld1/st1_x4 intrinsic test
new d5d84487dec s390: Fix s390_const_int_pool_entry_p and movdi peephole2 [ [...]
new 97069657c4e RISC-V: Implement TLS Descriptors.
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gcc/config.gcc | 15 ++++++++++++-
gcc/config/riscv/riscv-opts.h | 6 ++++++
gcc/config/riscv/riscv-protos.h | 5 +++--
gcc/config/riscv/riscv.cc | 24 +++++++++++++++++----
gcc/config/riscv/riscv.h | 9 ++++++--
gcc/config/riscv/riscv.md | 20 ++++++++++++++++-
gcc/config/riscv/riscv.opt | 14 ++++++++++++
gcc/config/s390/s390.cc | 14 ++++++++++--
gcc/config/s390/s390.md | 10 +++++++++
gcc/doc/install.texi | 3 +++
gcc/doc/invoke.texi | 13 ++++++++++-
gcc/testsuite/gcc.dg/pr114605.c | 37 ++++++++++++++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/tls_1.x | 5 +++++
gcc/testsuite/gcc.target/riscv/tlsdesc.c | 12 +++++++++++
14 files changed, 174 insertions(+), 13 deletions(-)
create mode 100644 gcc/testsuite/gcc.dg/pr114605.c
create mode 100644 gcc/testsuite/gcc.target/riscv/tls_1.x
create mode 100644 gcc/testsuite/gcc.target/riscv/tlsdesc.c
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