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tcwg-buildslave pushed a change to branch master
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from 8b429cabf Add entry c7518891483e2aa558390ffeab4a19ba747814d6 from https [...]
new bc81b048e Add entry fbd89bcc6647ed611e579d8f9c38c97b8e6f7936 from https [...]
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Summary of changes:
.../sha1/fbd89bcc6647ed611e579d8f9c38c97b8e6f7936}/first_url | 2 +-
.../tcwg_flang_test/main-aarch64-Ofast-sve_vls-lto-lld}/build_url | 2 +-
.../tcwg_flang_test/main-aarch64-Ofast-sve_vls-lto-lld/last_good | 1 +
3 files changed, 3 insertions(+), 2 deletions(-)
copy {fujitsu_testsuite/sha1/16d0fd3950bc3383463ab6eaa3af5e6cae3aabba => llvm/sha1 [...]
copy {fujitsu_testsuite/sha1/e0fb0c49ba3050dc1ac811e3429081b10f957ce1/tcwg_flang_t [...]
create mode 100644 llvm/sha1/fbd89bcc6647ed611e579d8f9c38c97b8e6f7936/tcwg_flang_t [...]
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tcwg-buildslave pushed a change to branch master
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from 40041aef8 Add entry c7518891483e2aa558390ffeab4a19ba747814d6 from https [...]
new 8b429cabf Add entry c7518891483e2aa558390ffeab4a19ba747814d6 from https [...]
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Summary of changes:
...4967-gc7518891483e => gcc-15-4967-gc7518891483} | 0
.../commit-log.txt | 2 +-
.../jira/description | 7 ++++-
.../jira/summary | 2 +-
.../jira/yaml | 9 ++++--
.../status.txt | 5 +++
.../master-arm/details.txt | 36 ++++++++++------------
.../master-arm/reproduction_instructions.txt | 4 +--
.../reproduction_instructions_with_ci_script.txt | 4 +--
.../master-arm}/status-summary.txt | 0
.../tcwg_gnu_cross_check_gcc/master-arm/status.txt | 4 +--
.../tcwg_gnu_cross_check_gcc}/status-summary.txt | 0
.../tcwg_gnu_cross_check_gcc/status.txt | 4 +--
13 files changed, 44 insertions(+), 33 deletions(-)
copy gcc/basepoints/{gcc-15-4967-gc7518891483e => gcc-15-4967-gc7518891483} (100%)
copy gcc/sha1/{bcccc3221b838ee7ae7848e7194603acb18294b3 => c7518891483e2aa558390ff [...]
copy gcc/sha1/c7518891483e2aa558390ffeab4a19ba747814d6/{tcwg_gcc_check => tcwg_gnu [...]
copy gcc/sha1/c7518891483e2aa558390ffeab4a19ba747814d6/{tcwg_gcc_check => tcwg_gnu [...]
copy {binutils/sha1/313f04b6edcd09e0e7ff224bd54a892ab8f029aa => gcc/sha1/c75188914 [...]
copy gcc/sha1/{200531d5b9fb99eca2b0d6b8d1e42d176413225f => c7518891483e2aa558390ff [...]
copy {binutils/sha1/313f04b6edcd09e0e7ff224bd54a892ab8f029aa => gcc/sha1/c75188914 [...]
copy gcc/sha1/{08b8341f209be7c7e301853bdbbcad4f8e1695f5 => c7518891483e2aa558390ff [...]
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tcwg-buildslave pushed a change to branch master
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from d19a4ce4b Add entry 3494ee95902cef62f767489802e469c58a13ea04 from https [...]
new 40041aef8 Add entry c7518891483e2aa558390ffeab4a19ba747814d6 from https [...]
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Summary of changes:
.../tcwg_gnu_cross_check_gcc/master-arm/build_url | 2 +-
.../master-arm}/last_good | 0
2 files changed, 1 insertion(+), 1 deletion(-)
copy gcc/sha1/{03cebd304955a6b9c5607e09312d77f1307cc98e => c7518891483e2aa558390ff [...]
copy gcc/sha1/c7518891483e2aa558390ffeab4a19ba747814d6/{tcwg_bootstrap_check/maste [...]
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tcwg-buildslave pushed a change to branch master
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from 06c86f8f4 Add entry 3494ee95902cef62f767489802e469c58a13ea04 from https [...]
new d19a4ce4b Add entry 3494ee95902cef62f767489802e469c58a13ea04 from https [...]
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Summary of changes:
.../sha1/3494ee95902cef62f767489802e469c58a13ea04/jira/description | 5 +++++
llvm/sha1/3494ee95902cef62f767489802e469c58a13ea04/jira/summary | 2 +-
llvm/sha1/3494ee95902cef62f767489802e469c58a13ea04/jira/yaml | 7 ++++++-
.../3494ee95902cef62f767489802e469c58a13ea04/status-summary.txt | 2 +-
llvm/sha1/3494ee95902cef62f767489802e469c58a13ea04/status.txt | 5 +++++
.../tcwg_bmk-code_vect-spec2k6/llvm-arm-master-O3_LTO}/details.txt | 2 +-
.../llvm-arm-master-O3_LTO/reproduction_instructions.txt | 0
.../reproduction_instructions_with_ci_script.txt | 4 ++--
.../llvm-arm-master-O3_LTO/status-summary.txt | 1 +
.../tcwg_bmk-code_vect-spec2k6/llvm-arm-master-O3_LTO/status.txt | 6 +++---
.../tcwg_bmk-code_vect-spec2k6/status-summary.txt | 1 +
.../tcwg_bmk-code_vect-spec2k6/status.txt | 4 ++++
12 files changed, 30 insertions(+), 9 deletions(-)
copy {gcc/sha1/70c3db511ba14ff5fa68cb41d0714a9fb957ea5d/tcwg_bmk-code_size-spec2k6 [...]
copy llvm/sha1/{06664fdc7680f7f9fa9b0a414a8fb8df2f913d48/tcwg_bmk-code_speed-cpu20 [...]
copy llvm/sha1/3494ee95902cef62f767489802e469c58a13ea04/{tcwg_bmk-code_size-cpu201 [...]
create mode 100644 llvm/sha1/3494ee95902cef62f767489802e469c58a13ea04/tcwg_bmk-cod [...]
copy llvm/sha1/{8009bbec59d1c5d47ae06c431647ebee6d886ff2 => 3494ee95902cef62f76748 [...]
create mode 100644 llvm/sha1/3494ee95902cef62f767489802e469c58a13ea04/tcwg_bmk-cod [...]
create mode 100644 llvm/sha1/3494ee95902cef62f767489802e469c58a13ea04/tcwg_bmk-cod [...]
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from 26ba721ab Add entry f9bac238840155e1539aa68daf1507ea63c9ed80 from https [...]
new 06c86f8f4 Add entry 3494ee95902cef62f767489802e469c58a13ea04 from https [...]
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Summary of changes:
.../tcwg_bmk-code_vect-spec2k6/llvm-arm-master-O3_LTO/build_url | 2 +-
.../llvm-arm-master-O3_LTO}/last_good | 0
2 files changed, 1 insertion(+), 1 deletion(-)
copy llvm/sha1/{8009bbec59d1c5d47ae06c431647ebee6d886ff2 => 3494ee95902cef62f76748 [...]
copy llvm/sha1/3494ee95902cef62f767489802e469c58a13ea04/{tcwg_bmk-code_size-cpu201 [...]
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unknown user pushed a change to branch releases/gcc-14
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from 9572024dd16 Daily bump.
new 05fd99e3d5e i386: Add OPTION_MASK_ISA2_EVEX512 for some AVX512 instructions.
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Summary of changes:
gcc/config/i386/i386-builtin.def | 10 +++++-----
gcc/testsuite/gcc.target/i386/pr117304-1.c | 28 ++++++++++++++++++++++++++++
2 files changed, 33 insertions(+), 5 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr117304-1.c
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unknown user pushed a change to branch master
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from 693b7700a7d Daily bump.
new da31786910f Match:Support signed imm SAT_ADD form1
new 1e2ae65a7f0 RISC-V: Add testcases for signed imm SAT_ADD form1
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Summary of changes:
gcc/match.pd | 13 +++++++
gcc/testsuite/gcc.target/riscv/sat_arith.h | 15 ++++++++
...add_imm_type_check-13.c => sat_s_add_imm-1-1.c} | 4 ++-
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1.c | 30 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2-1.c | 10 ++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2.c | 33 +++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3-1.c | 10 ++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3.c | 31 ++++++++++++++++
gcc/testsuite/gcc.target/riscv/sat_s_add_imm-4.c | 29 +++++++++++++++
.../gcc.target/riscv/sat_s_add_imm-run-1.c | 42 ++++++++++++++++++++++
.../gcc.target/riscv/sat_s_add_imm-run-2.c | 42 ++++++++++++++++++++++
.../gcc.target/riscv/sat_s_add_imm-run-3.c | 42 ++++++++++++++++++++++
.../gcc.target/riscv/sat_s_add_imm-run-4.c | 42 ++++++++++++++++++++++
gcc/tree-ssa-math-opts.cc | 3 ++
14 files changed, 345 insertions(+), 1 deletion(-)
copy gcc/testsuite/gcc.target/riscv/{sat_u_add_imm_type_check-13.c => sat_s_add_im [...]
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/sat_s_add_imm-run-4.c
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unknown user pushed a change to branch releases/gcc-14
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from 97640e96326 AArch64: rename the SVE2 psel intrinsics to psel_lane [PR116371]
new 9572024dd16 Daily bump.
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Summary of changes:
gcc/ChangeLog | 14 ++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/cp/ChangeLog | 9 +++++++++
gcc/testsuite/ChangeLog | 32 ++++++++++++++++++++++++++++++++
4 files changed, 56 insertions(+), 1 deletion(-)
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unknown user pushed a change to branch releases/gcc-13
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from 75a5bc8c014 c++: Defer -fstrong-eval-order processing to template insta [...]
new dfa11509ae1 Daily bump.
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gcc/DATESTAMP | 2 +-
gcc/cp/ChangeLog | 9 +++++++++
gcc/testsuite/ChangeLog | 9 +++++++++
3 files changed, 19 insertions(+), 1 deletion(-)
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unknown user pushed a change to branch releases/gcc-12
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gcc/DATESTAMP | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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