Tcwg-commits October 2024

tcwg-commits@lists.linaro.org

3 participants
1593 discussions

[gcc] branch master updated (261d803c40c -> 94b95f7a3f1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 261d803c40c MAINTAINERS: Add myself as pair fusion and aarch64 ldp/stp [...] new ee70e5c729b Adjust assert in vect_build_slp_tree_2 new d3d41ec6092 [2/n] remove no-vfa-*.c special-casing of gcc.dg/vect/ files new a1381b69b9d [3/n] remove fast-math-*.c special-casing of gcc.dg/vect/ files new 902f4ee7f13 [4/n] remove wrapv-*.c special-casing of gcc.dg/vect/ files new 94b95f7a3f1 [5/n] remove trapv-*.c special-casing of gcc.dg/vect/ files The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../complex/fast-math-bb-slp-complex-add-double.c | 2 +- .../complex/fast-math-bb-slp-complex-add-float.c | 2 +- .../fast-math-bb-slp-complex-add-half-float.c | 2 +- .../fast-math-bb-slp-complex-add-pattern-double.c | 2 +- .../fast-math-bb-slp-complex-add-pattern-float.c | 2 +- ...st-math-bb-slp-complex-add-pattern-half-float.c | 2 +- .../complex/fast-math-bb-slp-complex-mla-double.c | 2 +- .../complex/fast-math-bb-slp-complex-mla-float.c | 2 +- .../fast-math-bb-slp-complex-mla-half-float.c | 2 +- .../complex/fast-math-bb-slp-complex-mls-double.c | 2 +- .../complex/fast-math-bb-slp-complex-mls-float.c | 2 +- .../fast-math-bb-slp-complex-mls-half-float.c | 2 +- .../complex/fast-math-bb-slp-complex-mul-double.c | 2 +- .../complex/fast-math-bb-slp-complex-mul-float.c | 2 +- .../fast-math-bb-slp-complex-mul-half-float.c | 2 +- .../vect/complex/fast-math-complex-add-double.c | 1 + .../vect/complex/fast-math-complex-add-float.c | 1 + .../complex/fast-math-complex-add-half-float.c | 1 + .../complex/fast-math-complex-add-pattern-double.c | 1 + .../complex/fast-math-complex-add-pattern-float.c | 1 + .../fast-math-complex-add-pattern-half-float.c | 1 + .../vect/complex/fast-math-complex-mla-double.c | 1 + .../vect/complex/fast-math-complex-mla-float.c | 1 + .../complex/fast-math-complex-mla-half-float.c | 1 + .../vect/complex/fast-math-complex-mls-double.c | 1 + .../vect/complex/fast-math-complex-mls-float.c | 1 + .../complex/fast-math-complex-mls-half-float.c | 1 + .../vect/complex/fast-math-complex-mul-double.c | 1 + .../vect/complex/fast-math-complex-mul-float.c | 1 + .../complex/fast-math-complex-mul-half-float.c | 1 + .../gcc.dg/vect/fast-math-bb-slp-call-1.c | 2 + .../gcc.dg/vect/fast-math-bb-slp-call-2.c | 1 + .../gcc.dg/vect/fast-math-bb-slp-call-3.c | 2 + gcc/testsuite/gcc.dg/vect/fast-math-ifcvt-1.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-pr43074.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-pr44152.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-pr55281.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-slp-27.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-slp-38.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-call-1.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-call-2.c | 1 + .../gcc.dg/vect/fast-math-vect-complex-3.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-outer-7.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-1.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-2.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-pr25911.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-pr29925.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-5.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-7.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-8.c | 1 + gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-9.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c | 2 +- gcc/testsuite/gcc.dg/vect/no-vfa-vect-101.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-37.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-43.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-45.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-49.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-51.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-53.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-57.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-61.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-79.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-1.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-2.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-3.c | 1 + gcc/testsuite/gcc.dg/vect/no-vfa-vect-dv-2.c | 2 +- gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c | 2 +- gcc/testsuite/gcc.dg/vect/vect.exp | 51 +++++++--------------- gcc/testsuite/gcc.dg/vect/wrapv-vect-7.c | 1 + gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-2char.c | 1 + .../gcc.dg/vect/wrapv-vect-reduc-2short.c | 1 + .../gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c | 1 + .../gcc.dg/vect/wrapv-vect-reduc-pattern-2c.c | 1 + gcc/tree-vect-slp.cc | 6 +-- 77 files changed, 94 insertions(+), 58 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[glibc] branch master updated (2c1903cbba -> ab564362d0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 2c1903cbba sparc: Fix restartable syscalls (BZ 32173) new ab564362d0 linux: Fix tst-syscall-restart.c on old gcc (BZ 32283) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: sysdeps/unix/sysv/linux/tst-syscall-restart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[gcc] branch master updated (1a458bdeb22 -> 261d803c40c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 1a458bdeb22 testsuite: Add necessary dejagnu directives to pr115815_0.c new 261d803c40c MAINTAINERS: Add myself as pair fusion and aarch64 ldp/stp [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[gcc] branch master updated (51291ad0f1f -> 1a458bdeb22)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 51291ad0f1f middle-end: Fix GSI for gcond root [PR117140] new 1a458bdeb22 testsuite: Add necessary dejagnu directives to pr115815_0.c The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gcc.dg/lto/pr115815_0.c | 4 ++++ 1 file changed, 4 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[gcc] branch master updated (453d3d90c37 -> 51291ad0f1f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 453d3d90c37 AArch64: use movi d0, #0 to clear SVE registers instead of [...] new 55f898008ec middle-end: Fix VEC_PERM_EXPR lowering since relaxation of [...] new 51291ad0f1f middle-end: Fix GSI for gcond root [PR117140] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gcc.dg/vec-perm-lower.c | 16 ++++ .../gcc.dg/vect/vect-early-break_129-pr117140.c | 94 ++++++++++++++++++++++ gcc/tree-vect-generic.cc | 7 +- gcc/tree-vect-slp.cc | 2 +- 4 files changed, 115 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vec-perm-lower.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-early-break_129-pr117140.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[gcc] branch master updated (8e74cbc3a83 -> 453d3d90c37)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 8e74cbc3a83 arm: [MVE intrinsics] use long_type_suffix / half_type_suff [...] new fc350792776 AArch64: update testsuite to account for new zero moves new 87dc6b1992e AArch64: support encoding integer immediates using floating [...] new 453d3d90c37 AArch64: use movi d0, #0 to clear SVE registers instead of [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/aarch64/aarch64.cc | 289 ++++++++++++--------- .../gcc.target/aarch64/const_create_using_fmov.c | 87 +++++++ gcc/testsuite/gcc.target/aarch64/ldp_stp_18.c | 2 +- .../gcc.target/aarch64/memset-corner-cases.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_bf16.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_f16.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_f32.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_f64.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_s16.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_s32.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_s64.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_s8.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_u16.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_u32.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_u64.c | 2 +- .../gcc.target/aarch64/sme/acle-asm/revd_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/acge_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acge_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acge_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acgt_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acgt_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acgt_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acle_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acle_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/acle_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/aclt_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/aclt_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/aclt_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/bic_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/bic_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/cmpuo_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/cmpuo_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/cmpuo_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/dup_f16.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/dup_f32.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/dup_f64.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/dup_s16.c | 98 +++---- .../gcc.target/aarch64/sve/acle/asm/dup_s32.c | 82 +++--- .../gcc.target/aarch64/sve/acle/asm/dup_s64.c | 82 +++--- .../gcc.target/aarch64/sve/acle/asm/dup_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/dup_u16.c | 98 +++---- .../gcc.target/aarch64/sve/acle/asm/dup_u32.c | 82 +++--- .../gcc.target/aarch64/sve/acle/asm/dup_u64.c | 82 +++--- .../gcc.target/aarch64/sve/acle/asm/dup_u8.c | 2 +- .../gcc.target/aarch64/sve/const_fold_div_1.c | 18 +- .../gcc.target/aarch64/sve/const_fold_mul_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/dup_imm_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/fdup_1.c | 4 +- .../gcc.target/aarch64/sve/fold_div_zero.c | 80 +++--- .../gcc.target/aarch64/sve/fold_mul_zero.c | 64 ++--- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c | 2 +- gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c | 2 +- 54 files changed, 656 insertions(+), 542 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/const_create_using_fmov.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[gcc] branch releases/gcc-14 updated (c468a0051a5 -> ab465ce3a94)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-14 in repository gcc. from c468a0051a5 c++: checking ICE w/ constexpr if and lambda as def targ [P [...] new ab465ce3a94 RISC-V:Bugfix for C++ code compilation failure with rv32ima [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/riscv/riscv-c.cc | 7 ++++++- gcc/testsuite/g++.target/riscv/rvv/base/pr116883.C | 15 +++++++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/pr116883.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[binutils-gdb] branch master updated (8f0d880434b -> b2841da4f20)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 8f0d880434b x86: Support x86 ZHAOXIN GMI instructions new b2841da4f20 x86: Regenerate missing table files The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: opcodes/i386-init.h | 1310 ++++++++-------- opcodes/i386-mnem.h | 4147 ++++++++++++++++++++++++++------------------------- opcodes/i386-tbl.h | 3359 ++++++++++++++++++++--------------------- 3 files changed, 4428 insertions(+), 4388 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[binutils-gdb] branch master updated (d6a07eeabba -> 8f0d880434b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from d6a07eeabba gprofng: fix a memory leak in the mxv-pthreads example new 8f0d880434b x86: Support x86 ZHAOXIN GMI instructions The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gas/NEWS | 2 ++ gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 6 ++++-- gas/testsuite/gas/i386/gmi.d | 12 +++++++++++ gas/testsuite/gas/i386/gmi.s | 8 +++++++ gas/testsuite/gas/i386/i386.exp | 1 + opcodes/i386-dis.c | 48 ++++++++++++++++++++++++++++++++++++++++- opcodes/i386-gen.c | 1 + opcodes/i386-opc.h | 3 +++ opcodes/i386-opc.tbl | 5 +++++ 10 files changed, 84 insertions(+), 3 deletions(-) create mode 100644 gas/testsuite/gas/i386/gmi.d create mode 100644 gas/testsuite/gas/i386/gmi.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 month, 1 week

[gcc] branch master updated (a449b424555 -> 8e74cbc3a83)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from a449b424555 testsuite: arm: Corrected expected error message for cde-mv [...] new 59afd44ffb1 Relax boolean processing in vect_maybe_update_slp_op_vectype new ad176d828d1 arm: [MVE intrinsics] improve comment for orrq shape new 0a38e5fffca arm: [MVE intrinsics] remove useless resolve from create shape new 4fc0c6c6186 arm: [MVE intrinsics] Cleanup arm-mve-builtins-functions.h new e1762af3056 arm: [MVE intrinsics] factorize vcvtq new 931ba2f11b9 arm: [MVE intrinsics] add vcvt shape new b8963bb0671 arm: [MVE intrinsics] rework vcvtq new 8035b5b1fdb arm: [MVE intrinsics] factorize vcvtbq vcvttq new 097f560457f arm: [MVE intrinsics] add vcvt_f16_f32 and vcvt_f32_f16 shapes new 43d8286399d arm: [MVE intrinsics] rework vcvtbq_f16_f32 vcvttq_f16_f32 [...] new 17ccbbee443 arm: [MVE intrinsics] factorize vcvtaq vcvtmq vcvtnq vcvtpq new 4f3aa710171 arm: [MVE intrinsics] add vcvtx shape new cbcb8026b8f arm: [MVE intrinsics] rework vcvtaq vcvtmq vcvtnq vcvtpq new b1f996525d6 arm: [MVE intrinsics] rework vbicq new 9c69991f3e1 arm: [MVE intrinsics] factorize vorn new da92e77ed49 arm: [MVE intrinsics] rework vorn new e4366770dc3 arm: [MVE intrinsics] rework vctp new 387b121467f arm: [MVE intrinsics] factorize vddup vidup new e38566afb4a arm: [MVE intrinsics] add viddup shape new d7250b623fb arm: [MVE intrinsics] rework vddup vidup new faaf83b9bc2 arm: [MVE intrinsics] update v[id]dup tests new f936ddb7533 arm: [MVE intrinsics] remove v[id]dup expanders new 2fd08f37d53 arm: [MVE intrinsics] fix checks of immediate arguments new 42be837c368 arm: [MVE intrinsics] factorize vdwdup viwdup new ec116668058 arm: [MVE intrinsics] add vidwdup shape new 47ed70f7581 arm: [MVE intrinsics] rework vdwdup viwdup new e65ab03fac3 arm: [MVE intrinsics] update v[id]wdup tests new c7f95f2b531 arm: [MVE intrinsics] remove useless v[id]wdup expanders new 2ddabb28dbd arm: [MVE intrinsics] add vshlc shape new 4d2b6a7dd53 arm: [MVE intrinsics] rework vshlcq new 8d73d2780f2 arm: [MVE intrinsics] remove vshlcq useless expanders new ba7b97e0bcc arm: [MVE intrinsics] add vadc_vsbc shape new 8c21fc6610e arm: [MVE intrinsics] factorize vadc vadci vsbc vsbci new cb21ceae313 arm: [MVE intrinsics] rework vadciq new 6e2b3125c2f arm: [MVE intrinsics] rework vadcq new a5efcfcc93a arm: [MVE intrinsics] rework vsbcq vsbciq new 8e74cbc3a83 arm: [MVE intrinsics] use long_type_suffix / half_type_suff [...] The 37 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/arm/arm-builtins.cc | 20 - gcc/config/arm/arm-mve-builtins-base.cc | 593 ++ gcc/config/arm/arm-mve-builtins-base.def | 44 +- gcc/config/arm/arm-mve-builtins-base.h | 22 + gcc/config/arm/arm-mve-builtins-functions.h | 815 ++- gcc/config/arm/arm-mve-builtins-shapes.cc | 645 +- gcc/config/arm/arm-mve-builtins-shapes.h | 9 + gcc/config/arm/arm-mve-builtins.cc | 95 +- gcc/config/arm/arm-mve-builtins.def | 1 + gcc/config/arm/arm-mve-builtins.h | 12 +- gcc/config/arm/arm_mve.h | 6353 +++----------------- gcc/config/arm/arm_mve_builtins.def | 20 - gcc/config/arm/iterators.md | 68 +- gcc/config/arm/mve.md | 832 +-- .../arm/mve/intrinsics/vddupq_m_wb_u16.c | 18 +- .../arm/mve/intrinsics/vddupq_m_wb_u32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c | 18 +- .../gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c | 14 +- .../gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c | 14 +- .../gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c | 14 +- .../arm/mve/intrinsics/vddupq_x_wb_u16.c | 18 +- .../arm/mve/intrinsics/vddupq_x_wb_u32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c | 18 +- .../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 6 +- .../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 6 +- .../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 6 +- .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c | 6 +- .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c | 6 +- .../gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c | 6 +- .../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 6 +- .../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 6 +- .../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 6 +- .../arm/mve/intrinsics/vidupq_m_wb_u16.c | 18 +- .../arm/mve/intrinsics/vidupq_m_wb_u32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c | 18 +- .../gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c | 14 +- .../gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c | 14 +- .../gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c | 14 +- .../arm/mve/intrinsics/vidupq_x_wb_u16.c | 18 +- .../arm/mve/intrinsics/vidupq_x_wb_u32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c | 18 +- .../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 6 +- .../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 6 +- .../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 6 +- .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c | 6 +- .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c | 6 +- .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c | 6 +- .../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 6 +- .../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 6 +- .../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 6 +- gcc/tree-vect-stmts.cc | 7 +- 51 files changed, 2980 insertions(+), 6964 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits October 2024