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unknown user pushed a change to branch master
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from e037a0fa040 RISC-V: Remove m_num_vector_iterations[NFC]
new afac1bd3365 tree-optimization/113385 - wrong loop father with early exi [...]
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gcc/tree-vect-loop-manip.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
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from baa931cc2e0 RISC-V: Add optimized dump check of VLS reduc tests
new e037a0fa040 RISC-V: Remove m_num_vector_iterations[NFC]
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gcc/config/riscv/riscv-vector-costs.cc | 13 -------------
gcc/config/riscv/riscv-vector-costs.h | 5 -----
2 files changed, 18 deletions(-)
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unknown user pushed a change to branch users/ibhagat/try-scfi-final
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at ad63be772ae gas/NEWS: announce the new SCFI command line option
This branch includes the following new commits:
new 4e342447d33 gas: dw2gencfi: minor rejig for cfi_sections_set and all_cf [...]
new e8cb630d75c gas: dw2gencfi: use all_cfi_sections instead of cfi_sections
new 82c23a33a81 gas: dw2gencfi: expose a new cfi_set_last_fde API
new e3115f4465d gas: dw2gencfi: move some tc_* defines to the header file
new ff0201d4f88 gas: dw2gencfi: expose dot_cfi_sections for scfidw2gen
new 708166dfe32 gas: dw2gencfi: externalize the all_cfi_sections
new ea59a8eed7f gas: add new command line option --scfi=experimental
new e0b75a8270d gas: scfidw2gen: new functionality to prepare for SCFI
new 07e510d6496 opcodes: gas: x86: define and use Rex2 as attribute not constraint
new 08ba80c53ee opcodes: x86: new marker for insns that implicitly update s [...]
new d6b6f120f5e gas: x86: synthesize CFI for hand-written asm
new 81f9886084e gas: doc: update documentation for the new listing option
new 3be22a911a6 opcodes: i386-reg.tbl: Add a comment to reflect dependency [...]
new a0e4b721bd2 gas: testsuite: add an x86 testsuite for SCFI
new ad63be772ae gas/NEWS: announce the new SCFI command line option
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unknown user pushed a change to branch master
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from 241b50a7a Cygwin: Clarifications in 3.5 changes doc
new 4ecfb5b72 Cygwin: api docs: add missing fallocate
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winsup/doc/posix.xml | 9 +++++++++
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unknown user pushed a change to branch main
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from 241b50a7a Cygwin: Clarifications in 3.5 changes doc
new 4ecfb5b72 Cygwin: api docs: add missing fallocate
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winsup/doc/posix.xml | 9 +++++++++
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unknown user pushed a change to branch master
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from f1b0b1e4454 AVR: target/113156 - Fix ICE due to missing "Save" on -m[lo [...]
new baa931cc2e0 RISC-V: Add optimized dump check of VLS reduc tests
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gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c | 14 +++++++++++++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c | 14 +++++++++++++-
21 files changed, 273 insertions(+), 21 deletions(-)
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unknown user pushed a change to branch master
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from 8a1927856a1 lower-bitint: Fix up handling of INTEGER_CSTs in handle_ope [...]
new f1b0b1e4454 AVR: target/113156 - Fix ICE due to missing "Save" on -m[lo [...]
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gcc/config/avr/avr.opt | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
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from 0627d1f5340 RISC-V: Fix attributes bug configuration of ternary instructions
new 8a1927856a1 lower-bitint: Fix up handling of INTEGER_CSTs in handle_ope [...]
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gcc/gimple-lower-bitint.cc | 4 ++--
gcc/testsuite/gcc.dg/torture/bitint-48.c | 23 +++++++++++++++++++++++
2 files changed, 25 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.dg/torture/bitint-48.c
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig
in repository toolchain/ci/base-artifacts/tcwg_kernel/gnu-master-aarch64-next-defconfig.
was 81ec287 onsuccess: #97: boot: [TCWG CI] https://ci.linaro.org/job/tcw [...]
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at 81ec287 onsuccess: #97: boot: [TCWG CI] https://ci.linaro.org/job/tcw [...]
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