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"Maxim Kuvyrkov pushed a change to branch master
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from de4cfe2e tcwg_gnu-config.sh (settings_for_ci_project_and_config): Move [...]
new 24d9ebd2 Rewrite history for VECT and SVE configs.
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tcwg_bmk-build.sh | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
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unknown user pushed a change to branch master
in repository gcc.
from 04b2fb5bb64 openmp: Add omp::decl attribute support [PR111392]
new 264ff818258 RISC-V: Reorganize and rename combine patterns in autovec-opt.md
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gcc/config/riscv/autovec-opt.md | 203 ++++++++++++++++++----------------------
1 file changed, 91 insertions(+), 112 deletions(-)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig
in repository toolchain/ci/base-artifacts/tcwg_kernel/gnu-master-arm-stable-defconfig.
from 53f0aa7 onsuccess: #51: boot: [TCWG CI] https://ci.linaro.org/job/tcw [...]
new aa60691 onsuccess: #52: boot: [TCWG CI] https://ci.linaro.org/job/tcw [...]
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01-reset_artifacts/console.log.xz | Bin 2292 -> 2280 bytes
02-prepare_abe/console.log.xz | Bin 2612 -> 2600 bytes
03-build_abe-binutils/console.log.xz | Bin 27520 -> 27160 bytes
03-build_abe-binutils/make-binutils.log.xz | Bin 17760 -> 17672 bytes
04-build_abe-stage1/console.log.xz | Bin 93176 -> 92404 bytes
04-build_abe-stage1/make-gcc-stage1.log.xz | Bin 71832 -> 71852 bytes
05-build_abe-qemu/console.log.xz | Bin 33692 -> 33512 bytes
05-build_abe-qemu/make-qemu.log.xz | Bin 22480 -> 21556 bytes
06-build_linux/console.log.xz | Bin 2940 -> 2920 bytes
07-boot_linux/console.log.xz | Bin 5780 -> 5776 bytes
08-check_regression/console.log.xz | Bin 1204 -> 1232 bytes
git/binutils_rev | 2 +-
git/gcc_rev | 2 +-
git/linux_rev | 2 +-
git/qemu_rev | 2 +-
jenkins/build-name | 2 +-
jenkins/notify-full.log | 250 ++++++++++++++---------------
jenkins/notify-init.log | 94 +++++------
jenkins/rewrite.log | 22 +--
jenkins/run-build.env | 6 +-
manifest.sh | 4 +-
notify/jira/comment-template.txt | 2 +-
notify/mail-body.txt | 56 +++----
notify/mail-subject.txt | 2 +-
24 files changed, 223 insertions(+), 223 deletions(-)
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unknown user pushed a change to branch master
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from d024a31a09d RISC-V: Fixed ICE caused by missing operand
new 04b2fb5bb64 openmp: Add omp::decl attribute support [PR111392]
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Summary of changes:
gcc/attribs.cc | 6 +
gcc/c-family/c-omp.cc | 2 +
gcc/cp/cp-tree.h | 1 +
gcc/cp/decl2.cc | 30 ++++-
gcc/cp/name-lookup.cc | 20 ++-
gcc/cp/parser.cc | 134 +++++++++++++++++++--
gcc/cp/parser.h | 4 +
gcc/testsuite/g++.dg/gomp/attrs-19.C | 68 +++++++++++
.../g++.dg/gomp/{attrs-10.C => attrs-20.C} | 34 +++---
gcc/testsuite/g++.dg/gomp/attrs-21.C | 27 +++++
libgomp/libgomp.texi | 2 +-
11 files changed, 292 insertions(+), 36 deletions(-)
create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-19.C
copy gcc/testsuite/g++.dg/gomp/{attrs-10.C => attrs-20.C} (88%)
create mode 100644 gcc/testsuite/g++.dg/gomp/attrs-21.C
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tcwg-buildslave pushed a change to branch linaro-local/v0.0_to_v0.1-99/tcwg_bmk-code_speed-spec2k6/llvm-aarch64-master-O3
in repository toolchain/ci/base-artifacts/tcwg_bmk-code_speed-spec2k6/llvm-aarch64-master-O3.
at 7f8094bc onsuccess: #99: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_b [...]
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unknown user pushed a change to branch master
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from 80048aa13a6 debug/111409 - don't generate COMDAT macro sections for spl [...]
new d024a31a09d RISC-V: Fixed ICE caused by missing operand
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gcc/config/riscv/autovec-opt.md | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
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