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unknown user pushed a change to branch master
in repository gcc.
from 33066c903a6 Generate vmovsh instead of vpblendw for specific vec_merge.
new bb4a81988c6 LoongArch: improved target configuration interface
new f095da2c5a4 LoongArch: define preprocessing macros "__loongarch_{arch,tune}"
new 18e2e589eef LoongArch: add new configure option --with-strict-align-lib
new 976f4f9e477 LoongArch: support loongarch*-elf target
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Summary of changes:
config-ml.in | 10 +
gcc/config.gcc | 408 ++++++++++++++-----------
gcc/config/{riscv => loongarch}/elf.h | 37 ++-
gcc/config/loongarch/genopts/loongarch-strings | 8 +-
gcc/config/loongarch/genopts/loongarch.opt.in | 62 ++--
gcc/config/loongarch/la464.md | 32 +-
gcc/config/loongarch/loongarch-c.cc | 22 +-
gcc/config/loongarch/loongarch-cpu.cc | 263 ++++++++++------
gcc/config/loongarch/loongarch-cpu.h | 3 +-
gcc/config/loongarch/loongarch-def.c | 67 ++--
gcc/config/loongarch/loongarch-def.h | 57 ++--
gcc/config/loongarch/loongarch-driver.cc | 208 +++++++------
gcc/config/loongarch/loongarch-driver.h | 40 +--
gcc/config/loongarch/loongarch-opts.cc | 372 ++++++++++++++++------
gcc/config/loongarch/loongarch-opts.h | 59 ++--
gcc/config/loongarch/loongarch-str.h | 7 +-
gcc/config/loongarch/loongarch.cc | 87 +++---
gcc/config/loongarch/loongarch.opt | 60 ++--
gcc/config/loongarch/t-linux | 32 +-
gcc/doc/install.texi | 56 +++-
gcc/doc/invoke.texi | 32 +-
libgcc/config.host | 9 +-
22 files changed, 1233 insertions(+), 698 deletions(-)
copy gcc/config/{riscv => loongarch}/elf.h (53%)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig
in repository toolchain/ci/base-artifacts/tcwg_kernel/gnu-master-aarch64-mainline-allmodconfig.
from 8dcfc7c onsuccess: #61: all: [TCWG CI] https://ci.linaro.org/job/tcwg [...]
new fceee1e onsuccess: #62: all: [TCWG CI] https://ci.linaro.org/job/tcwg [...]
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 2312 -> 2320 bytes
02-prepare_abe/console.log.xz | Bin 2592 -> 2600 bytes
03-build_abe-binutils/console.log.xz | Bin 27628 -> 27344 bytes
03-build_abe-binutils/make-binutils.log.xz | Bin 18064 -> 17804 bytes
04-build_abe-stage1/console.log.xz | Bin 74924 -> 75028 bytes
04-build_abe-stage1/make-gcc-stage1.log.xz | Bin 55280 -> 55028 bytes
05-build_abe-qemu/console.log.xz | Bin 34796 -> 34152 bytes
05-build_abe-qemu/make-qemu.log.xz | Bin 23184 -> 22584 bytes
06-build_linux/console.log.xz | Bin 2888 -> 2932 bytes
07-boot_linux/console.log.xz | Bin 504 -> 504 bytes
08-check_regression/console.log.xz | Bin 1196 -> 1196 bytes
git/binutils_rev | 2 +-
git/gcc_rev | 2 +-
git/linux_rev | 2 +-
jenkins/build-name | 2 +-
jenkins/notify-full.log | 301 +++++++++++------------------
jenkins/notify-init.log | 104 ++++------
jenkins/rewrite.log | 27 +--
jenkins/run-build.env | 6 +-
manifest.sh | 4 +-
notify/jira/comments.txt | 2 +-
notify/mail-body.txt | 54 +++---
notify/mail-subject.txt | 2 +-
results | 2 +-
24 files changed, 209 insertions(+), 301 deletions(-)
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unknown user pushed a change to branch master
in repository binutils-gdb.
from 9294a13008b RISC-V: Prohibit combination of 'E' and 'H'
new a303646f175 RISC-V: Add 'Smcntrpmf' extension and its CSRs
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Summary of changes:
bfd/elfxx-riscv.c | 2 ++
gas/config/tc-riscv.c | 9 +++++++
gas/testsuite/gas/riscv/csr-dw-regnums.d | 8 ++++--
gas/testsuite/gas/riscv/csr-dw-regnums.s | 9 +++++--
gas/testsuite/gas/riscv/csr-version-1p10.d | 16 +++++++++---
gas/testsuite/gas/riscv/csr-version-1p10.l | 40 +++++++++++++++++++++++------
gas/testsuite/gas/riscv/csr-version-1p11.d | 16 +++++++++---
gas/testsuite/gas/riscv/csr-version-1p11.l | 40 +++++++++++++++++++++++------
gas/testsuite/gas/riscv/csr-version-1p12.d | 16 +++++++++---
gas/testsuite/gas/riscv/csr-version-1p12.l | 40 +++++++++++++++++++++++------
gas/testsuite/gas/riscv/csr-version-1p9p1.d | 16 +++++++++---
gas/testsuite/gas/riscv/csr-version-1p9p1.l | 40 +++++++++++++++++++++++++++++
gas/testsuite/gas/riscv/csr.s | 10 ++++++--
include/opcode/riscv-opc.h | 16 +++++++++---
14 files changed, 228 insertions(+), 50 deletions(-)
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unknown user pushed a change to branch master
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from 6f94ef6c860 RISC-V: Fix Dynamic LMUL compile option
new 33066c903a6 Generate vmovsh instead of vpblendw for specific vec_merge.
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Summary of changes:
gcc/config/i386/i386-expand.cc | 17 +++++++++++++++
gcc/config/i386/sse.md | 25 ++++++++++------------
.../gcc.target/i386/avx512fp16-vmovsh-1a.c | 2 +-
3 files changed, 29 insertions(+), 15 deletions(-)
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unknown user pushed a change to branch master
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from 292273af370 Automatic date update in version.in
new 9294a13008b RISC-V: Prohibit combination of 'E' and 'H'
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bfd/elfxx-riscv.c | 7 +++++++
gas/testsuite/gas/riscv/march-fail-rv32eh.d | 3 +++
gas/testsuite/gas/riscv/march-fail-rv32eh.l | 2 ++
3 files changed, 12 insertions(+)
create mode 100644 gas/testsuite/gas/riscv/march-fail-rv32eh.d
create mode 100644 gas/testsuite/gas/riscv/march-fail-rv32eh.l
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unknown user pushed a change to branch master
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from 99ec76eb8b0 testsuite: Remove unwanted 'dg-do run' from gcc.dg/vect tests
new 6f94ef6c860 RISC-V: Fix Dynamic LMUL compile option
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Summary of changes:
gcc/config/riscv/riscv-opts.h | 2 +-
gcc/config/riscv/riscv-v.cc | 15 ++++++++-------
2 files changed, 9 insertions(+), 8 deletions(-)
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