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new c43916857c6 RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl
new 86d80395cf3 RISC-V: Revert the convert from vmv.s.x to vmv.v.i
new 3709ca091be RISC-V: Add the missed half floating-point mode patterns of [...]
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Summary of changes:
gcc/config/riscv/iterators.md | 5 +++
gcc/config/riscv/pic.md | 34 ++++++++---------
gcc/config/riscv/predicates.md | 4 ++
gcc/config/riscv/riscv-vsetvl.cc | 17 +++++++++
gcc/config/riscv/vector.md | 43 ++++++++++++++++------
gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-4.c | 11 ++++++
.../gcc.target/riscv/_Float16-zhinxmin-4.c | 11 ++++++
.../autovec/gather-scatter/strided_load_run-1.c | 6 +++
.../gcc.target/riscv/rvv/base/scalar_move-5.c | 20 ++++++++--
.../gcc.target/riscv/rvv/base/scalar_move-6.c | 22 +++++++++--
10 files changed, 137 insertions(+), 36 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zfhmin-4.c
create mode 100644 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-4.c
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