Tcwg-commits June 2023

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5992 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-defconfig updated (0c12bfe98b -> d094c1fa06)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. from 0c12bfe98b onsuccess: #35: boot: [TCWG CI] https://ci.linaro.org/job/tc [...] new d094c1fa06 onsuccess: #36: boot: [TCWG CI] https://ci.linaro.org/job/tc [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 2328 -> 2328 bytes 02-prepare_abe/console.log.xz | Bin 2612 -> 2604 bytes 03-build_abe-binutils/console.log.xz | Bin 27644 -> 28012 bytes 03-build_abe-binutils/make-binutils.log.xz | Bin 17956 -> 18248 bytes 04-build_abe-stage1/console.log.xz | Bin 72428 -> 72436 bytes 04-build_abe-stage1/make-gcc-stage1.log.xz | Bin 52932 -> 53032 bytes 05-build_abe-qemu/console.log.xz | Bin 34408 -> 34432 bytes 05-build_abe-qemu/make-qemu.log.xz | Bin 27032 -> 27016 bytes 06-build_linux/console.log.xz | Bin 3164 -> 3176 bytes 07-boot_linux/console.log.xz | Bin 6088 -> 6088 bytes 08-check_regression/console.log.xz | Bin 448 -> 448 bytes git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/linux_rev | 2 +- git/qemu_rev | 2 +- jenkins/build-name | 2 +- manifest.sh | 28 ++++++++++++++-------------- 17 files changed, 19 insertions(+), 19 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 year, 12 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (c06ab9706e -> 438ccac40f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 in repository toolchain/ci/base-artifacts. discards c06ab9706e onsuccess: #344: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards 7e1bd6c502 force: #343: 0: [TCWG CI] https://ci.linaro.org/job/tcwg_gnu [...] discards 0056943954 force: #342: 0: [TCWG CI] https://ci.linaro.org/job/tcwg_gnu [...] discards fb937bc69b onsuccess: #339: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards e269c656d3 onsuccess: #337: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards 37b2dfccff onsuccess: #336: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards fd6ef733aa onsuccess: #335: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards 98a359f94e onsuccess: #334: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards efabec7399 onsuccess: #333: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards 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That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c06ab9706e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_check_gcc/mas [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 201 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 00-sumfiles/g++.log.xz | Bin 3905060 -> 3889680 bytes 00-sumfiles/gcc.log.xz | Bin 3398652 -> 3403824 bytes 00-sumfiles/gfortran.log.xz | Bin 1135464 -> 1141876 bytes 00-sumfiles/libatomic.log.xz | Bin 2280 -> 2284 bytes 00-sumfiles/libgomp.log.xz | Bin 280536 -> 280320 bytes 00-sumfiles/libitm.log.xz | Bin 2644 -> 2648 bytes 00-sumfiles/libstdc++.log.xz | Bin 481444 -> 475808 bytes 01-reset_artifacts/console.log.xz | Bin 2204 -> 2380 bytes 02-prepare_abe/console.log.xz | Bin 2632 -> 2604 bytes 03-build_abe-binutils/console.log.xz | Bin 36872 -> 36436 bytes 03-build_abe-binutils/make-binutils.log.xz | Bin 24540 -> 24644 bytes 04-build_abe-gcc/console.log.xz | Bin 210212 -> 210168 bytes 04-build_abe-gcc/make-gcc-stage2.log.xz | Bin 176020 -> 176836 bytes 05-clean_sysroot/console.log.xz | Bin 340 -> 340 bytes 06-build_abe-linux/console.log.xz | Bin 9004 -> 9020 bytes 07-build_abe-glibc/console.log.xz | Bin 243600 -> 242892 bytes 07-build_abe-glibc/make-glibc.log.xz | Bin 197912 -> 197984 bytes 08-build_abe-gdb/console.log.xz | Bin 35304 -> 36236 bytes 08-build_abe-gdb/make-gdb.log.xz | Bin 27076 -> 27252 bytes 09-build_abe-dejagnu/console.log.xz | Bin 4300 -> 4312 bytes 09-build_abe-dejagnu/make-dejagnu.log.xz | Bin 580 -> 580 bytes 10-build_abe-check_gcc/check-gcc.log.xz | Bin 63524 -> 60444 bytes 10-build_abe-check_gcc/console.log.xz | Bin 7848 -> 7956 bytes 11-check_regression/console.log.xz | Bin 1548 -> 1104 bytes 11-check_regression/results.compare2 | 52 ++++------------------------- git/binutils_rev | 2 +- git/gdb_rev | 2 +- git/glibc_rev | 2 +- git/linux_rev | 2 +- jenkins/build-name | 2 +- manifest.sh | 29 ++++++++-------- sumfiles/g++.sum | 2 +- sumfiles/gcc.sum | 2 +- sumfiles/gfortran.sum | 2 +- sumfiles/libatomic.sum | 2 +- sumfiles/libitm.sum | 2 +- 36 files changed, 32 insertions(+), 69 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 year, 12 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (760f05a540 -> 7116a4476e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. from 760f05a540 onsuccess: #27: all: [TCWG CI] https://ci.linaro.org/job/tcw [...] new 7116a4476e onsuccess: #28: all: [TCWG CI] https://ci.linaro.org/job/tcw [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 2324 -> 2320 bytes 02-prepare_abe/console.log.xz | Bin 2632 -> 2608 bytes 03-build_abe-binutils/console.log.xz | Bin 27504 -> 27512 bytes 03-build_abe-binutils/make-binutils.log.xz | Bin 17812 -> 17832 bytes 04-build_kernel_llvm/console.log.xz | Bin 65080 -> 65576 bytes 05-build_abe-qemu/console.log.xz | Bin 35468 -> 35376 bytes 05-build_abe-qemu/make-qemu.log.xz | Bin 27976 -> 27760 bytes 06-build_linux/console.log.xz | Bin 3056 -> 3476 bytes 07-boot_linux/console.log.xz | Bin 496 -> 496 bytes 08-check_regression/console.log.xz | Bin 448 -> 448 bytes git/binutils_rev | 2 +- git/linux_rev | 2 +- git/llvm_rev | 2 +- git/qemu_rev | 2 +- jenkins/build-name | 2 +- manifest.sh | 28 ++++++++++++++-------------- 16 files changed, 19 insertions(+), 19 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 year, 12 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_binutils/master-aarch64 updated (b8bf90bd62 -> c8481f58e1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_binutils/master-aarch64 in repository toolchain/ci/base-artifacts. discards b8bf90bd62 onsuccess: #262: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards accf19a6a5 onsuccess: #261: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards 002822dfc1 onsuccess: #260: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards 352555b900 onsuccess: #259: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards cbebccf3f3 onsuccess: #258: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards d8d82b93bf onsuccess: #257: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards dfcd8954f7 onsuccess: #256: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards f28dcac09b onsuccess: #255: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] discards 4d89c7318b onsuccess: #254: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] 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That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b8bf90bd62) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_check_binutils [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 101 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 00-sumfiles/binutils.log.xz | Bin 62680 -> 62720 bytes 00-sumfiles/gas.log.xz | Bin 150828 -> 150748 bytes 00-sumfiles/ld.log.xz | Bin 108464 -> 108524 bytes 01-reset_artifacts/console.log.xz | Bin 2452 -> 2448 bytes 02-prepare_abe/console.log.xz | Bin 2628 -> 2668 bytes 03-build_abe-binutils/console.log.xz | Bin 28304 -> 28056 bytes 03-build_abe-binutils/make-binutils.log.xz | Bin 18156 -> 17788 bytes 04-build_abe-stage1/console.log.xz | Bin 73924 -> 72392 bytes 04-build_abe-stage1/make-gcc-stage1.log.xz | Bin 53092 -> 52852 bytes 05-clean_sysroot/console.log.xz | Bin 364 -> 364 bytes 06-build_abe-linux/console.log.xz | Bin 8968 -> 8696 bytes 07-build_abe-glibc/console.log.xz | Bin 245296 -> 243428 bytes 07-build_abe-glibc/make-glibc.log.xz | Bin 195044 -> 195032 bytes 08-build_abe-stage2/console.log.xz | Bin 209608 -> 206060 bytes 08-build_abe-stage2/make-gcc-stage2.log.xz | Bin 174064 -> 173580 bytes 09-build_abe-gdb/console.log.xz | Bin 35748 -> 35404 bytes 09-build_abe-gdb/make-gdb.log.xz | Bin 27164 -> 26580 bytes 10-build_abe-qemu/console.log.xz | Bin 35880 -> 35904 bytes 10-build_abe-qemu/make-qemu.log.xz | Bin 28088 -> 28156 bytes 11-build_abe-dejagnu/console.log.xz | Bin 4344 -> 4348 bytes 11-build_abe-dejagnu/make-dejagnu.log.xz | Bin 584 -> 584 bytes 12-build_abe-check_binutils/check-binutils.log.xz | Bin 5076 -> 5080 bytes 12-build_abe-check_binutils/console.log.xz | Bin 3136 -> 3428 bytes 13-check_regression/console.log.xz | Bin 1084 -> 1084 bytes 13-check_regression/results.compare2 | 6 ++-- git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/gdb_rev | 2 +- git/linux_rev | 2 +- jenkins/build-name | 2 +- manifest.sh | 34 +++++++++++----------- sumfiles/binutils.sum | 2 +- sumfiles/gas.sum | 4 +-- sumfiles/ld.sum | 2 +- 34 files changed, 29 insertions(+), 29 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 year, 12 months

[linux] branch master updated (007034977130 -> dad9774deaf1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository linux. from 007034977130 Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linu [...] new 13bb06f8dd42 tick/common: Align tick period during sched_timer setup new dad9774deaf1 Merge tag 'timers-urgent-2023-06-21' of git://git.kernel.o [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: kernel/time/tick-common.c | 13 +------------ kernel/time/tick-sched.c | 13 ++++++++++++- 2 files changed, 13 insertions(+), 13 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 year, 12 months

[gcc] branch master updated (1c1dd396257 -> ce47d3c2cf5)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 1c1dd396257 c-family: implement -ffp-contract=on new ce47d3c2cf5 function: Change return type of predicate function from int [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/function.cc | 77 +++++++++++++++++++++++++++------------------------------ gcc/function.h | 10 ++++---- 2 files changed, 42 insertions(+), 45 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 year, 12 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gdb_check/master-arm updated (75a3793a3d -> 42e86777fb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gdb_check/master-arm in repository toolchain/ci/base-artifacts. from 75a3793a3d force: #55: 0: [TCWG CI] https://ci.linaro.org/job/tcwg_gdb_ [...] new 42e86777fb force: #58: 0: [TCWG CI] https://ci.linaro.org/job/tcwg_gdb_ [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 00-sumfiles/gdb.log.xz | Bin 104 -> 104 bytes 01-reset_artifacts/console.log.xz | Bin 2144 -> 2140 bytes 02-prepare_abe/console.log.xz | Bin 2624 -> 2656 bytes 03-build_abe-gdb/console.log.xz | Bin 49716 -> 48192 bytes 03-build_abe-gdb/make-gdb.log.xz | Bin 38668 -> 38356 bytes 04-build_abe-dejagnu/console.log.xz | Bin 4344 -> 4316 bytes 04-build_abe-dejagnu/make-dejagnu.log.xz | Bin 588 -> 588 bytes .../check-gdb.log.xz | Bin 115440 -> 115360 bytes .../console.log.xz | Bin 4212 -> 4180 bytes 06-check_regression/console.log.xz | Bin 1056 -> 1056 bytes 06-check_regression/results.compare2 | 6 +++--- jenkins/build-name | 2 +- manifest.sh | 6 +++--- 13 files changed, 7 insertions(+), 7 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 year, 12 months

[gcc] branch devel/gccgo updated (6612f4f8cb9 -> 97e31a0a2a2)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/gccgo in repository gcc. from 6612f4f8cb9 Merge from trunk revision aa8f4242efc99f24de73c59d53996f28d [...] adds 91293ffb6af c++: alias ctad refinements [PR109321] adds c9954996cd6 tree-optimization/109154 - improve if-conversion for vectorization adds 8dd57939c20 tree-ssa-math-opts: Move PROP_gimple_opt_math from sincos p [...] adds 36330e2e955 ipa/106124 - ICE with -fkeep-inline-functions and OpenMP adds 7fd1d28d243 tree-optimization/109327 - forwprop stmt removal issue adds ad32fcb8e91 scan generic vector tests before lowering adds 86efc490ab8 tree-optimization/109331 - make sure to clean up the CFG af [...] adds 8b2766e87db configure: deprecate --enable-link-mutex option adds b2f327b9be8 RISC-V: Add Z*inx imcompatible check in gcc adds 3be4e43a6a0 PR modula2/109336 - The -fmod= and -fdef= options do not work adds 68982b98d2a CRIS: Make rtx-cost 0 for many CONST_INT "quick" operands adds 14f50ba0540 libstdc++: Enforce requirements on template argument of std [...] adds 31a90971201 libstdc++: Use std::remove_cv_t in std::optional::transform [...] adds ce39714a1ce libstdc++: Apply small fix from LWG 3843 to std::expected adds e0d77144aaa libstdc++: Fix constexpr functions in <experimental/internet> adds ee122a2eeae libstdc++: Fix filename of new test [PR109242] adds 00908886569 Daily bump. adds 3588c8cbc10 Generate vpblendd instead of vpblendw for V4SI under AVX2. adds a7df3bea9cf Fix fc-prototypes usage with C_INT64_T and non LP64 Targets. adds ee6ae8cb479 c++: Avoid informs without a warning [PR109278] adds 1d0ba4467dd tree-optimization/109342 - wrong code with edge equivalences in VN adds 04b0a7b1a6d tree-optimization/107561 - reduce -Wstringop-overflow false [...] adds a23b33a1bde c++: lambda mangling alias issues [PR107897] adds 429a7a88438 Add recursive GORI recompuations with a depth limit. adds c016887c91a c++: Fix up ICE in build_min_non_dep_op_overload [PR109319] adds 83d2b1ccd17 libiberty: Remove a reference to the Glibc manual adds 85131af0603 c++: generic lambda and function ptr conv [PR105221] adds 58df5350753 c++: anonymous union member reference [PR105452] adds d20a6a3311b Daily bump. adds fe42e7fe119 Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns [...] adds 65dd42d2c3d c-c++-common/Warray-bounds.c: Fix excess warnings on LLP64 adds 5de5e977aa0 Adjust memory_move_cost for MASK_REGS when MODE_SIZE > 8. adds 608388486a5 RISC-V: Fix missing file dependency in RISC-V back-end [PR109328] adds 79d1e0b2c2b c++tools: Fix Makefile to properly clean and rebuild [PR101834] adds e02c9d9116f range-op-float, value-range: Fix up handling of UN{LT,LE,GT [...] adds 10e573e86c6 libstdc++: Revert addition of boolean flag to net::ip::basi [...] adds a35e8042fbc libstdc++: Avoid -Wmaybe-uninitialized warning in std::stop [...] adds e9910e002d6 LRA: Implement commutative operands exchange for combining [...] adds 1e1b30a6a49 Adjust testcases to not produce errors.. adds 92f02e754ca testsuite, analyzer: Fix up pipe-glibc.c testcase [PR107396] adds 4969dcd2b7a libstdc++: Teach optimizer that empty COW strings are empty [...] adds e11cde0381c Daily bump. adds fc4cde2e6aa c++,coroutines: Stabilize names of promoted slot vars [PR101118]. adds b1f6cb2cc3a aarch64, builtins: Include PR registers in FUNCTION_ARG_REG [...] adds 87d3bc53b17 testsuite: Add testcase for already fixed PR [PR109362] adds 5fe05ffefd2 range-op-float: Further comparison fixes adds 69044e11ac5 range-op-float: Further foperator_{,not_}equal::fold_range fix adds b06464c7fb0 Change "long_double" into "long double" for C prototypes fr [...] adds b5e38b1c166 c++: improve "NTTP argument considered unused" fix [PR53164 [...] adds a5de246535d c++: NTTP constraint depending on outer parms [PR109160] adds 236cde7202a Daily bump. adds db4f7a9b47d RISC-V: Fix ICE and codegen error of scalar move in RV32 system. adds 802ab7d0db5 RISC-V: Fix reload fail issue on vector mac instructions adds 1719fa40c4e libiberty: Make strstr.c in libiberty ANSI compliant adds 5bb27a1bb2f PR modula2/109336 pass -fmod= though and build m2/stage2/cc [...] adds e35503833c0 Skip gnat.dg/prot7.adb on hppa. adds 8f989fe879d Fix gnat.dg/opt39.adb on hppa. adds 5f10c7f2d85 Daily bump. adds b551ea37994 Document signbitm2. adds 0580ea4b7a6 rs6000: Modify test case after mode promotion disabled adds 63e95a83ced RISC-V: Fix typo adds 2a0c4a1c5b9 Added item entry in docs for the new check_effective_target. adds 9fd6d83a4c9 param: document ranger-recompute-depth adds b0248580b68 build: Check that -lzstd can be linked adds da3fd017572 ipa: Avoid constructing aggregate jump functions with huge [...] adds 9a75f0a02e5 PR modula2/109388 clang warnings related to Modula-2 adds 78b8eda0a93 Update gcc sv.po adds c37ed38ada7 c++: ICE with loopy var tmpl auto deduction [PR109300] adds 10bdf6968e2 Daily bump. adds 59b4a555c3f doc: md.texi (Insn Splitting): Tweak wording for readability. adds 0dfbb28a954 c++: friend template matching [PR107484] adds cdd2d6643f7 rs6000: Fix vector parity support [PR108699] adds d634e6088f1 rs6000: Fix vector_set_var_p9 by considering BE [PR108807] adds d0b961b802d tree-optimization/109304 - properly handle instrumented aliases adds 7735b117bcd config: -pthread shouldn't link with -lpthread on Solaris adds 840354060e2 riscv: Fix bootstrap [PR109384] adds 34574064412 amdgcn: Add 64-bit vector not adds 688d126b692 libstdc++: Fix outdated docs about demangling exception messages adds 3f0ca7a3e44 arm: Fix vcreate definition adds c1aca26b707 sanitizer: missing signed integer overflow errors [PR109107] adds ce243c9eefc range-op-float: Fix reverse ops of comparisons [PR109386] adds c57a93f6475 Fortran: reject module variable as character length in PARA [...] adds cd5dea63a67 Regenerate gcc.pot adds 099515c7b79 doc: md.texi (Including Patterns): Fix page break adds 645b1362516 Daily bump. adds 4f81edad41c RISC-V: Fix typos adds fdc5abbdcfb [PATCH] RISC-V: Fix PR109399 VSETVL PASS bug adds 44e17b8d899 libstdc++: Define std::sub_match::swap member function (LWG 3204) adds ce1e682ca21 [PATCH] RISC-V: Fix SEW64 of vrsub.vx runtime fail in RV32 system adds f0f372fab3e ipa: Avoid another ICE when dealing with type-incompatibili [...] adds ddb0f66e6c1 Add assember CFI directives to millicode division and remai [...] adds 4a45f5d6a9b [RFA][Bug target/108892 ][13 regression] Force re-recogniti [...] adds 85cefbc66e7 Fix 22_locale/locale/cons/12658_thread-2.cc on hppa. adds 9d63ce7c4c0 libstdc++: Harmonize <version> and other headers adds 6f0d67b9129 libstdc++: Add a test for <version> FTM redefinitions adds bff26ac1627 libstdc++: Downgrade DEBUG to ASSERTIONS when !HOSTED adds 3bfd0420e4a libstdc++: Fix some freestanding test failures adds 1bd13193fab PR modula2/109423 cc1gm2 ICE if an INCL or EXCL is performe [...] adds 5229788da72 Daily bump. adds 673a2a6445a testsuite: fix proc unsupported overriding in modules.exp [ [...] adds 0f816116356 Fix typo in -param=vect-induction-float= attributes adds 804208a2ab8 [testsuite] enable -maltivec like vect_int for signbit-2.c adds 939fb3fffeb MAINTAINERS: Add myself as CTF and BTF reviewer adds f66b135d0b5 gccrs: fatal_error_flag: Fix typo in error message adds 776ff053800 gccrs: unsafe: check use of `target_feature` attribute adds d9e05700ac3 gccrs: Check for mutable references in const functions adds ef792b9658d gccrs: rust: add bound parsing in parse_generic_arg. adds e1394230b3f gccrs: Implement declarative macro 2.0 parser adds 3f1dbb2cf8f gccrs: Add name resolution to generic argument associated i [...] adds 7eab9d18d97 gccrs: Support associated type bound arguments adds 364f4cd3072 gccrs: Reuse TypeCheckPattern on LetStmt's adds 8e2abbef4cc gccrs: Add get_locus function for abstract class MetaItemInner. adds 86f8e47f9df gccrs: diagnostics: Add underline for tokens in diagnostics. adds 881ed7fb273 gccrs: Change how CompileVarDecl outputs Bvariable's adds 60affc3a1c5 gccrs: testsuite: Handle Windows carriage returns properly adds 910e7e0a958 gccrs: Support GroupedPattern during name resolution adds cb42610bfba gccrs: Do not crash on empty macros expand. Fixes #1712 adds 93fcadd208a gccrs: Add HIR lowering for GroupedPattern adds d5a303cc664 gccrs: Add get_item method for HIR::GroupedPattern adds 83e5f634d74 gccrs: Add type resolution for grouped patterns adds 221650c280c gccrs: Added missing GroupedPattern visitors for code generation adds 9b19e93873c gccrs: Rename file rust-ast-full-test.cc to rust-ast.cc adds d6cb04bf5c0 gccrs: moved operator.h to util/rust-operators.h adds 760f529d813 gccrs: fixed compiler error message on wildcard pattern wit [...] adds 8e7e682a9f8 gccrs: fixed indentations in AST pretty expanded dump of trait adds 51b607c2227 gccrs: macro: Allow builtin `MacroInvocation`s within the AST adds ad9d75f5080 gccrs: Create and use CompilePatternLet visitor for compili [...] adds 9cbd270632b gccrs: parser: Allow parsing multiple reference types adds 2dab57c3f2f gccrs: Move rust-buffered-queue.h to util folder #1766 adds fd7358af3cf gccrs: Improve GroupedPattern lowering adds 95efd84db13 gccrs: Remove HIR::GroupedPattern adds 0e4bf6e7fc4 gccrs: Optimize HIR::ReferencePattern adds 86f53e5853d gccrs: Implement lowering ReferencePattern from AST to HIR adds 2af66ebd1d8 gccrs: parser: Improve parsing of complex generic arguments adds 7f5144d1c96 gccrs: parser: Fix parsing of closure param list adds 476faea3563 gccrs: Add support for feature check. adds 4141941ae7b gccrs: Removed comment copy-pasted from gcc/tree.def adds 8d1d08cdbcf gccrs: Add another test case for passing associated type-bounds adds c1b1bbbc645 gccrs: Move TypePredicateItem impl out of the header adds 688fccb5227 gccrs: Refactor TyVar and TypeBoundPredicates adds e42118c327f gccrs: Refactor SubstitutionRef base class into its own CC file adds 6abbfb5280f gccrs: Refactor all substitution mapper code implementation [...] adds d73082efece gccrs: Refactor BaseType, InferType and ErrorType impl into [...] adds 26af4b0604d gccrs: Refactor PathProbe into cc file adds 547e511fbdd gccrs: Refactor PathProbeType code into CC file adds 615ee14c08e gccrs: Refactor all code out of the rust-tyty.h header adds 6c4fa22d384 gccrs: Rename rust-tyctx.cc to rust-typecheck-context.cc adds 1019fd6337b gccrs: Rename header rust-hir-trait-ref.h to rust-hir-trait [...] adds dcb2e571ac6 gccrs: Refactor handle_substitutions to take a reference adds 2f228578d56 gccrs: Clear the substitution callbacks when copying Argume [...] adds 31f1e59962b gccrs: Add missing param subst callback adds e42c28bcfdd gccrs: Remove monomorphization hack to setup possible assoc [...] adds 68d671ac725 gccrs: Refactor the type unification code adds 2a2e6712ba0 gccrs: Fix nullptr dereference adds f62dcf2c65a gccrs: Add missing Sized, Copy and Clone lang item mappings adds 9754a60623c gccrs: Fix higher ranked trait bounds computation of self adds 11150b7c05c gccrs: Remove bad error message on checking function arguments adds eb4a61ac1ba gccrs: Add general TypeBounds checks adds fa7b3a2f07f gccrs: Add support for TuplePattern in let statements adds 1c57244dbc0 gccrs: rust-item: include rust-expr.h adds f548ddee96a gccrs: parser: Expose parse_macro_invocation as public API adds 2d30e0b882f gccrs: expansion: Add `get_token_slice` to `MacroInvocLexer` class adds 3821669164d gccrs: macros: Perform macro expansion in a fixed-point fashion. adds fbd5244df6b gccrs: expander: Add documentation for `expand_eager_invocations` adds 5fd04425c09 gccrs: typecheck: Refactor rust-hir-trait-reference.h adds f64799a567e gccrs: cli: Update safety warning message adds b4229fb086b gccrs: Update copyright years. adds fd5eb9f2b01 gccrs: Add feature gate for "rust-intrinsic". adds a9d72ef2d03 gccrs: Add variadic argument type checking adds 8a9886a85ea gccrs: Add test adds e81f5be60d1 gccrs: Simplify WildcardPattern let statement handling adds b56d093e952 gccrs: lex: Prevent directories in RAIIFile adds 7b00a80c9df gccrs: testsuite: Add empty string macro test adds 20529dff93f gccrs: Add support for parsing empty tuple patterns. adds fd406fc7046 gccrs: Implemented UTF-8 checking for include_str!() adds c627781b8f6 gccrs: Extract query_type from TypeCheckBase to be a simple extern adds e90d06c5447 gccrs: Add new virtual function HIR::ImplItem::get_impl_item_name adds 4b25fc15b92 gccrs: Support for Sized builtin marker trait adds a11b44b6a57 gccrs: Fix regression in testcase adds ecdce2bf17a gccrs: Add trailing newline adds 8b0ed2387a5 gccrs: builtins: Return empty list of tokens instead of nullptr adds 6774d569c61 gccrs: Fix formatting adds 8628486f487 gccrs: Add AST::AltPattern class adds 0ec543c7c61 gccrs: Fix up DejaGnu directives in 'rust/compile/issue-183 [...] adds 1a58da7c2d8 gccrs: rename rust-hir-full-tests.cc adds 3b342e11627 gccrs: add test case to show our query-type system is working adds fa7675df86a gccrs: ast: Refactor TraitItem to keep Location info adds 2785d591116 gccrs: diagnostic: Refactor Error class adds f2d6ab839ce gccrs: Added AST Node AST::InlineAsm adds 990ae497b86 gccrs: Address unsafe with/without block handling ambiguity adds d2a499a9881 gccrs: Fix issue with parsing unsafe block expression statements adds 7f056d5f4a0 Check if dependency is valid before using in may_recompute_p. adds ddc9b5ee13c arm: mve: fix auto-inc generation [PR107674] adds 1d509f19039 arm: remove unused variables from test adds a8c8351cf4f Daily bump. adds f189c4ab489 [testsuite] [ppc] skip ppc-fortran if fortran is disabled adds f22c12d7361 mime: remove test ordering dependency adds d8ec34a162d Daily bump. adds 46fe32cb4d8 Fortran: Fix dg directives and remove trailing whitespaces [...] adds eac493851f0 Fortran: Fix some of the bugs in associate [PR87477] adds c18b1b0bc78 riscv: Fix genrvv-type-indexer dependencies adds 79fb2de020c PR target/109402: v850 (not v850e) variant of __muldi3() mo [...] adds 48a48c5e011 Fix gcc.dg/long_branch.c on hppa. adds a99f6c7f0ba xfail gcc.dg/long_branch.c on hppa. adds 101380a8394 PR tree-optimization/109392 adds 0f04ebb4946 Daily bump. adds a8d7631d333 c++, coroutines: Fix block nests when the function has no t [...] adds 14a864ae5d9 Daily bump. adds efa6a82b978 Support Intel AMX-COMPLEX adds afa87bd5f7b i386: Add AMX-COMPLEX to Granite Rapids adds 725bcdeec60 Do not generate vmaddfp and vnmsubfp adds 5f9a13a157f Daily bump. adds a213e2c9653 rs6000: correct vector sign extend builtins on Big Endian adds 58c8c1b383b if-conv: Restore MASK_CALL conversion [PR108888] adds cb06a507073 driver: drop flag_var_tracking_assignments flag adds b8e32978e3d gfortran.dg/gomp/affinity-clause-1.f90: Fix scan-tree-dump adds 40fc8e3d4f6 RISC-V: Fix regression of -fzero-call-used-regs=all [PR109104] adds 0c5e64c4249 RISC-V: avoid splitting small constant in <or_optab>i<mode> [...] adds 6daf3e9f9e4 Daily bump. adds e2073672aec Update gcc sv.po adds 5582ad0afb0 testsuite: Adjust powerpc pr83677.c for BE [PR108815] adds 6e3e708dbad tree-optimization/109434 - bogus DSE of throwing call LHS adds 2d7ad38707e tree-optimization/109469 - SLP with returns-twice region start adds c482995cc5b Fortran: resolve correct generic with TYPE(C_PTR) arguments [...] adds 2273fd5a6fd Fortran: fix functions with entry and pointer/allocatable r [...] adds df7f55cb2ae tree-optimization/109473 - ICE with reduction epilog adjustment op adds 88ed90187ff libstdc++: Update tzdata to 2023c adds 9f10b4957ca libstdc++: Initialize all members of basic_endpoint union [ [...] adds 24af552876e Don't use ANY PHI equivalences in range-on-entry. adds 14f0ea22413 testsuite: Add testcase for recently fixed PR [PR109462] adds 56529056cb4 c++: Fix Solaris bootstraps across midnight adds 3beeebd6934 mingw: Support building with older gcc versions adds 4073ce2c4e5 i386: Fix up z operand modifier diagnostics on inline-asm [ [...] adds 51856718a82 reassoc: Fix up another ICE with returns_twice call [PR109410] adds 31eb8f18bbe RISC-V: Fix supporting data type according to RVV ISA. [PR109479] adds ae8f903632c libstdc++: Fix chunk_by_view when value_type& and reference [...] adds e5656d27b8b Update gcc .po files adds 13669111e72 libstdc++: Ensure headers used by fast_float are included adds aa65771427d libstdc++: Implement LWG 3904 change to lazy_split_view's iterator adds 0f3b4d38d4b libstdc++: Implement ranges::enumerate_view from P2164R9 adds d339e9802f7 Update gcc de.po adds 25264f6b3a7 libstdc++: Fix some AIX test failures adds adda0e28872 libstdc++: Document libstdc++exp.a library for -fcontracts adds 66c7257b675 Daily bump. adds a37783de23c tree-optimization/109491 - ICE in expressions_equal_p adds 66946624b96 aarch64: Don't trust TYPE_ALIGN for pointers [PR108910] adds a1afdc6e2aa PR modula2/109496 Fix constant char parameter passing to an [...] adds 52bb22bb5e1 PR modula2/109488 Typo in lang.opt: libraries maybe adds 9c2a5db9974 Ensure PHI equivalencies do not dominate the argument edge. adds fdb8c06b3d6 c++: make cxx_incomplete_type_diagnostic return bool adds f32f7881fb0 c++: make trait of incomplete type a permerror [PR109277] adds 50dc52e853f c++: 'typename T::X' vs 'struct T::X' lookup [PR109420] adds 43816633afd Fortran: call of overloaded ‘abs(long long int&)’ is ambigu [...] adds 48d0244b605 Daily bump. adds edc6659c97c testsuite: filter out warning noise for CWE-1341 test adds 2134fcfee8b loop-iv: Fix up bounds computation adds 9d1a6119590 combine: Fix AND handling for WORD_REGISTER_OPERATIONS targ [...] adds 040e64b09d4 Fix vect-simd-clone testcase dump scanning adds bf24f2db284 tree-optimization/109502 - vector conversion between mask a [...] adds b0e85485fbf Fortran: Fix an excess finalization during allocation [PR104272] adds 6a9547f3ca6 libstdc++: Improve diagnostics for invalid std::format calls adds a87d95def0d vect-simd-clone testcase adjustments adds 7639bf34fa1 libstdc++: Implement ranges::fold_* from P2322R6 adds 2ab0d83e888 libstdc++: Move down definitions of ranges::cbegin/cend/cetc adds 0d94c6df183 libstdc++: Implement P2278R4 "cbegin should always return a [...] adds 94a21e008c4 Fix build failure of Ada runtime for Aarch64 targets adds fa4cb42870d Fortran: fix compile-time simplification of SET_EXPONENT [P [...] adds 1aee19f9b57 Daily bump. adds 9964df74a9e -Wdangling-pointer: fix MEM_REF handling [PR109514] adds 86b31d583a3 rs6000: don't expect __ibm128 with 64-bit long double [PR99708] adds de0ee9d1416 if-conv: Small improvement for expansion of complex PHIs [P [...] adds 13669741e67 c++: constexpr aggregate destruction [PR109357] adds 4f1c5e54d78 Fix handling of large arguments passed by value. adds 2e2b6ec156e Fix fallout of previous change on x86/Linux adds 55085c7e3c9 Daily bump. adds f006d1a5a1e [Committed] New test case gcc.target/avr/pr54816.c adds a647198fcf7 [committed] [PR target/109508] Adjust conditional move expa [...] adds a167416a239 Daily bump. adds 0c4d366ef75 RISC-V: Add test cases for the RVV mask insn shortcut. adds 2e6b57196dd RISC-V: Fix testsuite fail on RV32 adds a1f25e04b8d testsuite: update builtins-5-p9-runnable.c for BE adds f66ae49bba7 tree-optimization/109524 - ICE with VRP edge removal adds 7ec03c41de3 testsuite: Fix up vect-simd-clone-1[678]f.c tests some more adds f200c56787f aarch64: disable LDP via tuning structure for -mcpu=ampere1 adds 8e08c7886ee ipa: Fix double reference-count decrements for the same edg [...] adds 48f0f297774 Bump BASE-VER. adds 2a7f0eb7340 ada: bump Library_Version to 14. adds f46ab321399 Update crontab and git_update_version.py adds 0ccf520d349 RISC-V: Optimze the reverse conditions of rotate shift adds a782346757c RISC-V: add a new parameter in riscv_first_stack_step. adds 8c010f6fe5e RISC-V: Clean up the pr106602.c testcase adds e6b050da8a4 RISC-V: Set the ABI for the RVV tests adds c16848ed8f3 RISC-V: Force ilp32d for the T-Head FMV test adds e11533e2f3d Do not export global ranges from -Walloca pass. adds 6d4ad4cca5d PHIOPT: Remove gate_hoist_loads prototype adds 60524be1e39 RISC-V: optimize stack manipulation in save-restore adds 2245459c85a c++: bound ttp level lowering [PR109531] adds 3f0f4e0fa0b RISC-V: make the stack manipulation codes more readable. adds 56b288f5081 Daily bump. adds 5015cdf3155 LoongArch: Add built-in functions description of LoongArch [...] adds d2ee685f6fa LoongArch: Remove the definition of the macro LOGICAL_OP_NO [...] adds 027a94b0075 Constify invariant fields of vrange and irange. adds d5904f356ce Add two new methods to Value_Range. adds e722a1f42b2 libsanitizer, darwin: Unsupport Darwin >= 22 for now. adds 603fc926fee LoongArch: Optimize additions with immediates adds 5baf2cccd03 Abstract out calculation of max HWIs per wide int. adds 6e552ec218a Abstract out REAL_VALUE_TYPE streaming. adds 2349e691253 match.pd: Improve fneg/fadd optimization [PR109240] adds 4204ed2dc74 RISC-V: Adjust the parsing order of extensions to be consis [...] adds 2d70f3213fe aarch64: Add QI -> HI zero-extension for LDAPR adds ebaec582ca1 aarch64: Give hint for -mcpu options that match -march instead adds cfdc45f73c5 amdgcn: HardFP divide adds 4ec4ceafcc0 libstdc++: Fix typo in views::as_const's operator() [PR109525] adds 95525c5b8c2 libstdc++: Adding missing feature-test macros for C++23 ran [...] adds cb5c71d16d0 libstdc++: Implement range_adaptor_closure from P2387R3 [PR108827] adds fdbaab2dc88 tree-optimization/109539 - restrict PHI handling in access [...] adds 4d747ea3a4e Add inchash support for vrange. adds 10e481b154c Return true from operator== for two identical ranges contai [...] adds fc8eaf42393 Fixed typo. adds 8b271f6069d aarch64: Use intrinsic flags information rather than hardco [...] adds 278f8f567b5 RAII auto_mpfr and autp_mpz adds 19cb965e9d1 Declare dconstm0 to go along with dconst0 and friends. adds 18e78844e78 aarch64: Use standard RTL codes for __rev16 intrinsic expansion adds decd9de4506 PHIOPT: small cleanup in match_simplify_replacement adds 52948982567 PHIOPT: add folding/simplification detail to the dump adds 2b53ac39bce Shrink points-to analysis dumps when not dumping with -details adds f548ece7abc middle-end/108786 - add bitmap_clear_first_set_bit adds 14c1a8dfa3e Docs: Add doc for RISC-V vector intrinsics adds b7c54e3f480 libstdc++: Export global iostreams with GLIBCXX_3.4.31 symv [...] adds b8031711654 constraint: fix relaxed memory and repeated constraint handling adds 1e29f9063b0 Add GTY support for vrange. adds 6067ae4557a libstdc++: Fix preprocessor condition in linker script [PR108969] adds 95b99e47f4f i386: Improve permutations with INSERTPS instruction [PR94908] adds 9874ceed091 Add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and [...] adds c9d7fbdf3e7 vect: Verify that GET_MODE_UNITS is greater than one for ve [...] adds 403779a7d65 gcc: Drop obsolete INCLUDE_PTHREAD_H adds 6c11d30799f PHIOPT: Move tree_ssa_cs_elim into pass_cselim::execute. adds 2f7e7bfa3c6 Add -gcodeview option adds 675b1a7f113 ifcvt.cc: Prevent excessive if-conversion for conditional moves adds 3eeb4801d6f doc: remove stray @gol adds b153f4e4cae libstdc++: Adjust uses of null pointer constants in docs adds d5cd3eada41 Daily bump. adds 727be65ec40 Check hard_regno_mode_ok before setting lowest memory move [...] adds cbddd574a78 install.texi: Document --enable-decimal-float for AArch64 adds 794ffdb0fb6 testsuite: Fix up pr109524.C for -std=c++23 [PR109524] adds 8f81100115f rtl-optimization/109237 - speedup bb_is_just_return adds 675ac8822b5 rtl-optimization/109237 - quadraticness in delete_trivially [...] adds 136330bf637 aarch64: PR target/108840 Simplify register shift RTX costs [...] adds 2c7bf8036df [aarch64] Use wzr/xzr for assigning 0 to vector element. adds 76f44fbfea1 dse: Use SUBREG_REG for copy_to_mode_reg in DSE replace_rea [...] adds ade0a1ee5c6 tree-vect-patterns: Improve __builtin_{clz,ctz,ffs}ll vecto [...] adds 9bc407c7877 aarch64: Delete __builtin_aarch64_neg* builtins and their use adds 2c800ed8d59 Simplify gimple_assign_load adds 01e79e21bbb Avoid unnecessary epilogues from tree_unroll_loop adds 81c6501445f LoongArch: Improve GAR store for va_list adds 6d7e0bcfa49 LoongArch: Improve cpymemsi expansion [PR109465] adds a243ce2a52a tree-optimization/44794 - avoid excessive RTL unrolling on [...] adds 7838574b5ac Avoid non-unified nodes on the topological sorting for PTA solving adds 9d218c45e31 Remove senseless store in do_sd_constraint adds 8366e6764e1 Fix do_sd_constraint escape special casing adds 6702fdcdf8b Remove special-cased edges when solving copies adds a6e4b81b12e Revert "libstdc++: Fix preprocessor condition in linker scr [...] adds fac24d43e68 Revert "libstdc++: Export global iostreams with GLIBCXX_3.4 [...] adds 210617b53ee Transform more gmp/mpfr uses to use RAII adds 4c9f8cd6943 Fix pointer sharing in Value_Range constructor. adds 258aecd7021 Introduce VIRTUAL_REGISTER_P and VIRTUAL_REGISTER_NUM_P predicates adds 1da16c1141e Remove odd code from gimple_can_merge_blocks_p adds 2cef0d0964d Split out solve_add_graph_edge adds 57aecdbc118 Use solve_add_graph_edge in more places adds a30078d5d97 aarch64: Factorise widening add/sub high-half expanders wit [...] adds 0df6d181230 i386: Emit compares between high registers and memory adds 978e8f02e8e RISC-V: Align IOR optimization MODE_CLASS condition to AND. adds 9fdea28d6ac RISC-V: Support 128 bit vector chunk adds ed32ec26697 c++: fix 'unsigned __int128_t' semantics [PR108099] adds 04a9209dc86 i386: Add new pattern for zero-extend cmov adds 6fc8e25cb6b testsuite: fix scan-tree-dump patterns [PR83904,PR100297] adds 5e284ebbc30 c++: bad ggc_free in try_class_unification [PR109556] adds 58b7dbf865b c++: Define built-in for std::tuple_element [PR100157] adds ec9b3087989 gcc: xtensa: add data alignment properties to dynconfig adds 675b390e6d0 gcc: xtensa: add -m[no-]strict-align option adds cf0d9dbc091 Daily bump. adds c2dac2e5fbb Optimize vshuf{i,f}{32x4,64x2} ymm and vperm{i,f}128 ymm adds fd7ecd8010c Re-arrange sections of i386 cpuid adds 5ebdbdb9cfa i386: Use macro to wrap up share builtin exceptions in buil [...] adds d08b0559fde i386: Add AVX512BW dependency to AVX512BITALG adds 4fb12ae93dd i386: Add AVX512BW dependency to AVX512VBMI2 adds e8571019066 i386: Fix vpblendm{b,w} intrins and insns adds 4246611d191 i386: Add PCLMUL dependency for VPCLMULQDQ adds ca3bd377c7e Add reduce_*_ep[i|u][8|16] series intrinsics adds 24a8acc1662 i386: Share AES xmm intrin with VAES adds 57e7229a29c PR testsuite/106879 FAIL: gcc.dg/vect/bb-slp-layout-19.c on [...] adds bd4a1a54724 testsuite: Fix up g++.dg/ext/int128-8.C testcase [PR109560] adds 974326fd519 Remove duplicate DFS walks from DF init adds 705b0d2b623 tree-vect-patterns: Pattern recognize ctz or ffs using clz, [...] adds 1edcb2ea0eb tree: Add 3+ argument fndecl_built_in_p adds 09751f52bfa amdgcn: update target-supports.exp adds 0be4fbeaa6a amdgcn: bug fix ldexp insn adds 98ebdda3fd8 RISC-V: Fix simplify_ior_optimization.c on rv32 adds a2d12abedc8 RISC-V: Fix wrong check of register occurrences [PR109535] adds 9fde76a3be8 RISC-V: Fix riscv/arch-19.c with different ISA spec version adds 7b206ae7f17 RISC-V: Fix RVV register order adds 07e2576d6f3 [PR target/108248] [RISC-V] Break down some bitmanip insn types adds 272484dae6b i386: Handle sign-extract for QImode operations with high r [...] adds cae48a9d807 arch: Use VIRTUAL_REGISTER_P predicate. adds 1d2aa9a8cb8 [LRA]: Exclude some hard regs for multi-reg inout reload ps [...] adds 3d7ab53d6c5 c: Avoid -Wenum-int-mismatch warning for redeclaration of b [...] adds 87c9bae4e32 tree-vect-patterns: One small vect_recog_ctz_ffs_pattern tw [...] adds 17aa9ddb345 Do not ignore UNDEFINED ranges when determining PHI equivalences. adds d4e8523bf3b doc: Remove repeated word (typo) adds d180a5524cc c++: make strip_typedefs generalize strip_typedefs_expr adds 76fa66ea397 c++: use TREE_VEC for trailing args of variadic built-in traits adds afc7e20e793 c++: simplify TEMPLATE_TYPE_PARM level lowering adds fa3a5663782 update_web_docs_git: Allow setting TEXI2*, add git build default adds ce4e4f37fd1 Daily bump. adds d51f2456ee5 RISC-V: Add local user vsetvl instruction elimination [PR109547] adds a80c68a0860 LoongArch: Fix MUSL_DYNAMIC_LINKER adds a322f37a57b Fix LCM dataflow CFG order adds 4dca6024fb8 testsuite: make ppc_cpu_supports_hw as effective target key [...] adds 6afa7d31a0e rs6000: xfail float128 comparison test case that fails on p [...] adds 98d66b20493 riscv: Fix <bitmanip_insn> fallout. adds d06e9264b01 RISC-V: Defer vsetvli insertion to later if possible [PR108270] adds 94a04c24c33 change DF to use the proper CFG order for DF_FORWARD problems adds 773cc925e84 change inverted_post_order_compute to inverted_rev_post_ord [...] adds 53dddbfeb21 Use correct CFG orders for DF worklist processing adds cddfe6bc40b tree-optimization/109573 - avoid ICEing on unexpected live def adds a7e1ee39e4f PR modula2/109586 cc1gm2 ICE when compiling large source files. adds b5c3abcd77c Cleanup odr_types_equivalent_p adds 68c0df8da73 Stabilize inliner adds c39cdd9e654 Add operator* to gimple_stmt_iterator and gphi_iterator adds 2e047c00e98 Add safe_is_a adds 2f4e45101dd Fix latent bug in loop header copying which forgets to upda [...] adds 18c9427b66f i386: Remove REG_OK_FOR_INDEX/REG_OK_FOR_BASE and their der [...] adds e306501ff55 [aarch64] Use force_reg instead of copy_to_mode_reg. adds e6f689d0900 MAINTAINERS: add Vineet Gupta to write after approval adds 1fe9bef9f55 expansion: make layout of x_shift*cost[][][] more efficient adds f7b9258e0d4 Fix boostrap failure in tree-ssa-loop-ch.cc adds 7508aacf95d Add Ajit Kumar Agarwal to write after approval adds 857c8e3b3bb c++, tree: optimize walk_tree_1 and cp_walk_subtrees adds f824216cdb0 aarch64: PR target/99195 Add scheme to optimise away vec_co [...] adds 573624ec90c PR target/108779 aarch64: Implement -mtp= option adds 88195141aea aarch64: Emit single-instruction for smin (x, 0) and smax (x, 0) adds f1f18198b06 Adjust x86 testsuite for recent if-conversion cost checking adds 79c73122fab gcc/m2: Drop references to $(P) adds 7d115e01411 configure: Only create serdep.tmp if needed adds 03cebd30495 c++: fix 'unsigned typedef-name' extension [PR108099] adds f828503eeb7 Do not fold ADDR_EXPR conditions leading to builtin_unreach [...] adds 6d7f9ebfb82 Daily bump. adds cda246f8b42 Update loop estimate after header duplication adds c58c0771b7a match.pd: Fix fneg/fadd optimization [PR109583] adds 00c49869fed Adjust rx movsicc tests adds 195270d28a5 Fix up bootstrap with GCC 4.[89] after RAII auto_mpfr and a [...] adds 7a0cbaf7f80 testsuite: Fix up pr109011-*.c tests for powerpc [PR109572] adds eb385a4801c Fortran: function results never have the ALLOCATABLE attrib [...] adds 911db256258 [Committed] Move new test case to gcc.target/avr/mmcu/pr54816.c adds 84325f1c6aa PHIOPT: Improve minmax diamond detection for phiopt1 adds e81b29a5394 PHIOPT: Improve readability of tree_ssa_phiopt_worker adds 6ab856aa49b Daily bump. adds 0368d169492 Use NO_REGS in cost calculation when the preferred register [...] adds 525713ed9db Adjust testcases after better RA decision. adds 5830953a446 Handle NANs in frange::operator== [PR109593] adds 987caaae343 [xstormy16] Improved SImode shifts by two bits. adds 9a6e5b933fe [xstormy16] Add extendhisi2 and zero_extendhisi2 patterns t [...] adds 8ffff5e9de2 [xstormy16] Update xstormy16_rtx_costs. adds 3b13c59c835 aarch64: Add vect_concat with zeroes annotation to addp pattern adds 7e26fd6bcd3 aarch64: Annotate fcvtn pattern for vec_concat with zeroes adds 8d7223f6579 modula2: Add -lnsl -lsocket libraries to gcc/testsuite/lib/gm2.exp adds 6c06b9e4c31 Daily bump. adds 8311c267576 Add testcases for ffs/ctz vectorization. adds 4eae76d1043 RISC-V: Optimize fault only first load adds c5a1fa59ae3 RISC-V: Add function comment for cleanup_insns. adds ff8f9544935 RISC-V: Eliminate redundant vsetvli for duplicate AVL def adds 28c06d0ed13 Avoid repeated forwarder_block_p calls in CFG cleanup adds 60bf26a412a This replaces uses of last_stmt where we do not require deb [...] adds 6ec565d8755 aarch64: Add pattern to match zero-extending scalar result [...] adds c60654918bc [1/4] aarch64: Convert UABDL and SABDL patterns to standard [...] adds 6c82641d732 [2/4] aarch64: Convert UABDL2 and SABDL2 patterns to standa [...] adds e0472ed5aee [3/4] aarch64: Convert UABAL and SABAL patterns to standard [...] adds 636e2273aec [4/4] aarch64: Convert UABAL2 and SABAL2 patterns to standa [...] adds 9fd4a38c2f3 aarch64: PR target/109406 Add support for SVE2 unpredicated MUL adds c729a176052 doc: Update install.texi for GCC 13 adds 2abc7b68ae9 MAINTAINERS: fix sorting of names adds b98c63e9e8c aarch64: Add mulv2di3 expander for TARGET_SVE adds b6d8e2975a9 Docs, OpenMP: Small fixes to internal OMP_FOR doc. adds b9ee7c6bfdb c++, tree: declare some basic functions inline adds 2f58dd71d1b PHIOPT: Move check on diamond bb to tree_ssa_phiopt_worker [...] adds 7dd4761ee7f PHIOPT: Cleanup tree_ssa_phiopt_worker code adds 7049241f6ee PHIOPT: Allow other diamond uses when do_hoist_loads is true adds 245753249c5 PHIOPT: Factor out some code from match_simplify_replacement adds a2339e0fe9d PHIOPT: Ignore predicates for match-and-simplify phi-opt adds f1f5cbaa3f7 PHIOPT: Add support for diamond shaped bb to match_simplify [...] adds 83470a5cd4c libstdc++: Fix __max_diff_type::operator>>= for negative values adds ad1816a8ab6 Update gcc hr.po, sv.po, zh_CN.po adds f0eabc52c9a [SVE] Fold svrev(svrev(v)) to v. adds aeaf942699c Daily bump. adds 966bd96ff78 Add alternative testcase of phi-opt-25.c that tests phiopt adds a4916881b74 [PATCH v2] testsuite: Add testcase for sparc ICE [PR105573] adds 36d98023c8b Pass correct type to irange::contains_p() in ipa-cp.cc. adds 971a2b892a6 Remove obsolete configure code in gnattools adds 3a7bed5e71c MAINTAINERS: add myself to write after approval adds a024ac7bca9 Remove default constructor to nan_state. adds 85279b0bddc aarch64: Leveraging the use of STP instruction for vec_duplicate adds dee5cef280d [Committed] Correct zeroextendqihi2 insn length regression [...] adds 171fe0681ef gcov: add info about "calls" to JSON output format adds 97f8f2d0a03 powerpc: Fix up *branch_anddi3_dot for -m32 -mpowerpc64 [PR109566] adds 6d4bd27a604 rtl-optimization/109585 - alias analysis typo adds 784e03f378b testsuite: Fix up ext-floating15.C tests on powerpc64-linux [...] adds c69db3ef7f7 aarch64: Implement V2DI,V4SI division optabs for TARGET_SVE adds 9e9503e7b2c aarch64: PR target/PR99195 Annotate more simple integer bin [...] adds 78aaaf862e7 testsuite: Fix up ext-floating2.C on powerpc64-linux adds 1c101fcfaac 'omp scan' struct block seq update for OpenMP 5.x adds e8d00353017 tree-optimization/109609 - correctly interpret arg size in fnspec adds e262cdf49c5 Avoid creating useless debug temporaries adds 0530254413f riscv: relax splitter restrictions for creating pseudos adds 3d674e29d7f c++: value dependence of by-ref lambda capture [PR108975] adds dd39ec6dc74 Regenerate gcc.pot adds 064eed39d23 recog.cc: Correct comments referring to parameter match_len adds 49cea02d8bd Daily bump. adds 68201409bc2 PR modula2/108121 Re-implement overflow detection for const [...] adds 392200f807f avoid splitting small constants in bcrli_nottwobits patterns adds 2fb7df82b8e RISC-V: Add auto-vectorization compile option for RVV adds a8d5e14f524 RISC-V: Bugfix for RVV vbool*_t vn_reference_equal adds a010f0e0850 RISC-V: Fine tune gather load RA constraint adds 4f9eac2f262 RISC-V: Fix redundant vmv1r.v instruction in vmsge.vx codegen adds 06792c142c5 RISC-V: Optimize comparison patterns for register allocation adds fd75f6ae562 rs6000: Fix predicate for const vector in sldoi_to_mov [PR109069] adds 33a44e3aa81 rs6000: Guard power9-vector for vsx_scalar_cmp_exp_qp_* [PR108758] adds 5fce06b868e RISC-V: Fine tune vmadc/vmsbc RA constraint adds db29daa5e62 More last_stmt removal adds f2f721d13b9 Update gennews for GCC 13. adds 1e832b4db7f MAINTAINERS: fix alphabetic sorting adds 1f0bfbb26e5 [xstormy16] Add support for byte and word swapping instructions. adds f2b894b1487 Remove compare_names* from legacy cond folding. adds 3d8c2d3aefa Refactor vrp_evaluate_conditional* and rename it. adds e6910b622ad Remove range_query::get_value_range. adds 3c9372dfee0 Remove deprecated range_fold_{unary,binary}_expr uses from ipa-*. adds bfd9415761d Remove range_fold_{unary,binary}_expr. adds 983ad30d42c Remove irange::may_contain_p. adds a38bb14f013 Remove symbolics from irange. adds 964b02cb26d Remove irange::constant_p. adds 5bdc5155138 Convert users of legacy API to get_legacy_range() function. adds 04e5ddf8a31 Fix swapping of ranges. adds 1a8087c7d1c Replace ad-hoc value_range dumpers with irange::dump. adds 637037f4e63 Remove some uses of deprecated irange API. adds fb5607ae6ad Convert compare_nonzero_chars to wide_ints. adds ebef388ec34 Remove range_int_cst_p. adds 5db3d28e04e Remove range_has_numeric_bounds_p. adds 0ef3756adf0 Remove legacy range support. adds a8e1551bdb3 RISC-V: Legitimise the const0_rtx for RVV load/store address adds d53b3d94aaf libsanitizer: merge from upstream (3185e47b5a8444e9fd). adds 21d35670688 libsanitizer: Apply local patches adds bd0791e899e libsanitizer: change LOCAL_PATCHES revision adds 80afac31217 aarch64: Reimplement RSHRN intrinsic patterns with standard [...] adds b4c69e6b663 aarch64: Reimplement RSHRN2 intrinsic patterns with standar [...] adds e02f68df385 MAINTAINERS: Add myself to write after approval adds f797260adaf RISCV: Inline subword atomic ops adds 469b655b30d aix: Default AIX 7.2 to POWER7 server and AIX 7.3 to POWER8 [...] adds 40c7f943e88 Don't save ssa-name pointer in dependency cache. adds bf50499a149 Quicker relation check. adds b6dea04fca6 Add sbr_lazy_vector and adjust (e)vrp sparse cache adds 8a3590e5ce8 Rename ssa_global_cache to ssa_cache and add has_range adds 0a38f677463 Create a lazy ssa_cache. adds 50d866038a9 c++: micro-optimize most_specialized_partial_spec adds 1e27e7e0985 c++: unique friend shenanigans [PR69836] adds d60cbbfaa9a c++: local class in nested generic lambda [PR109241] adds 9b40ca2569d c++: remove nsdmi_inst hashtable adds 2a26872984c RISC-V: Fix sync.md and riscv.cc whitespace errors adds d7f0bc05949 libgcc CRIS: Define TARGET_HAS_NO_HW_DIVIDE adds 4a3dbcbdb3d Daily bump. adds 95d4c0d2e63 c++: restore instantiate_decl assert adds d94ca762f6e testsuite: adjust NOP expectations for RISC-V adds 7bcdcf86e82 tree-optimization/109594 - wrong register promotion adds 429c72eb632 doc: Add explanation of zero-length array example adds a1030fbf70e c: Fix up error-recovery on functions initialized as variab [...] adds d8842271ebf c: Fix up error-recovery on non-empty VLA initializers [PR109409] adds f9412cedd6c libstdc++: Make std::random_device throw std::system_error [...] adds 865869dc694 libstdc++: Add @headerfile and @since to doxygen comments [ [...] adds afcf2b09b83 libstdc++: Improve doxygen docs for <memory_resource> adds afa69618d16 libstdc++: Reduce Doxygen output for PDF adds efa1276480d libstdc++: Remove obsolete options from Doxygen config adds 481281ccf41 libstdc++: Fix typos in doxygen comments adds d89e23f2721 ipa/109607 - properly gimplify conversions introduced by IP [...] adds 0403d295792 Properly gimplify handled component chains on registers adds a82c6ab0aad wrong GIMPLE from (bit_field_ref CTOR ..) simplification adds 2b8ac1df649 Normalize addresses in IPA before calling range_op_handler [...] adds b5f04a4db59 Use CONFIG_SHELL-/bin/sh in genmultilib adds 65369ab62ce tree-optimization/109170 - bogus use-after-free with __buil [...] adds f2d6beb7a4d Unloop loops that no longer loops in tree-ssa-loop-ch adds b26ce75ef54 MAINTAINERS: Change my email address. adds b9fedabe381 PHIOPT: Split out store elimination from phiopt adds 4c728f20d30 PHIOPT: Rename tree_ssa_phiopt_worker to pass_phiopt::execute adds ba9975a2596 PHIOPT: Move store_elim_worker into pass_cselim::execute adds 5fecfed8788 MIN/MAX should be treated similar as comparisons for trapping adds 82f4f90a376 PHIOPT: Allow MIN/MAX to have up to 2 MIN/MAX expressions f [...] adds e0cf929d99b RISC-V: Add required tls to read thread pointer test adds 14e881eb030 c++: print conversion error at candidate location adds b17c57b06d9 amdgcn: Fix addsub bug adds e86d01af792 Update gcc .po files adds 32a98ccd233 Daily bump. adds f9b91090361 harden-conditionals: detach values before compares adds 9be54d6abad testsuite/C++: cope with IPv6 being unavailable adds d76c343d6a6 testsuite/C++: suppress filename canonicalization in module tests adds bd539c9b801 Add targetm.libm_function_max_error adds 9ffddbfc738 Implement range-op entry for sin/cos adds ba39d2be0ba gimple-range-op: Handle sqrt (basic bounds only) adds 7ebd4a1d619 Fortran: Fix (mostly) comment typos adds 889a0791c63 aarch64: PR target/99195 annotate more integer unary patter [...] adds 9a41d2cdbcd libstdc++: Another attempt to ensure g++ 13+ compiled progr [...] adds 821ef93976e tree-optimization/108752 - vectorize emulated vectors in lo [...] adds 977a43f5ba7 Avoid more invalid GIMPLE with register bases adds 6e6f86f2287 tree-optimization/109644 - missing IL checking adds cacf65d7446 OpenACC: Stand-alone attach/detach clause fixes for Fortran [...] adds a94dcac59ee ipa/109652 - ICE in modification phase of IPA SRA adds 5c8b154c56a libstdc++: Simplify preprocessor/namespace nesting in <bits [...] adds 975e8e836ea libstdc++: Strip absolute paths from files shown in Doxygen docs adds 30f6aace7fe libstdc++: Minor fixes to doxygen comments adds d711f8f81fc libstdc++: Improve doxygen docs for <random> adds 8b84d87969e RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR adds 24905a4bd13 Adjust costing of emulated vectorized gather/scatter adds 6d4b59a9356 Add emulated scatter capability to the vectorizer adds fde00589911 Synchronize include/ctf.h with upstream binutils/libctf. adds 650c36ec461 PR rtl-optimization/109476: Use ZERO_EXTEND instead of zero [...] adds b9b30dbaabc MATCH: Factor out code that for min max detection with constants adds c43819a9b4c MATCH: Add patterns from phiopt's minmax_replacement adds 1dd154f6407 PHIOPT: Move two_value_replacement to match.pd adds db7e7776b0f contrib: port doxygen script to Python3 adds 1966741378d RISC-V: Eliminate redundant zero extension of minu/maxu operands adds d9df45a66b2 RISC-V: Added support clmul[r,h] instructions for Zbc extension. adds 065be0ffbcd RISC-V: Add divmod expansion support adds 0c77a090945 Fix autoprofiledbootstrap build adds 5cf6160a690 testsuite: Handle empty assembly lines in check-function-bodies adds 50205195744 Daily bump. adds a5b2a3bff81 RISC-V: decouple stack allocation for rv32e w/o save-restore adds ef6c3095aab Adjust mips test for recent ifcvt costing changes adds 83c78cb0d78 add glibc-stdint.h to vax and lm32 linux target (PR target/105525) adds 58f3cbbd7e0 [xstormy16] Recognize/support swpn (swap nibbles) instruction. adds e2b204c31ba [xstormy16] Efficient HImode rotate left by a single bit. adds 7eefdc9c778 reload: Handle generating reloads that also clobbers flags adds 8eb1e394417 Daily bump. adds d5e2694e825 Remove duplicate constants created between passes adds d96e14ceb94 libsanitizer: merge from upstream (87e6e490e79384a5) adds 401f46e630d libsanitizer: Apply local patches adds d2ab430a16c libsanitizer: update LOCAL_PATCHES revision adds 2744dbb9ecf gcc: Use ld -r when checking for HAVE_LD_RO_RW_SECTION_MIXING adds e7ce7c4905f [PATCH] libcpp: suppress builtin macro redefined warnings f [...] adds 54765c875a0 libsanitizer: link hwasan against lsan library adds 84e7d62c3bc hwasan: adjust wording in expected output in tests adds 55b70889514 PHIOPT: Allow moving of some builtin calls adds c53237cefba MATCH: add some of what phiopt's builtin_zero_pattern did adds a6b810ae783 Fix C/107926: Wrong error message when initializing char array adds d56af02fb1f Improve error message for excess elements in array initiali [...] adds b159026b739 [Committed] Update xstormy16's neghi2 pattern to not clobbe [...] adds 33b6b791976 Revert "[PATCH] libcpp: suppress builtin macro redefined wa [...] adds 4d68c7f7b5a Daily bump. adds e1366a7e4ce vrange_storage overhaul adds e1f83aa39dd Remove irange::{min,max,kind}. adds 6b73cbb04d4 Remove irange::tree_{lower,upper}_bound. adds c7422782a2e Various cleanups in vr-values.cc towards ranger API. adds 2c39e0fabff Convert get_legacy_range in bounds_of_var_in_loop to irange API. adds 612d373005a Merge irange::union/intersect into irange_union/intersect. adds cb779afeff2 Conversion to irange wide_int API. adds 8b2181a415f Replace vrp_val* with wide_ints. adds 47a76439911 Rewrite bounds_of_var_in_loop() to use ranges. adds c92b8be9b52 Convert internal representation of irange to wide_ints. adds 178abecaa9c Cleanup irange::set. adds bd0ac4b275d Inline irange::set_nonzero. adds 19a5b824ef1 Remove unused friends in int_range<>. adds 1ee457a5feb libgcc pru: Define TARGET_HAS_NO_HW_DIVIDE adds 12de8da8961 apply debug-remap to file names in .su files adds faf8bea79b6 Enable LRA on several ports adds 977a3be3ccb Convert xstormy16 to LRA adds d89b152436a PHIOPT: Update comment about what the pass now does adds 07c52d1eec9 c++: array DMI and member fn [PR109666] adds 8d2793ef6b1 ubsan: ubsan_maybe_instrument_array_ref tweak adds 1fc8da95d93 Daily bump. adds 87de39e4c36 ibstdc++: Shut up -Wattribute-alias warning [PR109694] adds 59912ce42ee [i386] Fix testcases for emulated scatter adds f385252b233 tree-optimization/109672 - properly check emulated plus dur [...] adds cbe32d388c0 docs: port documentation of VRP params adds 9a9840cedbd c++: Add testcase for already fixed PR [PR109506] adds 87c347c2897 RISC-V: fix build issue with gcc 4.9.x adds 1adb1a653d6 RISC-V: ICE for vlmul_ext_v intrinsic API adds 9cfdd5af3ef RISC-V: Name newly added flags in changelog adds 1d003da715a libstdc++: Regenerate baseline_symbols.txt files for Linux adds f37a36bce81 RISC-V: Eliminate SYNC memory models adds dcd7b2f5f72 RISC-V: Enforce Libatomic LR/SC SEQ_CST adds 4990cf84c46 RISC-V: Enforce subword atomic LR/SC SEQ_CST adds d199d2e56da RISC-V: Enforce atomic compare_exchange SEQ_CST adds a61a067b152 RISC-V: Add AMO release bits adds 6a2383f47ae RISC-V: Strengthen atomic stores adds 08c5d1804a0 RISC-V: Eliminate AMO op fences adds 942ab49b5f8 RISC-V: Weaken LR/SC pairs adds bff7c773864 RISC-V: Weaken mem_thread_fence adds b90e030a3ce RISC-V: Weaken atomic loads adds bc24c51c0cc RISC-V: Table A.6 conformance tests adds 4b8d0d4d7fd c++: std::variant slow to compile [PR109678] adds a43f3616c00 c++: look for empty base at specific offset [PR109678] adds f9861511a1f c++: less invalidate_class_lookup_cache adds 7cc33d12dca target: [PR109657] (a ? -1 : 0) | b could be optimized bett [...] adds 8702ab1456e tree-optimization: [PR109702] MATCH: Fix a ? func(a) : N patterns adds 078339fc04f MATCH: Port CLRSB part of builtin_zero_pattern adds 33020780a96 PHIOPT: small refactoring of match_simplify_replacement. adds c912fe765a1 c++: simplify member template substitution adds d7cb9720ed5 Daily bump. adds 0bc2a1dc327 c++: fix TTP level reduction cache adds 8d193b12d6f c++: Fix up VEC_INIT_EXPR gimplification after r12-7069 adds 348788b19f5 clang warning: warning: private field 'm_gc' is not used [- [...] adds e8511cbba69 Docs: Add vector register constarint for asm operands adds 1133cfab472 aarch64: PR target/99195 annotate simple floating-point pat [...] adds 12fae1f7fbe aarch64: PR target/99195 annotate HADDSUB patterns for vec- [...] adds aeeec83b0e2 Improve RTL CSE hash table hash usage adds 2961db432eb Speedup cse_insn adds 12847288da5 RISC-V: Add tuple types support adds cb7f6ec9524 RISC-V: Add tuple type vget/vset intrinsics adds 6313b045739 RISC-V: Support segment intrinsics adds 203f3060dd3 riscv/linux: Don't add -latomic with -pthread adds cbf6c7a1d16 libstdc++: Set _M_string_length before calling _M_dispose() [...] adds 64780df27b4 More last_stmt removal adds 4bd434fbfc7 riscv: fix error: control reaches end of non-void function adds 9d7c64fa996 arm: move builtin function codes into general numberspace adds 6f59caf1c36 arm: [MVE intrinsics] Add new framework adds 00d97bf3b5a arm: [MVE intrinsics] Rework vreinterpretq adds 937ac2cd10c arm: [MVE intrinsics] Rework vuninitialized adds fc4cbe8f59b arm: [MVE intrinsics] add binary_opt_n shape adds 9fdce18eea7 arm: [MVE intrinsics] add unspec_based_mve_function_exact_insn adds b0b3a5e9147 arm: [MVE intrinsics] factorize vadd vsubq vmulq adds 1942c5ab03f arm: [MVE intrinsics] rework vaddq vmulq vsubq adds 45dbb66f7c7 arm: [MVE intrinsics] add binary shape adds 67e4e59172d arm: [MVE intrinsics] factorize vandq veorq vorrq vbicq adds 632f70d8652 arm: [MVE intrinsics] rework vandq veorq adds 566094741d9 arm: [MVE intrinsics] add binary_orrq shape adds f74588acf97 arm: [MVE intrinsics] rework vorrq adds 55967d4a239 arm: [MVE intrinsics] add unspec_mve_function_exact_insn adds 4545ca8bc32 arm: [MVE intrinsics] add create shape adds dd04568f4ed arm: [MVE intrinsics] factorize vcreateq adds 07685b397d8 arm: [MVE intrinsics] rework vcreateq adds 5cbe0c090d4 arm: [MVE intrinsics] factorize several binary_m operations adds 111f474f630 arm: [MVE intrinsics] factorize several binary _n operations adds a7cbd5f9a8e arm: [MVE intrinsics] factorize several binary _m_n operations adds 3fe5a244f55 arm: [MVE intrinsics] factorize several binary operations adds 6cff5f3da7f arm: [MVE intrinsics] rework vhaddq vhsubq vmulhq vqaddq vq [...] adds 3a4a39b391e aarch64: Rename abi_break parameters [PR109661] adds 1c26adba4b9 aarch64: Fix ABI handling of aligned enums [PR109661] adds cef0c0bb13e do not tailcall __sanitizer_cov_trace_pc [PR90746] adds 2b8a27634f5 Allow varying ranges of unknown types in irange::verify_ran [...] adds 3b7eecca20b Add stats to simple_dce_from_worklist adds 7ce078ceca4 c++: over-eager friend matching [PR109649] adds a13ea34c6ed libstdc++: Fix up abi.exp FAILs on powerpc64-linux adds b51e2fd65e4 libstdc++: Fix up abi.exp FAILs on powerpc64le-linux adds 43c45706f2f CRIS-LRA: Fix uses of reload_in_progress adds 257df67609a Daily bump. adds 9525daf0fbc PR modula2/109675 implementation of writeAddress is non portable adds e88d9e826ee CRIS-LRA: Define TARGET_SPILL_CLASS adds 8c361179c01 CRIS: peephole2 an "and" with a contiguous "one-sided" sequ [...] adds 3a715d3e136 i386: Fix up handling of debug insns in STV [PR109676] adds fe8ac82fc05 Rename last_stmt to last_nondebug_stmt adds ee99aaae4ae tree-optimization/109724 - new testcase adds d879d68eb30 gcov: add GCOV format version to gcov -v adds d840bc5cab3 aarch64: PR target/99195 annotate more simple binary ops fo [...] adds 93c26deab98 aarch64: PR target/99195 annotate simple ternary ops for ve [...] adds 82cfd93ae81 tree-optimization/109721 - emulated vectors adds 508f082829a i386: Improve index_register_operand predicate adds 8830e467774 PHIOPT: Improve replace_phi_edge_with_variable's dce_ssa_na [...] adds 78b0eea7802 Move copy_phi_arg_into_existing_phi to common location and use it adds d256dc28f0e PHIOPT: Improve replace_phi_edge_with_variable for diamond [...] adds 9cb3f25460a libstdc++: Mention recent libgcc_s symbol versions in manual adds 2eadfb5c7e2 libstdc++: Document new library version in manual adds 0a26a42b237 OpenACC: Further attach/detach clause fixes for Fortran [PR109622] adds fe3e4557471 [1/2] aarch64: Reimplement (R){ADD,SUB}HN intrinsics with R [...] adds 4657977541d [2/2] aarch64: Reimplement (R){ADD,SUB}HN2 patterns with st [...] adds ac7c9954ece PR modula2/109729 cannot use a CHAR type as a FOR loop iterator adds 8cac2378175 i386: Tighten ashift to lea splitter operand predicates [PR109733] adds fde093b7645 Daily bump. adds 6f18f344338 Revert "c++: restore instantiate_decl assert" adds 6fe385eac6f MATCH: Add ABSU<a> == 0 to a == 0 simplification adds 2e4e899641c PHIOPT: Fix diamond case of match_simplify_replacement adds 21cf5ec1993 builtins: Fix comment typo mpft_t -> mpfr_t adds 4359724cba3 nvptx/mkoffload.cc: Add dummy proc for OpenMP rev-offload t [...] adds e383fc69d2a [libstdc++] [testsuite] xfail double-prec from_chars for ldbl adds 919642fa4b2 i386: Introduce mulv2si3 instruction adds 37b5f031292 tree-optimization/109735 - conversion for vectorized pointer-diff adds 124bc77ba98 GCN: Silence unused-variable warning adds 580cda3c279 match.pd: don't emit label if not needed adds e487fcc0f74 match.pd: Remove commented out line pragmas unless -vv is used. adds c0ce29bc1ce match.pd: CSE the dump output check. adds 27fcf994c55 genmatch: split shared code to gimple-match-exports.cc adds 703417a030b match.pd: automatically partition *-match.cc files. adds 0a85544e1aa match.pd: Use splits in makefile and make configurable. adds 0fa872c40af i386: Rename index_register_operand predicate to register_n [...] adds d875d75653e RISC-V: Fix PR109615 adds 00c76a62d8d arm: [MVE intrinsics] add binary_round_lshift shape adds c4d4e62b3f8 arm: [MVE intrinsics] factorize vqrshlq vrshlq adds 548e0613198 arm: [MVE intrinsics] rework vrshlq vqrshlq adds 7e6c39a327d arm: [MVE intrinsics] factorize vqshlq vshlq adds 0c90fe02262 arm: [MVE intrinsics] rework vqrdmulhq adds 1736f4af29a arm: [MVE intrinsics] factorize vabdq adds 6079d94a98f arm: [MVE intrinsics] rework vabdq adds 02888679a5b arm: [MVE intrinsics] add binary_lshift shape adds 2c9a25a82ea arm: [MVE intrinsics] add support for MODE_r adds 55b0c42e3da arm: [MVE intrinsics] add binary_lshift_r shape adds b102b014375 arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vshl adds 9e838ad14bb arm: [MVE intrinsics] rework vqshlq vshlq adds bcf66a4dcbf arm: [MVE intrinsics] factorize vmaxq vminq adds 644f47589bc arm: [MVE intrinsics] rework vmaxq vminq adds b0915fca0cd arm: [MVE intrinsics] add binary_rshift_narrow shape adds e2f992f7ce1 arm: [MVE intrinsics] factorize vshrntq vshrnbq vrshrnbq vr [...] adds d8da15d6af2 arm: [MVE intrinsics] rework vshrnbq vshrntq vrshrnbq vrshr [...] adds 27b1bf82ace arm: [MVE intrinsics] add binary_rshift_narrow_unsigned shape adds 8f5b7d21367 arm: [MVE intrinsics] factorize vqrshrunb vqrshrunt vqshrun [...] adds b26c104f8e9 arm: [MVE intrinsics] rework vqrshrunbq vqrshruntq vqshrunb [...] adds 66330ec9e71 arm: [MVE intrinsics] add binary_rshift shape adds 6bb8a5bd1e8 arm: [MVE intrinsics] factorize vsrhrq vrshrq adds bb043cd3da5 arm: [MVE intrinsics] rework vshrq vrshrq adds 3365956d55a RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET adds 0c1eaac3fd3 RISC-V: Legitimise the const0_rtx for RVV indexed load/store adds 185da7c2014 Fortran: overloading of intrinsic binary operators [PR109641] adds 07527e3eabb doc: Document order of define_peephole2 scanning adds 0a5e8d492a7 CRIS: peephole2 a lsrq into a lslq+lsrq pair adds fe50e419086 CRIS: peephole2 a move of constant followed by and of same [...] adds 35b7618e3ae CRIS: peephole2 an add into two addq or subq adds 2ab31cde21d Daily bump. adds 319aef8d2fd build: Replace seq for portability with GNU Make variant adds 82aef047eda gimple-range-op: Improve handling of sqrt ranges adds 23b60aeb006 Canonicalize vec_merge when mask is constant. adds 8421f279e9e RISC-V: Fix incorrect demand info merge in local vsetvli op [...] adds 143e6695b20 Remove type from vrange_storage::equal_p. adds b7fe38c14e5 gimple-range-op: Improve handling of sin/cos ranges adds 96d69919628 Fortran: Namelist read with invalid input accepted. adds 043550bceea libffi: fix handling of homogeneous float128 structs (#689) adds 2d76f2b45d6 RISC-V: Enable basic RVV auto-vectorization support. adds be6c13d5cef build: Use -nostdinc generating macro_list [PR109522] adds d90eed13ae6 LoongArch: Enable shrink wrapping adds b3e5cb9dc33 RISC-V: autovec: Add new predicates and function prototypes adds 6ad9e5e0c7b RISC-V: autovec: Export policy functions to global scope adds bc73bf831ef RISC-V:autovec: Add auto-vectorization support functions adds b9b7981f3d6 Remove duplicated definition in risc-v vector support. adds 9217e0dde1b RISC-V:autovec: Add target vectorization hooks adds 730909fa858 RISC-V: autovec: Verify that GET_MODE_NUNITS is a multiple of 2. adds 4c05f966a09 Delete duplicated riscv definition. adds 2c8fa77120b Daily bump. adds d8a6945c6ea Don't call emit_clobber in lower-subreg.cc's resolve_simple_move. adds b05b529125f rs6000: Load high and low part of 64bit constant independently adds 7f4840ddef9 c++: potentiality of templated memfn call [PR109480] adds 681ba2f7681 c++: non-dep init folding and access checking [PR109480] adds a1a9ce2441d Fix aarch64/109762: push_options/push_options does not work [...] adds 7bfb1550cce c++: bound ttp in lambda function type [PR109651] adds e4f1ea5d8b9 c++: parenthesized -> resolving to static data member [PR98283] adds 5dfe5d7d17d c++: various code cleanups adds b28a7c41fb4 c++: satisfaction of non-dep member alias template-id adds b81785eacef c++: goto entering scope of obj w/ non-trivial dtor [PR103091] adds f9777f1b56f c++: fix pretty printing of 'alignof' vs '__alignof__' [PR85979] adds 70d038235cc Daily bump. adds d46b3db4bd0 Fortran: Reject semicolon after namelist name. adds 2521390dd2f Fortran: Fix mpz and mpfr memory leaks [PR fortran/68800] adds ca2f64d5d08 fortran: Remove conditionals around free() adds 21e2ef2dc25 Move substitute_and_fold over to use simple_dce_from_worklist adds 31c70a7daa3 Makefile.in: clean up match.pd-related dependencies adds 17d683d4d3d RISC-V: Handle multi-lib path correclty for linux adds bf839c154d6 RISC-V: Fix ugly && incorrect codes of RVV auto-vectorization adds 69f1a8af45d PHIOPT: Add diamond bb form to factor_out_conditional_conversion adds 01f3e3768ff PHIOPT: Loop over calling factor_out_conditional_conversion adds 6d6c17e45f6 PHIOPT: factor out unary operations instead of just conversions adds c93bde224c0 fortran: Fix coding style around free() adds e2b993db57f Bump up precision size to 16 bits. adds 06ef1583d68 c++: list CTAD and resolve_nondeduced_context [PR106214] adds 8b8a4fb8eff libgm2: Adjust 'autogen.sh' to 'ACLOCAL_AMFLAGS', and simplify adds bd6dbdb196d libgm2: Remove 'autogen.sh' adds 130c2f3c3ac libgomp: Simplify OpenMP reverse offload host <-> device me [...] adds d6654a4be3b Let each 'lto_init' determine the default 'LTO_OPTIONS', an [...] adds 1b93b9191d0 libgomp C++ testsuite: Use 'lang_include_flags' instead of [...] adds 148de3aaac6 Fix minor length computation on stormy16 adds dd7136cff68 RISC-V: Improve portability of testcases adds c139f5e106f RISC-V: Factor out vector manager code in vsetvli insertion [...] adds 5d85b5d649f Fix pr81192.c for int16 targets adds 3d9853eeb2d Fix cfg maintenance after inlining in AutoFDO adds 1e3054d27c8 [x86_64] Introduce insvti_highpart define_insn_and_split. adds 212905a47d7 Daily bump. adds 73f7109ffb1 c++: non-template friend of template [PR106740] adds ba72a8d8518 ira: Don't create copies for earlyclobbered pairs adds aebd8471a17 aarch64: Fix move-after-intrinsic function-body tests adds 4ff89f10ca0 aarch64: Allow moves after tied-register intrinsics adds 75bd358e0cc aarch64: Relax ordering requirements in SVE dup tests adds 3e60e57e52f aarch64: Relax predicate register matches adds 5c53d82582c aarch64: Relax FP/vector register matches adds af84cb1f3e1 aarch64: Avoid hard-coding specific register allocations adds 2ed6dd975d1 genmatch: clean up emit_func adds 425198bb5d2 genmatch: clean up showUsage adds 153eafaa0b7 genmatch: fixup get_out_file adds a8302d2a466 tree-ssa-ccp, wide-int: Fix up handling of [LR]ROTATE_EXPR [...] adds c2cf2dc988e testsuite: Add further testcase for already fixed PR [PR109778] adds e24b74fc43b mux-utils.h: Fix a comment typo adds 89567b1ff2d arm: [MVE intrinsics] add unary shape adds 7734b99143b arm: [MVE intrinsics] factorize several unary operations adds c32e1a71906 arm: [MVE intrinsics] rework vabsq vnegq vclsq vclzq, vqabs [...] adds 95908b98dbe arm: [MVE intrinsics] rework vrndq vrndaq vrndmq vrndnq vrn [...] adds 75e9f2643e0 arm: [MVE intrinsics] add binary_move_narrow and binary_mov [...] adds 7f49b4a00c2 arm: [MVE intrinsics] factorize vmovnbq vmovntq vqmovnbq vq [...] adds 865c89566b7 arm: [MVE intrinsics] rework vmovnbq vmovntq vqmovnbq vqmov [...] adds 828e91cf719 arm: [MVE intrinsics] add binary_widen_n shape adds 2cc50fd993c arm: [MVE intrinsics] factorize vshllbq vshlltq adds 8440230e69e arm: [MVE intrinsics] rework vshllbq vshlltq adds b7b20984365 libgomp C++ testsuite: Don't compute 'blddir' twice adds fed3dbbfd1b libgomp testsuite: Only use 'blddir' if set adds 2ed5ceba0fe libgomp testsuite: Use 'lang_test_file_found' instead of 'l [...] adds 204303c81e8 Eliminate more comparisons on the H8 port adds 2499540e9ab c++: Reject pack expansion of assume attribute [PR109756] adds 434dade5a11 PR modula2/109779 isolib SkipLine skips the first character [...] adds 84684d2c393 aarch64: Fix cut-&-pasto in aarch64-sve2-acle-asm.exp adds 6d25ea520f7 aarch64: Improve register allocation for lane instructions adds c66ed9e7e9f arm: [MVE intrinsics] add binary_maxvminv shape adds 2bf22a1e1a9 arm: [MVE intrinsics] add binary_maxavminav shape adds ae7d75fec88 arm: [MVE intrinsics add unspec_mve_function_exact_insn_pred_p adds 16c5aca6a13 arm: [MVE intrinsics] factorize vmaxvq vminvq vmaxavq vminavq adds 83fff825edb arm: [MVE intrinsics] rework vmaxvq vminvq vmaxavq vminavq adds 25d0235e6ec arm: add smax/smin expanders for v*hf adds 5ea7a47c858 arm: [MVE intrinsics] factorize vmaxnmq vminnmq adds 9c4fea2457e arm: [MVE intrinsics] rework vmaxnmq vminnmq adds d814dc9dde4 arm: [MVE intrinsics] factorize vmaxnmavq vmaxnmvq vminnmav [...] adds d16321ad9ba arm: [MVE intrinsics] add support for mve_q_p_f adds 400453c334a arm: [MVE intrinsics] rework vmaxnmavq vmaxnmvq vminnmavq vminnmvq adds 26d6e02c42b arm: [MVE intrinsics] factorize vmaxnmaq vminnmaq adds adff073bb1c arm: [MVE intrinsics] rework vmaxnmaq vminnmaq adds f75909127f7 arm: [MVE intrinsics] add binary_maxamina shape adds dcc05862bf3 arm: [MVE intrinsics] factorize vmaxaq vminaq adds cf2c47b159d arm: [MVE intrinsics] rework vmaxaq vminaq adds c13906f258f c++: noexcept-spec from nested class confusion [PR109761] adds bbb6cf926f1 c++: error-recovery ICE with unstable satisfaction [PR109752] adds 7bd251ca751 libstdc++: Fix <chrono> pretty printers and add tests adds 4e54299fcc2 Update gcc hr.po adds 955172f0d46 Update cpplib ru.po adds 35e324da03c Daily bump. adds 46f9d150c71 CRIS: Fix ccmode typo in cris_postdbr_cmpelim adds 3ef0ebf901f New testcase adds 69f3914414a RISC-V: Fix dead loop for user vsetvli intrinsic avl checki [...] adds a2676383adf RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SU [...] adds 04655110837 RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instru [...] adds 39d6d4256d1 c++: Reject attributes without arguments used as pack expan [...] adds d1e7f999308 aarch64: PR target/99195 annotate simple narrowing patterns [...] adds e7fe650692d aarch64: Simplify QSHRN expanders and patterns adds c8977cf5f2d aarch64: PR target/99195 annotate simple saturating add/sub [...] adds 3ed5677bb61 [PATCH] aarch64: PR target/99195 annotate simple permutatio [...] adds 5a7dda68000 aarch64: Simplify sqmovun expander adds 395a75593ef ipa-prop: Fix ipa_get_callee_param_type for calls with argu [...] adds 02d79fb228c Fix a couple constraints on the H8 in preparation for LRA c [...] adds a056a9868e6 Avoid g++.dg/torture/pr106922.C FAIL with the pre-C++11 ABI adds 688fdde2f18 c++: always check consteval address adds 8d46516a61a c++: be stricter about constinit [CWG2543] adds 31f8d164391 MAINTAINERS: Add myself to write after approval adds 5476c914283 libstdc++: [_Hashtable] Implement several small methods imp [...] adds e91937e9a48 Add another new testcase adds 39f7c0963a9 Fortran: dump-parse-tree attribs: fix unbalanced braces [PR109624] adds bdc10c2bfac Fortran: dump-parse-tree: Mark debug functions with DEBUG_FUNCTION adds 608e7f3ab47 i386: Add missing vector extend patterns [PR92658] adds 62c4d34ec00 c++: adjust conversion diagnostics adds 475904f710c Use [(const_int 0)] idiom consistently in i386.md adds 4c2ffb02fd4 c++: wrong std::is_convertible with cv-qual fn [PR109680] adds 08d0d17bef9 Daily bump. adds acf5c03aa11 MAINTAINERS: Add myself to write after approval adds 003f388cddb RISC-V: Support const series vector for RVV auto-vectorization adds c0dd80e4c4c match.pd: Simplify popcount/parity of bswap/rotate. adds 5fdcfe3c577 match.pd: Simplify popcount(X&Y)+popcount(X|Y) as popcount( [...] adds 23c49bb8d09 Testsuite: Add missing 'torture-init'/'torture-finish' arou [...] adds 5e05361e2fe Testsuite: Add 'torture-init-done', and use it to condition [...] adds c49d51fa813 Implement LDPT_REGISTER_CLAIM_FILE_HOOK_V2 linker plugin ho [...] adds 6a08718ae54 arm: [MVE intrinsics] factorize vcmp adds 8e2176008c5 arm: [MVE intrinsics] add cmp shape adds 7674ae25a93 arm: [MVE intrinsics] rework vcmp adds 0c1eb90103c arm: [MVE intrinsics] factorize vrev16q vrev32q vrev64q adds dd69152448f arm: [MVE intrinsics] rework vrev16q vrev32q vrev64q adds fc468102c56 arm: [MVE intrinsics] factorize vdupq adds acf9741c530 arm: [MVE intrinsics] add unary_n shape adds fbcb43fa0b2 arm: [MVE intrinsics] rework vdupq adds eb1ded464f3 arm: [MVE intrinsics] factorize vaddvq adds 8cb62ff9a8c arm: [MVE intrinsics] add unary_int32 shape adds 56b099f6b30 arm: [MVE intrinsics] rework vaddvq adds 782eb6bb163 arm: [MVE intrinsics] factorize vaddvaq adds 0b81d40068b arm: [MVE intrinsics] add unary_int32_acc shape adds cf24e531874 arm: [MVE intrinsics] rework vaddvaq adds 7e3c2d23cfd arm: [MVE intrinsics] add unary_acc shape adds fa2c9dbb6ea arm: [MVE intrinsics] factorize vaddlvq adds 218e01eeca8 arm: [MVE intrinsics] rework vaddlvq adds 51fca3e13c3 arm: [MVE intrinsics] factorize vmovlbq vmovltq adds 9d7f7762ffe arm: [MVE intrinsics] add unary_widen shape adds fb7044999b1 arm: [MVE intrinsics] rework vmovlbq vmovltq adds 0440b774ea3 fortran: use grep instead of fgrep adds 0918360d709 VECT: Add tree_code into "creat_iv" and allow it can handle [...] adds af595613acb libstdc++: Fix std::abs(__float128) for -NaN and -0.0 [PR109758] adds b75c9e10379 RISC-V: Add vectorized binops and insn_expander helpers. adds 84d2899638a RISC-V: Clarify vlmax and length handling. adds 8c08201f06e RISC-V: Split off shift patterns for autovectorization. adds 6cb594f3ffc RISC-V: Add autovectorization tests for binary integer operations. adds 44564a4ab7b RISC-V: Update RVV integer compare simplification comments adds 88056507031 MAINTAINERS: Fix alphabetic sorting. adds 3ec6d8a030c [vxworks] [testsuite] [aarch64] use builtin in pred-not-gen-4.c adds c3afdb8ba8f c++: converted lambda as template argument [PR83258, ...] adds 6445f122450 RISC-V: Allow vector constants in riscv_const_insns. adds 0d0c467d216 c++: Add testcase for already fixed PR [PR103807] adds fd95566fda0 syscall: add prlimit adds 3e8f8ab5237 Improve simple_dce for phis that only used in itself adds 10a0d983566 i386: Handle V4HI and V2SImode in ix86_widen_mult_cost [PR109807] adds 42c94ccef89 arm: [MVE intrinsics] factorize vaddlvaq adds 2b46dbc0480 arm: [MVE intrinsics] add unary_widen_acc shape adds 2d1a5a441e1 arm: [MVE intrinsics] rework vaddlvaq adds 93597d92189 arm: [MVE intrinsics] add binary_acc_int32 shape adds 1817749dedf arm: [MVE intrinsics] factorize vmladav vmladavx vmlsdav vm [...] adds 0077e82f160 arm: [MVE intrinsics] rework vmladavq vmladavxq vmlsdavq vmlsdavxq adds 018aa0db0e1 arm: [MVE intrinsics] add binary_acca_int32 shape adds a39810adbb3 arm: [MVE intrinsics] rework vmladavaq vmladavaxq vmlsdavaq [...] adds 1af6d1db3e3 arm: [MVE intrinsics] factorize vabavq adds 817a406a6fd arm: [MVE intrinsics] rework vabavq adds 80b97e0b7df arm: [MVE intrinsics] add binary_acc_int64 shape adds c1e068e41d8 arm: [MVE intrinsics] factorize vmlaldavq vmlaldavxq vmlsld [...] adds 0e6b57d3e89 arm: [MVE intrinsics] rework vmlaldavq vmlaldavxq vmlsldavq [...] adds e044696f513 arm: [MVE intrinsics] factorize vrmlaldavhq vrmlaldavhxq vr [...] adds 23ff8097a90 arm: [MVE intrinsics] rework vrmlaldavhq vrmlaldavhxq vrmls [...] adds 4d97b9ca857 arm: [MVE intrinsics] add binary_acca_int64 shape adds c68ccdf2532 arm: [MVE intrinsics] factorize vmlaldavaq vmlaldavaxq vmls [...] adds 1c7755378c2 arm: [MVE intrinsics] rework vmlaldavaq vmlaldavaxq vmlslda [...] adds 17c4f632d3b arm: [MVE intrinsics] add ternary shape adds 3bf67ec9730 arm: [MVE intrinsics] factorize vqdmladhq vqdmladhxq vqdmls [...] adds 8fe848c42de arm: [MVE intrinsics] rework vqrdmladhq vqrdmladhxq vqrdmls [...] adds 129a59c6abc arm: [MVE intrinsics] add ternary_n shape adds f2fd708ac75 arm: [MVE intrinsics] factorize vmlaq_n vmlasq_n vqdmlahq_n [...] adds 9eea27e7cec arm: [MVE intrinsics] rework vmlaq vmlasq vqdmlahq vqdmlash [...] adds c4638cc4164 aarch64: convert vector shift + bitwise and + multiply to v [...] adds c62e945492a libstdc++: Enforce value_type consistency in strings and streams adds aa39ed4467d libstdc++: Fix chrono::hh_mm_ss::subseconds() [PR109772] adds bd02669579f libstdc++: Use RAII types in strtod-based std::from_chars i [...] adds 02777f20be4 c++: 'mutable' subobject of constexpr variable [PR109745] adds c787f593e62 PR modula2/109810 ICE fix when an array is assigned by a la [...] adds 3d125c91cc2 Daily bump. adds 1ebe8c20c1b Var-Tracking: Typedef pointer_mux<tree_node, rtx_def> as de [...] adds e25dc59d051 rs6000: Change mode and insn condition for scalar extract e [...] adds 6c937cd0962 rs6000: Change mode and insn condition for scalar extract s [...] adds 70900735011 rs6000: Change mode and insn condition for scalar insert ex [...] adds e24fe8e416e rs6000: Change ilp32 target check for scalar-extract-sig an [...] adds de1ac6283fa RISC-V: Fix RVV binary auto-vectorizaiton test fails adds c2d62cdd63f RISC-V: Reorganize binary autovec testcases adds 1c1a9d8ed84 RISC-V: Add basic vec_init for VLS RVV auto-vectorization adds 4f67400b847 RISC-V: Fix fail of vmv-imm-rv64.c in rv32 adds b1cdda9f361 libgomp testsuite: Localize 'lang_[...]' etc. adds 5649dca8ae3 libgomp C++, Fortran testsuites: Resolve 'lang_test_file_fo [...] adds a49c5ca9500 libgomp testsuite: Get rid of 'lang_test_file_found' adds b794dc77938 libgomp testsuite: Generalize 'lang_library_path' into a li [...] adds 7a7f6b26259 RISC-V: Suppress unused parameter warning in riscv-common.cc adds 9b926766501 arm: [MVE intrinsics] add binary_widen_opt_n shape adds c71b5c7862b arm: [MVE intrinsics] factorize vqdmullbq vqdmulltq adds 111a4f5490a arm: [MVE intrinsics] rework vqdmullbq vqdmulltq adds e18f715ba07 arm: [MVE intrinsics] factorize vrmlaldavhaq vrmlaldavhaxq [...] adds e77a5adee2d arm: [MVE intrinsics] rework vrmlaldavhaq vrmlaldavhaxq vrm [...] adds 992b3be29a0 arm: [MVE intrinsics] add binary_lshift_unsigned shape adds 85c463f5434 arm: [MVE intrinsics] factorize vqshluq adds 120290ad48e arm: [MVE intrinsics] rework vqshluq adds 2d262f5f9c2 arm: [MVE intrinsics] add binary_imm32 shape adds 6ff07398d52 arm: [MVE intrinsics] factorize vrbsrq adds 5e000215a5e arm: [MVE intrinsics] rework vbrsrq adds aae9dfd3647 arm: [MVE intrinsics] add mvn shape adds b74d6acf736 arm: [MVE intrinsics] factorize vmvnq adds 5ca0f988e8f arm: [MVE intrinsics] rework vmvnq adds b62c9c77c94 arm: [MVE intrinsics] add ternary_opt_n shape adds fbab00f0e34 arm: [MVE intrinsics] factorize vfmaq vfmsq vfmasq adds 179507399a3 arm: [MVE intrinsics] rework vfmaq vfmasq vfmsq adds f7196b72752 arm: [MVE intrinsics] factorize vpselq adds 4be4771b8f6 arm: [MVE intrinsics] add vpsel shape adds d607ae032cd arm: [MVE intrinsics] rework vpselq adds ae5c1d25e77 arm: [MVE intrinsics] add ternary_lshift shape adds 3767c7fe356 arm: [MVE intrinsics] factorize vsliq adds 6caaf36ee62 arm: [MVE intrinsics] rework vsliq adds 3257936148c arm: [MVE intrinsics] add ternary_rshift shape adds be373b5488d arm: [MVE intrinsics] factorize vsriq adds f52bf590e33 arm: [MVE intrinsics] rework vsriq adds 560a3e35fe0 tree-optimization/109791 - simplify (unsigned)&foo - (unsig [...] adds 11fa2729eff c++: robustify testcase [PR109752] adds 10098788ff6 c++: remove redundant testcase [PR83258] adds cc0e22b3f25 tree-optimization/64731 - extend store-from CTOR lowering t [...] adds c919d059fcb RISC-V: Optimize vsetvli of LCM INSERTED edge for user vset [...] adds fe0e3df6f37 libstdc++: Remove test dependencies on _GLIBCXX_USE_C99_STDINT_TR1 adds b3e82ed8839 libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1 adds 2c04284abe5 libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDINT_TR1 adds a835f046cdf LTO: Fix writing of toplevel asm with offloading [PR109816] adds 75aa95694ed i386: Remove mulv2si emulated sequence for TARGET_SSE2 [PR109797] adds 1953c0cfb00 PR modula2/109830 m2iso library SeqFile.mod appending to a [...] adds 6d664515720 libstdc++: Remove <random> dependency on _GLIBCXX_USE_C99_S [...] adds 0b6aebf7bbe libstdc++: Reduce <atomic> dependency on _GLIBCXX_USE_C99_S [...] adds 1f973c295b6 libstdc++: Remove redundant dependencies on _GLIBCXX_USE_C9 [...] adds 6190a74ebee libstdc++: Fix -Wnonnull warnings during configure adds 00fffa91f77 i386: Cleanup ix86_expand_vecop_qihi{,2} adds cf3b032b8fb Fortran: Initialize last_char for internal units. adds 96cc09dea48 Fortran: Revise a namelist test case. adds 20ca33db817 Daily bump. adds 99488a60487 MATCH: Fix PR 109834, ICE with popcount combined with bswap adds ea7a9f361e7 RISC-V: Improve vector_insn_info::dump for LMUL and policy adds 1d339ce8d00 RISC-V: Pull out function call with side effect from gcc_assert. adds 8b18714fbb1 [aarch64] Recursively intialize even and odd sub-parts and [...] adds 2415442489d Replace bool as boolean instead of int in libgm2 adds c34cede1f2a Daily bump. adds 1871740c780 RISC-V: Refactor the or pattern to switch cases adds bde21de1205 i386: Honour -mdirect-extern-access when calling __fentry__ adds aed51e2051b i386: Handle unsupported modes from ix86_widen_mult_cost [P [...] adds 82502b5c346 MATCH: Add pattern for `signbit(x) ? x : -x` into abs (and [...] adds b4c6faa5375 Daily bump. adds f2afe68a175 RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT [...] adds 66e268eb063 Fix gcc.dg/vect/pr108950.c adds 7db541ce448 tree-optimization/109848 - fix TARGET_MEM_REF store from CT [...] adds e9ea407c474 RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization adds 676d33f95ee aarch64: PR target/99195 annotate qabs,qneg patterns for ve [...] adds e90791e5a02 aarch64: PR target/99195 annotate vector compare patterns f [...] adds f04dae64111 ada: Fix link to parent when copying with Copy_Separate_Tree adds bc60b3c3508 ada: Fix Unchecked_Conversion in edge case adds 983f4eff259 ada: Reject attribute Initialize on unchecked unions adds 468a053530f ada: Skip dynamic interface conversion under native runtime adds a92397f05de ada: GNAT UGN: Add section documenting PIE being enabled by [...] adds b7d26cb1fe3 ada: INOX: prototype RFC on String Interpolation adds c9ed0840840 ada: Allow pragmas Annotate between loop pragmas adds f959a78b0d2 ada: Fix proof of runtime unit System.Value* adds a372273b63b ada: Fix invalid JSON for extended variant record with -gnatRj adds 0f7d8f2f669 ada: Fix handling of pragma Warnings (Toolname, Off/On) adds b4509d19601 ada: Add Check_Error_Detected before "raise Bad_Attribute" adds 4b7373ea32e ada: Optimize 2**N to avoid explicit 'if' in modular case adds f571a20192d ada: Fix minor documentation formatting issue adds 83a0b4e7e34 ada: Improve check of attribute reference adds a1f35b49196 ada: Update comment after SPARK RM change adds a3594ab9646 ada: Emit warnings for (some) ineffective static predicate tests adds 4590d973dd6 ada: Accept aggregates with OTHERS clause in unchecked type [...] adds 78de6f03ca3 ada: Simplify lookup of predecessor in homonym chain adds 1f068a17811 ada: Remove redundant protection against empty lists adds 0ca7fcf5635 ada: Fix internal error on instance in package body with -gnatn adds d2a1dcf72f7 ada: Clean up vanishing entity fields adds 51e8f41212c ada: Improve comment on First_Entity adds ade343e6694 ada: Remove duplicated code in Proc_Next_Component_Or_Discriminant adds 0ec72fa3db1 ada: Fix formatting inconsistency in User's Guide adds d41df0366e6 ada: Use Inline aspect instead of pragma in Einfo.Utils adds 2b38d009954 ada: Fix comment related to inlining adds 75fb45f0692 ada: Recover proof of Interfaces.C for termination adds a398b5479c9 ada: Recover proof of runtime units adds 9c213cb8671 ada: Add annotations for proof of termination of runtime units adds 8d1c1b02d6e ada: Fix typo in comment adds 9be9be828dc fix assert in __deregister_frame_info_bases adds 30e42bb66d3 libgomp testsuite: Have each '*.exp' file specify the compi [...] adds 982c869ec00 libgomp testsuite: As appropriate, use the 'gcc', 'g++', 'g [...] adds e797db5c744 Support parallel testing in libgomp, part I [PR66005] adds 6c3b30ef9e0 Support parallel testing in libgomp, part II [PR66005] adds c4733ea2b46 aarch64: Cost vector comparisons more accurately adds 30adfb85ff9 fix assert in non-atomic path adds 47c4e96ad61 OPTABS: Extend the number of expanding instructions pattern adds 5ed880788ba RISC-V: Add rounding mode operand for fixed-point patterns adds 32b81d89762 c++: add feature-test macro for auto(x) adds 82e706cbf38 Only return changed=true in union_nonzero when appropriate. adds 76e11280e79 Add auto-resizing capability to irange's [PR109695] adds fa0569e90ef Fortran: CLASS pointer function result in variable definiti [...] adds 2f27218ced2 c: Update __has_c_attribute values for C2x adds d62d5686f41 c: Ignore _Atomic on function return type for C2x adds 3427b51bcca Daily bump. adds 8cd140d3658 RISC-V: Add FRM and rounding mode operand into floating poi [...] adds b06cfb62229 MATCH: [PR109424] Simplify min/max of boolean arguments adds 1c6ebfdf033 Skip -fdelete-null-pointer-check tests if target keeps_null [...] adds 6c95fe9bc05 Fortran: Fix an assortment of bugs adds 0cc6d0e7e24 s390: Refactor block operation cpymem adds 5154171e1f3 s390: Add block operation movmem adds c4dbea65b27 s390: Refactor block operation setmem adds fa1c2ec1bb5 RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests adds c850b1a7dcd ada: Restore proof of System.Arith_Double adds 3c09e25e2c9 ada: Trivial refactoring in Instantiate_*_Body adds 04606c1229d ada: Set Loop_Variant assertion policy to Ignore in both adds 24917325cef ada: Missing dependency with -gnatc adds fd0f8d24866 ada: Add intermediate assertions for proof of Super_Tail adds 913794b1cb7 ada: Simplify dramatically ghost code for proof of System.A [...] adds b92d0c4564a ada: Change Present_Expr field type to Uint adds 4b8f39b21e2 ada: Introduce Cannot_Be_Superflat flag on N_Range nodes adds 05c1e15f9fa ada: Bad handling of ASCII with -gnatyn adds 5c6e2616452 ada: Document examples of No_Dependence restriction for cod [...] adds 66152ecdaeb ada: Get name from entity if that's what's passed to Subpro [...] adds c637076413a ada: Build invariant procedure while freezing in GNATprove mode adds ca4bff3a3d0 ada: Adjust semantics and implementation of storage models adds 387e147cf51 ada: Fix typo in "pattern" adds b54fd57a1b3 ada: Add tags on style messages adds cbf64a80379 ada: Follow-up improvement to implementation of storage models adds 6c0b94efaa8 ada: Enable Support_Atomic_Primitives on PPC Linux adds 2ffa7a68401 ada: Fix Ada representation of r_debug and link_map types adds 4803e348aa6 ada: usage.adb: document -gnatyD switch adds b358f011bde ada: Apply range checks to preanalyzed aggregate expressions adds b979a474167 ada: Spurious error on function returning CPP type adds 072861beb9b ada: Spurious error analyzing 'old or 'result in class-wide [...] adds bac7eb85ef0 ada: Implement inheritance of user-defined literal aspects [...] adds 8ebdd443182 ada: Update proof of runtime units adds 5f8a29bd348 ada: Fix internal error on chain of predicated record types adds ae334957c7d ada: Fix internal error on 'Image applied to array component adds 5fa02009e49 ada: Fix crash on iterated component in expression function adds e07e6ea6924 ada: Fix missing warning on aggregate with iterated component adds 9a70dce2788 ada: Use accumulator type in expansion of 'Reduce attribute adds 45efdda3ff6 ada: Add "gnat --help-ada" text for new switches. adds 3b7cb33033f libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer adds 151bad41021 libstdc++: Require tzdb support for chrono::zoned_time prin [...] adds bf904527ab6 libstdc++: Add assertion to debug_allocator test adds 0d76fb1582c libstdc++: Stop using _GLIBCXX_USE_C99_COMPLEX_TR1 in <complex> adds 5baabdb15d0 libstdc++: Stop using _GLIBCXX_USE_C99_STDINT_TR1 in <cstdint> adds ac3a5bbc629 libstdc++: Stop using TR1 macros in <cctype> and <cfenv> adds 057e537e2a6 aarch64: Allow moves after tied-register intrinsics (2nd edition) adds cf4dcfa6727 PR modula2/108344 disable default opening of /dev/tty adds 66d9ac083cc rs6000: Fix test gc.target/powerpc/rs600-fpint.c test options adds 38dc1b9145d rs6000: Fix test int_128bit-runnable.c instruction counts adds 008cbecf622 RISC-V: Fix wrong select_kind in riscv_compute_multilib adds 9417b30499c rs6000: Enable REE pass by default adds d5e5007c4b5 c++: desig init in presence of list ctor [PR109871] adds 94a311abf78 libstdc++: Disable cacheline alignment for DJGPP [PR109741] adds f25d2de1766 c++: -Wdangling-reference not suppressed in template [PR109774] adds 509eef9314b PR modula2/109879 WholeIO.ReadCard and ReadInt should consu [...] adds 036b4eb47e5 c: Remove restrictions on declarations in 'for' loops for C2X adds 0d566057519 Daily bump. adds 5eb7d560626 rs6000: use lis;xoris to build constant adds d709841ae0f Disable warnings as errors for STAGEautofeedback. adds e0f2f471179 RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool1_t adds a04bf39f61c vect: Don't retry if the previous analysis fails adds 78327cf06e6 c++: Don't try to initialize zero width bitfields in zero i [...] adds 2a03d979a28 wide-int: Fix up function comment adds b8fcc89b5bf s390: Implement TARGET_ATOMIC_ALIGN_FOR_MODE adds 7ddbc6171b3 libstdc++: Regenerate configure adds 80bb0b8a81f Fortran/OpenMP: Fix mapping of array descriptors and deferr [...] adds d8a656d5b62 doc: Describe behaviour of enums with fixed underlying type [...] adds 029bfd4f419 Add support for vrange streaming. adds 615e3d1e930 Provide support for copying unsupported ranges. adds f513a10e4df Add Value_Range::operator=. adds 01d62e9b6c3 RISC-V: Add rounding mode enum for fixed-point intrinsics adds f65af1eeef6 Fix PR 106900: array-bounds warning inside simplify_builtin_call adds 24bd7168112 RISC-V: Introduce rounding mode operand into fixed-point in [...] adds e682d300261 RISC-V: Add mode switching target hook to insert rounding m [...] adds 637edefc586 libstdc++: use __bool_constant instead of integral_constant adds f5b246ce5fd WriteInt in the ISO libraries should not emit '+' for posit [...] adds 3da8f61fe2b i386: Adjust emulated integer vector mode multiplication costs adds f289749578d tree-ssa-math-opts: correct -ffp-contract= check adds c8da62cfc64 i386: Fix up types in __builtin_{inf,huge_val,nan{,s},fabs, [...] adds ba490492e51 libstdc++: Implement LWG 3877 for std::expected monadic ops adds 98827c53ed3 libstdc++: Add system_header pragma to <bits/c++config.h> adds 6da6ed95c9c RISC-V: Remove masking third operand of rotate instructions adds 5e1e16d58ec libstdc++: Uncomment checks for <limits> enumeration types adds 883f1e25dc7 libstdc++: Fix up some <cmath> templates [PR109883] adds 7bafe652dba Fortran: set shape of initializers of zero-sized arrays [PR [...] adds da9140b90e6 doc: Fix a pinch of typos in extend.texi adds ef5d2d76506 Add clear_cache expander. adds 7b0073c6a4c RISC-V: Remove trailing spaces on lines. adds 6c6f96040a1 Fix type error of 'switch (SUBREG_BYTE (op)).' adds eb35e343a29 c: Handle printf %B like %b for C2x adds ff2dcddfc4d Daily bump. adds 6657950d523 Disable warnings as errors for STAGEautofeedback. adds b14af304965 Machine_Mode: Extend machine_mode from 8 to 16 bits adds ebce8ee8993 arm: Mve testsuite improvements adds ae180f26109 arm: Fix vstrwq* backend + testsuite adds f2dd012ae6c arm: Mve backend + testsuite fixes 2 adds 8eedd1e1d6a arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSC [...] adds 64a38e2f7c8 arm: Fix overloading of MVE scalar constant parameters on vbicq adds 10a0ee8a9c0 arm: Fix MVE header pointer overloads this time (and a bit [...] adds 8c0c310a4f6 arm testsuite: Remove reduntant tests adds 7587c2e3844 arm testsuite: XFAIL or relax registers in some tests [PR109697] adds 340cd371d63 arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes adds 95b93adcac6 gcc: Fix nonportable shell syntax in "test" and "[" command [...] adds 6e2fbe4f345 gcc: Fix nonportable shell syntax in "test" and "[" command [...] adds 120e444974e contrib: Fix nonportable shell syntax in "test" and "[" com [...] adds a726d007f19 Remove a stale */ after a 1-line // comment. adds fe7b9c2e21e i386: Add infrastructure for QImode partial vector mult and [...] adds c072df1ab14 Fortran: Narrow return types [PR78798] adds 04682fe7640 ada: use _P() defines from tree.h adds 778aca1b4f4 analyzer: use _P() defines from tree.h adds 9907413a3a6 gcc/config/*: use _P() defines from tree.h adds 8861c80733d c++: use _P() defines from tree.h adds 8621e06ae8d m2: use _P() defines from tree.h adds f6a4d079419 lto: use _P() defines from tree.h adds 7c8fb3d5f17 d: use _P() defines from tree.h adds 22ab4ed58b3 fortran: use _P() defines from tree.h adds 9157b213f56 c: use _P() defines from tree.h adds 92ce0786da3 objc: use _P() defines from tree.h adds a64c2b0d922 omp: use _P() defines from tree.h adds ca2007a9bb3 gcc: use _P() defines from tree.h adds b27760769ca Daily bump. adds c3db1096741 c: Do not allow thread-local tentative definitions for C2x adds 24dcf65dabf Fix internal error on small array with negative lower bound adds 20b8779ea9b Darwin, libgcc : Adjust min version supported for the OS. adds e82025df628 libstdc++: Move lafstern.org reference to https adds 9abc830247e libgomp: Fix up -static -fopenmp linking [PR109904] adds 62d08a67c83 tree-ssa-math-opts: Pattern recognize hand written __builti [...] adds bd0f2828432 tree-ssa-math-opts: Pattern recognize some further hand wri [...] adds 0a78bc26dad PR modula2/109908 Delete from m2iso Strings is broken adds 64d6a4dfd98 RISC-V: Allow more loading of const vectors. adds e430b32528d RISC-V: testsuite: Remove empty *-run-template.h. adds ef8926d23a4 c++: scoped variable template-id of reference type [PR97340] adds c5709fc8713 c++: simplify norm_cache manipulation adds c104ef4b5eb RISC-V: improve codegen for large constants with same 32-bi [...] adds cddb6dd6668 Fix driver/33980: Precompiled header file not removed on error adds 05b7cc7daac fortran: Use CLASS_DATA from gfortran.h adds ae2345285c2 c: Remove dead code related to type compatibility across TUs. adds 259b4b7d349 RISC-V: Remove masking third operand of rotate instructions adds 97a36b466ba Allow plugin dumps adds 5df01f89b7f Daily bump. adds 9000da00dd7 RISC-V: Fix CTZ unnecessary sign extension [PR #106888] adds 31cc55f4ff3 Add bext pattern for ZBS adds 55914b016de Fix riscv_expand_conditional_move. adds 7bde4c3dcde Move fold_single_bit_test to expr.cc from fold-const.cc adds 8f4929df23f Inline and simplify fold_single_bit_test_into_sign_test int [...] adds 3b537ab625e Use get_def_for_expr in fold_single_bit_test adds 9d2fdcab162 Simplify fold_single_bit_test slightly adds 5c68c27f3d0 Simplify fold_single_bit_test with respect to code adds c5df248509b Use BIT_FIELD_REF inside fold_single_bit_test adds 40c5ba42bbd Expand directly for single bit test adds 80348e6aec4 target/105753: Fix ICE in add_clobbers due to extra PARALLE [...] adds 65c7725eecb Mode-Switching: Fix local array maybe uninitialized warning adds b1f399cf6c8 install.texi: Remove alpha*-*-* section adds 7f6e0816f0f Daily bump. adds ee0f1f2294b Fix PR 109919: ICE in emit_move_insn with some bit tests adds 660754a8204 RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool[2-64]_t adds 7f3df8e65c7 Fix expand_single_bit_test for big-endian adds f211757f6fa atch.pd: Ensure (op CONSTANT_CLASS_P CONSTANT_CLASS_P) is s [...] adds c09471fbc75 nvptx: Add suppport for __builtin_nvptx_brev instrinsic. adds dad3c18fbb4 target/90622: __builtin_avr_insert bits: Use BLD/BST for on [...] adds ad0f80d945c libgomp: Honor OpenMP's nteams-var ICV as upper limit on nu [...] adds 4579954f250 Daily bump. adds 285e0bb95dd vect: Refactor code for index == count in vect_transform_sl [...] adds 7b0986acf20 RISC-V: Reorganize the code of CONST_VECTOR handling in riscv.cc adds 16df2790a58 VECT: Fix bug of multiple-rgroup for length is counting elements adds df0ac6e1587 ada: prevent infinite recursion in Collect_Types_In_Hierarchy adds e7f7018c2a5 ada: update Ada_Version_Type in fe.h to match opt.ads adds 01b0a60038a ada: Update Controlling_Argument when copying trees adds c9de07cd00c ada: Don't pretty-print DEL within expression images adds 68d93e0111d ada: Restrict expression pretty-printer to subexpressions adds f120fa23675 ada: Fix traversal for the rightmost node of a pretty-print [...] adds 5105de33536 ada: Fix handling of constrained array declarations in decl [...] adds 60498ae3a06 ada: Fix double finalization in conditional exit statement adds e1f5cf0b14c ada: Better error message if non-Ada2022 code declares No_R [...] adds 165b05717cf ada: Reject illegal declarations in expression functions adds 159977048dc ada: Fix error and crash on imported function with precondi [...] adds 05e628c249e ada: Implement conversions from Big_Integer to large types adds f23d4b88f5b ada: Fix crash on Ada.Containers with No_Dispatching_Calls [...] adds 561b2393278 ada: Add contracts to Ada.Strings.Unbounded library adds a26f6a6aad7 ada: Remove unreferenced utility routine Is_Actual_Tagged_P [...] adds 03fc0621f5e ada: Support calls through dereferences in Find_Actual adds ef7a3876208 ada: Remove redundant protection against empty lists adds d516e77b5ed ada: Remove a remaining reference to ? adds 8f563162db8 ada: Remove extra parentheses adds 86bcf5d5d36 ada: Improve -gnatyx style check adds 3754477bb08 ada: Fix spurious warning on Inline_Always and contracts adds f2cffc11f85 ada: Add warning on frontend inlining of Subprogram_Variant adds 472f4cb52ac ada: Accept Assert pragmas in expression functions adds af1914998dc ada: Add Is_Past_Self_Hiding_Point flag adds 012de9f65cb ada: Cleanup redundant condition in resolution of entity names adds 55f24dde7b5 ada: Further fixes to GNATprove and CodePeer expression pre [...] adds ea97b4dbee9 ada: Fix spurious freezing error on nonabstract null extension adds 25e4024cd14 ada: Rename Is_Past_Self_Hiding_Point flag to be Is_Not_Sel [...] adds eed5c23c8bd ada: Fix missing finalization in library-unit instance spec adds 8c7a0c389e2 ada: Remove outdated part of comment adds c58d5574ae7 ada: Fix missing finalization in separate package body adds eb16654e447 ada: Fix crash caused by incorrect expansion of iterated component adds 6675552bacd ada: Incorrect constant folding in postcondition involving 'Old adds cf0d1f43ae4 ada: Add missing word in comment adds 7434fb66674 ada: Fix source location for crashes in expanded Loop_Entry [...] adds 2d751b416a8 ada: Use idiomatic construct in Expand_N_Package_Body adds 8911204d4ab ada: Small cleanup in support for protected subprograms adds 014f7f3a707 ada: Avoid repeated calls when looking for first/last slocs [...] adds 0321dae0b83 ada: Reuse idiomatic procedure in CStand adds 8637aecd5ae RISC-V: Fix typo of multiple_rgroup-2.h adds 776d94f0b14 RISC-V: Add "m_" prefix for private member adds a8900fe4812 Skip some tests that won't work for target AVR. adds 11ef53f0e8f i386: Account for the memory read in V*QImode multiplicatio [...] adds 9f5065094c9 testsuite/52641: Fix tests that fail for 16-bit int / point [...] adds a7129e82bed libstdc++: Resolve -Wunused-variable warnings in stdx::simd [...] adds 42d6b7d58ca testsuite/52641: Fix more of implicit int=32 assumption fallout. adds 90685c36579 Implement some miscellaneous zero accessors for Value_Range. adds 306412a78f5 i386: Adjust emulated integer vector mode shift costs adds b9fb093e7cc libobjc: Add local macros to support encode generation [P109913]. adds c5300bf3110 Daily bump. adds 056280dea42 Fortran: Allow declaration of finalizable DT in a submodule [...] adds 842a432b022 Fortran: Fix assumed length chars and len inquiry [PR103716] adds 493a63af6cb Use delete[] in int_range destructor [PR109920] adds da579188807 libstdc++: Add missing constexpr to simd adds c565a974d0d ada: Crash on dispatching primitive referencing limited-with type adds fdadfcc50ee ada: Remove duplicate comment adds 55d10287e5a ada: Minor fix typo in comment adds 507fe403b50 ada: Small code cleanup adds 53ed0028ada ada: Suppress warning about Subprogram_Variant failing at run time adds 0b369aed43e ada: Fix expression pretty-printer for SPARK counterexamples adds 0333af4d174 ada: Transfer fix for pretty-printed parentheses from GNATp [...] adds eceeb07b214 ada: Remove special-case for parentheses in expansion for G [...] adds e32c1944bba ada: Ignore accessibility actuals in expression pretty-printer adds 35a035c210e ada: Revert to old pretty-printing of internal entities for [...] adds db338ee106a ada: Sync different variants of interrupt handler registration adds ea5a7a774a2 ada: Fix bogus error on predicated limited record declared [...] adds 674ab59dc50 ada: Fix internal error on quantified expression with predi [...] adds adf71a9ba51 ada: Fix endings of pretty-printed numeric literals adds 65d2481a4f9 ada: Add mention of what LSP stands for adds 18ed1bc5939 ada: Turn assertions into defensive code in error locations adds 90e14459041 ada: Spurious errors on class-wide preconditions of private types adds b64aaf4d819 ada: Remove the body of System.Storage_Elements adds cf1cee3fadc ada: Facilitate proof of Interfaces.C.To_Ada adds 583acc4d8e5 ada: Add default value at initialization for CodePeer adds 0fb36084e3e ada: A discriminant of a variable is not a variable adds 6efcce36f57 ada: Fix address arithmetic issues in the runtime adds 544d5ff153b ada: Fix address arithmetic issues in the expanded code adds ae8f82fd034 ada: Fix reference to Ada issue in comment adds 9826f1e019f ada: Remove unnecessary call to Detach. adds ad16b816d56 ada: Fix resolution of mod operator of System.Storage_Elements adds b71d4b627b5 ada: Reorganize documentation of GNAT experimental features adds a550a0cf91d ada: Fix oversight in latest change adds a0cc548a8a1 ada: Fix minor address arithmetic issues in System.Dwarf_Lines adds 37529975272 ada: Add new switch -gnatyz adds f0593467b5c ada: Update ghost code for proof of integer input functions adds 1dd52433d2d ada: Make string interpolation part of the core extensions adds e15ce6502c7 ada: Fix address manipulation issue in the tasking runtime adds ac243c845a2 ada: Fix latent issue in support for protected entries adds 47a084d96bb ada: Cleanup inconsistent iteration over exception handlers adds e77a66ee9a6 ada: Add tags to warnings controlled by Warn_On_Redundant_C [...] adds b0245ee3b37 ada: Remove redundant parentheses from System.Stack_Checkin [...] adds 4ca26401aa6 ada: ICE on BIP call in class-wide function return within instance adds 7131ee2788e ada: Rework fix for internal error on quantified expression [...] adds 61285c4805b ada: Accept and analyze new aspect Exceptional_Cases adds 50143b85bd9 Fix handling of non-integral bit-fields in native_encode_in [...] adds 758d916cb7b Minor tweak adds 9e2017ae6ac tree-optimization/109849 - missed code hoisting adds 75d1eff5933 aarch64: PR target/109855 Add predicate and constraints to [...] adds 51fd69ec2d5 RISC-V: Refactor the framework of RVV auto-vectorization adds b0ad9159a5a md: Allow <FOO> to refer to the value of int iterator FOO adds b096a6ebe9d aarch64: Provide FPR alternatives for some bit insertions [ [...] adds 0b4ae6e1ec8 Dump ANTIC_OUT before pruning it adds 8d5f050dabb Remove buggy special case in irange::invert [PR109934]. adds 751da44bd90 RISC-V: Fix warning of vxrm pattern adds c53f51005de i386: Add V8QI and V4QImode partial vector shift operations adds 9d5034aad98 Generic vector op costing adjustment adds f504b70eb0f Account for vector splat GPR->XMM move cost adds 58b41bb4baf Improve cost computation for single-bit bit insertions. adds b6b8870ec58 tree-optimization/109747 - SLP cost of CTORs adds e33d2dcb463 xtensa: Optimize '(x & CST1_POW2) != 0 ? CST2_POW2 : 0' adds 8a20b4bc50b xtensa: Merge '*addx' and '*subx' insn patterns into one adds f9b5be32235 Fix ICEs related to VM types in C 1/2 [PR70418, PR107557, P [...] adds 42d1612eb5c Fix ICEs related to VM types in C 2/2 [PR109450] adds 03c7c418baa Daily bump. adds 1ede03e2d04 Fold _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple [...] adds 658938f3a17 RISC-V: Fix magic number of RVV auto-vectorization expander adds 2203da51758 RISC-V: Fix incorrect code of reaching inaccessible memory address adds 0d76b785222 RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t adds bed61b5646f RISC-V: Support RVV VREINTERPRET from vbool*_t to vuint*m1_t adds e0600a02fc3 RISC-V: Add RVV comparison autovectorization adds e55c134ebee vect: Enhance cost evaluation in vect_transform_slp_perm_load_1 adds 7c1457c78c4 Check for sysconf decl on vxworks adds b4c2f8c61ae [testsuite] [i386] enable sse2 for signbit-2.c adds d03da468b26 [testsuite] [ppc] xfail uninit-pred-9_b bogus warn on ppc32 too adds ec40410d98e RISC-V: Add RVV mask logic auto-vectorization adds 95542a6ec4b arm: PR target/109939 Correct signedness of return type of [...] adds ee2a8b373a8 early-remat: Resync with new DF postorders [PR109940] adds b4df098647b PR modula2/109952 Inconsistent HIGH values with 'ARRAY OF CHAR' adds b0a483b0a01 libstdc++: Add missing constexpr to simd_neon adds aa8b363171a libstdc++: Fix SFINAE for __is_intrinsic_type on ARM adds 5476de2618f tree-optimization/109849 - fix fallout of PRE hoisting change adds 29a60c13f8e RISC-V: Add FRM_ prefix to dynamic rounding mode enum adds d8b058d3ca4 Choose better initial values for ranger. adds cfd6569e9c4 Use negative values to reflect always_current in the tempor [...] adds 257c2be7ff8 Only update global value if it changes. adds affee7dcfa1 target/109944 - avoid STLF fail for V16QImode CTOR expansion adds b30ab0dcf9d aarch64: PR target/99195 Annotate vector shift patterns for [...] adds bd99d7b3ca4 i386: Add v<any_shift:insn>v4qi3 expander adds fc0553d61e1 Fix sprintf length warning adds cfe17528177 Provide an API for ipa_vr. adds 27389550042 PR middle-end/109840: Preserve popcount/parity type in match.pd. adds 003e641f0cd Remove deprecated vrange::kind(). adds efd2b55d856 libstdc++: Fix type of first argument to vec_cntm call adds 5fd5d8fb744 Fortran: checking and simplification of RESHAPE intrinsic [ [...] adds ec2e8627442 Fortran: reject bad DIM argument of SIZE intrinsic in simpl [...] adds 46a594b9490 Make ssa_cache and ssa_lazy_cache virtual. adds 71baa009496 Make ssa_cache a range_query. adds 04859bda773 Provide relation queries for a stmt. adds 1cd5bc387c4 Gimple range PHI analyzer and testcases adds 14d336dd1ac Daily bump. adds 90a718825da [testsuite] [x86] cope with --enable-frame-pointer adds 7daa166fe89 [libstdc++] [testsuite] xfail to_chars/long_double on x86-vxworks adds 2f20d629608 [testsuite] tsvc: skip include malloc.h when unavailable adds 1f6a9e42e9b [testsuite] require pic for pr103074.c adds bf3925d6af6 [testsuite] require pthread for openmp adds 03a3736f9ed [testsuite] require profiling for -pg adds d6b756447cd [PR100106] Reject unaligned subregs when strict alignment i [...] adds c1c564629f3 Add an frange::set_nan() variant that takes a nan_state. adds cd64ba5a726 Hash known NANs correctly for franges. adds fae324f1901 Disallow setting of NANs in frange setter unless setting trees. adds e11685f71a5 Stream out NANs correctly. adds c9a19621a07 testsuite, analyzer: Fix testcases with fclose adds 53bd7622de7 RISC-V: Remove FRM_REGNUM dependency for rtx conversions adds 7b67bfab289 ada: Restrict use of formal parameters within exceptional cases adds f6156f454f2 ada: Fix SPARK context not restored when Load_Unit is failing adds 825cb651135 ada: Fix obsolete comment in Sinfo.Utils adds fd694822ca6 ada: Fix incorrect handling of Aggregate aspect adds 5bf5aa1bfdb ada: Accept aliased parameters in Exceptional_Cases adds 6b5960e7759 ada: Tune warning about assignment just before a raise statement adds 5ca595d97bb ada: Minor fixes in description of scope depth adds f26005d533d ada: Add Entry_Cancel_Parameter to E_Label adds 211b562b74b ada: Handle controlling access parameters in DTWs adds cf6ddb55308 ada: Set Is_Not_Self_Hidden flag in more cases adds bc46312fe90 ada: Reduce span of variable adds 9df64b72bb8 ada: Maximize use of existing constant adds f82ef0e9247 ada: Enrich documentation of subprogram adds 78203700fac ada: Fix copy-paste mistake in analysis of Exceptional_Cases adds c7b84ce6999 ada: Small tweak to implementation of by-copy semantics for [...] adds d1e196d39e5 ada: Remove redundant guards from calls to Move_Aspects adds 0d569d97504 ada: Tune handling of attributes Old in contract Exceptional_Cases adds 2288b12cfe6 ada: Add missing supportive code for recently added SPARK aspects adds 54d8dbebf1b ada: Fix comments for recently added SPARK aspects adds 845d4419da1 ada: Prevent search of calls in preconditions from going too far adds 3da0e4ae25f ada: Fix (again) incorrect handling of Aggregate aspect adds 8f7eeaa80e5 ada: Remove unused initial value of a local variable adds 9f355ec846c ada: Fix crash during function return analysis adds 82a205ebf65 ada: Avoid duplicated streaming subprograms adds c4399ee6294 ada: Simplify copying of node lists adds d50e1383be7 ada: Clean up copying of node trees adds 50832e4a929 ada: Deconstruct a no longer used parameter of New_Copy_Tree adds 70ff3a2e4c8 ada: Fix copying of quantified expressions adds 5b8bdb676da ada: Decouple size of addresses and pointers from size of m [...] adds 14bf9f7bb7f ada: Switch from E_Void to Is_Not_Self_Hidden adds ec48b99c24a ada: Fix error message for Aggregate aspect adds 31365eda460 ada: Add size clause to System.Address adds ce4718eca7e ada: Minor adjustments to Standard_Address adds 21e57cabf64 ada: Require successful build of xsnamest adds 9e8094a2a20 ada: Fix internal error on declare-expression in post-condition adds f81245b4647 ada: Enable Support_Atomic_Primitives on VxWorks 7 PPC adds f7f8e290a11 ada: Crash on empty aggregate using the Ada 2022 notation adds 93d0457ec9c ada: Use procedural variant of Next_Index where possible adds 48d9c15fa8a ada: Expect Exceptional_Cases as a context for attribute Old adds 65ab836d402 ada: Missing warning on null-excluding array aggregate component adds 4a84a2db2ad i386: Fix incorrect intrinsic signature for AVX512 s{lli|rai|rli} adds 0d1e0d7433c aarch64: Implement vector FP absolute compare intrinsics wi [...] adds ea9154dbc8f [aarch64] Ignore cost of scalar moves for seq in vector ini [...] adds 9e264ef6856 arc: Make TLS Local Dynamic work like Global Dynamic model adds f97572c2aed target/109955 - handle pattern generated COND_EXPR without vcond adds f5298d9969b arm: Fix ICE due to infinite splitting [PR109800] adds f3dbc4112da arm: Implement ACLE Data Intrinsics adds 560bb845321 aarch64: PR target/99195 Annotate complex FP patterns for v [...] adds f574e2dfae7 VECT: Add decrement IV iteration loop control by variable a [...] adds 19fc92d8a99 arm: merge MVE_5 and MVE_6 iterators adds ff0a6900700 target/82931: Make a pattern more generic to match more bit [...] adds 66cc0cb0f44 target/104327: Allow more inlining between different optimi [...] adds 52ff3f7b863 i386: Use 2x-wider modes when emulating QImode vector instructions adds 4832767db78 In pipeline scheduling, insns should not be fusion in diffe [...] adds d156c605420 testsuite: Require trampolines for nestev-vla tests adds 8d2fa90a415 libstdc++: Add relational operators to __gnu_test::PointerBase adds 47c4245b973 Daily bump. adds 5bd67d7abdd RISC-V: Fix zero-scratch-regs-3.c fail adds 4fb66b23293 Only use NO_REGS in cost calculation when !hard_regno_mode_ [...] adds 0368fc54bc1 i386: Do not disable call to ix86_expand_vecop_qihi2 adds da7b4b08f13 ada: Enhance Is_Null_Range and Not_Null_Range predicates adds 0251292d2da ada: Add missing guards in Selected_Range_Checks adds f4e907d5ee5 ada: Fix late extra formals creation adds 8ba0b4cfeb5 ada: Clean style in expansion of array aggregates adds da59893d855 ada: Refine types for an accessibility-checking routine adds d6dcb41d8f4 ada: Fix another couple of unchecked conversions to Ada.Tags.Tag adds d874abd8b7f ada: Use computed value from os_constants to define sigset_t adds c8c37d2bfde ada: Simplify expansion of positional aggregates adds 9df0c1198ec ada: Minor tweak in condition adds 0c1d2675f96 ada: Fix missing finalization in library-level instance body adds c8def50f5cb ada: Use context variables in expansion of aggregates adds 0e1bba09231 ada: Handle new Controlling_Tag format when converting to SCIL adds 1a9c7e9ca21 ada: Remove Is_Descendant_Of_Address flag from Standard_Address adds 8cb3fcc4381 ada: Remove redundant guards from handling of record components adds bdda3d2960f ada: Duplicate declaration of _master entity adds 16c32050777 ada: Fix iteration over component items with pragmas adds 10bb8c4ea8a ada: Cleanups in handling of aggregates adds e3fe66ea557 ada: Remove redundant protection against empty lists adds deba689502b ada: Crash on loop in dispatching conditional entry call adds 4f591201821 ada: Tune detection of expression functions within a declar [...] adds fd3eff65551 ada: Fix handling of Global contracts inside generic subprograms adds c7a07d7e6a0 ada: Simplify iteration over record component items with po [...] adds 593e08bd1ed ada: Reject thin 'Unrestricted_Access value to aliased cons [...] adds 1ad8da08d62 ada: Reorder components in Ada.Containers.Restricted_Doubly [...] adds 2688795b716 ada: Reorder components in Ada.Containers.Bounded_Doubly_Li [...] adds 70f609b01fd ada: Fix detection of non-static expressions in records wit [...] adds 4a555bfee36 ada: Remove leftover code for counting protected entries adds 34c71b0472f ada: Cleanup expansion of membership operators into attribu [...] adds d97ab77cc82 ada: Simplify expansion of set membership adds 6b19eb24906 ada: Fix internal error on Big_Integer conversion ghost instance adds 9f6cee820f9 ada: Fix double free on finalization of Vector in array aggregate adds fa4b7069a0d ada: Remove redundant guard against empty lists adds 53d45e492eb ada: Fix crash on 'Img as generic actual function adds 81c360bd932 ada: Complete contracts of SPARK units adds b8a3e2ed647 ada: Minor doc clarification adds 54783e61dd9 ada: Default initialize entity to avoid CodePeer message adds 3e62561d5ff ada: Crash on function returning allocated object containing tasks adds 18a72d68c9d ada: Use truncation for dynamic conversions from floating p [...] adds 19668be0f86 ada: Fix typos "statment" and "condtion" adds ce081284bde ada: Corrections to premature-references rules adds bf78e24a90d xtensa: tidy extzvsi-1bit patterns adds 9b867c8281e xtensa: Add 'subtraction from constant' insn pattern adds 78648c09a04 xtensa: Rework 'setmemsi' insn pattern adds 1a1abec1d61 libstdc++: Resolve -Wsign-compare issue adds 497e8e2420e genmatch: Emit debug message right before "return x" instea [...] adds 366e3d30b8d amdgcn: Change -m(no-)xnack to -mxnack=(on,off,any) adds 252b8319adc Remove accidentally added gfortran.dg/gomp/allocate*-.f90 files adds d64e8e12247 Fortran/OpenMP: Add parsing support for allocators/allocate [...] adds 25907509787 RISC-V: Add autovec sign/zero extension and truncation. adds a1b23dcf233 RISC-V: Implement autovec abs, vneg, vnot. adds 8d6bd830f5f c: -Wstringop-overflow for parameters with forward-declared sizes adds 6e6bb37302f Daily bump. adds cc6eb8b51f9 Disable avoid_false_dep_for_bmi for atom and icelake(and la [...] adds ed6a9a35799 Split notl + pbraodcast + pand to pbroadcast + pandn more modes. adds 0d4a3e1e63d [COMMITTED]: New entry to MAINTAINERS. adds 68816ba245a Daily bump. adds 272f920b78f RISC-V: Add ZVFHMIN extension to the -march= option adds c0df96b3cda RISC-V: Fix incorrect VXRM configuration in mode switching [...] adds f8af48d8755 RISC-V: Fix ternary instruction attribute bug adds c48d7a6e320 RISC-V: Add RVV FMA auto-vectorization support adds ff313e1c74b RISC-V: Remove redundant printf of abs-run.c adds e9fd9efc8d6 RISC-V: Fix VSETVL PASS ICE on SLP auto-vectorization adds 1b19e6abc71 ada: Analyze pre/post on access-to-subprogram without a wrapper adds 4c33d93bfe8 ada: Fix restoration of parent link adds 68d5f8bdf16 ada: Restore SPARK_Mode On for numerical functions adds f180888c8f3 ada: Add QNX specific version of System.Parameters adds 833f91bb677 ada: Spurious error on string interpolation adds edb66b5f4d3 ada: Tune message for pre/post on access-to-subprogram in old Ada adds e73516e5ccd ada: Simplify removal of formals from the scope adds dedcfceaf01 ada: Tune message for missing 'Result in Contract_Cases adds bf25f6fc571 ada: Fix spurious error on nested instantiations with gener [...] adds 41448347f44 ada: Refining handling of inlining for CCG adds 5f691c62b5f ada: Restore parent link for both lists and nodes in class- [...] adds a17e01a6ce3 ada: Fix retrieval of spec entity from entry body entity adds 204ecf39ca6 ada: Reuse routine for getting from body entity to spec entity adds 265c571daa4 ada: Crash on aggregate for tagged record with discriminants adds 603c253d269 ada: Default_Component_Value trumps Initialize/Normalize_Scalars adds 1f0d3894883 ada: Repair support for user-defined literals in arithmetic [...] adds f8bf6ae4cf0 ada: Allow attributes like First and Last to be read in Exc [...] adds 8196b58e0a1 ada: Fix crash on vector initialization adds 4017d7fddda ada: Accept parameters of enclosing subprograms in exceptio [...] adds 21b0ecb9853 ada: Fix wrong finalization for call to BIP function in con [...] adds 7c784ca077c ada: Fix small fallout of previous change adds 9098ae6cde6 ada: Fix wrong result for membership test of null in null-e [...] adds 5ad28c8ff6a ada: Fix memory leak in multi-dimensional array aggregate o [...] adds 5c934733eb1 ada: Fix remaining failures in Roman Numbers test adds 6fe8909606f ada: Fix small fallout of previous change adds bbe40e766bf ada: Fix internal error with pragma Compile_Time_{Warning,Error} adds 8eb9a6b4c4b ada: Fix wrong finalization for case expression in expressi [...] adds f82fb00286e ada: Cleanup detection of type support subprogram entities adds 95349238568 ada: Remove extra whitespace from FOR loops adds 8bb536cc976 ada: Remove redundant protection against empty lists adds 11f406ee474 ada: Attach pre/post on access-to-subprogram to internal su [...] adds 9f29fc75351 ada: Fix crash on semi-recursive call in access-to-subprogr [...] adds 47853d3acef ada: Fix bogus error on conditional expression with only us [...] adds df3480cdb66 ada: Fix wrong finalization for loop on indexed container adds fe8b341f09a ada: Call idiomatic routine in Expand_Simple_Function_Return adds e256e67a8a3 ada: Use Code_Address attribute to determine subprogram addresses adds 61c54dd7196 ada: Fix memory leak in expression function returning Big_Integer adds fb828af5933 ada: Fix spurious error on imported generic function with p [...] adds e7c20cedbd6 ada: Set g-spogwa as a GNATRTL_SOCKETS_OBJS adds 6c2b2de098a ada: Define sigset for systems that does not suport sockets adds 3fa303becdc Fix artificial overflow during GENERIC folding adds 89903c8b24c Fix incorrect SLOC inherited by induction variable increment adds 8d1d9b16482 MAINTAINERS file: Replace spaces with tabs adds a99dc11fe27 RISC-V: Using merge approach to optimize repeating sequence [...] adds 3f4c3c929fe RISC-V: Eliminate the magic number in riscv-v.cc adds b4c15a140c3 Daily bump. adds 6b828454246 RISC-V: Refactor comments and naming of riscv-v.cc. adds 10680bc36ac RISC-V: Use extension instructions instead of bitwise "and" adds 3c1e2b76e0f i386: Also require TARGET_AVX512BW to generate truncv16hiv1 [...] adds a1806f0918c RISC-V: Optimize TARGET_XTHEADCONDMOV adds 187b495acd5 Daily bump. adds 908546602e3 RISC-V: Add RVV FNMA auto-vectorization support adds b1b92e72cda RISC-V: Fix warning in riscv.md adds 52577a301ef RISC-V: Add floating-point to integer conversion RVV auto-v [...] adds e6a9a30e6cd rtlanal: Change return type of predicate functions from int [...] adds e5405f065ba Handle FMA friendly in reassoc pass adds 7302efc23eb ada: Fix coding style in init.c adds 3590b8e7850 ada: Fix visibility error with DIC or Type_Invariant aspect [...] adds 32e6ea21745 ada: Use generalized loop iteration in Put_Image routines adds 53b05858fb0 ada: Fix regression of secondary stack management in return [...] adds 2a794b7750c ada: Ensure Default_Stack_Size is greater than Minimum_Stack_Size adds 35875281d9f ada: Fix minor issues in user's guide adds 3fd3d3d0fa0 ada: Only build access-to-subprogram wrappers when expander [...] adds 9be806a5c67 ada: Add System.Traceback.Symbolic.Module_Name support on A [...] adds 9dbf6adb3e0 ada: Fix fallout of recent fix for missing finalization adds cab8bb2b3b9 ada: Fix internal error on array constant in expression function adds c8df2335869 ada: Fix wrong expansion of array aggregate with noncontigu [...] adds 4f061cf29a3 ada: Small cleanups and fixes in expansion of aggregates adds b3c206bf46a ada: Fix storage model handling for dereference as lvalue a [...] adds a0510207ba3 ada: Disable PIE mode during the build of the Ada front-end adds a91b145bd69 ada: Make use of Cannot_Be_Superflat flag on N_Range nodes adds 2d4883a1f85 ada: Simplify the implementation of storage models adds d5518dabfa4 ada: Adjust again the implementation of storage models adds f60d3abea11 ada: Make internal_error_function more robust adds e2c9982eef4 ada: Minor generic tweaks left and and right adds 0e58d85c402 ada: Fix minor issue with Mod operator adds 0a769b29ee0 ada: Fix bogus Storage_Error on dynamic array with static z [...] adds 203dece1e9d ada: Fix incorrect copies being used with 'Address adds 8868ed495ff ada: Add missing guards for degenerate storage models adds f10dc1d2f1b ada: Fix internal error on qualified aggregate with storage model adds 0a51ab54b7c ada: Fix wrong access for qualified aggregate with storage model adds 8415298582b stor-layout, aarch64: Express SRA intrinsics with RTL codes adds 21a07620f4b riscv: update riscv_asan_shadow_offset adds 456cf52c0d3 riscv: add work around for PR sanitizer/82501 adds a4dae58abe1 aarch64: Reimplement v(r)hadd and vhsub intrinsics with RTL codes adds 365b1d54939 aarch64: Convert ADDLP and ADALP patterns to standard RTL codes adds d8545fb2c71 Detect bswap + rotate for byte permutation in pass_bswap. adds 32a0266cc54 RISC-V: Allow all const_vec_duplicates as constants. adds a8994014041 OpenMP: Improve C/C++ parsing error message [PR109999] adds 69185294f32 PR target/107172: Avoid "unusual" MODE_CC comparisons in si [...] adds 2a941f9f824 Replace a HWI_COMPUTABLE_MODE_P with wide-int in simplify-rtx.cc. adds 291549d43e8 libstdc++: Fix test assumptions on long and long double adds 3e2689e5684 libstdc++: Simplify calculation of expected value in simd test adds 668d43502f4 libstdc++: Correct NTTP and simd_mask ctor call adds b49bcb86851 Fix ACLE data-intrinsics testcases adds 17cca3c43e2 MATCH: Move `a <= CST1 ? MAX<a, CST2> : a` optimization to match adds 45466eecf5e Add a != MIN/MAX_VALUE_CST ? CST-+1 : a to minmax_from_comparison adds d12d2aa4fcc testsuite: make mve_intrinsic_type_overloads-int.c libc-agnostic adds 794326a7440 MAINTAINERS: Add myself to write after approval adds e4398377ffc jump: Change return type of predicate functions from int to bool adds 2720bbd597f i386: Fix misleading identation in i386-expand.cc [PR110041] adds 30038a207c1 LRA: Update insn sp offset if its input reload changes SP adds e4c986fde56 testsuite/52641: Fix more of implicit int=32 assumption fallout. adds 282e4e74598 [libstdc++] [testsuite] xfail double-prec from_chars for x8 [...] adds e4c8f7024f0 testsuite: add verify-sarif-file to some testcases that wer [...] adds 3279b622306 Enhance NARROW FLOAT_EXPR vectorization by truncating integ [...] adds df2762ac6eb Daily bump. adds fefa7db2c31 RISC-V: Fix unreachable test code for init repeat sequence. adds 5a98afec536 RISC-V: Add ZVFH extension to the -march= option adds 80ee7d02e8d Fix ICE in rewrite_expr_tree_parallel adds feae4e83f76 xtensa: Improve "*shlrd_reg" insn pattern and its variant adds 11bd9b1f813 aarch64: Simplify output template emission code for a few patterns adds a960f9ac76e IPA PTA stats enhancement and non-details dump slimming adds 95e5c38a98c ipa/109983 - (IPA) PTA speedup adds 979f8bfd316 libstdc++: Deprecate std::setfill for std::basic_istream [P [...] adds 7037e7b6e4a libstdc++: Fix preprocessor conditions for std::from_chars [...] adds 51cf0b3949b libstdc++: Disable embedded tzdata for all 16-bit targets adds f150a084e25 libstdc++: Add std::numeric_limits<__float128> specializati [...] adds b960c253e98 libstdc++: Add missing noexcept to std::scoped_allocator_adaptor adds 0ed5259ccbd libstdc++: Replace obsolete shell syntax in configure.ac adds 5a07b3b8bb9 libstdc++: Do not include <exception> in <mutex> adds 070d651c6db aarch64: Add pattern for bswap + rotate [PR 110039] adds e2a32622797 RISC-V: Remove FRM for vfncvt.rod instruction adds b65458005df RISC-V: Remove FRM for vfwcvt.f.x<u>.v (RVV integer to floa [...] adds 57920ae9653 RISC-V: Remove FRM for vfwcvt (RVV float to float widening [...] adds 644d168385f RISC-V: Add testcase for vrsub.vi auto-vectorization adds e1240bda3e0 RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering [...] adds 4d519f1ba37 alias: Change return type of predicate functions from int to bool adds 3f4853a5f00 emit-rtl: Change return type of predicate functions from in [...] adds 00887865398 btf: be clear when record size/type is not used adds 7aae58b04b9 btf: improve -dA comments for testsuite adds 547d3bce0c0 aarch64: PR target/99195 Annotate saturating mult patterns [...] adds d0c064c3eab aarch64: PR target/99195 Annotate dot-product patterns for [...] adds 994195b597f testsuite: rename force_conventional_output adds 2a919c08abb libstdc++: Fix configure test for 32-bit targets adds a239a35075f libstdc++: Fix build for targets without _Float128 [PR109921] adds fb409a15d9b libstdc++: Express std::vector's size() <= capacity() invar [...] adds 1f378f6dd33 libstdc++: Stop using _GLIBCXX_USE_C99_MATH_TR1 in <cmath> adds 49f59826c66 libstdc++: Add separate autoconf macro for std::float_t and [...] adds 0ede6b5ad77 Refactor wi::bswap as a function (instead of a method). adds 443613caa80 RISC-V: Add RVV FRM enum for floating-point rounding mode i [...] adds 09ff83d4bc1 Daily bump. adds 0a479c31b51 c++: make -fpermissive avoid -Werror=narrowing adds 940645cec50 libstdc++: Reduce <functional> inclusion to <stl_algobase.h> adds 0b317a60abe RISC-V: Introduce vfloat16m{f}*_t and their machine mode. adds 2df7e45188f OpenMP/Fortran: Permit pure directives inside PURE adds 12e71b593ea aarch64: Add =r,m and =m,r alternatives to 64-bit vector mo [...] adds 2fbbaa77c84 libstdc++: Fix condition for supported SIMD types on ARMv8 adds eeb92704967 doc: Fix description of x86 -m32 option [PR109954] adds 5d9c9119079 libstdc++: optimize EH phase 2 adds 3635e8c67e1 PR target/109973: CCZmode and CCCmode variants of [v]ptest on x86. adds fe3ce086108 xtensa: Add 'adddi3' and 'subdi3' insn patterns adds dec7aaabe96 cse: Change return type of predicate functions from int to bool adds 8cbaf679a3c libstdc++: Document removal of implicit allocator rebinding [...] adds b7b255e77a2 libstdc++: Fix code size regressions in std::vector [PR110060] adds fe94f8b7e02 libstdc++: Do not use std::expected::value() in monadic ops [...] adds f8403c43045 libstdc++: Fix PSTL test that fails in C++20 adds ed54532e3da testsuite: Skip powerpc tests on AIX. adds 5fccebdbd96 doc: improve docs for -pedantic{,-errors} adds 8dde92fd8b3 testsuite: Unbork multilib setups using -march flags (RISC-V) adds 3bb8ebb6acf testsuite: print any leaking torture options for debugging adds ff8f45d20f9 Fortran: force error on bad KIND specifier [PR88552] adds 847499148e0 Daily bump. adds bf9eee73f3d RISC-V: Support RVV permutation auto-vectorization adds 91430b73a05 RISC-V: Add vwadd.wv/vwsub.wv auto-vectorization lowering o [...] adds d5ea84cdd9a RISC-V: Add __RISCV_ prefix to VXRM and FRM enum adds 691805ff8aa RISC-V: Add test for vfloat16*_t (non tuple) types adds 4fe6e122045 MAINTAINERS: Add myself as MIPS port maintainer adds 37ff12b96d7 RISC-V: Fix warning in predicated.md adds 265357d401f RISC-V: Optimize reverse series index vector adds a06b9435b96 RISC-V: Add _mu C++ overloaded intrinsics for load && viota && vid adds 3c2eba4b7a2 Fortran: Fix some problems blocking associate meta-bug [PR87477] adds 9edb6725717 Back to requiring "Perl version 5.6.1 (or later)" [PR82856] adds 49153588abc Remove stale Autoconf checks for Perl adds 04abe1944d3 Support parallel testing in libgomp: fallback Perl 'flock' [...] adds 4d866c6bb45 libstdc++: Fix broken _GLIBCXX_PARALLEL mode adds 7bf89a919fd target/110088: Improve operation of l-reg with const after [...] adds bffc52838e3 VECT: Change flow of decrement IV adds 9f926f3a0c8 doc: clarify semantics of vector bitwise shifts adds 23f352972fa testsuite: Require LTO for pr107557-[12].c adds b8a916726e7 analyzer: regions in different memory spaces can't alias adds ef768035ae8 analyzer: implement various atomic builtins [PR109015] adds e7cc4d703bc varasm: check float size adds 99566c0c6b8 reg-stack: Change return type of predicate functions from i [...] adds 4d935f52b0d c++: make initializer_list array static again [PR110070] adds 957798e44e7 rs6000: Fix arguments for __builtin_altivec_tr_stxvrwx, __b [...] adds 9872d56661a c++: fix explicit/copy problem [PR109247] adds f2e60a00c7c btf: Fix -Wformat errors adds 934da923a72 btf: fix bootstrap -Wformat errors [PR110073] adds fae09dfc0e6 Fortran: fix diagnostics for SELECT RANK [PR100607] adds 84d080a29a7 Darwin, PPC: Fix struct layout with pragma pack [PR110044]. adds df0853d72d3 Fix PR 110042: ifcvt regression due to paradoxical subregs adds 64ca6aa74b6 rtl-optimization: [PR102733] DSE removing address which onl [...] adds 49337040865 i386: Add missing vector truncate patterns [PR92658]. adds 57b30f0134d Don't try bswap + rotate when TYPE_PRECISION(n->type) > n->range. adds 829d5975485 Daily bump. adds 2e3401bd71b RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv ins [...] adds f5c82bff5ef RISC-V: Fix warning in predicated.md adds 5cf60b6ba11 release the sorted FDE array when deregistering a frame [PR109685] adds 38e88d41f50 fix radix sort on 32bit platforms [PR109670] adds 999e617d312 c++: mangle noexcept-expr [PR70790] adds 557cc2b7214 c++: replace in_template_function adds 23bee850881 c++: simplify TEMPLATE_TEMPLATE_PARM hashing adds 38af81df6aa c++: is_specialization_of_friend confusion [PR109923] adds 7c0e2159afb PR modula2/110003 Wrong source line listed for unused parameters adds d42f3ad0f79 Add more ForEachMacros to clang-format file adds e1d2493f591 Remove unnecessary md pattern for TARGET_XTHEADCONDMOV adds 5681872057f [RISC-V] fix cfi issue in save-restore. adds 321cee7e29d Daily bump. adds 8bdfa8a67a5 RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill adds 3991b2f623d reload_cse_move2add: Handle trivial single_set:s adds 2415024e0f8 c++: use __cxa_call_terminate for MUST_NOT_THROW [PR97720] adds 8ab9fb6b8e0 PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV. adds 1330977166a RISC-V: Move optimization patterns into autovec-opt.md adds 5c9cffa3a4a RISC-V: Support RVV FP16 ZVFHMIN intrinsic API adds a96ba6b958a RISC-V: Remove redundant vlmul_ext_* patterns to fix PR110109 adds 830d36b3c30 xtensa: Optimize boolean evaluation or branching when EQ/NE [...] adds f66e0a94ad7 Convert H8 port to LRA adds 908e5ab5c11 Improve do_store_flag for single bit comparison against 0 adds 6cf856f873c Improve do_store_flag for comparing single bit against that bit adds b48890844d9 Daily bump. adds 2418cdfcf60 RISC-V: Split arguments of expand_vec_perm adds c7fe7ad612b RISC-V: Reorganize riscv-v.cc adds 29b74545531 MIPS: Add speculation_barrier support adds 83c3550ee96 libgcc: Use initarray section type for .init_stack adds afd87299cef Fix PR 110085: `make clean` in GCC directory on sh target c [...] adds 180ebb8a24d libiberty: On Windows, pass a >32k cmdline through a respon [...] adds 71ea7a30305 RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API adds 7ee22dc8925 libiberty: pex-win32.c: Fix some typos. adds d015c658a01 reginfo: Change return type of predicate functions from int [...] adds 8e1e1fc4fcb print-rtl: Change return type of two print functions from i [...] adds f7f12f0b646 Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c adds 108ff03bac3 New wi::bitreverse function. adds 3ad9313a2e2 d: Warn when declared size of a special enum does not match [...] adds fe29963d40a vect: Refactor to allow internal_fn's adds 2f482a07365 internal-fn,vect: Refactor widen_plus as internal_fn adds 8ebd1d9ab95 Remove widen_plus/minus_expr tree codes adds 14da764809d Daily bump. adds 6d4b6f7b536 RISC-V: Fix some typo in vector-iterators.md adds da2d75af601 RISC-V: Fix 'REQUIREMENT' for machine_mode 'MODE' in vector [...] adds 17c796c7174 [RISC-V] correct machine mode in save-restore cfi RTL. adds 7805890428c RISC-V: Support RVV FP16 ZVFH Reduction floating-point intr [...] adds d1344c41800 RISC-V] add TC for save-restore cfi directives. adds 9677cc7496f bootstrap rtl-checking: Fix XVEC vs XVECEXP in postreload.cc adds 4d1e4ce986f libiberty: writeargv: Simplify function error mode. adds 21bf2b2fd99 tree-optimization/109143 - improve PTA compile time adds 84eec2916fa middle-end/110055 - avoid CLOBBERing static variables adds b327cbe8f4e aarch64: Improve representation of ADDLV instructions adds d2cdfafde20 aarch64: Simplify SHRN, RSHRN expanders and patterns adds 9371640999e aarch64: Reimplement URSHR,SRSHR patterns with standard RTL codes adds 6be5d852216 aarch64: Improve representation of vpaddd intrinsics adds c4deccd4465 rs6000: Remove duplicate expression [PR106907] adds f80a8b42296 libstdc++: Also use sendfile for big files adds d87caacf8e2 libstdc++: Use copy_file_range for filesystem::copy_file adds 07a0e108247 libstdc++: Make std::filesystem::copy_file work for procfs [...] adds 7e8e071c4b6 libstdc++: Use close-on-exec for file descriptors in filesy [...] adds 3d9b3ddb5fc libstdc++: Do not assume existence of char8_t codecvt facet adds 56001fad4ec libstdc++: Fix ambiguous expression in std::array<T, 0>::fr [...] adds ce2188e4320 libstdc++: Protect against macros adds 19e5bf1d5fa rs6000: genfusion: Rewrite load/compare code adds a3df359fec4 rs6000: genfusion: Delete dead code adds 27e45b7597d libstdc++: Replace use of incorrect non-temporal store adds 9165ede56ab libstdc++: Avoid vector casts while still avoiding PR90424 adds 4ede915d5dd openmp: Add support for the 'present' modifier adds 88604bd17c3 RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering op [...] adds 97a5e8a2a48 libstdc++: Use AS_IF in configure.ac adds 6261d10521f libstdc++: Make std::numeric_limits<__float128> more portab [...] adds 192665feef7 libstdc++: Update list of known symbol versions for abi-check adds f1af7d65ff6 libgomp: plugin-gcn - support 'unified_address' adds 585c660f041 reload1: Change return type of predicate function from int to bool adds 6160572f8d2 Add RTX codes for BITREVERSE and COPYSIGN. adds 4f0d4825fa4 Daily bump. adds 29c82c6ca92 PR modula2/110019 Reported line numbers off by 1 when cpp invoked. adds 4fe84e2a4c0 c++: add NRV testcase [PR58050] adds 0fa9495553e c++: fix contracts with NRV adds 08cea4e56a0 c++: fix throwing cleanup with label adds b192e2007e1 c++: NRV and goto [PR92407] adds 7e0b65b239c c++: enable NRVO from inner block [PR51571] adds 2ae5384d457 c++: Add -Wnrvo adds 42eb371286f RISC-V: Fix ICE when include riscv_vector.h with rv64gcv adds c5c4fa2f9a4 Match: zero_one_valued_p should match 0 constants too adds 64d90d06d2d Add match patterns for `a ? onezero : onezero` where one of [...] adds 3fe017ee792 libiberty: writeargv: Simplify function error mode. adds cc155ff9c38 For the `-A CMP -B -> B CMP A` pattern allow EQ/NE for all [...] adds e60593f3881 Improve do_store_flag for single bit when there is no non-z [...] adds 3f085e45755 Handle const_int in expand_single_bit_test adds 631e86b7adb RISC-V: Support RVV VLA SLP auto-vectorization adds 00bfc503cc3 modula2: Fix bootstrap adds 5faaabef381 Support 'UNSUPPORTED: [...]: exception handling disabled' f [...] adds dd958667821 testsuite/libgomp.*/target-present-*.{c,f90}: Improve and fix adds c0b88e9e8bb Fix expected test output on hppa adds 000f8b9a6a0 Revert "libstdc++: Use AS_IF in configure.ac" adds a053c659f6b aarch64: Improve RTL representation of ADDP instructions adds b747f54a2a9 aarch64: Represent SQXTUN with RTL operations adds 8cc8707446b RA: Constrain class of pic offset table pseudo to general regs adds ae12aced97b libstdc++: Fix some tests that fail with -fexcess-precision [...] adds fa8b4468e0d libstdc++: Fix some tests that fail with -fno-exceptions adds b6235dbcfc3 libstdc++: Restore accidentally removed version in abi-check adds 49310a99330 libgcc: Fix eh_frame fast path in find_fde_tail adds 71361354125 aarch64: Fix whitespace in ls64 builtin implementation [PR110100] adds 737a0b749a7 aarch64: Fix wrong code with st64b builtin [PR110100] adds 9963029a24f aarch64: Allow compiler to define ls64 builtins [PR110132] adds e2ebd22acac match.pd: Improve zero_one_valued_p adds 88e7f1f7ee6 libstdc++: Fix up 20_util/to_chars/double.cc test for exces [...] adds ae6c2d1edf2 riscv: Fix insn cost calculation adds 7f26e76c984 riscv: Fix scope for memory model calculation adds 99bfdb072e6 RISC-V: Eliminate extension after for *w instructions adds 941209f9da2 MATCH: Fix comment for `(zero_one ==/!= 0) ? y : z <op> y` [...] adds 28db36e2cfc c++: allow NRV and non-NRV returns [PR58487] adds eba3565ce6d Add support for stc and cmc instructions in i386.md adds e73a307f502 [Committed] Bug fix to new wi::bitreverse_large function. adds 8c5b1365834 Daily bump. adds 8b327e0e273 [testsuite] bump some tsvc timeouts adds d08f2e4f745 Fortran: Fix some more blockers in associate meta-bug [PR87477] adds 2b2bf793d3f i386: Fix endless recursion in ix86_expand_vector_init_gene [...] adds fcbef8e431c optabs: Implement double-word ctz and ffs expansion adds 9589a46ddad analyzer: Standalone OOB-warning [PR109437, PR109439] adds 1379ae33e05 RISC-V: Add more test cases for RVV FP16 adds ce81740c44c Fix floating point bug in fold_range. adds cd4b7e8b623 Remove tree_code from range-operator. adds 9c0fed507f0 Unify range_operators to one class. adds cd9c7f898d6 Provide a new dispatch mechanism for range-ops. adds 990d10ab233 PR modula2/110126 variables are reported as unused when ref [...] adds feae15aeab6 Daily bump. adds 07b86ab138b Fold _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple [...] adds dac73e4c64b Explicitly view_convert_expr mask to signed type when foldi [...] adds 4cf6e322adc fortran: Fix ICE on pr96024.f90 on big-endian hosts [PR96024] adds 7f4644f8c68 RISC-V: Fix one warning of frm enum. adds cb33116afc2 RISC-V: Refactor requirement of ZVFH and ZVFHMIN. adds 3ec1d76a359 libstdc++: Improve tests for emplace member of sequence containers adds 3e12669a0eb middle-end/110182 - TYPE_PRECISION on VECTOR_TYPE causes wr [...] adds 960de5dd886 libstdc++: Optimize std::to_array for trivial types [PR110167] adds 628ba410b92 libstdc++: Fix P2510R3 "Formatting pointers" [PR110149] adds 9a3558cf1fb libstdc++: Bump library version to libstdc++.so.6.0.33 adds 793ed718b52 libstdc++: Add preprocessor checks to <experimental/interne [...] adds 00da6bcfccb libstdc++: Remove duplicate definition of _Float128 std::fr [...] adds 45b7da5f495 testsuite: fix the condition bug in tsvc s176 adds 72e652f3425 MATCH: Fix zero_one_valued_p not to match signed 1 bit integers adds 7ceed7e3e29 MATCH: Allow unsigned types for `X & -Y -> X * Y` pattern adds 52c92fb3f40 Change the `(zero_one ==/!= 0) ? y : z <op> y` patterns to [...] adds 55fcaa9a8bd Add Plus to the op list of `(zero_one == 0) ? y : z <op> y` [...] adds 0f8f1dee851 doc: Clarification for -Wmissing-field-initializers adds 35d2c40e4ac c++: init-list of uncopyable type [PR110102] adds d3e2a174b13 c++: diagnose auto in template arg adds 953bbeaeff0 c++: fix 32-bit spaceship failures [PR110185] adds c570818b436 Relocate range_cast to header, and add a generic version. adds 5612aa4d065 Also check type being cast to adds 067a8c7cb89 libstdc++: use using instead of typedef for type_traits adds fe9771b59f5 analyzer: add caching to globals with initializers [PR110112] adds 47203d89a0f VECT: Add SELECT_VL support adds a2c019e27d7 Daily bump. adds 07767389fb3 Provide a unified range-op table. adds 2dbf1e6146e Unify EQ_EXPR range operator adds eb29c3e1fab Unify NE_EXPR range operator adds 5b079541006 Unify LT_EXPR range operator adds d251d14ccd2 Unify LE_EXPR range operator adds f544e7e8a18 Unify GT_EXPR range operator adds a0a8f1c735d Unify GE_EXPR range operator adds b073d8af944 Unify Identity range operator adds 4f0ac5a5261 Unify operator_cst range operator adds 6a4ac393e19 Unify operator_cast range operator adds 29dbd7ef69f Unify PLUS_EXPR range operator adds a1aaaff33a7 Unify ABS_EXPR range operator adds d5818a36177 Unify MINUS_EXPR range operator adds 56518befc26 Unify NEGATE_EXPR range operator adds a13c4440949 Unify MULT_EXPR range operator adds 55dcf277b5d RISC-V: Enable select_vl for RVV auto-vectorization adds a53a83b63b4 RISC-V: Add test cases for RVV FP16 vreinterpret adds 1d57a223257 analyzer: Fix allocation size false positive on conjured sv [...] adds 39adc5eebd6 testsuite: Add more allocation size tests for conjured sval [...] adds db80262475d libatomic: x86_64: Always try ifunc adds 17bccd1d2c0 Fortran: add Fortran 2018 IEEE_{MIN,MAX} functions adds 30a8771c0f5 target/109650: Fix wrong code after cc0 -> CCmode transition. adds 80f075b4101 c++: Adjust conversion deduction [PR61663][DR976] adds 273a33b285b testsuite: Cut down 27_io/basic_istream/.../94749.cc for si [...] adds bc5a2c2e793 Convert ipcp_vr_lattice to type agnostic framework. adds 09ae30358b2 Daily bump. adds 20c85207abd RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS adds 20643513b8d target/19907: Overhaul bit extractions. adds 3443d4ba043 Use canonical form for reversed single-bit insertions after [...] adds ecc96eb5d2a libgfortran: remove support for --enable-intermodule adds 682d401a6ba c++: extend lookup_template_class shortcut [PR110122] adds 59946a4c0c9 c++: unsynthesized defaulted constexpr fn [PR110122] adds 35e50a0eaaa Daily bump. adds f47ecca8757 aix: Debugging does not require a stack frame. adds 7fc2b9ea2c4 RISC-V: Support RVV FP16 MISC vlmul ext intrinsic API adds b50b9d369c7 RISC-V: Add test cases for RVV FP16 undefined and vlmul trunc adds 388809f2afd rs6000: Don't use TFmode for 128 bits fp constant in toc [P [...] adds ff83d1b47aa rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [P [...] adds 2764335bd33 c++: build initializer_list<string> in a loop [PR105838] adds 820d1aec89c middle-end/110200 - genmatch force-leaf and convert interaction adds e52be6034fa Add missing vec_pack/unpacks patterns for _Float16 <-> int/ [...] adds 3ad0ef34ccb vect: Don't pass subtype to vect_widened_op_tree where not [...] adds 7103155a93f Regenerate config.in adds e8d41e031b9 Fix oversight in latest change adds 84cbf560ff6 RISC-V: Add ZVFHMIN block autovec testcase adds 921b841350c simplify-rtx: Implement constant folding of SS_TRUNCATE, US [...] adds 6631fe419c6 RISC-V: Add RVV narrow shift right lowering auto-vectorization adds bc45e18d433 Remove DEFAULT_MATCHPD_PARTITIONS macro adds 8d3eb3ad538 Fix disambiguation against .MASK_STORE adds 145b5db1512 RISC-V: Support RVV FP16 MISC vget/vset intrinsic API adds 7a4794af9aa RISC-V: Fix one potential test failure for RVV vsetvl adds bf470895905 PR modula2/110126 variables are reported as unused when ref [...] adds 443485b3436 Move operator_addr_expr to the unified range-op table. adds 39636a09da7 Move operator_bitwise_not to the unified range-op table. adds af52b862970 Move operator_bitwise_xor to the unified range-op table. adds 0965275e865 Move operator_bitwise_and to the unified range-op table. adds b23d6b957f0 Move operator_bitwise_or to the unified range-op table. adds b08b98254a9 Move operator_min to the unified range-op table. adds f0278eb04fb Move operator_max to the unified range-op table. adds f6e160e35ad Split pointer ibased range operators to range-op-ptr.cc adds 8e0f292f92b Add a hybrid BIT_AND_EXPR operator for integer and pointer. adds af5e7f0629d Add a hybrid BIT_IOR_EXPR operator for integer and pointer. adds 73cbf402d3d Add a hybrid MIN_EXPR operator for integer and pointer. adds 110c1f8d307 Add a hybrid MAX_EXPR operator for integer and pointer. adds 2eb50117ca2 Remove type from range_op_handler table selection adds 1c0aae69a76 Switch from unified table to range_op_table. There can be o [...] adds 1b1de36ac83 Provide a default range_operator via range_op_handler. adds 5410b07a8c3 Provide interface for non-standard operators. adds 0ddc8c7871f Add some overrides. adds 38944ec2a6f OpenMP: Cleanups related to the 'present' modifier adds 9eb757d1174 [aarch64] Improve code-gen for vector initialization with s [...] adds ae193f9008e [committed] [PR rtl-optimization/101188] Fix reload_cse_mov [...] adds 8089f26b94f PR modula2/110189 Using an unknown TYPE as argument to VAL [...] adds 9d250bdb88e Daily bump. adds d150afb4791 RISC-V: Enhance RVV VLA SLP auto-vectorization with decompr [...] adds de5f3bbf956 RISC-V: Fix V_WHOLE && V_FRACT iterator requirement adds 950fa8552b9 Update perf auto profile script adds 22d85c10a00 AArch64: [PR96339] Optimise svlast[ab] adds 95e2a51685d RISC-V: Fix one typo in full-vec-movel test adds 230fef15abb ada: Remove explicit decoration of wrapper created in freezing adds 067d80d8d59 ada: Support new GNAT-specific aspect Ghost_Predicate adds 0c7c1cb41de ada: Simplify appending to a newly created list adds fbf4140df11 ada: Tune style in detection of writable function actuals adds 109307ebe37 ada: Cleanup expansion of locally handled exception handlers adds 0e511e29883 ada: Cleanup finding of locally handled exception handlers adds 43118099788 ada: Remove wrong comment about expansion of exceptions for [...] adds fc84947c6a9 ada: Factor common processing in expansion of aggregates adds be3a8f913fb ada: Fix expansion of aggregates with controlled components adds f02be8fc6e1 ada: Use ghost predicate in standard library adds af10c962b79 ada: Factor out tag assignments from type in expander adds 416bb154d5c ada: Add No_Elaboration_Code_All pragma to System.Storage_Elements adds 5c266974094 ada: Mark attribute Initialized as ghost code adds ae3fd5e8a75 ada: Fix wrong expansion of limited extension aggregate adds d18dd43c1fd ada: Small housekeeping work in expansion of extension aggregates adds 0ac91bdbef4 ada: Remove unreferenced routine Is_Inherited_Operation_For_Type adds 44eb2bbdcef ada: Remove obsolete code in Analyze_Assignment adds c0ceba6c86a ada: Streamline expansion of controlled actions for aggregates adds 54dd56f5c82 ada: Fix internal error on imported function with post-condition adds ad09934f72f ada: Fix spurious error on call to function returning priva [...] adds 5225a2b2ecd ada: Fix exception raised on invalid contract in generic package adds 659aeb21940 ada: Fix iterated component initialization adds d0ffa8d5155 ada: Fix another case of missing Has_Private_View flag adds 204dba400b4 ada: Skip elaboration checks for abstract subprograms on de [...] adds dcc601423c2 ada: Implement new aspect Always_Terminates for SPARK adds 8c748260776 ada: Disable inlining in potentially unevaluated contexts adds 0f1e602e9e3 ada: Recognize iterated_component_association as potentiall [...] adds 86b8d11e485 ada: Recognize iterated_component_association as repeatedly [...] adds d38366cbaed ada: Add missing ss_mark/ss_release in quantified expressions adds f34b31156d2 ada: Fix decoration of iterated component association for G [...] adds 16eb9d69079 testsuite: Check int128 effective target for pr109932-{1,2} [...] adds 17714c08e90 testsuite: Update powerpc test fold-vec-extract-int.p8.c adds 1c3661e224e Fix disambiguation against .MASK_LOAD adds 0f3d07e16fe middle-end/110232 - fix native interpret of vector <signed- [...] adds d438b67e005 fix frange_nextafter odr violation adds 4389a2d2d0c aarch64: Extend -mtp= arguments adds cca8d9e5be2 arm: Extend -mtp= arguments adds d5c58ad1eba libgomp/testsuite: Add requires-unified-addr-1.{c,f90} [PR109837] adds 1d4d302acd9 RISC-V: Add vector psabi checking. adds 47c3144c2f6 c++: mutable temps in rodata adds 2270f4fdaa0 Fix memory leak in loop header copying adds cbe7f069e6a RISC-V: Fix bug of VLA SLP auto-vectorization adds 325bfe22051 RISC-V: Add more SLP tests adds a07dadba85f RISC-V: Add comments of some functions adds 06a0f07220c RISC-V: Remove duplicate `#include "riscv-vector-switch.def"` adds 40eafcd83d6 Avoid duplicate vector initializations during RTL expansion. adds 1c188877bfc i386: Fix up whitespace in assembly adds 99dec205a12 Remove sh5media divtab code adds b15d46e8057 Remove a couple mudflap remnants adds c1691509e5a Fortran: fix passing of zero-sized array arguments to proce [...] adds a54c71ccc24 Fortran: add DATA statement testcase adds 5a897036187 c++: Fix templated convertion operator demangling adds 7474c46cf2d c/c++: use positive tone in missing header notes [PR84890] adds c980eeb88f8 modula2 Fixes to the error format specifications adds 532fb120355 Daily bump. adds 18c8b56c7d6 OpenMP: Set default-device-var with OMP_TARGET_OFFLOAD=mandatory adds b7e42b85212 Use x instead of v for alternative 2 (v, BH) in mov<mode>_i [...] adds 58edbc8a168 Fix typo in 'libgomp.c/target-51.c' adds 460ad9b9050 Remove 'gcc/testsuite/g++.dg/warn/Wfree-nonheap-object.s' adds 9c03391ba44 Tighten 'dg-warning' alternatives in 'c-c++-common/Wfree-no [...] adds e76af2162c7 Add 'libgomp.{,oacc-}fortran/fortran-torture_execute_math.f90' adds 4bcb46b3ade driver: Forward '-lgfortran', '-lm' to offloading compilation adds f2ef1dabbc1 Align a 'OMP_TARGET_OFFLOAD=mandatory' diagnostic with others adds 29aef9ff236 libstdc++: Clarify manual demangle doc adds 4ec6b627cb0 c++: tweak c++17 ctor/conversion tiebreaker [DR2327] adds c8558627992 [contrib] validate_failures.py: Avoid testsuite aliasing adds b713de1ce50 [contrib] validate_failures.py: Support expiry attributes i [...] adds 5f8cc7f00cd [contrib] validate_failures.py: Read in manifest when compa [...] adds febe56cb34d [contrib] validate_failures.py: Simplify GetManifestPath() adds e341d15be3b [contrib] validate_failures.py: Add more verbosity levels adds d4d776a3413 [contrib] validate_failures.py: Be more stringent in parsin [...] adds 5d52f355464 [contrib] validate_failures.py: Use exit code "2" to indica [...] adds 484a48640c4 [contrib] validate_failures.py: Support "$tool:" prefix in [...] adds 7aa47751d23 [contrib] validate_failures.py: Improve error output adds 22a0ade86cb [contrib] validate_failures.py: Add new option --invert_match adds 316b1d66d3d [contrib] validate_failures.py: Add "--expiry_date YYYYMMDD [...] adds 9ef1391d86b [contrib] validate_failures.py: Ignore stray filesystem pat [...] adds 5eeff09a743 aarch64: Fix -Werror=sign-compare bootstrap failure adds 3cf6adc9acb MAINTAINERS: Add myself to write after approval adds ef30f9b094f Remove MFWRAP_SPEC remnant adds c1c5edef33e Daily bump. adds 8a3a4fb273f RISC-V: Bugfix for vec_init repeating auto vectorization in RV32 adds 41738a1b3f3 RISC-V: Align the predictor style for define_insn_and_split adds 0ec3fbb5903 RISC-V: Ensure vector args and return use function stack to [...] adds 9e3607e19bc RISC-V: Use merge approach to optimize vector permutation adds 6cf8989c6e6 LoongArch: Change the default value of LARCH_CALL_RATIO to 6. adds 710b8dec61a Missed opportunity to use [SU]ABD adds ea616f687dc AArch64: New RTL for ABD adds 4e31e63ea7e middle-end: Move constant args folding of .UBSAN_CHECK_* an [...] adds b6ca11407d4 i386: Add peephole2 patterns to improve add with carry or s [...] adds ec52d228d6d i386: Add peephole2 patterns to improve subtract with borro [...] adds 43a3252c42a middle-end, i386: Pattern recognize add/subtract with carry [...] adds df071fbd467 Fix 'dg-warning' in 'c-c++-common/Wfree-nonheap-object-3.c' [...] adds 19e4d4c34c9 LoongArch: Set default alignment for functions and labels w [...] adds be54247f74f ada: Cleanup analysis of iterated component association adds 3b3e181be8e ada: Fix aspect Linker_Section ignored on subprogram body adds 4b14ffb9a86 ada: Remove obsolete references for Build_Transient_Object_ [...] adds 63c8e3a1368 ada: Crash on C++ constructor of private type adds 16bd94c81fb ada: Accept aspect Always_Terminates without expression adds e870d6d73b4 ada: Fix inverted implementation of RM 8.4(10) clause for o [...] adds 37333bff345 ada: Remove Ttypes.Max_Unaligned_Field adds fda87a4441c ada: Fix minor issues in comments adds 63a4bcf377a ada: Fix missing error on function call returning incomplete view adds fa5aa5d942a ada: Reject aspect Always_Terminates on functions and gener [...] adds 8e5185ad60b ada: Accept aspect Always_Terminates on entries adds 3ec78e11471 ada: Accept aspect Always_Terminates on packages adds 1de3b5a7b57 ada: Adjust comments in targparm.ads adds b36be75b29d ada: Adjust QNX Ada priorities to match QNX system priorities adds 985d6045f66 ada: Fix missing finalization for aggregates nested in cond [...] adds 70345b97934 ada: Add escape hatch to configurable run-time adds 3f3f37c3f72 ada: Remove dead code in Expand_Iterator_Loop_Over_Container adds c8c5bf93aaa ada: Fix too small secondary stack allocation for returned [...] adds 9cdaa52bf8e ada: Revert latest change to Find_Hook_Context adds a8c45d3fba6 ada: Fix internal error on loop iterator filter with -gnatVa adds 17e45a14a20 ada: Fix too small secondary stack allocation for returned [...] adds f185ac2efd7 ada: Reject Loop_Entry inside prefix of Loop_Entry adds cc681c83f04 ada: Make minor improvements to user's guide adds 59a8207f838 ada: Fix wrong finalization for double subtype of bounded vector adds d40e6edcff2 ada: Fix wrong code for ACATS cd1c03i on Morello target adds b992bddac79 ada: Remove unused files adds 5430c86e719 LoongArch: Avoid non-returning indirect jumps through $ra [ [...] adds a5e06412e78 x86: add Bk and Br to comment list B's sub-chars adds a4df0ce78d6 x86/AVX512: use VMOVDDUP for broadcast to V2DF adds 73a0d3bf895 libgomp: Extend OMP_ALLOCATOR, add affinity env var doc adds 37f373e974a libcpp: Diagnose #include after failed __has_include [PR80753] adds 6c121a2c687 Check for integer only complex. adds 91fb8bdb394 Add another testcase for PR 110266 adds 6a2e8dcbbd4 cprop_hardreg: Enable propagation of the stack pointer if possible adds b6cb10af12c configure: Implement --enable-host-pie adds 7ff793415f5 Daily bump. adds 57446d1bc97 c: add name hints to c_parser_declspecs [PR107583] adds c6c428196d4 libstdc++-v3: do not duplicate some math functions when usi [...] adds a371a639b76 [libstdc++] [testsuite] xfail dbl from_chars for aarch64 rt [...] adds 0f732ff7c47 MAINTAINERS: move Matthew Fortune to Write After Approval adds 827e208fa64 tree-optimization/110269 - restore missed condition folding adds 6586422105e MIPS16: Implement `code_readable` function attribute. adds 453cb585f0f Add MinGW option -mcrtdll= for choosing C RunTime DLL library adds 69b04fe7445 tree-optimization/110278 - uns < (typeof uns)(uns != 0) is [...] adds 27612ce3529 RISC-V: Fix one warning of maybe-uninitialized in riscv-vsetvl.cc adds ffb87344dd3 aarch64: Reimplement [US]Q(R)SHR(U)N patterns with RTL codes adds d20b2ad8458 aarch64: [US]Q(R)SHR(U)N scalar forms refactoring adds 207db5d92f9 aarch64: Add ASHIFTRT handling for shrn pattern adds c8e9a5ced0d aarch64: [US]Q(R)SHR(U)N2 refactoring adds b5ecca346f3 aarch64: Handle ASHIFTRT in patterns for shrn2 adds b106f11dc6a c++: Accept elaborated-enum-base with pedwarn adds 154c6903957 RA: Ignore conflicts for some pseudos from insns throwing a [...] adds 95020d33ad6 PR target/31985: Improve memory operand use with doubleword add. adds 8216ca85037 libgomp: Fix OMP_TARGET_OFFLOAD=mandatory adds ea1cd66f220 Regenerate some autotools generated files adds 5b67116a852 tree-ssa-math-opts: Fix up uaddc/usubc pattern matching [PR110271] adds 2b4e0415ad6 uiltins: Add support for clang compatible __builtin_{add,su [...] adds bc6bd0d608d libgo/testsuite: add benchmarks and examples to list adds dd6e1cbac86 RISC-V: Fix VL operand bug in VSETVL PASS[PR110264] adds d0cf0c6c844 RISC-V: Bugfix for RVV integer reduction in ZVE32/64. adds f10a4ce044a Daily bump. adds c2b1cbb5f17 gcc-ar: Remove code duplication. adds 96c3539f2a3 i386: Two minor tweaks to ix86_expand_move. adds 8955eed34bf [contrib] validate_failures.py: Don't consider summary line [...] adds 729c6f4063f Daily bump. adds 8a96f240d71 RISC-V:Add float16 tuple type support adds 47fa3cef59a RTL: Merge rtx_equal_p and hash_rtx functions with their ca [...] adds 55686e6601b i386: Standardize shift amount constants as QImode in i386.md. adds af29d0d6b75 i386: Refactor new ix86_expand_carry to set the carry flag. adds 5a1ef1cfac0 Analyze SRA candidates in ipa-fnsummary adds 0f9bb3e7a4a Fix arc assumption that insns are not re-recognized adds 24f75498ea5 PR modula2/110284 Remove stor-layout.o and backend header files adds 220af557640 RTL: Change return type of predicate and callback functions [...] adds 36911e9d06c Silence warning in gcc.dg/lto/20091013-1_0.c adds fcf4e50f852 RISC-V: Fix one typo for reduc expand GET_MODE_CLASS adds 81161d8a2e2 Daily bump. adds 58e61a3ab1c Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE inste [...] adds f8e02702726 Refined 256/512-bit vpacksswb/vpackssdw patterns. adds c0bd79300e8 Check SCALAR_INT_MODE_P in try_const_anchors adds 41f42d120c4 rs6000: Enable const_anchor for 'addi' adds 1ce54ad8cd6 xtensa: Remove TARGET_MEMORY_MOVE_COST hook adds 7360cba833c xtensa: constantsynth: Add new 2-insns synthesis pattern adds 53953b6f31f avr: Fix ICE on optimize attribute. adds b25ea7ab78c OpenMP (C/C++): Keep pointer value of unmapped ptr with def [...] adds df03c9a9143 Add loop_vinfo argument to vect_get_loop_mask adds 85c39a3cf15 AVX512 fully masked vectorization adds 01fe115ba7e libgomp.c/target-51.c: Accept more error-msg variants in dg-output adds c3e720887ec RISC-V: Add (u)int8_t to binop tests. adds 51795b91073 RISC-V: Implement vec_set and vec_extract. adds 9b24611acf2 RISC-V: Add sign-extending variants for vmv.x.s. adds 47ffabaf669 RISC-V: Add autovec FP binary operations. adds da6cc50819c RISC-V: Add autovec FP unary operations. adds ccfdda34341 VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs adds 58e1bc2b1c8 avr: Fix wrong array bounds warning on SFR access adds 60c120686da Fix build of aarc64 adds 1de281a21e0 vect: Restore aarch64 bootstrap adds e9c1679c350 Doc update: -foffload-options= examples + OpenMP in Fortran [...] adds 8968e92cc65 simplify-rtx: Simplify VEC_CONCAT of SUBREG and VEC_CONCAT [...] adds de2d3b69eef Fix DejaGnu directive syntax error in 'libgomp.c/target-51.c' adds 916add3bf6e tree-optimization/110298 - CFG cleanup and stale nb_iterations adds c5309565d00 Remove -save-temps from tests using -flto adds 8aeabd9f63d amdgcn: minimal V64TImode vector support adds 1f97a0b412e vect: vectorize via libfuncs adds 1ff8ba48a29 amdgcn: Delete inactive libfuncs adds d9d6774527b amdgcn: implement vector div and mod libfuncs adds 2ba7347aba5 RISC-V: Bugfix for RVV float reduction in ZVE32/64 adds 26bb67fc4d4 RISC-V: Bugfix for RVV widenning reduction in ZVE32/64 adds 5fad7785719 RISC-V: Fix VWEXTF iterator requirement adds bd579e1c694 recog: Change return type of predicate functions from int to bool adds 957ae904065 New compact syntax for insn and insn_split in Machine Descr [...] adds c72a7b84985 AArch64: convert some patterns to compact MD syntax adds 7b34cacc573 optimize std::max early adds 827b2a279fc Do not allow "x + 0.0" to "x" optimization with -fsignaling-nans adds dbcbc858c71 RISC-V: Save and restore FCSR in interrupt functions to avo [...] adds c1dbaa6656a libcpp: reject codepoints above 0x10FFFF adds e517d3f5714 Daily bump. adds 1d2308d6857 RISC-V: Add tuple vector mode psABI checking and simplify code adds 62514099cb5 RISC-V: Fix fails of testcases adds 963f87f8a65 debug/110295 - mixed up early/late debug for member DIEs adds d3a21558fda x86: correct and improve "*vec_dupv2di" adds 869216ec14b ada: Fix edge case in Ada.Calendar.Formatting.Time_Of adds 862f84b4a36 ada: Spurious error on package instantiation adds b1c3d01619e ada: Remove references to Might_Not_Return and Always_Return adds 2071134b54a ada: Pass Error_Node to calls to Error_Msg in lib-load.adb adds ca27b8a0307 ada: Fix type derivation of subtype of derived type adds adc853f0661 ada: Update annotations in runtime for proof adds 298a486c581 ada: Introduce -gnateH switch to force reverse Bit_Order th [...] adds 3404e481d09 ada: Fix -fdiagnostics-format=json not printing all messages adds d22792bc24f ada: Fix internal error on aggregate within container aggregate adds ccacd752a4a ada: Small fixes to handling of private views in instances adds b9b1dcc8414 ada: Add CHERI intrinsic bindings and helper functions. adds d39664b659f ada: Fix fallout of fix to handling of private views in instances adds 970ee828e75 ada: Fix bug in predicate checks with address clauses adds 86f03e37d6e ada: Fix for quantified expressions in Exceptional_Cases adds 0aca9f500e7 ada: Document partition-wide Ada signal handlers adds b367a66cfb6 ada: Fix for attribute Range in Exceptional_Cases adds f1c15fe3f05 ada: Add the ability to add error codes to error messages adds 8912b95779d ada: Do not issue warning on postcondition in some cases adds eb5c593cab9 ada: Fix couple of issues in documentation of overflow checking adds 36de416df8b AArch64: remove test comment from *mov<mode>_aarch64 adds 63aaff9b3ab aarch64: Optimise ADDP with same source operands adds 85107abeb71 Update virtual SSA form manually where easily possible in phiprop adds 9d597e00757 Improve DSE to handle stores before __builtin_unreachable () adds 0607e934900 Fortran's gfc_match_char: %S to match symbol with host_assoc adds 31edd39bc41 ada: Remove outdated comment adds 865c5db7cbc ada: Further fixes to handling of private views in instances adds c11ef75cb2c ada: Fix crash on inlining in GNATprove adds 6f695bfd736 ada: Minor tweaks adds 99e3214f582 Fortran: Fix parse-dump-tree for OpenMP ALLOCATE clause adds 37c167e89b0 RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math. adds 4a6c44f4ad4 RISC-V: Fix compiler warning of riscv_arg_has_vector adds b26f1735cb8 RISC-V: testsuite: Add -Wno-psabi to vec_set/vec_extract te [...] adds 1c0b118babc RISC-V: Optimize codegen of VLA SLP adds cb421ffff66 RISC-V: Set the natural size of constant vector mask modes [...] adds 649c640cc4a RISC-V: testsuite: Add missing -mabi=lp64d. adds b4f1e4a6443 libstdc++: Remove redundant code in std::to_array adds 86df278de15 rs6000: Add builtins for IEEE 128-bit floating point values adds 7f986e2ed93 ipa-cp: Avoid long linear searches through DECL_ARGUMENTS adds 0be3a051c03 ipa-sra: Disable candidates with no known callers (PR 110276) adds efecb298d88 runtime: use a C function to call mmap adds 4c7d264eee5 calls: Change return type of predicate function from int to bool adds f8f68c4ca62 tree-ssa-math-opts: Small uaddc/usubc pattern matching impr [...] adds 580b74a7914 aarch64: Robustify stack tie handling adds 079f31c5531 aarch64: Fix gcc.target/aarch64/sve/pcs failures adds 4f3be7cbebc libcpp: Improve location for macro names [PR66290] adds f5d0cec170d gensupport: drop suppport for define_cond_exec from compact syntac adds bfc6d29f8b9 Daily bump. adds 6f19cf75261 Use intermiediate integer type for float_expr/fix_trunc_exp [...] adds 67061960b6c x86: add -mprefer-vector-width=512 to new avx512f-dupv2di.c [...] adds 864c6471bdc x86: make VPTERNLOG* usable on less than 512-bit operands w [...] adds 24c125fe47a [i386] Reject too large vectors for partial vector vectorization adds b8b19729e65 docs: replace backslashchar [PR 110329]. adds bb3c69058a5 aarch64: Convert SVE gather patterns to compact syntax adds fb0447b1f6b Hide IVOPTs strip_offset adds 5d88932657d Less strip_offset in IVOPTs adds b54d0f29590 Less strip_offset in IVOPTs adds 4b23d10ce8c Move can_vec_mask_load_store_p and get_len_load_store_mode [...] adds 31cd5f9ae4d Revert "aarch64: Convert SVE gather patterns to compact syntax" adds 4d9d207c668 aarch64: Convert SVE gather patterns to compact syntax adds b375c5340b5 aarch64: Avoid same input and output Z register for gather loads adds b9401c3a323 vect: Add testcases for unsigned conversions [PR110018] adds caf0892eea6 Fortran: Seg fault passing string to type cptr dummy [PR108961]. adds 577223aebc7 Fortran: Fix some bugs in associate [PR87477] new 97e31a0a2a2 Merge from trunk revision 577223aebc7acdd31e62b33c1682fe54a [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. 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.../gcc.target/aarch64/sve/acle/asm/bic_u32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/bic_u64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/bic_u8.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/brka_b.c | 5 + .../gcc.target/aarch64/sve/acle/asm/brkb_b.c | 5 + .../gcc.target/aarch64/sve/acle/asm/brkn_b.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clasta_bf16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clasta_f16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clasta_f32.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clasta_f64.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clastb_bf16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clastb_f16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clastb_f32.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clastb_f64.c | 5 + .../gcc.target/aarch64/sve/acle/asm/div_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/div_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/div_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/div_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/div_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/div_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/div_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/divr_f16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/divr_f32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/divr_f64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/divr_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/divr_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/divr_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/divr_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/dot_s32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/dot_s64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/dot_u32.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/dot_u64.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/dup_s16.c | 72 + .../gcc.target/aarch64/sve/acle/asm/dup_s32.c | 60 + .../gcc.target/aarch64/sve/acle/asm/dup_s64.c | 60 + .../gcc.target/aarch64/sve/acle/asm/dup_u16.c | 72 + .../gcc.target/aarch64/sve/acle/asm/dup_u32.c | 60 + .../gcc.target/aarch64/sve/acle/asm/dup_u64.c | 60 + .../gcc.target/aarch64/sve/acle/asm/dupq_b16.c | 86 +- .../gcc.target/aarch64/sve/acle/asm/dupq_b32.c | 48 +- .../gcc.target/aarch64/sve/acle/asm/dupq_b64.c | 16 +- .../gcc.target/aarch64/sve/acle/asm/dupq_b8.c | 136 +- .../gcc.target/aarch64/sve/acle/asm/eor_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/eor_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/eor_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/eor_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/eor_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/eor_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/eor_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/eor_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/lsl_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/lsl_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/lsl_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/lsl_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_s16.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_s32.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_s8.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_u16.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_u32.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_u8.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/lsr_u16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsr_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsr_wide_u16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsr_wide_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsr_wide_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mad_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mad_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mad_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mad_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mad_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mad_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mad_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mad_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mad_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mad_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mad_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/max_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/max_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/max_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/max_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/max_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/max_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/max_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/max_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/min_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/min_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/min_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/min_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/min_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/min_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/min_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/min_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mla_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mla_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mla_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mla_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mla_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mla_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mla_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mla_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mla_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mla_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mla_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mls_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mls_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mls_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mls_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mls_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mls_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mls_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mls_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mls_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mls_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mls_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/msb_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/msb_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/msb_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/msb_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/msb_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/msb_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/msb_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/msb_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/msb_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/msb_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/msb_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mul_f16.c | 2 +- .../aarch64/sve/acle/asm/mul_f16_notrap.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mul_f32.c | 2 +- .../aarch64/sve/acle/asm/mul_f32_notrap.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mul_f64.c | 2 +- .../aarch64/sve/acle/asm/mul_f64_notrap.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mul_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mul_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mul_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mul_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mul_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mul_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mul_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mul_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mulh_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mulh_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mulh_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mulh_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mulh_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mulh_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mulh_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/mulh_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/mulx_f16.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/mulx_f32.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/mulx_f64.c | 6 +- .../gcc.target/aarch64/sve/acle/asm/nmad_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmad_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmad_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmla_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmla_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmla_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmls_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmls_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmls_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmsb_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmsb_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/nmsb_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/orr_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/orr_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/orr_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/orr_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/orr_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/orr_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/orr_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/orr_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/pfirst_b.c | 5 + .../gcc.target/aarch64/sve/acle/asm/pnext_b16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/pnext_b32.c | 5 + .../gcc.target/aarch64/sve/acle/asm/pnext_b64.c | 5 + .../gcc.target/aarch64/sve/acle/asm/pnext_b8.c | 5 + .../gcc.target/aarch64/sve/acle/asm/scale_f16.c | 12 +- .../gcc.target/aarch64/sve/acle/asm/scale_f32.c | 8 +- .../gcc.target/aarch64/sve/acle/asm/scale_f64.c | 8 +- .../gcc.target/aarch64/sve/acle/asm/sub_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/sub_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/sub_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/sub_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/sub_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/sub_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/sub_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/sub_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/subr_f16.c | 2 +- .../aarch64/sve/acle/asm/subr_f16_notrap.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/subr_f32.c | 2 +- .../aarch64/sve/acle/asm/subr_f32_notrap.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/subr_f64.c | 2 +- .../aarch64/sve/acle/asm/subr_f64_notrap.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/subr_s16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/subr_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/subr_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/subr_s8.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/subr_u16.c | 4 +- .../gcc.target/aarch64/sve/acle/asm/subr_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/subr_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/subr_u8.c | 4 +- .../gcc.target/aarch64/sve/acle/general-c/svlast.c | 63 + .../aarch64/sve/acle/general-c/svlast128_run.c | 313 + .../aarch64/sve/acle/general-c/svlast256_run.c | 314 + .../gcc.target/aarch64/sve/acle/general/dupq_5.c | 6 +- .../gcc.target/aarch64/sve/acle/general/dupq_6.c | 6 +- .../gcc.target/aarch64/sve/acle/general/rev-1.c | 12 + .../aarch64/sve/acle/general/whilele_10.c | 2 +- .../aarch64/sve/acle/general/whilele_5.c | 10 +- .../aarch64/sve/acle/general/whilele_6.c | 2 +- .../aarch64/sve/acle/general/whilele_7.c | 6 +- .../aarch64/sve/acle/general/whilele_9.c | 6 +- .../aarch64/sve/acle/general/whilelt_1.c | 10 +- .../aarch64/sve/acle/general/whilelt_2.c | 2 +- .../aarch64/sve/acle/general/whilelt_3.c | 6 +- .../aarch64/sve/{addsub_1.c => addsub_2.c} | 20 +- gcc/testsuite/gcc.target/aarch64/sve/adr_1.c | 24 +- gcc/testsuite/gcc.target/aarch64/sve/adr_2.c | 24 +- gcc/testsuite/gcc.target/aarch64/sve/adr_3.c | 24 +- gcc/testsuite/gcc.target/aarch64/sve/adr_4.c | 6 +- gcc/testsuite/gcc.target/aarch64/sve/adr_5.c | 16 +- gcc/testsuite/gcc.target/aarch64/sve/extract_1.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_2.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_3.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_4.c | 4 +- .../gcc.target/aarch64/sve/gather_earlyclobber.c | 96 + .../gcc.target/aarch64/sve/load_scalar_offset_1.c | 8 +- .../gcc.target/aarch64/sve/mask_gather_load_6.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c | 6 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_bf16.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f16.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f32.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f64.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s16.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s32.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s64.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s8.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u16.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u32.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u64.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u8.c | 22 +- .../gcc.target/aarch64/sve/pcs/args_5_le_bf16.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f16.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f32.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f64.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s16.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s32.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s64.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s8.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u16.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u32.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u64.c | 4 +- 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+- .../gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c | 19 +- .../arm/mve/intrinsics/vcvtq_x_f16_s16.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_f16_u16.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_f32_s32.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_f32_u32.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_n_f16_s16.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_n_f16_u16.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_n_f32_s32.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_n_f32_u32.c | 38 +- .../arm/mve/intrinsics/vcvtq_x_n_s16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_n_s32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_n_u16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_n_u32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_s16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_s32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_u16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_u32_f32.c | 22 +- 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.../gcc.target/arm/mve/intrinsics/veorq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_x_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vfmaq_f16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vfmaq_f32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c | 42 +- .../gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c | 42 +- .../arm/mve/intrinsics/vfmaq_m_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c | 58 +- .../arm/mve/intrinsics/vfmaq_m_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c | 58 +- .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c | 44 +- .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c | 44 +- .../arm/mve/intrinsics/vfmasq_m_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c | 2 +- .../arm/mve/intrinsics/vfmasq_m_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c | 44 +- .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c | 44 +- .../gcc.target/arm/mve/intrinsics/vfmsq_f16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vfmsq_f32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c | 42 +- .../gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c | 42 +- .../arm/mve/intrinsics/vhcaddq_rot270_m_s16.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot270_m_s32.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot270_m_s8.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot270_s16.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot270_s32.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot270_s8.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot270_x_s16.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot270_x_s32.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot270_x_s8.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot90_m_s16.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot90_m_s32.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot90_m_s8.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot90_s16.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot90_s32.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot90_s8.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot90_x_s16.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot90_x_s32.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot90_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_f16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_f32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld4q_f16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 37 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s16.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s8.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u16.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u32.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u8.c | 28 +- .../mve/intrinsics/vldrbq_gather_offset_z_s16.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_s32.c | 36 +- .../arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_u16.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_u32.c | 36 +- .../arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s32.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u32.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 25 +- .../arm/mve/intrinsics/vldrdq_gather_base_s64.c | 19 +- .../arm/mve/intrinsics/vldrdq_gather_base_u64.c | 19 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 24 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 24 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 31 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 31 +- .../arm/mve/intrinsics/vldrdq_gather_base_z_s64.c | 23 +- .../arm/mve/intrinsics/vldrdq_gather_base_z_u64.c | 23 +- .../arm/mve/intrinsics/vldrdq_gather_offset_s64.c | 28 +- .../arm/mve/intrinsics/vldrdq_gather_offset_u64.c | 28 +- .../mve/intrinsics/vldrdq_gather_offset_z_s64.c | 36 +- .../mve/intrinsics/vldrdq_gather_offset_z_u64.c | 36 +- .../intrinsics/vldrdq_gather_shifted_offset_s64.c | 28 +- .../intrinsics/vldrdq_gather_shifted_offset_u64.c | 28 +- .../vldrdq_gather_shifted_offset_z_s64.c | 36 +- .../vldrdq_gather_shifted_offset_z_u64.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 20 +- .../arm/mve/intrinsics/vldrhq_gather_offset_f16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_s16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_u16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_u32.c | 28 +- .../mve/intrinsics/vldrhq_gather_offset_z_f16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_s16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_s32.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_u16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_u32.c | 36 +- .../intrinsics/vldrhq_gather_shifted_offset_f16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_s16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_s32.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_u16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_u32.c | 28 +- .../vldrhq_gather_shifted_offset_z_f16.c | 36 +- .../vldrhq_gather_shifted_offset_z_s16.c | 36 +- .../vldrhq_gather_shifted_offset_z_s32.c | 36 +- .../vldrhq_gather_shifted_offset_z_u16.c | 36 +- .../vldrhq_gather_shifted_offset_z_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrwq_f32.c | 18 +- .../arm/mve/intrinsics/vldrwq_gather_base_f32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_s32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_u32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 22 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 22 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 22 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 28 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 28 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_f32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_s32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_u32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_offset_f32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_offset_u32.c | 28 +- .../mve/intrinsics/vldrwq_gather_offset_z_f32.c | 36 +- .../mve/intrinsics/vldrwq_gather_offset_z_s32.c | 36 +- .../mve/intrinsics/vldrwq_gather_offset_z_u32.c | 36 +- .../intrinsics/vldrwq_gather_shifted_offset_f32.c | 28 +- .../intrinsics/vldrwq_gather_shifted_offset_s32.c | 28 +- .../intrinsics/vldrwq_gather_shifted_offset_u32.c | 28 +- .../vldrwq_gather_shifted_offset_z_f32.c | 36 +- .../vldrwq_gather_shifted_offset_z_s32.c | 36 +- .../vldrwq_gather_shifted_offset_z_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 23 +- .../arm/mve/intrinsics/vmaxnmavq_f16-1.c | 12 - .../arm/mve/intrinsics/vmaxnmavq_f32-1.c | 12 - .../arm/mve/intrinsics/vmaxnmavq_p_f16-1.c | 12 - .../arm/mve/intrinsics/vmaxnmavq_p_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c | 12 - .../arm/mve/intrinsics/vmaxnmvq_p_f16-1.c | 12 - .../arm/mve/intrinsics/vmaxnmvq_p_f32-1.c | 12 - .../arm/mve/intrinsics/vminnmavq_f16-1.c | 12 - .../arm/mve/intrinsics/vminnmavq_f32-1.c | 12 - .../arm/mve/intrinsics/vminnmavq_p_f16-1.c | 12 - .../arm/mve/intrinsics/vminnmavq_p_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c | 12 - .../arm/mve/intrinsics/vminnmvq_p_f16-1.c | 12 - .../arm/mve/intrinsics/vminnmvq_p_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c | 40 +- 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+- .../gcc.target/arm/mve/intrinsics/vshrq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vst1q_f16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst1q_f32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_f16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_f32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_s16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst1q_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vst1q_s8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst1q_u16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst1q_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vst1q_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst2q_f16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_f32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_u16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_u32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_u8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst4q_f16.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_f32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_s16.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_s32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_s8.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_u16.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_u32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_u8.c | 50 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_s8.c | 32 +- .../mve/intrinsics/vstrbq_scatter_offset_p_s16.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_s32.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_s8.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_u16.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_u32.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_u8.c | 40 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_s16.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_s32.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_s8.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_u16.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_u32.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_u8.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_u16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_u8.c | 32 +- .../arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c | 40 +- .../arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c | 40 +- .../arm/mve/intrinsics/vstrdq_scatter_base_s64.c | 32 +- .../arm/mve/intrinsics/vstrdq_scatter_base_u64.c | 32 +- .../mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c | 40 +- .../mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c | 40 +- .../mve/intrinsics/vstrdq_scatter_base_wb_s64.c | 32 +- .../mve/intrinsics/vstrdq_scatter_base_wb_u64.c | 32 +- .../mve/intrinsics/vstrdq_scatter_offset_p_s64.c | 40 +- .../mve/intrinsics/vstrdq_scatter_offset_p_u64.c | 40 +- .../arm/mve/intrinsics/vstrdq_scatter_offset_s64.c | 32 +- .../arm/mve/intrinsics/vstrdq_scatter_offset_u64.c | 32 +- .../vstrdq_scatter_shifted_offset_p_s64.c | 40 +- .../vstrdq_scatter_shifted_offset_p_u64.c | 40 +- .../intrinsics/vstrdq_scatter_shifted_offset_s64.c | 32 +- .../intrinsics/vstrdq_scatter_shifted_offset_u64.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_f16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_s32.c | 32 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_f16.c | 32 +- .../mve/intrinsics/vstrhq_scatter_offset_p_f16.c | 40 +- .../mve/intrinsics/vstrhq_scatter_offset_p_s16.c | 40 +- .../mve/intrinsics/vstrhq_scatter_offset_p_s32.c | 40 +- .../mve/intrinsics/vstrhq_scatter_offset_p_u16.c | 40 +- .../mve/intrinsics/vstrhq_scatter_offset_p_u32.c | 40 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_s16.c | 32 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_s32.c | 32 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_u16.c | 32 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_u32.c | 32 +- .../intrinsics/vstrhq_scatter_shifted_offset_f16.c | 32 +- .../vstrhq_scatter_shifted_offset_p_f16.c | 40 +- .../vstrhq_scatter_shifted_offset_p_s16.c | 40 +- .../vstrhq_scatter_shifted_offset_p_s32.c | 40 +- .../vstrhq_scatter_shifted_offset_p_u16.c | 40 +- .../vstrhq_scatter_shifted_offset_p_u32.c | 40 +- .../intrinsics/vstrhq_scatter_shifted_offset_s16.c | 32 +- .../intrinsics/vstrhq_scatter_shifted_offset_s32.c | 32 +- .../intrinsics/vstrhq_scatter_shifted_offset_u16.c | 32 +- .../intrinsics/vstrhq_scatter_shifted_offset_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_u16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrwq_f32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrwq_s32.c | 32 +- .../arm/mve/intrinsics/vstrwq_scatter_base_f32.c | 28 +- .../arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c | 36 +- .../arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c | 36 +- .../arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c | 36 +- .../arm/mve/intrinsics/vstrwq_scatter_base_s32.c | 28 +- .../arm/mve/intrinsics/vstrwq_scatter_base_u32.c | 28 +- .../mve/intrinsics/vstrwq_scatter_base_wb_f32.c | 32 +- .../mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_base_wb_s32.c | 32 +- .../mve/intrinsics/vstrwq_scatter_base_wb_u32.c | 32 +- .../arm/mve/intrinsics/vstrwq_scatter_offset_f32.c | 32 +- .../mve/intrinsics/vstrwq_scatter_offset_p_f32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_offset_p_s32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_offset_p_u32.c | 40 +- .../arm/mve/intrinsics/vstrwq_scatter_offset_s32.c | 32 +- .../arm/mve/intrinsics/vstrwq_scatter_offset_u32.c | 32 +- .../intrinsics/vstrwq_scatter_shifted_offset_f32.c | 32 +- .../vstrwq_scatter_shifted_offset_p_f32.c | 40 +- .../vstrwq_scatter_shifted_offset_p_s32.c | 40 +- .../vstrwq_scatter_shifted_offset_p_u32.c | 40 +- .../intrinsics/vstrwq_scatter_shifted_offset_s32.c | 32 +- .../intrinsics/vstrwq_scatter_shifted_offset_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrwq_u32.c | 32 +- .../arm/mve/intrinsics/vsubq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vsubq_m_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c | 12 - .../arm/mve/intrinsics/vsubq_x_n_f16-1.c | 13 - .../arm/mve/intrinsics/vsubq_x_n_f32-1.c | 13 - .../vdupq_n_s32.c => mve_const_shifts.c} | 29 +- .../arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c | 67 + gcc/testsuite/gcc.target/arm/mve/pr108177-1.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-10.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-11.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-12.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c | 2 +- gcc/testsuite/gcc.target/arm/mve/pr108177-13.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c | 2 +- gcc/testsuite/gcc.target/arm/mve/pr108177-14.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-2.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-3.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-4.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-5.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-6.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-7.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-8.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-9.c | 4 +- gcc/testsuite/gcc.target/arm/pr109939.c | 14 + gcc/testsuite/gcc.target/arm/pure-code/pr109800.c | 4 + .../gcc.target/arm/pure-code/pure-code.exp | 2 + gcc/testsuite/gcc.target/avr/mmcu/pr109476.c | 11 + gcc/testsuite/gcc.target/avr/mmcu/pr54816.c | 9 + gcc/testsuite/gcc.target/avr/pr105523.c | 14 + gcc/testsuite/gcc.target/avr/pr109907.c | 156 + gcc/testsuite/gcc.target/avr/pr110086.c | 5 + gcc/testsuite/gcc.target/avr/pr82931.c | 29 + gcc/testsuite/gcc.target/avr/torture/pr105753.c | 13 + gcc/testsuite/gcc.target/avr/torture/pr109650-1.c | 63 + gcc/testsuite/gcc.target/avr/torture/pr109650-2.c | 79 + gcc/testsuite/gcc.target/avr/torture/pr109907-1.c | 95 + gcc/testsuite/gcc.target/avr/torture/pr109907-2.c | 294 + gcc/testsuite/gcc.target/cris/peep2-addsplit1.c | 52 + gcc/testsuite/gcc.target/cris/peep2-andsplit1.c | 25 + gcc/testsuite/gcc.target/cris/peep2-andu1.c | 4 +- gcc/testsuite/gcc.target/cris/peep2-andu2.c | 6 +- gcc/testsuite/gcc.target/cris/peep2-lsrandsplit1.c | 19 + gcc/testsuite/gcc.target/cris/peep2-movandsplit1.c | 17 + .../cris/{peep2-movulsr.c => peep2-movulsr2.c} | 4 +- gcc/testsuite/gcc.target/cris/peep2-xsrand.c | 6 +- gcc/testsuite/gcc.target/cris/peep2-xsrand2.c | 6 +- gcc/testsuite/gcc.target/gcn/fpdiv.c | 1 - gcc/testsuite/gcc.target/gcn/simd-math-3-16.c | 13 + gcc/testsuite/gcc.target/gcn/simd-math-3-2.c | 13 + gcc/testsuite/gcc.target/gcn/simd-math-3-32.c | 13 + gcc/testsuite/gcc.target/gcn/simd-math-3-4.c | 13 + gcc/testsuite/gcc.target/gcn/simd-math-3-8.c | 13 + gcc/testsuite/gcc.target/gcn/simd-math-3-char-16.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-char-2.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-char-32.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-char-4.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-char-8.c | 11 + .../gcc.target/gcn/simd-math-3-char-run-16.c | 2 + .../gcc.target/gcn/simd-math-3-char-run-2.c | 2 + .../gcc.target/gcn/simd-math-3-char-run-32.c | 2 + .../gcc.target/gcn/simd-math-3-char-run-4.c | 2 + .../gcc.target/gcn/simd-math-3-char-run-8.c | 2 + .../gcc.target/gcn/simd-math-3-char-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-3-char.c | 10 + gcc/testsuite/gcc.target/gcn/simd-math-3-long-16.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-long-2.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-long-32.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-long-4.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-long-8.c | 11 + .../gcc.target/gcn/simd-math-3-long-run-16.c | 2 + .../gcc.target/gcn/simd-math-3-long-run-2.c | 2 + .../gcc.target/gcn/simd-math-3-long-run-32.c | 2 + .../gcc.target/gcn/simd-math-3-long-run-4.c | 2 + .../gcc.target/gcn/simd-math-3-long-run-8.c | 2 + .../gcc.target/gcn/simd-math-3-long-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-3-long.c | 10 + gcc/testsuite/gcc.target/gcn/simd-math-3-run-16.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-3-run-2.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-3-run-32.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-3-run-4.c | 3 + gcc/testsuite/gcc.target/gcn/simd-math-3-run-8.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-3-run.c | 2 + .../gcc.target/gcn/simd-math-3-short-16.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-short-2.c | 11 + .../gcc.target/gcn/simd-math-3-short-32.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-short-4.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-3-short-8.c | 11 + .../gcc.target/gcn/simd-math-3-short-run-16.c | 2 + .../gcc.target/gcn/simd-math-3-short-run-2.c | 2 + .../gcn/simd-math-3-short-run-32.c} | 4 +- .../gcc.target/gcn/simd-math-3-short-run-4.c | 2 + .../gcc.target/gcn/simd-math-3-short-run-8.c | 2 + .../gcc.target/gcn/simd-math-3-short-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-3-short.c | 10 + gcc/testsuite/gcc.target/gcn/simd-math-3.c | 186 + .../gcc.target/gcn/simd-math-4-char-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-4-char.c | 9 + .../gcc.target/gcn/simd-math-4-long-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-4-long.c | 9 + gcc/testsuite/gcc.target/gcn/simd-math-4-run.c | 2 + .../gcc.target/gcn/simd-math-4-short-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-4-short.c | 9 + gcc/testsuite/gcc.target/gcn/simd-math-4.c | 99 + gcc/testsuite/gcc.target/gcn/simd-math-5-16.c | 8 + gcc/testsuite/gcc.target/gcn/simd-math-5-32.c | 8 + gcc/testsuite/gcc.target/gcn/simd-math-5-4.c | 8 + gcc/testsuite/gcc.target/gcn/simd-math-5-8.c | 8 + gcc/testsuite/gcc.target/gcn/simd-math-5-char-16.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-5-char-32.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-5-char-4.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-5-char-8.c | 11 + .../gcc.target/gcn/simd-math-5-char-run-16.c | 2 + .../gcc.target/gcn/simd-math-5-char-run-32.c | 2 + .../gcc.target/gcn/simd-math-5-char-run-4.c | 2 + .../gcc.target/gcn/simd-math-5-char-run-8.c | 2 + .../gcc.target/gcn/simd-math-5-char-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-5-char.c | 10 + gcc/testsuite/gcc.target/gcn/simd-math-5-long-16.c | 9 + gcc/testsuite/gcc.target/gcn/simd-math-5-long-32.c | 9 + gcc/testsuite/gcc.target/gcn/simd-math-5-long-4.c | 9 + gcc/testsuite/gcc.target/gcn/simd-math-5-long-8.c | 9 + .../gcc.target/gcn/simd-math-5-long-run-16.c | 2 + .../gcc.target/gcn/simd-math-5-long-run-32.c | 2 + .../gcc.target/gcn/simd-math-5-long-run-4.c | 2 + .../gcc.target/gcn/simd-math-5-long-run-8.c | 2 + .../gcc.target/gcn/simd-math-5-long-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-5-long.c | 8 + gcc/testsuite/gcc.target/gcn/simd-math-5-run-16.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-5-run-32.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-5-run-4.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-5-run-8.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-5-run.c | 2 + .../gcc.target/gcn/simd-math-5-short-16.c | 11 + .../gcc.target/gcn/simd-math-5-short-32.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-5-short-4.c | 11 + gcc/testsuite/gcc.target/gcn/simd-math-5-short-8.c | 11 + .../gcc.target/gcn/simd-math-5-short-run-16.c | 2 + .../gcc.target/gcn/simd-math-5-short-run-32.c | 2 + .../gcc.target/gcn/simd-math-5-short-run-4.c | 2 + .../gcc.target/gcn/simd-math-5-short-run-8.c | 2 + .../gcc.target/gcn/simd-math-5-short-run.c | 2 + gcc/testsuite/gcc.target/gcn/simd-math-5-short.c | 10 + gcc/testsuite/gcc.target/gcn/simd-math-5.c | 88 + gcc/testsuite/gcc.target/hppa/shadd-3.c | 2 +- gcc/testsuite/gcc.target/i386/addr-space-6.c | 21 + gcc/testsuite/gcc.target/i386/amx-check.h | 3 + gcc/testsuite/gcc.target/i386/amx-helper.h | 4 +- .../gcc.target/i386/amxcomplex-asmatt-1.c | 15 + .../gcc.target/i386/amxcomplex-asmintel-1.c | 12 + .../gcc.target/i386/amxcomplex-cmmimfp16ps-2.c | 53 + ...p16-dpfp16ps-2.c => amxcomplex-cmmrlfp16ps-2.c} | 39 +- .../gcc.target/i386/avx2-dest-false-dep-for-glc.c | 28 +- .../gcc.target/i386/avx512bitalg-vpopcntb-1.c | 3 +- .../gcc.target/i386/avx512bitalg-vpopcntb.c | 2 +- .../gcc.target/i386/avx512bitalg-vpopcntbvl.c | 2 +- .../gcc.target/i386/avx512bitalg-vpopcntw-1.c | 3 +- .../gcc.target/i386/avx512bitalg-vpopcntw.c | 2 +- .../gcc.target/i386/avx512bitalg-vpopcntwvl.c | 2 +- .../gcc.target/i386/avx512bitalg-vpshufbitqmb-1.c | 2 +- .../gcc.target/i386/avx512bitalg-vpshufbitqmb.c | 2 +- .../gcc.target/i386/avx512bitalgvl-vpopcntb-1.c | 3 +- .../gcc.target/i386/avx512bitalgvl-vpopcntw-1.c | 3 +- .../i386/avx512bitalgvl-vpshufbitqmb-1.c | 2 +- .../gcc.target/i386/avx512bw-pr100267-1.c | 2 +- .../gcc.target/i386/avx512bw-pr100267-b-2.c | 3 +- .../gcc.target/i386/avx512bw-pr100267-d-2.c | 3 +- .../gcc.target/i386/avx512bw-pr100267-q-2.c | 3 +- .../gcc.target/i386/avx512bw-pr100267-w-2.c | 3 +- .../gcc.target/i386/avx512bw-vpackssdw-3.c | 55 + .../gcc.target/i386/avx512bw-vpacksswb-3.c | 50 + .../i386/avx512dq-dest-false-dep-for-glc.c | 257 +- gcc/testsuite/gcc.target/i386/avx512f-copysign.c | 32 + .../i386/avx512f-dest-false-dep-for-glc.c | 348 +- gcc/testsuite/gcc.target/i386/avx512f-dupv2di.c | 13 + .../gcc.target/i386/avx512f-vpcompressb-1.c | 2 +- .../gcc.target/i386/avx512f-vpcompressb-2.c | 3 +- .../gcc.target/i386/avx512f-vpcompressw-1.c | 2 +- .../gcc.target/i386/avx512f-vpcompressw-2.c | 3 +- .../gcc.target/i386/avx512f-vpexpandb-1.c | 2 +- .../gcc.target/i386/avx512f-vpexpandb-2.c | 3 +- .../gcc.target/i386/avx512f-vpexpandw-1.c | 2 +- .../gcc.target/i386/avx512f-vpexpandw-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c | 2 +- gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c | 2 +- gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c | 2 +- gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c | 3 +- gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c | 3 +- .../i386/avx512fp16-dest-false-dep-for-glc.c | 118 +- gcc/testsuite/gcc.target/i386/avx512fvl-vaes-1.c | 11 + .../gcc.target/i386/avx512vbmi2-vpshld-1.c | 2 +- .../gcc.target/i386/avx512vbmi2-vpshrd-1.c | 2 +- .../i386/avx512vl-dest-false-dep-for-glc.c | 243 +- .../gcc.target/i386/avx512vl-vpcompressb-1.c | 2 +- .../gcc.target/i386/avx512vl-vpcompressb-2.c | 2 +- .../gcc.target/i386/avx512vl-vpcompressw-2.c | 2 +- .../gcc.target/i386/avx512vl-vpexpandb-1.c | 2 +- .../gcc.target/i386/avx512vl-vpexpandb-2.c | 2 +- .../gcc.target/i386/avx512vl-vpexpandw-1.c | 2 +- .../gcc.target/i386/avx512vl-vpexpandw-2.c | 2 +- gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c | 2 +- gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c | 2 +- gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c | 2 +- .../gcc.target/i386/avx512vl-vpshldvd-2.c | 2 +- .../gcc.target/i386/avx512vl-vpshldvq-2.c | 2 +- .../gcc.target/i386/avx512vl-vpshldvw-2.c | 2 +- gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c | 2 +- gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c | 2 +- gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c | 2 +- .../gcc.target/i386/avx512vl-vpshrdvd-2.c | 2 +- .../gcc.target/i386/avx512vl-vpshrdvq-2.c | 2 +- .../gcc.target/i386/avx512vl-vpshrdvw-2.c | 2 +- gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c | 2 +- .../gcc.target/i386/avx512vl-vshuff32x4-1.c | 2 +- .../gcc.target/i386/avx512vl-vshuff64x2-1.c | 2 +- .../gcc.target/i386/avx512vl-vshufi32x4-1.c | 2 +- .../gcc.target/i386/avx512vl-vshufi64x2-1.c | 2 +- .../gcc.target/i386/avx512vlbw-pr100267-1.c | 2 +- .../gcc.target/i386/avx512vlbw-pr100267-b-2.c | 2 +- .../gcc.target/i386/avx512vlbw-pr100267-w-2.c | 2 +- .../gcc.target/i386/avx512vlbw-reduce-op-1.c | 206 + gcc/testsuite/gcc.target/i386/cmc-1.c | 28 + .../gcc.target/i386/{pr91385.c => cmov10.c} | 7 +- .../gcc.target/i386/{pr91385.c => cmov11.c} | 7 +- gcc/testsuite/gcc.target/i386/cmov6.c | 5 +- gcc/testsuite/gcc.target/i386/ctzll-1.c | 9 + gcc/testsuite/gcc.target/i386/ffsll-1.c | 9 + gcc/testsuite/gcc.target/i386/funcspec-56.inc | 2 + gcc/testsuite/gcc.target/i386/insvti_highpart-1.c | 12 + gcc/testsuite/gcc.target/i386/mcount_pic.c | 1 + gcc/testsuite/gcc.target/i386/opt-vperm-vshuf-1.c | 51 + gcc/testsuite/gcc.target/i386/opt-vperm-vshuf-2.c | 68 + gcc/testsuite/gcc.target/i386/opt-vperm-vshuf-3.c | 63 + gcc/testsuite/gcc.target/i386/pieces-memcpy-7.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memcpy-8.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memcpy-9.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memset-1.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memset-36.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memset-4.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memset-40.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memset-41.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memset-7.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memset-8.c | 2 + gcc/testsuite/gcc.target/i386/pieces-memset-9.c | 2 + gcc/testsuite/gcc.target/i386/pr100711-2.c | 14 +- gcc/testsuite/gcc.target/i386/pr100711-3.c | 40 + gcc/testsuite/gcc.target/i386/pr102230.c | 2 + gcc/testsuite/gcc.target/i386/pr103074.c | 1 + gcc/testsuite/gcc.target/i386/pr103559-1.c | 13 + gcc/testsuite/gcc.target/i386/pr103559-2.c | 15 + gcc/testsuite/gcc.target/i386/pr103559-3.c | 15 + gcc/testsuite/gcc.target/i386/pr103559-4.c | 13 + gcc/testsuite/gcc.target/i386/pr104447.c | 1 + gcc/testsuite/gcc.target/i386/pr105776.c | 43 + gcc/testsuite/gcc.target/i386/pr108707.c | 16 + gcc/testsuite/gcc.target/i386/pr108804.c | 15 + gcc/testsuite/gcc.target/i386/pr108938-1.c | 79 + gcc/testsuite/gcc.target/i386/pr108938-2.c | 35 + gcc/testsuite/gcc.target/i386/pr108938-3.c | 26 + gcc/testsuite/gcc.target/i386/pr108938-load-1.c | 69 + gcc/testsuite/gcc.target/i386/pr108938-load-2.c | 30 + gcc/testsuite/gcc.target/i386/pr109011-b1.c | 53 + gcc/testsuite/gcc.target/i386/pr109011-b2.c | 104 + gcc/testsuite/gcc.target/i386/pr109011-d1.c | 46 + gcc/testsuite/gcc.target/i386/pr109011-d2.c | 118 + gcc/testsuite/gcc.target/i386/pr109011-dq1.c | 46 + gcc/testsuite/gcc.target/i386/pr109011-dq2.c | 104 + gcc/testsuite/gcc.target/i386/pr109011-q1.c | 46 + gcc/testsuite/gcc.target/i386/pr109011-q2.c | 118 + gcc/testsuite/gcc.target/i386/pr109011-w1.c | 47 + gcc/testsuite/gcc.target/i386/pr109011-w2.c | 104 + gcc/testsuite/gcc.target/i386/pr109052-2.c | 10 + gcc/testsuite/gcc.target/i386/pr109117-1.c | 4 +- gcc/testsuite/gcc.target/i386/pr109173-1.c | 57 + gcc/testsuite/gcc.target/i386/pr109174-1.c | 45 + gcc/testsuite/gcc.target/i386/pr109362.c | 19 + gcc/testsuite/gcc.target/i386/pr109458.c | 13 + gcc/testsuite/gcc.target/i386/pr109807.c | 4 + gcc/testsuite/gcc.target/i386/pr109825.c | 4 + gcc/testsuite/gcc.target/i386/pr109900.c | 95 + gcc/testsuite/gcc.target/i386/pr109944-1.c | 30 + gcc/testsuite/gcc.target/i386/pr109944-2.c | 17 + gcc/testsuite/gcc.target/i386/pr109973-1.c | 13 + gcc/testsuite/gcc.target/i386/pr109973-2.c | 13 + gcc/testsuite/gcc.target/i386/pr110018-1.c | 94 + gcc/testsuite/gcc.target/i386/pr110018-2.c | 94 + gcc/testsuite/gcc.target/i386/pr110067.c | 77 + gcc/testsuite/gcc.target/i386/pr110083.c | 26 + gcc/testsuite/gcc.target/i386/pr110108-2.c | 14 + gcc/testsuite/gcc.target/i386/pr110108-3.c | 22 + gcc/testsuite/gcc.target/i386/pr110108.c | 16 + gcc/testsuite/gcc.target/i386/pr110227.c | 11 + gcc/testsuite/gcc.target/i386/pr110232.c | 12 + gcc/testsuite/gcc.target/i386/pr31985.c | 14 + gcc/testsuite/gcc.target/i386/pr43644.c | 11 + gcc/testsuite/gcc.target/i386/pr64731.c | 14 + gcc/testsuite/gcc.target/i386/pr78103-2.c | 2 + gcc/testsuite/gcc.target/i386/pr78952-3.c | 40 + .../gcc.target/i386/{pr78904-1a.c => pr78952-4.c} | 9 +- gcc/testsuite/gcc.target/i386/pr79173-1.c | 59 + gcc/testsuite/gcc.target/i386/pr79173-10.c | 31 + gcc/testsuite/gcc.target/i386/pr79173-11.c | 39 + gcc/testsuite/gcc.target/i386/pr79173-2.c | 59 + gcc/testsuite/gcc.target/i386/pr79173-3.c | 61 + gcc/testsuite/gcc.target/i386/pr79173-4.c | 61 + gcc/testsuite/gcc.target/i386/pr79173-5.c | 32 + gcc/testsuite/gcc.target/i386/pr79173-6.c | 33 + gcc/testsuite/gcc.target/i386/pr79173-7.c | 31 + gcc/testsuite/gcc.target/i386/pr79173-8.c | 31 + gcc/testsuite/gcc.target/i386/pr79173-9.c | 31 + gcc/testsuite/gcc.target/i386/pr88531-2a.c | 3 +- gcc/testsuite/gcc.target/i386/pr88531-2b.c | 3 +- gcc/testsuite/gcc.target/i386/pr88531-2c.c | 3 +- gcc/testsuite/gcc.target/i386/pr88828-0.c | 2 +- gcc/testsuite/gcc.target/i386/pr89618-2.c | 23 + .../gcc.target/i386/pr92658-avx512bw-trunc-2.c | 27 + gcc/testsuite/gcc.target/i386/pr92658-sse4-4b.c | 26 + gcc/testsuite/gcc.target/i386/pr92658-sse4-8b.c | 71 + gcc/testsuite/gcc.target/i386/pr93696-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr93696-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr94908.c | 14 + gcc/testsuite/gcc.target/i386/sse-12.c | 2 +- gcc/testsuite/gcc.target/i386/sse-13.c | 2 +- gcc/testsuite/gcc.target/i386/sse-14.c | 2 +- gcc/testsuite/gcc.target/i386/sse-22.c | 4 +- gcc/testsuite/gcc.target/i386/sse-23.c | 2 +- gcc/testsuite/gcc.target/i386/sse2-mmx-mult-vec.c | 27 + .../gcc.target/i386/sse2-shiftqihi-constant-1.c | 4 +- gcc/testsuite/gcc.target/i386/sse2-v1ti-mov-2.c | 16 + gcc/testsuite/gcc.target/i386/sse4_1-insertps-5.c | 19 + gcc/testsuite/gcc.target/i386/stc-1.c | 21 + gcc/testsuite/gcc.target/i386/vec_pack_fp16-1.c | 34 + gcc/testsuite/gcc.target/i386/vec_pack_fp16-2.c | 9 + gcc/testsuite/gcc.target/i386/vec_pack_fp16-3.c | 8 + gcc/testsuite/gcc.target/i386/vect-mulv4qi.c | 24 + gcc/testsuite/gcc.target/i386/vect-mulv8qi.c | 28 + .../gcc.target/i386/vect-partial-vectors-1.c | 13 + .../gcc.target/i386/vect-partial-vectors-2.c | 12 + gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c | 43 + gcc/testsuite/gcc.target/i386/vect-shiftv8qi.c | 43 + gcc/testsuite/gcc.target/i386/vect-vshiftv4qi.c | 28 + gcc/testsuite/gcc.target/i386/vect-vshiftv8qi.c | 28 + gcc/testsuite/gcc.target/i386/vpclmulqdq.c | 3 + .../{vperm-v4si-2-sse4.c => vperm-v4sf-2-sse4.c} | 2 +- gcc/testsuite/gcc.target/loongarch/add-const.c | 45 + gcc/testsuite/gcc.target/loongarch/pr109465-1.c | 9 + gcc/testsuite/gcc.target/loongarch/pr109465-2.c | 9 + gcc/testsuite/gcc.target/loongarch/pr109465-3.c | 12 + gcc/testsuite/gcc.target/loongarch/shrink-wrap.c | 19 + .../gcc.target/loongarch/stack-check-cfa-1.c | 2 +- .../gcc.target/loongarch/stack-check-cfa-2.c | 2 +- gcc/testsuite/gcc.target/loongarch/va_arg.c | 24 + .../{code-readable-1.c => code-readable-attr-1.c} | 6 +- .../{code-readable-2.c => code-readable-attr-2.c} | 6 +- .../{code-readable-3.c => code-readable-attr-3.c} | 6 +- .../{code-readable-4.c => code-readable-attr-4.c} | 6 +- .../gcc.target/mips/code-readable-attr-5.c | 5 + gcc/testsuite/gcc.target/mips/mips-ps-type-2.c | 4 +- gcc/testsuite/gcc.target/mips/movcc-3.c | 4 +- gcc/testsuite/gcc.target/nvptx/brev-1.c | 8 + gcc/testsuite/gcc.target/nvptx/brev-2.c | 94 + gcc/testsuite/gcc.target/nvptx/brevll-1.c | 8 + gcc/testsuite/gcc.target/nvptx/brevll-2.c | 154 + .../gcc.target/powerpc/bfp/scalar-extract-exp-0.c | 2 - .../gcc.target/powerpc/bfp/scalar-extract-exp-1.c | 2 - .../gcc.target/powerpc/bfp/scalar-extract-exp-2.c | 20 - .../gcc.target/powerpc/bfp/scalar-extract-exp-6.c | 2 - .../gcc.target/powerpc/bfp/scalar-extract-exp-8.c | 58 + .../gcc.target/powerpc/bfp/scalar-extract-sig-0.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-sig-1.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-sig-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-sig-6.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-sig-8.c | 65 + .../gcc.target/powerpc/bfp/scalar-insert-exp-0.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-1.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-12.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-13.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-16.c | 103 + .../gcc.target/powerpc/bfp/scalar-insert-exp-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-3.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-4.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-5.c | 2 +- .../powerpc/builtin_altivec_tr_stxvr_runnable.c | 104 + .../gcc.target/powerpc/builtins-5-p9-runnable.c | 35 + gcc/testsuite/gcc.target/powerpc/const_anchors.c | 20 + gcc/testsuite/gcc.target/powerpc/darwin-abi-13-0.c | 23 + gcc/testsuite/gcc.target/powerpc/darwin-abi-13-1.c | 27 + gcc/testsuite/gcc.target/powerpc/darwin-abi-13-2.c | 27 + .../gcc.target/powerpc/darwin-structs-0.h | 29 + .../gcc.target/powerpc/fold-vec-extract-int.p8.c | 4 +- .../gcc.target/powerpc/int_128bit-runnable.c | 12 +- .../gcc.target/powerpc/p9-sign_extend-runnable.c | 25 + gcc/testsuite/gcc.target/powerpc/p9-vparity.c | 1 + .../gcc.target/powerpc/parall_5insn_const.c | 27 + .../gcc.target/powerpc/ppc-fortran/ppc-fortran.exp | 10 + gcc/testsuite/gcc.target/powerpc/pr100106-sa.c | 16 + gcc/testsuite/gcc.target/powerpc/pr106708.c | 10 +- gcc/testsuite/gcc.target/powerpc/pr108699.c | 42 + gcc/testsuite/gcc.target/powerpc/pr109069-1.c | 25 + gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c | 50 + gcc/testsuite/gcc.target/powerpc/pr109069-2.c | 12 + gcc/testsuite/gcc.target/powerpc/pr109069-2.h | 83 + gcc/testsuite/gcc.target/powerpc/pr109566.c | 18 + gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 17 + gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 17 + gcc/testsuite/gcc.target/powerpc/pr110011.c | 42 + gcc/testsuite/gcc.target/powerpc/pr56605.c | 3 +- gcc/testsuite/gcc.target/powerpc/pr70243.c | 41 + gcc/testsuite/gcc.target/powerpc/pr83677.c | 30 +- gcc/testsuite/gcc.target/powerpc/pr99708.c | 10 +- gcc/testsuite/gcc.target/powerpc/rs6000-fpint.c | 3 +- .../gcc.target/powerpc/try_const_anchors_ice.c | 16 + .../gcc.target/riscv/amo-table-a-6-amo-add-1.c | 15 + .../gcc.target/riscv/amo-table-a-6-amo-add-2.c | 15 + .../gcc.target/riscv/amo-table-a-6-amo-add-3.c | 15 + .../gcc.target/riscv/amo-table-a-6-amo-add-4.c | 15 + .../gcc.target/riscv/amo-table-a-6-amo-add-5.c | 15 + .../riscv/amo-table-a-6-compare-exchange-1.c | 9 + .../riscv/amo-table-a-6-compare-exchange-2.c | 9 + .../riscv/amo-table-a-6-compare-exchange-3.c | 9 + .../riscv/amo-table-a-6-compare-exchange-4.c | 9 + .../riscv/amo-table-a-6-compare-exchange-5.c | 9 + .../riscv/amo-table-a-6-compare-exchange-6.c | 10 + .../riscv/amo-table-a-6-compare-exchange-7.c | 9 + .../gcc.target/riscv/amo-table-a-6-fence-1.c | 14 + .../gcc.target/riscv/amo-table-a-6-fence-2.c | 15 + .../gcc.target/riscv/amo-table-a-6-fence-3.c | 15 + .../gcc.target/riscv/amo-table-a-6-fence-4.c | 15 + .../gcc.target/riscv/amo-table-a-6-fence-5.c | 15 + .../gcc.target/riscv/amo-table-a-6-load-1.c | 16 + .../gcc.target/riscv/amo-table-a-6-load-2.c | 17 + .../gcc.target/riscv/amo-table-a-6-load-3.c | 18 + .../gcc.target/riscv/amo-table-a-6-store-1.c | 16 + .../gcc.target/riscv/amo-table-a-6-store-2.c | 17 + .../riscv/amo-table-a-6-store-compat-3.c | 18 + .../riscv/amo-table-a-6-subword-amo-add-1.c | 9 + .../riscv/amo-table-a-6-subword-amo-add-2.c | 9 + .../riscv/amo-table-a-6-subword-amo-add-3.c | 9 + .../riscv/amo-table-a-6-subword-amo-add-4.c | 9 + .../riscv/amo-table-a-6-subword-amo-add-5.c | 9 + gcc/testsuite/gcc.target/riscv/and-extend-1.c | 30 + gcc/testsuite/gcc.target/riscv/and-extend-2.c | 28 + gcc/testsuite/gcc.target/riscv/arch-19.c | 4 + gcc/testsuite/gcc.target/riscv/arch-20.c | 5 + gcc/testsuite/gcc.target/riscv/arch-21.c | 5 + gcc/testsuite/gcc.target/riscv/arch-5.c | 2 +- gcc/testsuite/gcc.target/riscv/divmod-1.c | 11 + gcc/testsuite/gcc.target/riscv/divmod-2.c | 16 + gcc/testsuite/gcc.target/riscv/inline-atomics-1.c | 18 + gcc/testsuite/gcc.target/riscv/inline-atomics-2.c | 9 + gcc/testsuite/gcc.target/riscv/inline-atomics-3.c | 569 + gcc/testsuite/gcc.target/riscv/inline-atomics-4.c | 566 + .../riscv/inline-atomics-5.c} | 23 +- .../riscv/inline-atomics-6.c} | 23 +- .../riscv/inline-atomics-7.c} | 5 +- .../testsuite/gcc.target/riscv/inline-atomics-8.c | 4 +- gcc/testsuite/gcc.target/riscv/interrupt-fcsr-1.c | 15 + gcc/testsuite/gcc.target/riscv/interrupt-fcsr-2.c | 15 + gcc/testsuite/gcc.target/riscv/interrupt-fcsr-3.c | 14 + .../riscv/{pr106602.c => pr106602-rv32i.c} | 4 +- .../riscv/{pr106602.c => pr106602-rv64i.c} | 2 +- .../riscv/{pr106602.c => pr106602-rv64i_zba.c} | 7 +- gcc/testsuite/gcc.target/riscv/pr106888.c | 12 + gcc/testsuite/gcc.target/riscv/pr109508.c | 12 + gcc/testsuite/gcc.target/riscv/pr89835.c | 9 + .../gcc.target/riscv/{predef-22.c => predef-26.c} | 36 +- .../gcc.target/riscv/{predef-22.c => predef-27.c} | 38 +- .../gcc.target/riscv/read-thread-pointer.c | 1 + gcc/testsuite/gcc.target/riscv/rv32e_stack.c | 14 + .../gcc.target/riscv/rvv/autovec/align-1.c | 12 + .../gcc.target/riscv/rvv/autovec/align-2.c | 12 + .../gcc.target/riscv/rvv/autovec/binop/narrow-1.c | 31 + .../gcc.target/riscv/rvv/autovec/binop/narrow-2.c | 32 + .../gcc.target/riscv/rvv/autovec/binop/narrow-3.c | 31 + .../riscv/rvv/autovec/binop/narrow_run-1.c | 50 + .../riscv/rvv/autovec/binop/narrow_run-2.c | 46 + .../riscv/rvv/autovec/binop/narrow_run-3.c | 46 + .../gcc.target/riscv/rvv/autovec/binop/shift-run.c | 55 + .../riscv/rvv/autovec/binop/shift-rv32gcv.c | 8 + .../riscv/rvv/autovec/binop/shift-rv64gcv.c | 8 + .../riscv/rvv/autovec/binop/shift-scalar-run.c | 4 + .../riscv/rvv/autovec/binop/shift-scalar-rv32gcv.c | 7 + .../riscv/rvv/autovec/binop/shift-scalar-rv64gcv.c | 7 + .../rvv/autovec/binop/shift-scalar-template.h | 119 + .../riscv/rvv/autovec/binop/shift-template.h | 37 + .../gcc.target/riscv/rvv/autovec/binop/vadd-run.c | 81 + .../riscv/rvv/autovec/binop/vadd-rv32gcv.c | 8 + .../riscv/rvv/autovec/binop/vadd-rv64gcv.c | 8 + .../riscv/rvv/autovec/binop/vadd-template.h | 70 + .../riscv/rvv/autovec/binop/vadd-zvfh-run.c | 54 + .../gcc.target/riscv/rvv/autovec/binop/vand-run.c | 75 + .../riscv/rvv/autovec/binop/vand-rv32gcv.c | 7 + .../riscv/rvv/autovec/binop/vand-rv64gcv.c | 7 + .../riscv/rvv/autovec/binop/vand-template.h | 61 + .../gcc.target/riscv/rvv/autovec/binop/vdiv-run.c | 55 + .../riscv/rvv/autovec/binop/vdiv-rv32gcv.c | 15 + .../riscv/rvv/autovec/binop/vdiv-rv64gcv.c | 15 + .../riscv/rvv/autovec/binop/vdiv-template.h | 43 + .../riscv/rvv/autovec/binop/vdiv-zvfh-run.c | 37 + .../gcc.target/riscv/rvv/autovec/binop/vmax-run.c | 56 + .../riscv/rvv/autovec/binop/vmax-rv32gcv.c | 8 + .../riscv/rvv/autovec/binop/vmax-rv64gcv.c | 8 + .../riscv/rvv/autovec/binop/vmax-template.h | 43 + .../riscv/rvv/autovec/binop/vmax-zvfh-run.c | 38 + .../gcc.target/riscv/rvv/autovec/binop/vmin-run.c | 55 + .../riscv/rvv/autovec/binop/vmin-rv32gcv.c | 8 + .../riscv/rvv/autovec/binop/vmin-rv64gcv.c | 8 + .../riscv/rvv/autovec/binop/vmin-template.h | 43 + .../riscv/rvv/autovec/binop/vmin-zvfh-run.c | 37 + .../gcc.target/riscv/rvv/autovec/binop/vmul-run.c | 55 + .../riscv/rvv/autovec/binop/vmul-rv32gcv.c | 7 + .../riscv/rvv/autovec/binop/vmul-rv64gcv.c | 7 + .../riscv/rvv/autovec/binop/vmul-template.h | 43 + .../riscv/rvv/autovec/binop/vmul-zvfh-run.c | 37 + .../gcc.target/riscv/rvv/autovec/binop/vor-run.c | 75 + .../riscv/rvv/autovec/binop/vor-rv32gcv.c | 7 + .../riscv/rvv/autovec/binop/vor-rv64gcv.c | 7 + .../riscv/rvv/autovec/binop/vor-template.h | 61 + .../gcc.target/riscv/rvv/autovec/binop/vrem-run.c | 51 + .../riscv/rvv/autovec/binop/vrem-rv32gcv.c | 9 + .../riscv/rvv/autovec/binop/vrem-rv64gcv.c | 10 + .../riscv/rvv/autovec/binop/vrem-template.h | 37 + .../gcc.target/riscv/rvv/autovec/binop/vsub-run.c | 91 + .../riscv/rvv/autovec/binop/vsub-rv32gcv.c | 13 + .../riscv/rvv/autovec/binop/vsub-rv64gcv.c | 13 + .../riscv/rvv/autovec/binop/vsub-template.h | 84 + .../riscv/rvv/autovec/binop/vsub-zvfh-run.c | 55 + .../gcc.target/riscv/rvv/autovec/binop/vxor-run.c | 75 + .../riscv/rvv/autovec/binop/vxor-rv32gcv.c | 7 + .../riscv/rvv/autovec/binop/vxor-rv64gcv.c | 7 + .../riscv/rvv/autovec/binop/vxor-template.h | 61 + .../gcc.target/riscv/rvv/autovec/cmp/vcond-1.c | 157 + .../rvv/autovec/cmp/vcond-2.c} | 41 +- .../gcc.target/riscv/rvv/autovec/cmp/vcond-3.c | 13 + .../gcc.target/riscv/rvv/autovec/cmp/vcond-4.c | 53 + .../rvv/autovec/cmp/vcond_run-1.c} | 6 +- .../rvv/autovec/cmp/vcond_run-2.c} | 8 +- .../gcc.target/riscv/rvv/autovec/cmp/vcond_run-3.c | 6 + .../rvv/autovec/cmp/vcond_run-4.c} | 6 +- .../riscv/rvv/autovec/conversions/vfcvt_rtz-run.c | 52 + .../rvv/autovec/conversions/vfcvt_rtz-rv32gcv.c | 6 + .../rvv/autovec/conversions/vfcvt_rtz-rv64gcv.c | 6 + .../rvv/autovec/conversions/vfcvt_rtz-template.h | 15 + .../riscv/rvv/autovec/conversions/vncvt-run.c | 35 + .../riscv/rvv/autovec/conversions/vncvt-rv32gcv.c | 6 + .../riscv/rvv/autovec/conversions/vncvt-rv64gcv.c | 6 + .../riscv/rvv/autovec/conversions/vncvt-template.h | 19 + .../riscv/rvv/autovec/conversions/vsext-run.c | 35 + .../riscv/rvv/autovec/conversions/vsext-rv32gcv.c | 8 + .../riscv/rvv/autovec/conversions/vsext-rv64gcv.c | 8 + .../riscv/rvv/autovec/conversions/vsext-template.h | 19 + .../riscv/rvv/autovec/conversions/vzext-run.c | 35 + .../riscv/rvv/autovec/conversions/vzext-rv32gcv.c | 8 + .../riscv/rvv/autovec/conversions/vzext-rv64gcv.c | 8 + .../riscv/rvv/autovec/conversions/vzext-template.h | 19 + .../{base/spill-10.c => autovec/fixed-vlmax-1.c} | 25 +- .../riscv/rvv/autovec/partial/multiple_rgroup-1.c | 6 + .../riscv/rvv/autovec/partial/multiple_rgroup-1.h | 304 + .../riscv/rvv/autovec/partial/multiple_rgroup-2.c | 6 + .../riscv/rvv/autovec/partial/multiple_rgroup-2.h | 546 + .../riscv/rvv/autovec/partial/multiple_rgroup-3.c | 288 + .../riscv/rvv/autovec/partial/multiple_rgroup-4.c | 75 + .../rvv/autovec/partial/multiple_rgroup_run-1.c | 19 + .../rvv/autovec/partial/multiple_rgroup_run-2.c | 19 + .../rvv/autovec/partial/multiple_rgroup_run-3.c | 36 + .../rvv/autovec/partial/multiple_rgroup_run-4.c | 15 + .../riscv/rvv/autovec/partial/select_vl-1.c | 26 + .../riscv/rvv/autovec/partial/single_rgroup-1.c | 8 + .../riscv/rvv/autovec/partial/single_rgroup-1.h | 106 + .../rvv/autovec/partial/single_rgroup_run-1.c | 19 + .../gcc.target/riscv/rvv/autovec/partial/slp-1.c | 24 + .../gcc.target/riscv/rvv/autovec/partial/slp-10.c | 32 + .../gcc.target/riscv/rvv/autovec/partial/slp-11.c | 33 + .../gcc.target/riscv/rvv/autovec/partial/slp-12.c | 35 + .../gcc.target/riscv/rvv/autovec/partial/slp-13.c | 34 + .../gcc.target/riscv/rvv/autovec/partial/slp-14.c | 33 + .../gcc.target/riscv/rvv/autovec/partial/slp-15.c | 35 + .../gcc.target/riscv/rvv/autovec/partial/slp-16.c | 24 + .../gcc.target/riscv/rvv/autovec/partial/slp-2.c | 22 + .../rvv/autovec/partial/slp-3.c} | 12 +- .../gcc.target/riscv/rvv/autovec/partial/slp-4.c | 22 + .../gcc.target/riscv/rvv/autovec/partial/slp-5.c | 22 + .../gcc.target/riscv/rvv/autovec/partial/slp-6.c | 23 + .../gcc.target/riscv/rvv/autovec/partial/slp-7.c | 15 + .../gcc.target/riscv/rvv/autovec/partial/slp-8.c | 30 + .../gcc.target/riscv/rvv/autovec/partial/slp-9.c | 31 + .../riscv/rvv/autovec/partial/slp_run-1.c | 66 + .../rvv/autovec/partial/slp_run-10.c} | 9 +- .../rvv/autovec/partial/slp_run-11.c} | 9 +- .../rvv/autovec/partial/slp_run-12.c} | 8 +- .../rvv/autovec/partial/slp_run-13.c} | 9 +- .../rvv/autovec/partial/slp_run-14.c} | 9 +- .../rvv/autovec/partial/slp_run-15.c} | 9 +- .../riscv/rvv/autovec/partial/slp_run-16.c | 66 + .../riscv/rvv/autovec/partial/slp_run-2.c | 67 + .../riscv/rvv/autovec/partial/slp_run-3.c | 67 + .../riscv/rvv/autovec/partial/slp_run-4.c | 67 + .../riscv/rvv/autovec/partial/slp_run-5.c | 67 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gcc/testsuite/gcc.target/riscv/rvv/base/tuple-26.c | 34 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-27.c | 29 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-28.c | 59 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-29.c | 59 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-3.c | 108 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-30.c | 58 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-31.c | 30 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-32.c | 16 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-4.c | 107 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-5.c | 51 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-6.c | 23 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-7.c | 108 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-8.c | 108 + gcc/testsuite/gcc.target/riscv/rvv/base/tuple-9.c | 107 + gcc/testsuite/gcc.target/riscv/rvv/base/user-10.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/base/user-11.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/base/user-12.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/base/user-13.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/base/user-14.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/base/user-15.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/base/user-7.c | 210 + gcc/testsuite/gcc.target/riscv/rvv/base/user-8.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/base/user-9.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/base/vf_avl-1.c | 15 + .../gcc.target/riscv/rvv/base/vlmul_ext-1.c | 14 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-1.c | 29 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-10.c | 26 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-11.c | 20 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-12.c | 18 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-2.c | 12 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-3.c | 12 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-4.c | 11 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-5.c | 11 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-6.c | 15 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-7.c | 16 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-8.c | 18 + gcc/testsuite/gcc.target/riscv/rvv/base/vxrm-9.c | 26 + .../rvv/base/zero_base_load_store_optimization.c | 135 + .../gcc.target/riscv/rvv/base/zvfh-intrinsic.c | 490 + .../gcc.target/riscv/rvv/base/zvfh-over-zvfhmin.c | 88 + .../gcc.target/riscv/rvv/base/zvfhmin-intrinsic.c | 206 + gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 47 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-102.c | 16 + .../gcc.target/riscv/rvv/vsetvl/avl_single-38.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-47.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-48.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-49.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-74.c | 4 +- .../gcc.target/riscv/rvv/vsetvl/ffload-1.c | 21 + .../rvv/vsetvl/{avl_single-74.c => ffload-2.c} | 23 +- .../rvv/vsetvl/{avl_single-74.c => ffload-3.c} | 23 +- .../gcc.target/riscv/rvv/vsetvl/ffload-5.c | 29 + .../gcc.target/riscv/rvv/vsetvl/ffload-6.c | 29 + .../rvv/vsetvl/{avl_single-74.c => ffload-7.c} | 25 +- .../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c | 4 +- .../gcc.target/riscv/rvv/vsetvl/imm_switch-8.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/pr108270.c | 19 + .../gcc.target/riscv/rvv/vsetvl/pr109399.c | 14 + .../gcc.target/riscv/rvv/vsetvl/pr109547.c | 14 + .../rvv/vsetvl/{avl_single-74.c => pr109615.c} | 30 +- .../gcc.target/riscv/rvv/vsetvl/pr109743-1.c | 26 + .../gcc.target/riscv/rvv/vsetvl/pr109743-2.c | 27 + .../gcc.target/riscv/rvv/vsetvl/pr109743-3.c | 28 + .../gcc.target/riscv/rvv/vsetvl/pr109743-4.c | 28 + .../gcc.target/riscv/rvv/vsetvl/pr109748.c | 36 + .../gcc.target/riscv/rvv/vsetvl/pr109773-1.c | 20 + .../gcc.target/riscv/rvv/vsetvl/pr109773-2.c | 26 + .../gcc.target/riscv/rvv/vsetvl/pr109974.c | 17 + .../gcc.target/riscv/rvv/vsetvl/vsetvl-1.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-11.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-16.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-17.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-2.c | 2 +- .../riscv/rvv/vsetvl/{vsetvl-2.c => vsetvl-21.c} | 13 +- .../riscv/rvv/vsetvl/{vsetvl-4.c => vsetvl-22.c} | 12 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-23.c | 37 + .../gcc.target/riscv/rvv/vsetvl/vsetvl-3.c | 2 +- .../gcc.target/riscv/save-restore-cfi-2.c | 16 + gcc/testsuite/gcc.target/riscv/save-restore-cfi.c | 17 + gcc/testsuite/gcc.target/riscv/shift-and-2.c | 25 +- gcc/testsuite/gcc.target/riscv/shift-shift-2.c | 5 +- gcc/testsuite/gcc.target/riscv/sign-extend.c | 81 + .../gcc.target/riscv/simplify_ior_optimization.c | 50 + .../gcc.target/riscv/stack_save_restore.c | 40 + gcc/testsuite/gcc.target/riscv/vector-abi-1.c | 14 + gcc/testsuite/gcc.target/riscv/vector-abi-2.c | 15 + gcc/testsuite/gcc.target/riscv/vector-abi-3.c | 14 + gcc/testsuite/gcc.target/riscv/vector-abi-4.c | 16 + gcc/testsuite/gcc.target/riscv/vector-abi-5.c | 20 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.../gcc.target/riscv/{zbkc64.c => zbc64.c} | 8 +- .../gcc.target/riscv/zbs-bclri-nottwobits.c | 14 + gcc/testsuite/gcc.target/riscv/zbs-bext-02.c | 18 + .../gcc.target/riscv/zbs-extra-bit-or-twobits.c | 14 + .../gcc.target/riscv/zero-scratch-regs-1.c | 9 + .../gcc.target/riscv/zero-scratch-regs-2.c | 24 + .../gcc.target/riscv/zero-scratch-regs-3.c | 57 + gcc/testsuite/gcc.target/rx/movsicc-1.c | 18 + gcc/testsuite/gcc.target/rx/movsicc-2.c | 18 + gcc/testsuite/gcc.target/rx/movsicc-3.c | 18 + gcc/testsuite/gcc.target/rx/movsicc-4.c | 18 + gcc/testsuite/gcc.target/rx/movsicc-5.c | 18 + gcc/testsuite/gcc.target/rx/movsicc-6.c | 18 + gcc/testsuite/gcc.target/rx/movsicc-7.c | 17 + gcc/testsuite/gcc.target/rx/movsicc-8.c | 17 + gcc/testsuite/gcc.target/rx/movsicc.c | 94 - gcc/testsuite/gcc.target/s390/atomic-align-1.c | 23 + gcc/testsuite/gcc.target/s390/atomic-align-2.c | 18 + gcc/testsuite/gcc.target/s390/memset-1.c | 7 +- gcc/testsuite/gcc.target/sparc/pr105573.c | 15 + gcc/testsuite/gcc.target/sparc/pr109541.c | 23 + .../builtin-bswap-4.c => xstormy16/bswap16.c} | 5 +- .../builtin-bswap-2.c => xstormy16/bswap32.c} | 4 +- gcc/testsuite/gcc.target/xstormy16/extendhisi2.c | 7 + gcc/testsuite/gcc.target/xstormy16/mulhi.c | 8 + gcc/testsuite/gcc.target/xstormy16/neghi2.c | 8 + gcc/testsuite/gcc.target/xstormy16/rotatehi-1.c | 10 + gcc/testsuite/gcc.target/xstormy16/shiftsi.c | 12 + gcc/testsuite/gcc.target/xstormy16/swpb.c | 9 + gcc/testsuite/gcc.target/xstormy16/swpn-1.c | 10 + gcc/testsuite/gcc.target/xstormy16/swpn-2.c | 14 + gcc/testsuite/gcc.target/xstormy16/swpn-3.c | 28 + gcc/testsuite/gcc.target/xstormy16/swpn-4.c | 25 + gcc/testsuite/gcc.target/xstormy16/swpw-1.c | 8 + gcc/testsuite/gcc.target/xstormy16/swpw-2.c | 14 + gcc/testsuite/gcc.target/xstormy16/zextendhisi2.c | 7 + .../gcc.test-framework/gen_directive_tests | 12 +- gcc/testsuite/gdc.dg/Wmismatched_enum.d | 4 + .../gfortran.dg/allocatable_function_1.f90 | 2 +- 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gcc/testsuite/gfortran.dg/ieee/minmax_4.f90 | 235 + gcc/testsuite/gfortran.dg/interface_49.f90 | 95 + gcc/testsuite/gfortran.dg/overload_5.f90 | 118 + gcc/testsuite/gfortran.dg/pr100193.f90 | 20 + gcc/testsuite/gfortran.dg/pr102109.f90 | 20 + gcc/testsuite/gfortran.dg/pr102112.f90 | 23 + gcc/testsuite/gfortran.dg/pr102190.f90 | 74 + gcc/testsuite/gfortran.dg/pr102532.f90 | 16 + gcc/testsuite/gfortran.dg/pr103258.f90 | 2 +- gcc/testsuite/gfortran.dg/pr103389.f90 | 23 + gcc/testsuite/gfortran.dg/pr103716.f90 | 15 + gcc/testsuite/gfortran.dg/pr104349.f90 | 8 + gcc/testsuite/gfortran.dg/pr104429.f90 | 35 + gcc/testsuite/gfortran.dg/pr105152.f90 | 19 + gcc/testsuite/gfortran.dg/pr105205.f90 | 25 + gcc/testsuite/gfortran.dg/pr106918.f90 | 19 + gcc/testsuite/gfortran.dg/pr107821.f90 | 9 + gcc/testsuite/gfortran.dg/pr107900.f90 | 49 + gcc/testsuite/gfortran.dg/pr108961.f90 | 26 + gcc/testsuite/gfortran.dg/pr109662-a.f90 | 28 + gcc/testsuite/gfortran.dg/pr109662.f90 | 15 + gcc/testsuite/gfortran.dg/pr109948.f90 | 114 + gcc/testsuite/gfortran.dg/pr110224.f90 | 29 + gcc/testsuite/gfortran.dg/pr59107.f90 | 2 +- gcc/testsuite/gfortran.dg/pr82774.f90 | 15 + gcc/testsuite/gfortran.dg/pr87946.f90 | 42 + gcc/testsuite/gfortran.dg/pr88552.f90 | 6 + gcc/testsuite/gfortran.dg/pr88688.f90 | 62 + gcc/testsuite/gfortran.dg/pr93835.f08 | 2 +- gcc/testsuite/gfortran.dg/pr94380.f90 | 18 + gcc/testsuite/gfortran.dg/pr95398.f90 | 8 +- gcc/testsuite/gfortran.dg/pr98408.f90 | 10 + gcc/testsuite/gfortran.dg/pr99326.f90 | 26 + .../{deferred_character_35.f90 => pr99350.f90} | 6 +- gcc/testsuite/gfortran.dg/ptr-func-5.f90 | 39 + gcc/testsuite/gfortran.dg/reshape_10.f90 | 34 + gcc/testsuite/gfortran.dg/reshape_11.f90 | 15 + gcc/testsuite/gfortran.dg/reshape_8.f90 | 2 +- gcc/testsuite/gfortran.dg/select_rank_6.f90 | 48 + gcc/testsuite/gfortran.dg/set_exponent_1.f90 | 36 + gcc/testsuite/gfortran.dg/size_dim_2.f90 | 19 + gcc/testsuite/gfortran.dg/zero_sized_13.f90 | 28 + gcc/testsuite/gfortran.dg/zero_sized_14.f90 | 181 + gcc/testsuite/gfortran.dg/zero_sized_15.f90 | 114 + .../gfortran.fortran-torture/execute/math.f90 | 24 +- .../link-pim-fail.exp => cpp/fail/cpp-fail.exp} | 4 +- gcc/testsuite/gm2/cpp/fail/foocpp.mod | 5 + gcc/testsuite/gm2/isolib/run/pass/seqappend.mod | 77 + gcc/testsuite/gm2/isolib/run/pass/skiplinetest.mod | 52 + gcc/testsuite/gm2/isolib/run/pass/testdelete.mod | 85 + gcc/testsuite/gm2/isolib/run/pass/testreadint.mod | 89 + .../hello.mod => link/nondefaultext/pass/hello.md} | 2 + gcc/testsuite/gm2/link/nondefaultext/pass/liba.dm | 8 + gcc/testsuite/gm2/link/nondefaultext/pass/liba.md | 6 + .../pass/link-nondefaultext-pass.exp} | 11 +- gcc/testsuite/gm2/pim/fail/foovaltype.mod | 7 + gcc/testsuite/gm2/pim/fail/highice.mod | 7 + gcc/testsuite/gm2/pim/fail/largeconst.mod | 2 +- gcc/testsuite/gm2/pim/fail/largeconst2.mod | 7 + gcc/testsuite/gm2/pim/fail/setunknown.mod | 8 + gcc/testsuite/gm2/pim/fail/setunknown2.mod | 5 + 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1 year, 12 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allyesconfig updated (d62dd49fd4 -> e92125417c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. from d62dd49fd4 onsuccess: #43: 33: [TCWG CI] https://ci.linaro.org/job/tcwg [...] new e92125417c onsuccess: #44: 33: [TCWG CI] https://ci.linaro.org/job/tcwg [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 2328 -> 2352 bytes 02-prepare_abe/console.log.xz | Bin 2592 -> 2632 bytes 03-build_abe-binutils/console.log.xz | Bin 27384 -> 27868 bytes 03-build_abe-binutils/make-binutils.log.xz | Bin 17984 -> 18036 bytes 04-build_abe-stage1/console.log.xz | Bin 72284 -> 72760 bytes 04-build_abe-stage1/make-gcc-stage1.log.xz | Bin 53016 -> 52972 bytes 05-build_abe-qemu/console.log.xz | Bin 34608 -> 35908 bytes 05-build_abe-qemu/make-qemu.log.xz | Bin 27308 -> 28208 bytes 06-build_linux/console.log.xz | Bin 3364 -> 3776 bytes 08-check_regression/console.log.xz | Bin 528 -> 528 bytes git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/linux_rev | 2 +- git/qemu_rev | 2 +- jenkins/build-name | 2 +- manifest.sh | 28 ++++++++++++++-------------- 16 files changed, 19 insertions(+), 19 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

1 year, 12 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_binutils/master-arm updated (c5fd4c0f7b -> 71fad914d1)

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https://ci.linaro.org/job/tcwg [...] new dd7c284bf9 onsuccess: #269: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] new ccf393c2be onsuccess: #270: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] new e87fd300d2 onsuccess: #271: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] new aa6a437d99 onsuccess: #272: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] new 71fad914d1 onsuccess: #273: 0: [TCWG CI] https://ci.linaro.org/job/tcwg [...] This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c5fd4c0f7b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_check_binutils [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 201 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 00-sumfiles/binutils.log.xz | Bin 61700 -> 61744 bytes 00-sumfiles/gas.log.xz | Bin 101100 -> 101104 bytes 00-sumfiles/ld.log.xz | Bin 115088 -> 115076 bytes 01-reset_artifacts/console.log.xz | Bin 2464 -> 2412 bytes 02-prepare_abe/console.log.xz | Bin 2632 -> 2644 bytes 03-build_abe-binutils/console.log.xz | Bin 27312 -> 27596 bytes 03-build_abe-binutils/make-binutils.log.xz | Bin 17608 -> 17820 bytes 04-build_abe-stage1/console.log.xz | Bin 90748 -> 90236 bytes 04-build_abe-stage1/make-gcc-stage1.log.xz | Bin 70016 -> 70324 bytes 06-build_abe-linux/console.log.xz | Bin 8828 -> 8728 bytes 07-build_abe-glibc/console.log.xz | Bin 233804 -> 233604 bytes 07-build_abe-glibc/make-glibc.log.xz | Bin 186692 -> 186796 bytes 08-build_abe-stage2/console.log.xz | Bin 228020 -> 227228 bytes 08-build_abe-stage2/make-gcc-stage2.log.xz | Bin 194600 -> 195288 bytes 09-build_abe-gdb/console.log.xz | Bin 34880 -> 34812 bytes 09-build_abe-gdb/make-gdb.log.xz | Bin 26548 -> 26548 bytes 10-build_abe-qemu/console.log.xz | Bin 35584 -> 35388 bytes 10-build_abe-qemu/make-qemu.log.xz | Bin 27948 -> 28072 bytes 11-build_abe-dejagnu/console.log.xz | Bin 4324 -> 4304 bytes 12-build_abe-check_binutils/check-binutils.log.xz | Bin 5180 -> 5176 bytes 12-build_abe-check_binutils/console.log.xz | Bin 3236 -> 3504 bytes 13-check_regression/console.log.xz | Bin 1088 -> 1096 bytes 13-check_regression/results.compare2 | 4 +-- git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/gdb_rev | 2 +- git/linux_rev | 2 +- jenkins/build-name | 2 +- manifest.sh | 36 +++++++++++----------- sumfiles/binutils.sum | 2 +- sumfiles/gas.sum | 2 +- sumfiles/ld.sum | 2 +- 32 files changed, 28 insertions(+), 28 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits June 2023