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unknown user pushed a change to branch releases/gcc-13
in repository gcc.
from a4cc474b15e OpenACC: Further attach/detach clause fixes for Fortran [PR109622]
new f077b784a6e c++: Add testcase for already fixed PR [PR109506]
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Summary of changes:
gcc/testsuite/g++.dg/cpp0x/nsdmi-template26.C | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 gcc/testsuite/g++.dg/cpp0x/nsdmi-template26.C
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig
in repository toolchain/ci/base-artifacts.
from 6b14ca5004 83: onsuccess: #17: 23226: [TCWG CI] https://ci.linaro.org/j [...]
new 375e3188b2 84: onsuccess: #18: 23226: [TCWG CI] https://ci.linaro.org/j [...]
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01-reset_artifacts/console.log.xz | Bin 1980 -> 1976 bytes
02-prepare_abe/console.log.xz | Bin 2420 -> 2544 bytes
03-build_abe-binutils/console.log.xz | Bin 26488 -> 26872 bytes
04-build_kernel_llvm/console.log.xz | Bin 64388 -> 65464 bytes
05-build_abe-qemu/console.log.xz | Bin 30716 -> 31516 bytes
06-build_linux/console.log.xz | Bin 3548 -> 3560 bytes
08-check_regression/console.log.xz | Bin 612 -> 520 bytes
09-update_baseline/console.log | 9 +++++++++
git/binutils_rev | 2 +-
git/llvm_rev | 2 +-
git/qemu_rev | 2 +-
jenkins/notify.sh | 3 ---
manifest.sh | 24 ++++++++++++------------
13 files changed, 24 insertions(+), 18 deletions(-)
delete mode 100755 jenkins/notify.sh
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unknown user pushed a change to branch master
in repository binutils-gdb.
from 02601231fdd Simplify auto_load_expand_dir_vars and remove substitute_pa [...]
new 233239384c7 Simplify decode_locdesc
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gdb/dwarf2/read.c | 203 ++++++++++++++++++------------------------------------
1 file changed, 66 insertions(+), 137 deletions(-)
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unknown user pushed a change to branch master
in repository glibc.
from 642f1b9b3d aarch64: More configure checks for libmvec
new 21f0b087ee time: Remove alloca() from getdate
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time/getdate.c | 23 +++++------------------
1 file changed, 5 insertions(+), 18 deletions(-)
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unknown user pushed a change to branch master
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from bb043cd3da5 arm: [MVE intrinsics] rework vshrq vrshrq
new 3365956d55a RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET
new 0c1eaac3fd3 RISC-V: Legitimise the const0_rtx for RVV indexed load/store
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gcc/config/riscv/riscv.h | 5 ++
gcc/config/riscv/vector.md | 62 +++++++++++-----------
.../riscv/rvv/base/integer_compare_insn_shortcut.c | 6 +--
.../rvv/base/zero_base_load_store_optimization.c | 3 +-
4 files changed, 39 insertions(+), 37 deletions(-)
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