Tcwg-commits May 2023

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (46f0d353a6 -> 5c7bbc03bb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/base-artifacts. discards 46f0d353a6 211: onsuccess: #177: 6: [TCWG CI] https://ci.linaro.org/job [...] discards a8e7d87c8d 211: onsuccess: #176: 6: [TCWG CI] https://ci.linaro.org/job [...] discards 8bc61c49a5 211: onsuccess: #175: 6: [TCWG CI] https://ci.linaro.org/job [...] discards 97957a321d 211: onsuccess: #174: 6: [TCWG CI] https://ci.linaro.org/job [...] discards baa83972ef 211: onsuccess: #171: 6: [TCWG CI] https://ci.linaro.org/job [...] discards ee50b2b4d9 211: onsuccess: #170: 6: [TCWG CI] https://ci.linaro.org/job [...] discards 1a92d136ee 211: onsuccess: #169: 6: [TCWG CI] https://ci.linaro.org/job [...] discards b26ad11824 211: onsuccess: #168: 6: [TCWG CI] https://ci.linaro.org/job [...] discards 8785b6f132 211: onsuccess: #167: 6: [TCWG CI] https://ci.linaro.org/job [...] discards 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https://ci.linaro.org/job [...] new 2e6b8315bc 211: onsuccess: #171: 6: [TCWG CI] https://ci.linaro.org/job [...] new 8d8c1a1f8b 211: onsuccess: #174: 6: [TCWG CI] https://ci.linaro.org/job [...] new d5de98b858 211: onsuccess: #175: 6: [TCWG CI] https://ci.linaro.org/job [...] new 5ede28cac0 211: onsuccess: #176: 6: [TCWG CI] https://ci.linaro.org/job [...] new 7a37630973 211: onsuccess: #177: 6: [TCWG CI] https://ci.linaro.org/job [...] new 5c7bbc03bb 211: onsuccess: #178: 6: [TCWG CI] https://ci.linaro.org/job [...] This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (46f0d353a6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_build/master- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 202 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 2180 -> 2192 bytes 02-prepare_abe/console.log.xz | Bin 2440 -> 2460 bytes 04-build_abe-binutils/console.log.xz | Bin 49824 -> 49612 bytes 05-build_abe-gcc/console.log.xz | Bin 238668 -> 240284 bytes 06-clean_sysroot/console.log.xz | Bin 316 -> 316 bytes 07-build_abe-linux/console.log.xz | Bin 8732 -> 8692 bytes 08-build_abe-glibc/console.log.xz | Bin 235136 -> 235116 bytes 09-build_abe-gdb/console.log.xz | Bin 47232 -> 47760 bytes 10-check_regression/console.log.xz | Bin 464 -> 464 bytes 11-update_baseline/console.log | 492 +++++++++++++++++------------------ git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/gdb_rev | 2 +- manifest.sh | 26 +- 14 files changed, 262 insertions(+), 262 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (9105803c11 -> 1439a0b8d1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. from 9105803c11 91: onsuccess: #30: boot: [TCWG CI] https://ci.linaro.org/jo [...] new 1439a0b8d1 92: onsuccess: #32: boot: [TCWG CI] https://ci.linaro.org/jo [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1980 -> 2156 bytes 02-prepare_abe/console.log.xz | Bin 2448 -> 2396 bytes 03-build_abe-binutils/console.log.xz | Bin 27256 -> 27332 bytes 04-build_kernel_llvm/console.log.xz | Bin 65608 -> 64712 bytes 05-build_abe-qemu/console.log.xz | Bin 32064 -> 32292 bytes 06-build_linux/console.log.xz | Bin 3228 -> 3192 bytes 07-boot_linux/console.log.xz | Bin 480 -> 480 bytes 08-check_regression/console.log.xz | Bin 440 -> 440 bytes git/qemu_rev | 2 +- manifest.sh | 16 ++++++++-------- 10 files changed, 9 insertions(+), 9 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk-code_speed-spec2k6/gnu-aarch64-master-O3 updated (3426bf715c -> bd1fc71811)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk-code_speed-spec2k6/gnu-aarch64-master-O3 in repository toolchain/ci/base-artifacts. from 3426bf715c 83: onsuccess: #43: 1: [TCWG CI] https://ci.linaro.org/job/t [...] new bd1fc71811 84: onsuccess: #44: 1: [TCWG CI] https://ci.linaro.org/job/t [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 2224 -> 2248 bytes 02-prepare_abe/console.log.xz | Bin 2472 -> 2488 bytes 03-build_abe-binutils/console.log.xz | Bin 27348 -> 28360 bytes 04-build_abe-stage1/console.log.xz | Bin 72700 -> 73280 bytes 05-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 06-build_abe-linux/console.log.xz | Bin 8376 -> 7604 bytes 07-build_abe-glibc/console.log.xz | Bin 242540 -> 244016 bytes 08-build_abe-stage2/console.log.xz | Bin 177608 -> 178064 bytes 09-benchmark/benchmark-build.log | 167 +- 09-benchmark/benchmark.log | 165 +- 09-benchmark/console.log.xz | Bin 4132 -> 4128 bytes 10-check_regression/bmk-specific-variability.csv | 159 +- 10-check_regression/console.log.xz | Bin 20176 -> 18896 bytes .../output-bmk-results/exe.improvement | 1 - .../output-bmk-results/exe.improvement.diff | 1 - .../output-bmk-results/exe.regression | 1 - .../output-bmk-results/exe.regression.diff | 1 - .../output-bmk-results/symbol.improvement | 9 +- .../output-bmk-results/symbol.improvement.diff | 2 +- .../output-bmk-results/symbol.regression | 8 +- .../output-bmk-results/symbol.regression.diff | 2 +- git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/glibc_rev | 2 +- git/linux_rev | 2 +- manifest.sh | 32 +- {mail => notify}/check-regression-status.txt | 0 results-vs-first/compare-results-internal.csv | 246 +- results-vs-first/csv-results-0/md5sum.csv | 2514 +- results-vs-first/csv-results-0/results.csv | 657122 +++++++-------- results-vs-first/csv-results-0/size.csv | 665712 +++++++-------- results-vs-first/csv-results-0/sve.csv | 30204 +- results-vs-first/csv-results-0/vect.csv | 5936 +- results-vs-first/csv-results-1/md5sum.csv | 2737 +- results-vs-first/csv-results-1/perf.csv | 3271 +- results-vs-first/csv-results-1/results.csv | 760906 +++++++++-------- results-vs-first/csv-results-1/size.csv | 767779 +++++++++--------- results-vs-first/csv-results-1/sve.csv | 30554 +- results-vs-first/csv-results-1/vect.csv | 7192 +- results-vs-first/interesting-symbols.csv | 132 +- results-vs-first/results-brief.csv | 68 +- results-vs-first/results-full.csv | 3141 +- results-vs-first/results-internal.csv | 260 +- results-vs-first/results.csv | 260 +- results-vs-first/tcwg-benchmark-results.log | 3322 +- results-vs-prev/compare-results-internal.csv | 250 +- results-vs-prev/compare-results.csv | 8 +- results-vs-prev/csv-results-0/md5sum.csv | 2961 +- results-vs-prev/csv-results-0/perf.csv | 3324 +- results-vs-prev/csv-results-0/results.csv | 735864 +++++++++-------- results-vs-prev/csv-results-0/size.csv | 743115 +++++++++-------- results-vs-prev/csv-results-0/sve.csv | 30608 +- results-vs-prev/csv-results-0/vect.csv | 7190 +- results-vs-prev/csv-results-1/md5sum.csv | 2733 +- results-vs-prev/csv-results-1/perf.csv | 3271 +- results-vs-prev/csv-results-1/results.csv | 760906 +++++++++-------- results-vs-prev/csv-results-1/size.csv | 767779 +++++++++--------- results-vs-prev/csv-results-1/sve.csv | 30554 +- results-vs-prev/csv-results-1/vect.csv | 7192 +- results-vs-prev/interesting-symbols.csv | 132 +- results-vs-prev/results-brief.csv | 68 +- results-vs-prev/results-full.csv | 3375 +- results-vs-prev/results-internal.csv | 260 +- results-vs-prev/results.csv | 260 +- results-vs-prev/tcwg-benchmark-results.log | 3966 +- results_id | 2 +- 66 files changed, 3040602 insertions(+), 3005128 deletions(-) delete mode 100644 10-check_regression/output-bmk-results/exe.improvement delete mode 100644 10-check_regression/output-bmk-results/exe.improvement.diff delete mode 100644 10-check_regression/output-bmk-results/exe.regression delete mode 100644 10-check_regression/output-bmk-results/exe.regression.diff rename {mail => notify}/check-regression-status.txt (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap updated (d767525096 -> f0e68cc95d)

by git＠git.linaro.org

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That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d767525096) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 202 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 2088 -> 2104 bytes 02-prepare_abe/console.log.xz | Bin 2460 -> 2472 bytes 04-build_abe-binutils/console.log.xz | Bin 35736 -> 36632 bytes 05-build_abe-bootstrap/console.log.xz | Bin 266284 -> 270036 bytes 06-check_regression/console.log.xz | Bin 464 -> 464 bytes 07-update_baseline/console.log | 654 +++++++++++++++++----------------- git/binutils_rev | 2 +- git/gcc_rev | 2 +- manifest.sh | 16 +- 9 files changed, 337 insertions(+), 337 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_fast_check_gdb/master-aarch64 updated (73af408ae3 -> d61aeec8a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_fast_check_gdb/master-aarch64 in repository toolchain/ci/base-artifacts. discards 73af408ae3 201: onsuccess: #229: 0: [TCWG CI] https://ci.linaro.org/job [...] discards af3e126d4b 201: onsuccess: #228: 0: [TCWG CI] https://ci.linaro.org/job [...] discards 8cf2ee6deb 201: onsuccess: #227: 0: [TCWG CI] https://ci.linaro.org/job [...] discards a27e254512 201: onsuccess: #226: 0: [TCWG CI] https://ci.linaro.org/job [...] discards 3b20f676e6 201: onsuccess: #223: 0: [TCWG CI] https://ci.linaro.org/job [...] discards 4d91af6c27 201: onsuccess: #222: 0: [TCWG CI] https://ci.linaro.org/job [...] discards e8420a44af 201: onsuccess: #221: 0: [TCWG CI] https://ci.linaro.org/job [...] discards b505b78f6c 201: onsuccess: #220: 0: [TCWG CI] https://ci.linaro.org/job [...] discards e65710a22c 201: onsuccess: #219: 0: [TCWG CI] https://ci.linaro.org/job [...] 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That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (73af408ae3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_fast_check_gd [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 202 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 00-sumfiles/gdb.log.xz | Bin 14428 -> 14448 bytes 01-reset_artifacts/console.log.xz | Bin 2216 -> 2192 bytes 02-prepare_abe/console.log.xz | Bin 2428 -> 2404 bytes 03-build_abe-binutils/console.log.xz | Bin 35404 -> 35340 bytes 04-build_abe-gcc/console.log.xz | Bin 205908 -> 205732 bytes 05-clean_sysroot/console.log.xz | Bin 312 -> 312 bytes 06-build_abe-linux/console.log.xz | Bin 8596 -> 8684 bytes 07-build_abe-glibc/console.log.xz | Bin 242516 -> 244716 bytes 08-build_abe-gdb/console.log.xz | Bin 35444 -> 35096 bytes 09-build_abe-dejagnu/console.log.xz | Bin 4088 -> 4060 bytes 10-build_abe-check_gdb/console.log.xz | Bin 3676 -> 3524 bytes 10-build_abe-check_gdb/flaky.xfail | 2 +- 11-check_regression/console.log.xz | Bin 1108 -> 1108 bytes 11-check_regression/results.compare | 6 +- 11-check_regression/results.compare2 | 6 +- 12-update_baseline/console.log | 228 +++++++++++++++++----------------- git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/gdb_rev | 2 +- manifest.sh | 26 ++-- notify/results.compare | 6 +- sumfiles/gdb.sum | 4 +- 22 files changed, 142 insertions(+), 142 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-arm updated (69e310029b -> 265b529a32)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-arm in repository toolchain/ci/base-artifacts. discards 69e310029b 201: onsuccess: #416: 0: [TCWG CI] https://ci.linaro.org/job [...] discards 4a0b539bc5 201: force: #415: 0: [TCWG CI] https://ci.linaro.org/job/tcw [...] discards 2ddc98034d 201: force: #414: 0: [TCWG CI] https://ci.linaro.org/job/tcw [...] discards 2b5dbf774d 201: force: #411: 0: [TCWG CI] https://ci.linaro.org/job/tcw [...] discards 10c0944ed1 201: force: #410: 0: [TCWG CI] https://ci.linaro.org/job/tcw [...] discards 5c851d9a27 201: force: #408: 0: [TCWG CI] https://ci.linaro.org/job/tcw [...] discards 844d049fda 201: force: #406: 0: [TCWG CI] https://ci.linaro.org/job/tcw [...] discards 70d0429df8 201: force: #397: 0: [TCWG CI] https://ci.linaro.org/job/tcw [...] discards 25fbd23666 201: force: #394: 0: [TCWG CI] https://ci.linaro.org/job/tcw [...] discards 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That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (69e310029b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_check_gdb/mas [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 202 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 00-sumfiles/gdb.log.0.xz | Bin 0 -> 2871432 bytes 00-sumfiles/gdb.log.1.xz | Bin 0 -> 11980 bytes 00-sumfiles/gdb.log.2.xz | Bin 0 -> 10212 bytes 00-sumfiles/gdb.log.3.xz | Bin 0 -> 9936 bytes 00-sumfiles/gdb.log.4.xz | Bin 0 -> 10140 bytes 00-sumfiles/gdb.log.5.xz | Bin 0 -> 9780 bytes 00-sumfiles/gdb.log.xz | Bin 2957928 -> 0 bytes sumfiles/gdb.sum => 00-sumfiles/gdb.sum.0 | 127 +- 00-sumfiles/gdb.sum.1 | 2216 +++++++++++++++++ 00-sumfiles/gdb.sum.2 | 2229 +++++++++++++++++ 00-sumfiles/gdb.sum.3 | 2190 ++++++++++++++++ 00-sumfiles/gdb.sum.4 | 2200 +++++++++++++++++ 00-sumfiles/gdb.sum.5 | 2167 ++++++++++++++++ 01-reset_artifacts/console.log.xz | Bin 1972 -> 1944 bytes 02-prepare_abe/console.log.xz | Bin 2452 -> 2436 bytes 03-build_abe-binutils/console.log.xz | Bin 48984 -> 48956 bytes 04-build_abe-gcc/console.log.xz | Bin 238680 -> 239108 bytes 06-build_abe-linux/console.log.xz | Bin 8660 -> 8580 bytes 07-build_abe-glibc/console.log.xz | Bin 235496 -> 232932 bytes 08-build_abe-gdb/console.log.xz | Bin 46972 -> 46852 bytes 09-build_abe-dejagnu/console.log.xz | Bin 4032 -> 4016 bytes 10-build_abe-check_gdb/console.log.xz | Bin 18432 -> 18756 bytes 10-build_abe-check_gdb/flaky.xfail | 1 - 11-check_regression/console.log.xz | Bin 8228 -> 2580 bytes 11-check_regression/results.compare | 19 +- 11-check_regression/results.compare2 | 3839 ++--------------------------- 12-update_baseline/console.log | 226 +- git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/gdb_rev | 2 +- git/glibc_rev | 2 +- git/linux_rev | 2 +- manifest.sh | 30 +- notify/results.compare | 19 +- sumfiles/flaky.xfail | 53 + sumfiles/gdb.sum | 122 +- sumfiles/xfails.xfail | 18 +- 37 files changed, 11449 insertions(+), 4017 deletions(-) create mode 100644 00-sumfiles/gdb.log.0.xz create mode 100644 00-sumfiles/gdb.log.1.xz create mode 100644 00-sumfiles/gdb.log.2.xz create mode 100644 00-sumfiles/gdb.log.3.xz create mode 100644 00-sumfiles/gdb.log.4.xz create mode 100644 00-sumfiles/gdb.log.5.xz delete mode 100644 00-sumfiles/gdb.log.xz copy sumfiles/gdb.sum => 00-sumfiles/gdb.sum.0 (99%) create mode 100644 00-sumfiles/gdb.sum.1 create mode 100644 00-sumfiles/gdb.sum.2 create mode 100644 00-sumfiles/gdb.sum.3 create mode 100644 00-sumfiles/gdb.sum.4 create mode 100644 00-sumfiles/gdb.sum.5 delete mode 100644 10-build_abe-check_gdb/flaky.xfail create mode 100644 sumfiles/flaky.xfail -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 1 month

[gcc] branch releases/gcc-12 updated (4a9618035a4 -> 942374058b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-12 in repository gcc. from 4a9618035a4 Daily bump. new 015848f7014 arm: improve vcreateq* tests new 4aa7b493027 arm: fix 'vmsr' spacing and register capitalization new 96fcd2c47ab arm: improve tests and fix vddupq* new a6cab55acb5 arm: improve tests and fix vdwdupq* new f2477c0eabb arm: improve vidupq* tests new 18c231714fd arm: improve tests and fix vdupq* new 351cc920d8a arm: improve tests and fix vcmp* new 65f3196a223 arm: improve tests for vmin* new 0aad406016e arm: improve tests for vmax* new c67e3f7b05d arm: improve tests for vabavq* new 328de4f103e arm: improve tests for vabdq* new 8aa5cd69d89 arm: improve tests and fix vabsq* new 7d3043505c7 arm: further fix overloading of MVE vaddq[_m]_n intrinsic new bbdf67595a5 arm: propagate fixed overloading of MVE intrinsic scalar pa [...] new 79431d45e2c arm: Explicitly specify other float types for _Generic over [...] new 37d0faa2aa9 arm: Add integer vector overloading of vsubq_x instrinsic new 59e6d480c2c arm: improve tests and fix vadd* new 58a9a523756 arm: improve tests for vmulq* new f47b54aaef9 arm: improve tests and fix vsubq* new c2d80e30ceb arm: improve tests for vfmasq_m* new cfc47e6e672 arm: improve tests for vhaddq_m* new b6314488b4d arm: improve tests for vhsubq_m* new 31d6b46658c arm: improve tests for viwdupq* new 4cd5d4d335d arm: improve tests for vmladavaq* new fd2b43d3ba2 arm: improve tests and fix vmlaldavaxq* new 06c2f515496 arm: improve tests for vmlasq* new aa1c6b2a3c2 arm: improve tests for vqaddq_m* new ec357ce4bce arm: improve tests for vqdmlahq_m* new 82eb1588060 arm: improve tests for vqdmul* new 374aefaae67 arm: improve tests for vqrdmlahq* new 321c5596a26 arm: improve tests for vqrdmlashq_m* new 77268ac0373 arm: improve tests for vqsubq* new 8b7e613b9d9 arm: improve tests and fix vrmlaldavhaq* new 92c75bf33c1 arm: improve tests for vrshlq* new 8baa54ba478 arm: improve tests for vsetq_lane* new 3de0d4c749f arm: Fix MVE testsuite fallouts new 51df90d7fca arm: Add missing early clobber to MVE vrev64q_m patterns new 37601980933 testsuite: [arm] Relax expected register names in MVE tests new 537b7a34462 arm: [MVE] Add missing length=8 attribute new c2dbbfbd9b1 arm: fix mve intrinsics scan body tests for C++ new 4036a318fc9 arm: improve tests and fix vclsq* new a47749ddad8 arm: improve tests and fix vclzq* new cb444c6df76 arm: improve tests and fix vnegq* new 4fdbf8cb806 arm: improve tests for vmulhq* new b821e350263 arm: improve tests for vmullbq* new 99bcb2f22e3 arm: improve tests for vmulltq* new 633a203732f arm: improve tests for vcaddq* new 455461dfccc arm: improve tests for vcmlaq* new 6171e0b1701 arm: improve tests for vcmulq* new f25c97c8326 arm: improve tests and fix vqabsq* new 9d807442910 arm: improve tests for vqdmladhq* new e776a8333ba arm: improve tests for vqdmladhxq* new 98c45781be3 arm: improve tests for vqrdmladhq* new 017b5dbc342 arm: improve tests for vqrdmladhxq* new 48afcf6f720 arm: improve tests for vqrdmlashq* new 4971715f884 arm: improve tests for vqdmlsdhq* new 997b86eda16 arm: improve tests for vqdmlsdhxq* new eae89159b54 arm: improve tests for vqrdmlsdhq* new b56b280c870 arm: improve tests for vqrdmlsdhxq* new a0cbc3d6d96 arm: improve tests for vqrdmulhq* new 856c74b2cba arm: improve tests and fix vqnegq* new af4cdaa51a3 arm: improve tests for vld2q* new fc68bca6a77 arm: fix missing extern "C" in MVE tests new c7c4dfb5989 arm: Split up MVE _Generic associations to prevent type cla [...] new 09f0fd468f5 arm: Fix vcreate definition new bb113a56e31 arm: Make MVE masked stores read memory operand [PR 108177] new 60e54b99f59 arm: fix __arm_vld1q_z* and __arm_vst1q_p* intrinsics [PR108442] new 0b968346dad arm: remove unused variables from test new d04583df6e2 arm: Mve testsuite improvements new 732102a21b7 arm: Fix vstrwq* backend + testsuite new 958a3c54645 arm: Mve backend + testsuite fixes 2 new f51bc071a57 arm: Stop vadcq, vsbcq intrinsics from overwriting the FPSC [...] new 15fbceddeef arm: Add vorrq_n overloading into vorrq _Generic new eaae2bf98dd arm: Fix overloading of MVE scalar constant parameters on v [...] new 5d013704c80 arm: Fix MVE header pointer overloads this time (and a bit [...] new 379f99f1d7a arm testsuite: Remove reduntant tests new 8ed701b5284 arm testsuite: XFAIL or relax registers in some tests [PR109697] new 16df8b88842 arm testsuite: Shifts and get_FPSCR ACLE optimisation fixes new 942374058b7 [arm] complete vmsr/vmrs blank and case adjustments The 79 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/arm/arm_mve.h | 2148 +++++++++++--------- gcc/config/arm/constraints.md | 20 +- gcc/config/arm/mve.md | 285 +-- gcc/config/arm/predicates.md | 14 +- gcc/config/arm/vfp.md | 12 +- .../gcc.target/arm/acle/cde-mve-full-assembly.c | 264 +-- .../arm/mve/general/preserve_user_namespace_1.c | 6 + gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c | 21 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c | 33 +- .../gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c | 47 - .../intrinsics/mve_intrinsic_type_overloads-fp.c | 61 + .../intrinsics/mve_intrinsic_type_overloads-int.c | 98 + .../gcc.target/arm/mve/intrinsics/mve_vaddq_m.c | 48 - .../gcc.target/arm/mve/intrinsics/mve_vaddq_n.c | 31 - .../arm/mve/intrinsics/mve_vddupq_m_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vddupq_m_n_u32.c | 13 - .../arm/mve/intrinsics/mve_vddupq_m_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vddupq_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vddupq_n_u32.c | 13 - .../arm/mve/intrinsics/mve_vddupq_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vddupq_x_n_u16.c | 12 - .../arm/mve/intrinsics/mve_vddupq_x_n_u32.c | 12 - .../arm/mve/intrinsics/mve_vddupq_x_n_u8.c | 12 - .../arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c | 13 - .../arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vidupq_m_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vidupq_m_n_u32.c | 12 - .../arm/mve/intrinsics/mve_vidupq_m_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vidupq_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vidupq_n_u32.c | 12 - .../arm/mve/intrinsics/mve_vidupq_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vidupq_x_n_u16.c | 12 - .../arm/mve/intrinsics/mve_vidupq_x_n_u32.c | 12 - .../arm/mve/intrinsics/mve_vidupq_x_n_u8.c | 12 - .../arm/mve/intrinsics/mve_viwdupq_x_n_u16.c | 13 - .../arm/mve/intrinsics/mve_viwdupq_x_n_u32.c | 13 - .../arm/mve/intrinsics/mve_viwdupq_x_n_u8.c | 13 - .../mve/intrinsics/mve_vldrdq_gather_offset_s64.c | 12 - .../mve/intrinsics/mve_vldrdq_gather_offset_u64.c | 12 - .../intrinsics/mve_vldrdq_gather_offset_z_s64.c | 12 - .../intrinsics/mve_vldrdq_gather_offset_z_u64.c | 12 - .../mve_vldrdq_gather_shifted_offset_s64.c | 12 - .../mve_vldrdq_gather_shifted_offset_u64.c | 12 - .../mve_vldrdq_gather_shifted_offset_z_s64.c | 12 - .../mve_vldrdq_gather_shifted_offset_z_u64.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_f16.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_s16.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_s32.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_u16.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_u32.c | 13 - .../intrinsics/mve_vldrhq_gather_offset_z_f16.c | 12 - .../intrinsics/mve_vldrhq_gather_offset_z_s16.c | 12 - .../intrinsics/mve_vldrhq_gather_offset_z_s32.c | 12 - .../intrinsics/mve_vldrhq_gather_offset_z_u16.c | 13 - .../intrinsics/mve_vldrhq_gather_offset_z_u32.c | 13 - .../mve_vldrhq_gather_shifted_offset_f16.c | 12 - .../mve_vldrhq_gather_shifted_offset_s16.c | 13 - .../mve_vldrhq_gather_shifted_offset_s32.c | 13 - .../mve_vldrhq_gather_shifted_offset_u16.c | 13 - .../mve_vldrhq_gather_shifted_offset_u32.c | 13 - .../mve_vldrhq_gather_shifted_offset_z_f16.c | 13 - .../mve_vldrhq_gather_shifted_offset_z_s16.c | 13 - .../mve_vldrhq_gather_shifted_offset_z_s32.c | 12 - .../mve_vldrhq_gather_shifted_offset_z_u16.c | 12 - .../mve_vldrhq_gather_shifted_offset_z_u32.c | 12 - .../mve/intrinsics/mve_vldrwq_gather_offset_f32.c | 12 - .../mve/intrinsics/mve_vldrwq_gather_offset_s32.c | 13 - .../mve/intrinsics/mve_vldrwq_gather_offset_u32.c | 13 - .../intrinsics/mve_vldrwq_gather_offset_z_f32.c | 12 - .../intrinsics/mve_vldrwq_gather_offset_z_s32.c | 13 - .../intrinsics/mve_vldrwq_gather_offset_z_u32.c | 13 - .../mve_vldrwq_gather_shifted_offset_f32.c | 12 - .../mve_vldrwq_gather_shifted_offset_s32.c | 13 - .../mve_vldrwq_gather_shifted_offset_u32.c | 13 - .../mve_vldrwq_gather_shifted_offset_z_f32.c | 12 - .../mve_vldrwq_gather_shifted_offset_z_s32.c | 13 - .../mve_vldrwq_gather_shifted_offset_z_u32.c | 13 - .../intrinsics/mve_vstore_scatter_shifted_offset.c | 141 -- .../mve_vstore_scatter_shifted_offset_p.c | 142 -- .../gcc.target/arm/mve/intrinsics/sqrshr.c | 21 +- .../gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c | 21 +- .../gcc.target/arm/mve/intrinsics/sqshl.c | 21 +- .../gcc.target/arm/mve/intrinsics/sqshll.c | 21 +- .../gcc.target/arm/mve/intrinsics/srshr.c | 21 +- .../gcc.target/arm/mve/intrinsics/srshrl.c | 21 +- .../gcc.target/arm/mve/intrinsics/uqrshl.c | 33 +- .../gcc.target/arm/mve/intrinsics/uqrshll_sat48.c | 33 +- .../gcc.target/arm/mve/intrinsics/uqshl.c | 21 +- .../gcc.target/arm/mve/intrinsics/uqshll.c | 21 +- .../gcc.target/arm/mve/intrinsics/urshr.c | 35 +- .../gcc.target/arm/mve/intrinsics/urshrl.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabavq_p_s16.c | 48 +- .../gcc.target/arm/mve/intrinsics/vabavq_p_s32.c | 48 +- .../gcc.target/arm/mve/intrinsics/vabavq_p_s8.c | 48 +- .../gcc.target/arm/mve/intrinsics/vabavq_p_u16.c | 48 +- .../gcc.target/arm/mve/intrinsics/vabavq_p_u32.c | 48 +- .../gcc.target/arm/mve/intrinsics/vabavq_p_u8.c | 48 +- .../gcc.target/arm/mve/intrinsics/vabavq_s16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vabavq_s32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vabavq_s8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vabavq_u16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vabavq_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vabavq_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vabdq_f16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabdq_f32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabdq_m_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_m_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabdq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabdq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabdq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabdq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabdq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabdq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabdq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabdq_x_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vabdq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabdq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabdq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabdq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabdq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vabsq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_m_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vabsq_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vabsq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vabsq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vabsq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vadciq_m_s32.c | 46 +- .../gcc.target/arm/mve/intrinsics/vadciq_m_u32.c | 46 +- .../gcc.target/arm/mve/intrinsics/vadciq_s32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vadciq_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vadcq_m_s32.c | 66 +- .../gcc.target/arm/mve/intrinsics/vadcq_m_u32.c | 66 +- .../gcc.target/arm/mve/intrinsics/vadcq_s32.c | 56 +- .../gcc.target/arm/mve/intrinsics/vadcq_u32.c | 56 +- .../gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c | 48 +- .../gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vaddlvq_s32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vaddlvq_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vaddq_f16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_f32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_f32.c | 34 +- .../arm/mve/intrinsics/vaddq_m_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c | 50 +- .../arm/mve/intrinsics/vaddq_m_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u16.c | 50 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_n_u8.c | 50 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_f16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_f32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vaddq_n_s32.c | 24 +- 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| 38 +- .../arm/mve/intrinsics/vcvtq_m_n_s16_f16.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_s32_f32.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_u16_f16.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_u32_f32.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_s16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_s32_f32.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_u16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_u32_f32.c | 33 +- .../arm/mve/intrinsics/vcvtq_n_f16_s16.c | 24 +- .../arm/mve/intrinsics/vcvtq_n_f16_u16.c | 24 +- .../arm/mve/intrinsics/vcvtq_n_f32_s32.c | 24 +- .../arm/mve/intrinsics/vcvtq_n_f32_u32.c | 24 +- .../arm/mve/intrinsics/vcvtq_n_s16_f16.c | 17 +- .../arm/mve/intrinsics/vcvtq_n_s32_f32.c | 17 +- .../arm/mve/intrinsics/vcvtq_n_u16_f16.c | 17 +- .../arm/mve/intrinsics/vcvtq_n_u32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c | 19 +- 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+- .../arm/mve/intrinsics/vddupq_x_wb_u16.c | 58 +- .../arm/mve/intrinsics/vddupq_x_wb_u32.c | 58 +- .../gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c | 58 +- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_f16.c | 49 +- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_f32.c | 49 +- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u16.c | 49 +- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u32.c | 49 +- .../gcc.target/arm/mve/intrinsics/vdupq_m_n_u8.c | 49 +- .../gcc.target/arm/mve/intrinsics/vdupq_n_f16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vdupq_n_f32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vdupq_n_s16.c | 21 +- .../gcc.target/arm/mve/intrinsics/vdupq_n_s32.c | 21 +- .../gcc.target/arm/mve/intrinsics/vdupq_n_s8.c | 17 +- .../gcc.target/arm/mve/intrinsics/vdupq_n_u16.c | 31 +- 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+- .../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 50 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 50 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u16.c | 54 +- .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vidupq_m_n_u8.c | 50 +- .../arm/mve/intrinsics/vidupq_m_wb_u16.c | 54 +- .../arm/mve/intrinsics/vidupq_m_wb_u32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vidupq_m_wb_u8.c | 50 +- .../gcc.target/arm/mve/intrinsics/vidupq_n_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vidupq_n_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vidupq_n_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vidupq_wb_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vidupq_wb_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vidupq_wb_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c | 54 +- .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c | 50 +- .../arm/mve/intrinsics/vidupq_x_wb_u16.c | 58 +- .../arm/mve/intrinsics/vidupq_x_wb_u32.c | 58 +- .../gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c | 58 +- .../arm/mve/intrinsics/viwdupq_m_n_u16.c | 54 +- .../arm/mve/intrinsics/viwdupq_m_n_u32.c | 54 +- .../gcc.target/arm/mve/intrinsics/viwdupq_m_n_u8.c | 54 +- .../arm/mve/intrinsics/viwdupq_m_wb_u16.c | 54 +- .../arm/mve/intrinsics/viwdupq_m_wb_u32.c | 54 +- .../arm/mve/intrinsics/viwdupq_m_wb_u8.c | 54 +- .../gcc.target/arm/mve/intrinsics/viwdupq_n_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/viwdupq_n_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/viwdupq_n_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u16.c | 44 +- .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u32.c | 44 +- .../gcc.target/arm/mve/intrinsics/viwdupq_wb_u8.c | 44 +- .../arm/mve/intrinsics/viwdupq_x_n_u16.c | 54 +- .../arm/mve/intrinsics/viwdupq_x_n_u32.c | 54 +- .../gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c | 54 +- .../arm/mve/intrinsics/viwdupq_x_wb_u16.c | 58 +- .../arm/mve/intrinsics/viwdupq_x_wb_u32.c | 58 +- .../arm/mve/intrinsics/viwdupq_x_wb_u8.c | 58 +- .../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_f16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_f32.c | 38 +- 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.../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 37 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s16.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s8.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u16.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u32.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u8.c | 28 +- .../mve/intrinsics/vldrbq_gather_offset_z_s16.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_s32.c | 36 +- .../arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_u16.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_u32.c | 36 +- .../arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s32.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u32.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 25 +- .../arm/mve/intrinsics/vldrdq_gather_base_s64.c | 19 +- .../arm/mve/intrinsics/vldrdq_gather_base_u64.c | 19 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 24 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 24 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 31 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 31 +- .../arm/mve/intrinsics/vldrdq_gather_base_z_s64.c | 23 +- .../arm/mve/intrinsics/vldrdq_gather_base_z_u64.c | 23 +- .../arm/mve/intrinsics/vldrdq_gather_offset_s64.c | 28 +- .../arm/mve/intrinsics/vldrdq_gather_offset_u64.c | 28 +- .../mve/intrinsics/vldrdq_gather_offset_z_s64.c | 36 +- .../mve/intrinsics/vldrdq_gather_offset_z_u64.c | 36 +- .../intrinsics/vldrdq_gather_shifted_offset_s64.c | 28 +- .../intrinsics/vldrdq_gather_shifted_offset_u64.c | 28 +- .../vldrdq_gather_shifted_offset_z_s64.c | 36 +- .../vldrdq_gather_shifted_offset_z_u64.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 20 +- .../arm/mve/intrinsics/vldrhq_gather_offset_f16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_s16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_u16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_u32.c | 28 +- .../mve/intrinsics/vldrhq_gather_offset_z_f16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_s16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_s32.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_u16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_u32.c | 36 +- .../intrinsics/vldrhq_gather_shifted_offset_f16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_s16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_s32.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_u16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_u32.c | 28 +- .../vldrhq_gather_shifted_offset_z_f16.c | 36 +- .../vldrhq_gather_shifted_offset_z_s16.c | 36 +- .../vldrhq_gather_shifted_offset_z_s32.c | 36 +- .../vldrhq_gather_shifted_offset_z_u16.c | 36 +- .../vldrhq_gather_shifted_offset_z_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrwq_f32.c | 18 +- .../arm/mve/intrinsics/vldrwq_gather_base_f32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_s32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_u32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 22 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 22 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 22 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 28 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 28 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_f32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_s32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_u32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_offset_f32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_offset_u32.c | 28 +- .../mve/intrinsics/vldrwq_gather_offset_z_f32.c | 36 +- .../mve/intrinsics/vldrwq_gather_offset_z_s32.c | 36 +- .../mve/intrinsics/vldrwq_gather_offset_z_u32.c | 36 +- .../intrinsics/vldrwq_gather_shifted_offset_f32.c | 28 +- .../intrinsics/vldrwq_gather_shifted_offset_s32.c | 28 +- .../intrinsics/vldrwq_gather_shifted_offset_u32.c | 28 +- .../vldrwq_gather_shifted_offset_z_f32.c | 36 +- .../vldrwq_gather_shifted_offset_z_s32.c | 36 +- .../vldrwq_gather_shifted_offset_z_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxaq_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxaq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxaq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s16.c | 49 +- .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s32.c | 49 +- .../gcc.target/arm/mve/intrinsics/vmaxavq_p_s8.c | 49 +- .../gcc.target/arm/mve/intrinsics/vmaxavq_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vmaxavq_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vmaxavq_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c | 33 +- .../arm/mve/intrinsics/vmaxnmavq_f16-1.c | 12 - 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+- .../arm/mve/intrinsics/vmullbq_int_m_s32.c | 34 +- .../arm/mve/intrinsics/vmullbq_int_m_s8.c | 34 +- .../arm/mve/intrinsics/vmullbq_int_m_u16.c | 34 +- .../arm/mve/intrinsics/vmullbq_int_m_u32.c | 34 +- .../arm/mve/intrinsics/vmullbq_int_m_u8.c | 34 +- .../arm/mve/intrinsics/vmullbq_int_s16.c | 24 +- .../arm/mve/intrinsics/vmullbq_int_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c | 24 +- .../arm/mve/intrinsics/vmullbq_int_u16.c | 24 +- .../arm/mve/intrinsics/vmullbq_int_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c | 24 +- .../arm/mve/intrinsics/vmullbq_int_x_s16.c | 33 +- .../arm/mve/intrinsics/vmullbq_int_x_s32.c | 33 +- .../arm/mve/intrinsics/vmullbq_int_x_s8.c | 33 +- .../arm/mve/intrinsics/vmullbq_int_x_u16.c | 33 +- .../arm/mve/intrinsics/vmullbq_int_x_u32.c | 33 +- .../arm/mve/intrinsics/vmullbq_int_x_u8.c | 33 +- .../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 34 +- .../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 34 +- 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| 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_n_s16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vorrq_n_s32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vorrq_n_u16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vorrq_n_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vorrq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_s8.c | 33 +- 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| 33 +- .../gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev16q_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev16q_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev32q_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev64q_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c | 33 +- .../{vcreateq_f16.c => vrev64q_m_s16-clobber.c} | 12 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s8.c | 24 +- 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2 years, 1 month

[toolchain/bmk-scripts] branch master updated (98396a8 -> 9cc1b5b)

by Prathamesh Kulkarni

This is an automated email from the git hooks/post-receive script. "Prathamesh Kulkarni pushed a change to branch master in repository toolchain/bmk-scripts. from 98396a8 compare-results.py: Error messages on stderr new 9cc1b5b md5sum-data-to-csv.py: Iterate over interesting_symbols in so [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: md5sum-data-to-csv.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (cffe1e6d46 -> e461ca473b)

by git＠git.linaro.org

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That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cffe1e6d46) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_check_gcc/mas [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 202 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 00-sumfiles/g++.log.xz | Bin 3924516 -> 3885112 bytes 00-sumfiles/gcc.log.xz | Bin 3416460 -> 3371868 bytes 00-sumfiles/gfortran.log.xz | Bin 1134728 -> 1136220 bytes 00-sumfiles/libatomic.log.xz | Bin 2276 -> 2288 bytes 00-sumfiles/libgomp.log.xz | Bin 274076 -> 276436 bytes 00-sumfiles/libitm.log.xz | Bin 2644 -> 2652 bytes 00-sumfiles/libstdc++.log.xz | Bin 478168 -> 465640 bytes 01-reset_artifacts/console.log.xz | Bin 2236 -> 2252 bytes 02-prepare_abe/console.log.xz | Bin 2404 -> 2432 bytes 03-build_abe-binutils/console.log.xz | Bin 36008 -> 35348 bytes 04-build_abe-gcc/console.log.xz | Bin 206256 -> 210300 bytes 06-build_abe-linux/console.log.xz | Bin 8632 -> 8792 bytes 07-build_abe-glibc/console.log.xz | Bin 243436 -> 245016 bytes 08-build_abe-gdb/console.log.xz | Bin 35280 -> 36172 bytes 09-build_abe-dejagnu/console.log.xz | Bin 4060 -> 4056 bytes 10-build_abe-check_gcc/console.log.xz | Bin 6548 -> 7636 bytes 10-build_abe-check_gcc/flaky.xfail | 2 +- 11-check_regression/console.log.xz | Bin 1608 -> 1192 bytes 11-check_regression/results.compare | 10 +- 11-check_regression/results.compare2 | 97 +------------------ 12-update_baseline/console.log | 176 +++++++++++++++++----------------- git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/gdb_rev | 2 +- manifest.sh | 24 ++--- notify/results.compare | 10 +- sumfiles/libatomic.sum | 2 +- sumfiles/libitm.sum | 2 +- 28 files changed, 120 insertions(+), 209 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_check_binutils/master-arm updated (d65cee9bd3 -> c265c247f1)

by git＠git.linaro.org

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That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d65cee9bd3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_check_binutil [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 202 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 00-sumfiles/binutils.log.xz | Bin 62528 -> 62556 bytes 00-sumfiles/gas.log.xz | Bin 100668 -> 100612 bytes 00-sumfiles/ld.log.xz | Bin 132312 -> 132336 bytes 01-reset_artifacts/console.log.xz | Bin 2200 -> 2268 bytes 02-prepare_abe/console.log.xz | Bin 2452 -> 2460 bytes 03-build_abe-binutils/console.log.xz | Bin 49540 -> 50404 bytes 04-build_abe-gcc/console.log.xz | Bin 240348 -> 238788 bytes 06-build_abe-linux/console.log.xz | Bin 8644 -> 8624 bytes 07-build_abe-glibc/console.log.xz | Bin 233696 -> 233096 bytes 08-build_abe-gdb/console.log.xz | Bin 46884 -> 46700 bytes 09-build_abe-dejagnu/console.log.xz | Bin 4012 -> 4036 bytes 10-build_abe-check_binutils/console.log.xz | Bin 3372 -> 3204 bytes 10-build_abe-check_binutils/flaky.xfail | 2 +- 11-check_regression/console.log.xz | Bin 1136 -> 1112 bytes 11-check_regression/results.compare2 | 4 +- 12-update_baseline/console.log | 192 ++++++++++++++--------------- git/binutils_rev | 2 +- git/gcc_rev | 2 +- git/gdb_rev | 2 +- manifest.sh | 26 ++-- sumfiles/binutils.sum | 2 +- sumfiles/gas.sum | 2 +- sumfiles/ld.sum | 2 +- 23 files changed, 118 insertions(+), 118 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits May 2023