Tcwg-commits July 2022

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15101 discussions

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (d495e432c0 -> 1437479e5e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/qemu. from d495e432c0 Merge tag 'pull-aspeed-20220630' of https://github.com/legoa [...] adds af2ae2e8ac bsd-user: Implement mount, umount and nmount adds c7b62b4a87 bsd-user: Implement symlink, symlinkat, readlink and readlinkat adds 0db0db8f23 bsd-user: implement chmod, fchmod, lchmod and fchmodat adds 79cfae0c1b bsd-user: Implement freebsd11_mknod, freebsd11_mknodat and mknodat adds 58af3e295c bsd-user: Implement chown, fchown, lchown and fchownat adds c6f0a7d91a bsd-user: Implement chflags, lchflags and fchflags adds 17a4d13cea bsd-user: Implement chroot and flock adds 5fbd8011ff bsd-user: Implement mkfifo and mkfifoat adds d3f29ddacd bsd-user: Implement pathconf, lpathconf and fpathconf adds 952d5d30d6 bsd-user: Implement undelete adds 3f1b0235f6 bsd-user: Remove stray 'inline' from do_bsd_close adds ba45b82518 Merge tag 'bsd-user-syscall-2022q2b-pull-request' of ssh://g [...] adds 4e245a9e26 target/riscv: Remove condition guarding register zero for au [...] adds b97028b8c5 target/riscv: Set env->bins in gen_exception_illegal adds 5dacdbaeaf target/riscv: Remove generate_exception_mtval adds a9814e3e08 target/riscv: Minimize the calls to decode_save_opc adds 2e98339918 target/riscv/pmp: guard against PMP ranges with a negative size adds 562009e47c target/riscv: Fix PMU CSR predicate function adds a5a92fd6ef target/riscv: Implement PMU CSR predicate function for S-mode adds d3be1299fb target/riscv: pmu: Rename the counters extension to pmu adds 18d6d89efc target/riscv: pmu: Make number of counters configurable adds b1675eeb3e target/riscv: Implement mcountinhibit CSR adds 621f35bb2f target/riscv: Add support for hpmcounters/hpmevents adds 3780e33732 target/riscv: Support mcycle/minstret write operation adds b509caceaa target/riscv: Fixup MSECCFG minimum priv check adds be2265c776 target/riscv: Ibex: Support priv version 1.11 adds 188000952c target/riscv: Don't force update priv spec version to latest adds ec2c62dacc hw/riscv: boot: Reduce FDT address alignment constraints adds 598ca83706 target/riscv: Set minumum priv spec version for mcountinhibit adds df01af337f target/riscv: Remove CSRs that set/clear an IMSIC interrupt [...] adds 435774992e target/riscv: Update default priority table for local interrupts adds e8e86b484e Merge tag 'pull-riscv-to-apply-20220703-1' of github.com:ali [...] adds 8e72ceee5c Rename docs/specs/fw_cfg.txt to .rst adds 701caa3d6a Convert fw_cfg.rst to reStructuredText syntax adds 839a482695 ui/console: allow display device to be labeled with given id adds 8c0d80245f ui/cocoa: Fix clipboard text release adds ada270cd18 hw/usb/canokey: Fix CCID ZLP adds 1042563027 hw/usb/canokey: fix compatibility of qemu-xhci adds 8607b5149e docs/system/devices/usb/canokey: remove limitations on qemu-xhci adds 927b968d1b hw: canokey: Remove HS support as not compliant to the spec adds dfe2382f06 Merge tag 'kraxel-20220704-pull-request' of https://gitlab.c [...] adds 070f735333 linux-user: Add LoongArch generic header files adds 9d5cd6587a linux-user: Add LoongArch signal support adds 3418fe25fa linux-user: Add LoongArch elf support adds 1f63019632 linux-user: Add LoongArch syscall support adds da8c70ea82 linux-user: Add LoongArch cpu_loop support adds 0caebb9160 scripts: add loongarch64 binfmt config adds fffca8f227 target/loongarch: remove badaddr from CPULoongArch adds 7d552f0e0a target/loongarch: Fix missing update CSR_BADV adds 7fe7eea6ff target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong e [...] adds 9bc92b5013 target/loongarch: remove unused include hw/loader.h adds 0093b9a5ee target/loongarch: Adjust functions and structure to support [...] adds d32688ecdb default-configs: Add loongarch linux-user support adds 227e73c986 target/loongarch: Update README adds 490c03ab11 hw/intc/loongarch_pch_msi: Fix msi vector convertion adds 4f2c65877c hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing [...] adds df11f3ea69 hw/rtc/ls7a_rtc: Fix timer call back function adds 53a5eb2e7a hw/rtc/ls7a_rtc: Remove unimplemented device in realized function adds e5c0367e2b hw/rtc/ls7a_rtc: Add reset function adds 6935f132e5 hw/rtc/ls7a_rtc: Fix rtc enable and disable function adds 582788c3fb hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_t [...] adds 59e52dcff7 hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors adds 4623367697 target/loongarch: Fix the meaning of ECFG reg's VS field adds eb1e9ff8bb target/loongarch: Add lock when writing timer clear reg adds 1437479e5e Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/q [...] No new revisions were added by this update. Summary of changes: bsd-user/bsd-file.h | 392 +++++++++- bsd-user/freebsd/os-syscall.c | 118 +++ configs/targets/loongarch64-linux-user.mak | 3 + docs/specs/{fw_cfg.txt => fw_cfg.rst} | 211 ++--- docs/specs/index.rst | 1 + docs/system/devices/canokey.rst | 10 - hw/intc/loongarch_pch_msi.c | 22 +- hw/loongarch/loongson3.c | 1 + hw/riscv/boot.c | 4 +- hw/rtc/ls7a_rtc.c | 131 ++-- hw/usb/canokey.c | 31 +- include/hw/intc/loongarch_pch_msi.h | 2 + include/ui/console.h | 1 + linux-user/elfload.c | 91 +++ linux-user/loongarch64/cpu_loop.c | 96 +++ linux-user/loongarch64/signal.c | 335 ++++++++ linux-user/loongarch64/sockbits.h | 11 + linux-user/loongarch64/syscall_nr.h | 312 ++++++++ linux-user/loongarch64/target_cpu.h | 34 + linux-user/loongarch64/target_elf.h | 12 + linux-user/loongarch64/target_errno_defs.h | 12 + linux-user/loongarch64/target_fcntl.h | 11 + linux-user/{arm => loongarch64}/target_prctl.h | 0 linux-user/loongarch64/target_resource.h | 11 + linux-user/loongarch64/target_signal.h | 13 + linux-user/loongarch64/target_structs.h | 11 + linux-user/loongarch64/target_syscall.h | 48 ++ linux-user/loongarch64/termbits.h | 11 + linux-user/syscall_defs.h | 6 +- scripts/gensyscalls.sh | 2 + scripts/qemu-binfmt-conf.sh | 6 +- target/loongarch/README | 39 +- target/loongarch/cpu.c | 38 +- target/loongarch/cpu.h | 8 +- target/loongarch/csr_helper.c | 2 + target/loongarch/gdbstub.c | 2 +- target/loongarch/helper.h | 2 + target/loongarch/insn_trans/trans_privileged.c.inc | 36 + target/loongarch/internals.h | 2 + target/loongarch/op_helper.c | 10 +- target/riscv/cpu.c | 17 +- target/riscv/cpu.h | 24 +- target/riscv/cpu_bits.h | 30 +- target/riscv/cpu_helper.c | 134 ++-- target/riscv/csr.c | 857 +++++++++++++-------- target/riscv/insn_trans/trans_privileged.c.inc | 4 + target/riscv/insn_trans/trans_rvh.c.inc | 2 + target/riscv/insn_trans/trans_rvi.c.inc | 10 +- target/riscv/machine.c | 25 + target/riscv/meson.build | 3 +- target/riscv/pmp.c | 3 + target/riscv/pmu.c | 32 + target/riscv/pmu.h | 28 + target/riscv/translate.c | 31 +- tests/tcg/riscv64/Makefile.softmmu-target | 21 + tests/tcg/riscv64/issue1060.S | 53 ++ tests/tcg/riscv64/semihost.ld | 21 + ui/cocoa.m | 4 +- ui/console.c | 41 +- 59 files changed, 2766 insertions(+), 662 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak rename docs/specs/{fw_cfg.txt => fw_cfg.rst} (58%) create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h copy linux-user/{arm => loongarch64}/target_prctl.h (100%) create mode 100644 linux-user/loongarch64/target_resource.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 target/riscv/pmu.c create mode 100644 target/riscv/pmu.h create mode 100644 tests/tcg/riscv64/Makefile.softmmu-target create mode 100644 tests/tcg/riscv64/issue1060.S create mode 100644 tests/tcg/riscv64/semihost.ld -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (bf11543eab0f -> 5408ba27e1de)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/linux. from bf11543eab0f Merge v5.15.51 adds f4a80ec8c51d tick/nohz: unexport __init-annotated tick_nohz_full_setup() adds edbaf6e5e93a x86, kvm: use proper ASM macros for kvm_vcpu_is_preempted adds 1cdcd496b7ca bcache: memset on stack variables in bch_btree_check() and [...] adds 71a218ca4fde xfs: use kmem_cache_free() for kmem_cache objects adds 0e84e17c16a3 xfs: punch out data fork delalloc blocks on COW writeback failure adds 40de647b2bab xfs: Fix the free logic of state in xfs_attr_node_hasname adds c4f376ba8be8 xfs: remove all COW fork extents when remounting readonly adds 4f0c91ab4c7d xfs: check sb_meta_uuid for dabuf buffer recovery adds 3465b167831e xfs: prevent UAF in xfs_log_item_in_current_chkpt adds ce6bfe55237e xfs: only bother with sync_filesystem during readonly remount adds ab0b6dc5e16b powerpc/ftrace: Remove ftrace init tramp once kernel init [...] adds b3679e8b5996 fs: add is_idmapped_mnt() helper adds 7bc23abcb414 fs: move mapping helpers adds 3374eb1b0afc fs: tweak fsuidgid_has_mapping() adds b20dcf603b8d fs: account for filesystem mappings adds 1c62e0186d94 docs: update mapping documentation adds f895d0ff47be fs: use low-level mapping helpers adds 7d0536a8fab7 fs: remove unused low-level mapping helpers adds 21c6c720be75 fs: port higher-level mapping helpers adds 968e66f8ff70 fs: add i_user_ns() helper adds 38753e9173a5 fs: support mapped mounts of mapped filesystems adds dc85bc24fbf1 fs: fix acl translation adds e8d4878dcd00 fs: account for group membership adds d52f1c588824 rtw88: 8821c: support RFE type4 wifi NIC adds 810962c79417 rtw88: rtw8821c: enable rfe 6 devices adds 5696f7983d5d net: mscc: ocelot: allow unregistered IP multicast floodin [...] adds ea512d540a55 io_uring: fix not locked access to fixed buf table adds 545aecd22961 Linux 5.15.52 adds 5408ba27e1de Merge v5.15.52 No new revisions were added by this update. Summary of changes: Documentation/filesystems/idmappings.rst | 72 -------- Makefile | 2 +- arch/powerpc/include/asm/ftrace.h | 4 +- arch/powerpc/kernel/trace/ftrace.c | 15 +- arch/powerpc/mm/mem.c | 2 + arch/x86/kernel/kvm.c | 2 +- drivers/md/bcache/btree.c | 1 + drivers/md/bcache/writeback.c | 1 + drivers/net/ethernet/mscc/ocelot.c | 8 +- drivers/net/wireless/realtek/rtw88/rtw8821c.c | 14 +- fs/attr.c | 26 ++- fs/cachefiles/bind.c | 2 +- fs/ecryptfs/main.c | 2 +- fs/io_uring.c | 28 +-- fs/ksmbd/smbacl.c | 19 +-- fs/ksmbd/smbacl.h | 5 +- fs/namespace.c | 53 ++++-- fs/nfsd/export.c | 2 +- fs/open.c | 8 +- fs/overlayfs/super.c | 2 +- fs/posix_acl.c | 27 ++- fs/proc_namespace.c | 2 +- fs/xattr.c | 6 +- fs/xfs/libxfs/xfs_attr.c | 17 +- fs/xfs/xfs_aops.c | 15 +- fs/xfs/xfs_buf_item_recover.c | 2 +- fs/xfs/xfs_extfree_item.c | 6 +- fs/xfs/xfs_inode.c | 8 +- fs/xfs/xfs_linux.h | 1 + fs/xfs/xfs_log_cil.c | 6 +- fs/xfs/xfs_super.c | 21 ++- fs/xfs/xfs_symlink.c | 4 +- include/linux/fs.h | 141 +++++----------- include/linux/mnt_idmapping.h | 234 ++++++++++++++++++++++++++ include/linux/posix_acl_xattr.h | 4 + kernel/time/tick-sched.c | 1 - security/commoncap.c | 15 +- 37 files changed, 490 insertions(+), 288 deletions(-) create mode 100644 include/linux/mnt_idmapping.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (e8a46e5cdab -> 76c3041b856)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/gcc. from e8a46e5cdab Double word logical operation clean-ups in i386.md. adds 17419b61edd PR target/106122: Don't update %esp via the stack with -Oz on x86. adds e52592073f6 wide-int: Fix up wi::shifted_mask [PR106144] adds 9a33a3e2f75 Revert "testsuite/102690: Only check warning for lp64 in Wa [...] adds e0466d32eb3 Enable some features for RTEMS in libstdc++ adds e2d2a8ff4f0 [Committed] Add constraints to new andn<dwi>_doubleword_bmi [...] adds 7780dc5b2d0 gcn: Remove useless register keyword adds f7a148304a7 libstdc++: Add nodiscard attribute to filesystem operations adds 08ed796ed08 Make sure checking code is conditional in VN adds 2b0937946b1 Revert maybe_ne -> known_ne change in vn_reference_lookup_3 adds 63abe049992 Avoid unused sbitmap in update_ssa adds 07ac550393d c++: dependent generic lambda template-id [PR106024] adds 288c6cce027 c++: add fixup to missing .template warning adds aefe23f720a c++: tweak resolve_args change adds 9234cdca6ee Add a recursion limit to the demangle_const function in the [...] adds 2ea6c593497 c++: warn about using keywords as identifiers [PR106111] adds f843bea4ca5 i386: Use "r" constraint in *andn<mode>3_doubleword_bmi adds 9a668532fb1 OpenMP: Handle tofrom with target enter/exit data adds ecd11acacd6 c++: fix broken copy elision with nested TARGET_EXPRs [PR105550] adds 1f76941c09f compiler: rename "requires" to "needs" adds ff64a8c9519 c++: Minor cleanup in parser.cc adds 8a6ee426c2b libstdc++: Add missing prerequisite to generated header [PR106162] adds 1697806fdf2 trailing_wide_ints with runtime variable lengths adds fbd7665360d compiler: use correct init order for multi-value initialization adds ed974488991 Daily bump. adds 97baacba963 analyzer: implement five new warnings for misuse of POSIX f [...] adds e6c3bb379f5 analyzer: add allocation size checker [PR105900] adds b58ca9c3375 MAINTAINERS: Add myself to write after approval and DCO adds 20f0f30522d Daily bump. adds d86a20ee8be tree-optimization: only DSE trapping insn if -fdelete-dead- [...] adds b5c3dd3df38 Use fixed-width types in allocation size tests adds f150dc1bd11 loongarch: use -mno-check-zero-division as the default for [...] adds a26f3eb2683 Implement class vrange_storage to stream ranges to long ter [...] adds 21582a7c7de Add myself to write-after-approval and DCO adds 17f2e2b77b6 Add myself to write after approval and DCO. adds 3ae9def0856 Move range allocator code to value-range-storage.* adds f3a5e75cb66 x86: Support 2/4/8 byte constant vector stores adds 3731dd0bea8 Daily bump. adds bbe836bc7c5 Remove some deprecated irange methods. adds 73f942c08de i386: Extend cvtps2pd to memory adds d74d98784a9 tree-optimization/106055 - issue with autopar adds ad7ed87a436 [Ada] Adjust description of Pure_Function pragma adds 089a4a48ac3 [Ada] Create new unbounded functional sequence adds df69e326b39 [Ada] Fix for resolution of overloaded subprogram for Itera [...] adds bdd5056736b [Ada] Plug loophole for built-in-place return with limited_ [...] adds ddd88925273 [Ada] Incorrect accessibility check on return of discrimina [...] adds 82b63eb0f30 [Ada] Add GNAT specific pragmas to the equivalent Assertion [...] adds 2e9b2ab3b5b [Ada] Update the documentation of functional containers adds a8a1da109ef [Ada] Add Ada 2022 features to sets containers adds 4030e83c276 [Ada] Give missing error on ambiguous operand of equality operator adds e7428fff12c [Ada] Add a RM entry for the functional infinite sequences adds f7c05e82037 [Ada] Avoid unwanted warnings for statically-known-successf [...] adds 063c8f4c01b [Ada] Compiler rejects legal allocator in record component [...] adds cac397f3f6f [Ada] Fix length of title underlines. adds eb6e8a7acd1 [Ada] Add Ada 2022 Key function to sets containers adds c901877facf [Ada] Call-initialize all controlled objects in place adds 02e41e69d47 [Ada] Do not use front-end build-in-place mechanism for non [...] adds 3319015b0a4 [Ada] Fix missing error on 'Access of constrained array adds 1fde86bba55 [Ada] Single character argument in call to Quote_Argument r [...] adds 78f13b008ab [Ada] Tech debt: Remove code duplication adds 4b766285b08 [Ada] Assertions in Einfo.Utils adds f3451ba8aa3 [Ada] Enforce deferred constant completion rules adds 2cad8a59a80 [Ada] Use static stack allocation for small dynamic string [...] adds 0896e2b79a3 [Ada] Adjust previous change to Rewrite_As_Renaming adds a521dc37999 [Ada] Use static stack allocation for small string if-expressions adds e0cd23986ed [Ada] Refactor duplicated resolution of Count and Index attributes adds 2f94aea27c0 [Ada] Makefile.rtl: remove references t oVxworks RTP Cert . [...] adds aa683f5c036 [Ada] Small housekeeping work in Expand_N_Object_Declaration adds 4dab9bed7bd [Ada] vx7r2: do not include s-qnx.ads in the kernel and rtp [...] adds 1f03b43fc75 [Ada] Fix dispatching call to primitive function with contr [...] adds 8c6bef0a33e [Ada] Do not make procedure call with only tag-indeternmina [...] adds d2a89866660 Put virtual operands into loop-closed SSA adds 4e82205b680 Integrate nonzero bits with irange. adds 1a770b01ef4 Prevent another potential stack overflow issue when demangl [...] adds a7ccdfa17e5 MAINTAINERS: fix alphabetic sorting adds 483bd9a0283 Use default lower bound for vector types in debug info adds 104b9875c78 Fix crash on circular array types with -fdump switches adds 88b9d090aa1 gcc-descr: by default show revision for HEAD adds 10b502fb783 Keep virtual SSA up-to-date in vectorizer adds 683f1184397 OpenMP: Move omp requires checks to libgomp adds 3769ad4ccea Revert update-ssa assert in vectorizer adds b110e5283e3 tree-sra: Fix union handling in build_reconstructed_reference adds fc968115a74 Fix typo in recent code to add stack recursion limit to the [...] adds ac4c8f53b0f middle-end: Support ABIs that pass FP values as wider integers. adds ce8dbe7d834 Misc conversions to vrange. adds c3297044f00 OpenMP/Fortran: Add support for OpenMP 5.2 linear clause syntax adds 5beddee9f43 gcc.dg/analyzer/allocation-size-1..5.c: Fix for 32-bit newl [...] adds 8467574d8da Daily bump. adds b55284f4a12 tree-optimization/106182 - LC SSA after CFG cleanup new 76c3041b856 vect: Use sdot for a fallback implementation of usdot The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 20 + MAINTAINERS | 6 +- contrib/ChangeLog | 4 + contrib/git-descr.sh | 2 +- gcc/ChangeLog | 360 ++ gcc/DATESTAMP | 2 +- gcc/Makefile.in | 3 + gcc/ada/ChangeLog | 248 + gcc/ada/Makefile.rtl | 9 +- gcc/ada/checks.adb | 99 +- gcc/ada/debug.adb | 5 +- .../doc/gnat_rm/implementation_defined_pragmas.rst | 6 +- gcc/ada/doc/gnat_rm/the_gnat_library.rst | 68 +- .../building_executable_programs_with_gnat.rst | 34 +- gcc/ada/einfo-utils.adb | 61 +- gcc/ada/einfo-utils.ads | 57 +- gcc/ada/exp_ch3.adb | 235 +- gcc/ada/exp_ch4.adb | 550 +- gcc/ada/exp_ch6.adb | 133 +- gcc/ada/exp_ch7.adb | 9 +- gcc/ada/exp_disp.adb | 10 +- gcc/ada/exp_tss.adb | 2 +- gcc/ada/exp_util.adb | 49 +- gcc/ada/gnat_rm.texi | 476 +- gcc/ada/gnat_ugn.texi | 38 +- gcc/ada/impunit.adb | 1 + gcc/ada/libgnat/a-cbhase.adb | 58 + gcc/ada/libgnat/a-cbhase.ads | 22 + gcc/ada/libgnat/a-cborse.adb | 56 + gcc/ada/libgnat/a-cborse.ads | 22 + gcc/ada/libgnat/a-cfinse.adb | 304 + gcc/ada/libgnat/a-cfinse.ads | 377 ++ gcc/ada/libgnat/a-cihase.adb | 58 + gcc/ada/libgnat/a-cihase.ads | 22 + gcc/ada/libgnat/a-ciorse.adb | 55 + gcc/ada/libgnat/a-ciorse.ads | 22 + gcc/ada/libgnat/a-cohase.adb | 58 + gcc/ada/libgnat/a-cohase.ads | 22 + gcc/ada/libgnat/a-conhel.adb | 8 +- gcc/ada/libgnat/a-conhel.ads | 28 +- gcc/ada/libgnat/a-coorse.adb | 55 + gcc/ada/libgnat/a-coorse.ads | 22 + gcc/ada/libgnat/s-os_lib.adb | 2 +- gcc/ada/sem_attr.adb | 41 +- gcc/ada/sem_aux.adb | 6 +- gcc/ada/sem_ch13.adb | 1 + gcc/ada/sem_ch3.adb | 58 +- gcc/ada/sem_ch4.adb | 17 +- gcc/ada/sem_disp.adb | 86 +- gcc/ada/sem_prag.adb | 37 +- gcc/ada/sem_prag.ads | 1 + gcc/ada/sem_res.adb | 41 +- gcc/ada/sem_util.adb | 66 +- gcc/ada/sem_warn.adb | 9 +- gcc/ada/sinfo.ads | 4 +- gcc/ada/sprint.adb | 10 +- gcc/ada/types.ads | 5 + gcc/ada/uintp.ads | 2 + gcc/analyzer/ChangeLog | 49 + gcc/analyzer/analyzer.opt | 24 + gcc/analyzer/checker-path.cc | 11 +- gcc/analyzer/checker-path.h | 2 +- gcc/analyzer/diagnostic-manager.cc | 61 + gcc/analyzer/diagnostic-manager.h | 4 + gcc/analyzer/pending-diagnostic.h | 20 + gcc/analyzer/region-model.cc | 370 ++ gcc/analyzer/region-model.h | 2 + gcc/analyzer/sm-fd.cc | 847 +++ gcc/analyzer/sm.cc | 1 + gcc/analyzer/sm.h | 1 + gcc/analyzer/svalue.cc | 26 +- gcc/c-family/ChangeLog | 5 + gcc/c-family/c-common.h | 2 +- gcc/c/ChangeLog | 15 + gcc/c/c-parser.cc | 41 +- gcc/calls.cc | 38 +- gcc/cfgexpand.cc | 13 +- gcc/common/config/loongarch/loongarch-common.cc | 3 - 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2 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (2899490953 -> c368d2a802)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from 2899490953 Automatic date update in version.in adds 1dd024239b Add newline to the end of the rnglists displsy. adds c4de64f8f6 GDB/doc: Remove extraneous spaces from completion examples adds a89c17dac1 GDB/doc: Remove indentation from `print -elements' completio [...] adds f15f0ddd10 Automatic date update in version.in adds 47226049bb [gdb/testsuite] Fix gdb.base/early-init-file.exp with -fsani [...] adds 33fd0a3363 [gdb/symtab] Fix data race on per_cu->dwarf_version adds dcc9b683dc Automatic date update in version.in adds 1e3a4f12e7 Automatic date update in version.in adds 0f2f2e7019 RISC-V: Update Zihintpause extension version adds 9386188e95 x86-64: improve handling of branches to absolute addresses adds 02b83698ef x86: restore masking of displacement kinds adds a775efc84d x86: fold Disp32S and Disp32 adds 58098fd779 gas/testsuite: properly exclude aout in all/weakref1u adds 2c474c4694 [gdb/symtab] Add get/set functions for per_cu->lang/unit_type adds a0f3a4c646 opcodes/avr: Implement style support in the disassembler adds 407115429b Modified changes for split-dwarf and dwarf-5. adds d8efadbdd9 Synchronize libbierty sources with gcc. adds 0772daccb3 objcopy: bfd_alloc orelocation adds eeeaf705fe alloc gas seginfo on notes obstack adds 96c33f79de Fix snafu in rust demangler recursion limit code adds 10e52570b8 Automatic date update in version.in adds 8180707f90 x86: de-duplicate sub-architecture strings accumulation adds 6ceeed2506 x86: macro-ize cpu_arch[] entries adds c368d2a802 x86: introduce fake processor type to mark sub-arch entries [...] No new revisions were added by this update. Summary of changes: ChangeLog | 13 + bfd/elfxx-riscv.c | 2 +- bfd/version.h | 2 +- binutils/ChangeLog | 4 + binutils/bucomm.c | 13 + binutils/bucomm.h | 2 + binutils/dwarf.c | 13 +- binutils/objcopy.c | 37 +- gas/as.h | 1 + gas/config/tc-i386-intel.c | 9 +- gas/config/tc-i386.c | 625 +- gas/config/tc-i386.h | 8 +- gas/output-file.c | 42 +- gas/subsegs.c | 37 +- gas/testsuite/gas/all/weakref1u.d | 2 +- gas/testsuite/gas/i386/i386.exp | 1 + gas/testsuite/gas/i386/x86-64-branch-6.d | 21 + gas/testsuite/gas/i386/x86-64-branch-6.e | 7 + gas/testsuite/gas/i386/x86-64-branch-6.s | 18 + gdb/doc/gdb.texinfo | 13 +- gdb/dwarf2/cooked-index.c | 10 +- gdb/dwarf2/cu.c | 2 +- gdb/dwarf2/index-write.c | 2 +- gdb/dwarf2/read.c | 233 +- gdb/dwarf2/read.h | 59 +- gdb/testsuite/gdb.base/early-init-file.exp | 19 +- libiberty/ChangeLog | 146 +- libiberty/configure | 1 + libiberty/configure.ac | 1 + libiberty/rust-demangle.c | 47 +- opcodes/ChangeLog | 9 + opcodes/avr-dis.c | 51 +- opcodes/disassemble.c | 5 + opcodes/i386-gen.c | 10 +- opcodes/i386-init.h | 132 +- opcodes/i386-opc.h | 5 +- opcodes/i386-opc.tbl | 15 +- opcodes/i386-tbl.h | 25585 ++++++++++++++------------- 38 files changed, 13706 insertions(+), 13496 deletions(-) create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.d create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.e create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig updated (2e7e5f6f -> eb9638d7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 2e7e5f6f 4: update: binutils-gcc-linux-qemu: 33 new eb9638d7 4: update: binutils-gcc-linux-qemu: 33 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2e7e5f6f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1560 -> 1644 bytes 02-prepare_abe/console.log.xz | Bin 2724 -> 2736 bytes 03-build_abe-binutils/console.log.xz | Bin 30240 -> 30244 bytes 04-build_abe-stage1/console.log.xz | Bin 91556 -> 91288 bytes 05-build_abe-qemu/console.log.xz | Bin 33084 -> 32612 bytes 06-build_linux/console.log.xz | Bin 5260 -> 5336 bytes 08-check_regression/console.log.xz | Bin 476 -> 476 bytes 09-update_baseline/console.log | 67 ++++++++++++++++++----------------- jenkins/manifest.sh | 22 ++++++------ 9 files changed, 45 insertions(+), 44 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (d495e432c0 -> 1437479e5e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/qemu. from d495e432c0 Merge tag 'pull-aspeed-20220630' of https://github.com/legoa [...] adds af2ae2e8ac bsd-user: Implement mount, umount and nmount adds c7b62b4a87 bsd-user: Implement symlink, symlinkat, readlink and readlinkat adds 0db0db8f23 bsd-user: implement chmod, fchmod, lchmod and fchmodat adds 79cfae0c1b bsd-user: Implement freebsd11_mknod, freebsd11_mknodat and mknodat adds 58af3e295c bsd-user: Implement chown, fchown, lchown and fchownat adds c6f0a7d91a bsd-user: Implement chflags, lchflags and fchflags adds 17a4d13cea bsd-user: Implement chroot and flock adds 5fbd8011ff bsd-user: Implement mkfifo and mkfifoat adds d3f29ddacd bsd-user: Implement pathconf, lpathconf and fpathconf adds 952d5d30d6 bsd-user: Implement undelete adds 3f1b0235f6 bsd-user: Remove stray 'inline' from do_bsd_close adds ba45b82518 Merge tag 'bsd-user-syscall-2022q2b-pull-request' of ssh://g [...] adds 4e245a9e26 target/riscv: Remove condition guarding register zero for au [...] adds b97028b8c5 target/riscv: Set env->bins in gen_exception_illegal adds 5dacdbaeaf target/riscv: Remove generate_exception_mtval adds a9814e3e08 target/riscv: Minimize the calls to decode_save_opc adds 2e98339918 target/riscv/pmp: guard against PMP ranges with a negative size adds 562009e47c target/riscv: Fix PMU CSR predicate function adds a5a92fd6ef target/riscv: Implement PMU CSR predicate function for S-mode adds d3be1299fb target/riscv: pmu: Rename the counters extension to pmu adds 18d6d89efc target/riscv: pmu: Make number of counters configurable adds b1675eeb3e target/riscv: Implement mcountinhibit CSR adds 621f35bb2f target/riscv: Add support for hpmcounters/hpmevents adds 3780e33732 target/riscv: Support mcycle/minstret write operation adds b509caceaa target/riscv: Fixup MSECCFG minimum priv check adds be2265c776 target/riscv: Ibex: Support priv version 1.11 adds 188000952c target/riscv: Don't force update priv spec version to latest adds ec2c62dacc hw/riscv: boot: Reduce FDT address alignment constraints adds 598ca83706 target/riscv: Set minumum priv spec version for mcountinhibit adds df01af337f target/riscv: Remove CSRs that set/clear an IMSIC interrupt [...] adds 435774992e target/riscv: Update default priority table for local interrupts adds e8e86b484e Merge tag 'pull-riscv-to-apply-20220703-1' of github.com:ali [...] adds 8e72ceee5c Rename docs/specs/fw_cfg.txt to .rst adds 701caa3d6a Convert fw_cfg.rst to reStructuredText syntax adds 839a482695 ui/console: allow display device to be labeled with given id adds 8c0d80245f ui/cocoa: Fix clipboard text release adds ada270cd18 hw/usb/canokey: Fix CCID ZLP adds 1042563027 hw/usb/canokey: fix compatibility of qemu-xhci adds 8607b5149e docs/system/devices/usb/canokey: remove limitations on qemu-xhci adds 927b968d1b hw: canokey: Remove HS support as not compliant to the spec adds dfe2382f06 Merge tag 'kraxel-20220704-pull-request' of https://gitlab.c [...] adds 070f735333 linux-user: Add LoongArch generic header files adds 9d5cd6587a linux-user: Add LoongArch signal support adds 3418fe25fa linux-user: Add LoongArch elf support adds 1f63019632 linux-user: Add LoongArch syscall support adds da8c70ea82 linux-user: Add LoongArch cpu_loop support adds 0caebb9160 scripts: add loongarch64 binfmt config adds fffca8f227 target/loongarch: remove badaddr from CPULoongArch adds 7d552f0e0a target/loongarch: Fix missing update CSR_BADV adds 7fe7eea6ff target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong e [...] adds 9bc92b5013 target/loongarch: remove unused include hw/loader.h adds 0093b9a5ee target/loongarch: Adjust functions and structure to support [...] adds d32688ecdb default-configs: Add loongarch linux-user support adds 227e73c986 target/loongarch: Update README adds 490c03ab11 hw/intc/loongarch_pch_msi: Fix msi vector convertion adds 4f2c65877c hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing [...] adds df11f3ea69 hw/rtc/ls7a_rtc: Fix timer call back function adds 53a5eb2e7a hw/rtc/ls7a_rtc: Remove unimplemented device in realized function adds e5c0367e2b hw/rtc/ls7a_rtc: Add reset function adds 6935f132e5 hw/rtc/ls7a_rtc: Fix rtc enable and disable function adds 582788c3fb hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_t [...] adds 59e52dcff7 hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors adds 4623367697 target/loongarch: Fix the meaning of ECFG reg's VS field adds eb1e9ff8bb target/loongarch: Add lock when writing timer clear reg adds 1437479e5e Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/q [...] No new revisions were added by this update. Summary of changes: bsd-user/bsd-file.h | 392 +++++++++- bsd-user/freebsd/os-syscall.c | 118 +++ configs/targets/loongarch64-linux-user.mak | 3 + docs/specs/{fw_cfg.txt => fw_cfg.rst} | 211 ++--- docs/specs/index.rst | 1 + docs/system/devices/canokey.rst | 10 - hw/intc/loongarch_pch_msi.c | 22 +- hw/loongarch/loongson3.c | 1 + hw/riscv/boot.c | 4 +- hw/rtc/ls7a_rtc.c | 131 ++-- hw/usb/canokey.c | 31 +- include/hw/intc/loongarch_pch_msi.h | 2 + include/ui/console.h | 1 + linux-user/elfload.c | 91 +++ linux-user/loongarch64/cpu_loop.c | 96 +++ linux-user/loongarch64/signal.c | 335 ++++++++ linux-user/loongarch64/sockbits.h | 11 + linux-user/loongarch64/syscall_nr.h | 312 ++++++++ linux-user/loongarch64/target_cpu.h | 34 + linux-user/loongarch64/target_elf.h | 12 + linux-user/loongarch64/target_errno_defs.h | 12 + linux-user/loongarch64/target_fcntl.h | 11 + linux-user/{arm => loongarch64}/target_prctl.h | 0 linux-user/loongarch64/target_resource.h | 11 + linux-user/loongarch64/target_signal.h | 13 + linux-user/loongarch64/target_structs.h | 11 + linux-user/loongarch64/target_syscall.h | 48 ++ linux-user/loongarch64/termbits.h | 11 + linux-user/syscall_defs.h | 6 +- scripts/gensyscalls.sh | 2 + scripts/qemu-binfmt-conf.sh | 6 +- target/loongarch/README | 39 +- target/loongarch/cpu.c | 38 +- target/loongarch/cpu.h | 8 +- target/loongarch/csr_helper.c | 2 + target/loongarch/gdbstub.c | 2 +- target/loongarch/helper.h | 2 + target/loongarch/insn_trans/trans_privileged.c.inc | 36 + target/loongarch/internals.h | 2 + target/loongarch/op_helper.c | 10 +- target/riscv/cpu.c | 17 +- target/riscv/cpu.h | 24 +- target/riscv/cpu_bits.h | 30 +- target/riscv/cpu_helper.c | 134 ++-- target/riscv/csr.c | 857 +++++++++++++-------- target/riscv/insn_trans/trans_privileged.c.inc | 4 + target/riscv/insn_trans/trans_rvh.c.inc | 2 + target/riscv/insn_trans/trans_rvi.c.inc | 10 +- target/riscv/machine.c | 25 + target/riscv/meson.build | 3 +- target/riscv/pmp.c | 3 + target/riscv/pmu.c | 32 + target/riscv/pmu.h | 28 + target/riscv/translate.c | 31 +- tests/tcg/riscv64/Makefile.softmmu-target | 21 + tests/tcg/riscv64/issue1060.S | 53 ++ tests/tcg/riscv64/semihost.ld | 21 + ui/cocoa.m | 4 +- ui/console.c | 41 +- 59 files changed, 2766 insertions(+), 662 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak rename docs/specs/{fw_cfg.txt => fw_cfg.rst} (58%) create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h copy linux-user/{arm => loongarch64}/target_prctl.h (100%) create mode 100644 linux-user/loongarch64/target_resource.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 target/riscv/pmu.c create mode 100644 target/riscv/pmu.h create mode 100644 tests/tcg/riscv64/Makefile.softmmu-target create mode 100644 tests/tcg/riscv64/issue1060.S create mode 100644 tests/tcg/riscv64/semihost.ld -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (bf11543eab0f -> 5408ba27e1de)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/linux. from bf11543eab0f Merge v5.15.51 adds f4a80ec8c51d tick/nohz: unexport __init-annotated tick_nohz_full_setup() adds edbaf6e5e93a x86, kvm: use proper ASM macros for kvm_vcpu_is_preempted adds 1cdcd496b7ca bcache: memset on stack variables in bch_btree_check() and [...] adds 71a218ca4fde xfs: use kmem_cache_free() for kmem_cache objects adds 0e84e17c16a3 xfs: punch out data fork delalloc blocks on COW writeback failure adds 40de647b2bab xfs: Fix the free logic of state in xfs_attr_node_hasname adds c4f376ba8be8 xfs: remove all COW fork extents when remounting readonly adds 4f0c91ab4c7d xfs: check sb_meta_uuid for dabuf buffer recovery adds 3465b167831e xfs: prevent UAF in xfs_log_item_in_current_chkpt adds ce6bfe55237e xfs: only bother with sync_filesystem during readonly remount adds ab0b6dc5e16b powerpc/ftrace: Remove ftrace init tramp once kernel init [...] adds b3679e8b5996 fs: add is_idmapped_mnt() helper adds 7bc23abcb414 fs: move mapping helpers adds 3374eb1b0afc fs: tweak fsuidgid_has_mapping() adds b20dcf603b8d fs: account for filesystem mappings adds 1c62e0186d94 docs: update mapping documentation adds f895d0ff47be fs: use low-level mapping helpers adds 7d0536a8fab7 fs: remove unused low-level mapping helpers adds 21c6c720be75 fs: port higher-level mapping helpers adds 968e66f8ff70 fs: add i_user_ns() helper adds 38753e9173a5 fs: support mapped mounts of mapped filesystems adds dc85bc24fbf1 fs: fix acl translation adds e8d4878dcd00 fs: account for group membership adds d52f1c588824 rtw88: 8821c: support RFE type4 wifi NIC adds 810962c79417 rtw88: rtw8821c: enable rfe 6 devices adds 5696f7983d5d net: mscc: ocelot: allow unregistered IP multicast floodin [...] adds ea512d540a55 io_uring: fix not locked access to fixed buf table adds 545aecd22961 Linux 5.15.52 adds 5408ba27e1de Merge v5.15.52 No new revisions were added by this update. Summary of changes: Documentation/filesystems/idmappings.rst | 72 -------- Makefile | 2 +- arch/powerpc/include/asm/ftrace.h | 4 +- arch/powerpc/kernel/trace/ftrace.c | 15 +- arch/powerpc/mm/mem.c | 2 + arch/x86/kernel/kvm.c | 2 +- drivers/md/bcache/btree.c | 1 + drivers/md/bcache/writeback.c | 1 + drivers/net/ethernet/mscc/ocelot.c | 8 +- drivers/net/wireless/realtek/rtw88/rtw8821c.c | 14 +- fs/attr.c | 26 ++- fs/cachefiles/bind.c | 2 +- fs/ecryptfs/main.c | 2 +- fs/io_uring.c | 28 +-- fs/ksmbd/smbacl.c | 19 +-- fs/ksmbd/smbacl.h | 5 +- fs/namespace.c | 53 ++++-- fs/nfsd/export.c | 2 +- fs/open.c | 8 +- fs/overlayfs/super.c | 2 +- fs/posix_acl.c | 27 ++- fs/proc_namespace.c | 2 +- fs/xattr.c | 6 +- fs/xfs/libxfs/xfs_attr.c | 17 +- fs/xfs/xfs_aops.c | 15 +- fs/xfs/xfs_buf_item_recover.c | 2 +- fs/xfs/xfs_extfree_item.c | 6 +- fs/xfs/xfs_inode.c | 8 +- fs/xfs/xfs_linux.h | 1 + fs/xfs/xfs_log_cil.c | 6 +- fs/xfs/xfs_super.c | 21 ++- fs/xfs/xfs_symlink.c | 4 +- include/linux/fs.h | 141 +++++----------- include/linux/mnt_idmapping.h | 234 ++++++++++++++++++++++++++ include/linux/posix_acl_xattr.h | 4 + kernel/time/tick-sched.c | 1 - security/commoncap.c | 15 +- 37 files changed, 490 insertions(+), 288 deletions(-) create mode 100644 include/linux/mnt_idmapping.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (92a3e1b5c9e7 -> f27672924e36)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project. from 92a3e1b5c9e7 [NFC] add --match-full-lines to the RUN line adds b6ef36a1c427 [AMDGPU] Update WMMA intrinsics with explicit f16 types adds 4a7822521277 [AMDGPU] Add WMMA clang builtins adds 9b994593cc2a [SCCP] Only handle unknown lattice values in resolvedUndefsIn() adds 6a57d8fba5b3 [mlir][vector] Untangle TransferWriteDistribution and avoi [...] adds b994d388aeb2 [mlir][SCF] Add a ParallelCombiningOpInterface to decouple [...] adds 9ac386495d3c [ConstExpr] Don't create insertvalue expressions adds b822efc7404b [FPEnv] Allow CompoundStmt to keep FP options adds 573c7e6b3c79 [lld-macho] Handle LOH_ARM64_ADRP_LDR linker optimization hints adds 758de0e931f4 [InstructionSimplify] handle denormal input for fcmp adds df417c372f31 [flang] Add correct number of args for wait adds 0401fd12d4aa Fix warning on unhandled enumeration value adds 6a9434bb9c88 [SCEV] pre-commit test case for D127835, NFC adds 3d477bbeee55 [LLDB] Xfail TestStepNoDebug.py AArch64/Windows adds de3fb0f29ecf [fix/build] bazel rule for ParallelCombiningOpInterface adds 0dd4fb0408ed [flang] Fix for broken/degenerate forall case adds dc34d8df4c48 Revert "[FPEnv] Allow CompoundStmt to keep FP options" adds ac511fd4392d [clangd] Also mark output arguments of array subscript exp [...] adds bacb56cdc593 [gn build] (manually) port cd2292ef824 (PseudoCXX) adds 12109a3b40e3 [gn build] (manually) port fe66aebd7551 (PseudoCLI) adds 8704cfc744bf [LV] Add test case for #56319. adds 36c9e9968aff [AMDGPU][GFX940][DOC][NFC] Update assembler syntax description adds 26708fa166d7 Revert rG057db2002bb3: [X86] combineAndnp - constant fold [...] adds 3a4d9b6a6856 [AMDGPU][GFX908][DOC][NFC] Update assembler syntax description adds 73b659ff55ea [lld-macho] Fix left shift of negative value UB adds 8c44bef11033 [flang] File omp_lib.f90 is not a standard intrinsic module adds afd9f422e459 [LV] Update test for #56319 to use interleave group. adds de690a643895 [VE][NFC] Correct comment adds 1514acb20f40 [reland] algorithm_test.cpp adds b66d02eaa043 Revert "[reland] algorithm_test.cpp" adds 583abd0e36ca [VPlan] Move addMetadata to VPTransformState (NFC). adds 14035d5147a2 Fix this C99 DR to be more robust adds 018a0dd5c88b [AArch64][SVE] Create AArch64ISD node for DUPQLANE128 adds 83fdf0c34e60 Ensure that the generic associations aren't redundant adds ac8dab8e09d8 Add some more expected warnings to this C99 DR test adds ab372cdd6ff4 [InstCombine] add code comment for icmp transform; NFC adds fabe91570547 [SimplifyLibCalls] Use inbounds GEP adds b15b1421bc9a [lldb/test] Don't use preexec_fn for launching inferiors adds 0dddf04caba5 [LV] Don't optimize exit cond during epilogue vectorization. adds 5c8021777c3a [IRBuilder] Move CreateNot() to fold API adds 21933b2f7f02 [IRBuilder] Move CreateNeg() to fold API adds 325e7e8b8742 [LLVM][LTO][LLD] Enable Profile Guided Layout (--call-grap [...] adds 2208342c9bd8 [AMDGPU][GlobalISel] Always use VGPR bank for G_FCMP adds 5166345f5041 [SVE][AArch64] Refine hasSVEArgsOrReturn adds ba1e04b9668b [ConstantRange] Fix sdiv() with one bit values (PR56333) adds 696bca9bb25a [NFC][OpenMP][CUDA] Remove unnecessary default label adds befa8cf087db Re-apply "Deferred Concept Instantiation Implementation"" adds dc6c1f181b8a [clangd][ObjC] Fix ObjC method definition completion adds 65d59b42658f [LoopDeletion] Fix deletion with unusual predecessor termi [...] adds c8bd3e7825a9 [SCEV] Remove unnecessary pointer handling in BuildConstan [...] adds c0ef1ffc9e2f [Build][NFC] Fixes for building on Windows with libc++ adds a322c104cb59 [pseudo] temporary fix for missing generated header after [...] adds 560e694d48a6 [AST] Don't assert instruction reads/writes memory (PR51333) adds 690db164226f [AArch64] Make nxv1i1 types a legal type for SVE. adds cc2a614796cb [MLIR][Linalg] Update filename to reflect implementation (NFC) adds 2750985a5ccb [NFC] Add a missing test for for clang-repl adds 3668d1264e2d Revert "[NFC] Add a missing test for for clang-repl" adds 38bcd483dd46 [OpenMP] Initial parsing and semantic support for 'paralle [...] adds f80a4321ef1b [llvm-objdump] -r: print non-SHF_ALLOC relocations for non [...] adds fdf1fda5a8c8 [libc][math] Improved ExhaustiveTest performance. adds c2fcaf84e5a3 [MLIR][Presburger] Simplex: refactor (symbolic)lex to supp [...] adds c4abef28a3bd [MLIR][Presburger] support symbolicLexMin for IntegerRelation adds b5e49cdea971 [LLD][COFF] Ignore /kernel flag adds 554aea52d79e [reland][Debuginfo][DWARF][NFC] Refactor DwarfStringPoolEntryRef. adds 0d68ff87d2b0 [InstCombine] Transform strrchr to memrchr for constant strings adds d8b22243c8e9 [InstCombine] Add tests in anticipation of D128939 (NFC) adds 372a26acfd26 [gn build] Port 554aea52d79e adds 6213dba19fc0 [CMake][Fuchsia] Use libunwind as the default unwinder adds f4145ddf5bed [GISel] Don't fold convergent instruction across CFG adds 291e3a85658e [compiler-rt] Update Fuchsia sanitizer sched_yield adds 6450daddd20a Test a few more C99 DRs adds 43dc31904951 [DirectX] add thread/group id DXIL operations. adds daeb2dcea098 [mlir][sparse] add more unittest cases to sparse dialect merger adds b764e58865ff Remove redundant code. [NFC] adds 6e8ec13d3f01 [MC][RISCV] Suppress R_RISCV_{ADD,SUB}32 in .apple_names . [...] adds c99827349927 [pseudo] Fix an out-of-bound issue in getReduceRules. adds 188582b7e0f3 [RISCV] Considering existing offset in the alignment when [...] adds 258c3aee54e1 Revert "Re-apply "Deferred Concept Instantiation Implement [...] adds f59c279b7255 [mlir] Fix usages of `run-reproducer`. adds 3d7aeb3c734e [gn build] Manually port 43dc3190 adds ab3630dd4186 [UpdateTestChecks][test] Remove stray ; before/after non-R [...] adds 48aa787ab3a4 [SLP][NFC]Add a test for logical and operands, requiring e [...] adds b7f4335d6a99 [mlir][tosa] Update TOSA transpose_conv2d to match spec adds bbcd8e5271f4 [pseudo] NFC, polish the fix of c99827349927a44334f2b04139 [...] adds 34073b5538b9 [SLP][NFC]Rework the test for logical and freeze, need som [...] adds b19cbda45a01 [flang][NFC] Add embox test with character adds 875ee0ed1c5a [mlir][sparse] Reducing computational complexity adds feb4b628ac09 [InstCombine] avoid 'tmp' usage in test files; NFC adds 9c8a39c67b59 [InstCombine] restrict select of bit-tests to constant shi [...] adds 5a65c5180e50 [bazel] Port 43dc3190, adding rules to generate dxil intrinsics adds bcd153485ebf [bazel] Fix invalid characters adds 0d3a2b4c6601 [Lex] Introduce `PPCallbacks::LexedFileChanged()` preproce [...] adds fd25a0aa41c0 [llvm-lto2] Remove unneeded cl::init(false). NFC adds 3a47037fcc3c [BOLT] Fix instrumentation problem with floating point adds 47e6f98f84ac [LowerMatrixMultiplication] Switch dummy values from undef [...] adds 3e701bcd2a6a attempt to fix aarch64 build bot adds 7c4f45f87a94 Revert [LowerMatrixMultiplication] Switch dummy values fro [...] adds f2fa4f97591a [sanitizer] Update dn_expand interceptor for glibc 2.34 adds 94c7b89fe5b0 [libc++][ranges] Implement `ranges::stable_sort`. adds 17c811956464 [gn build] Port 94c7b89fe5b0 adds 927156a67445 Generate the capture for the field when the field is used [...] adds 228c8f9cc0b2 [ObjectYAML] Add offloading binary implementations for obj [...] adds d2d8b0aa4f80 [llvm-objdump] Add support for dumping embedded offloading data adds 9c4d301dddfc [gn build] Port 228c8f9cc0b2 adds 0dbf0ba033f6 [gn build] Port d2d8b0aa4f80 adds 8590a35ef900 [RISCV][NFC] Simplify condition of IsTU. adds 537db49596f6 [mlir][sparse] Silencing some -Wunused-function in unittests adds cc55d97cebf2 [clang-format] Run dump_format_style.py for LK_Verilog adds b52d33e6de55 [OpenMP][NFC] Reuse check lines for Clang/OpenMP tests adds 07766f407030 [Attributor] Move heap2stack allocas to the entry block if [...] adds 5744b9cb7998 [RISCV] Restore "Enable shrink wrap by default" adds ccf7dd5e813d [llvm-objdump] Ensure offloading sections have proper alignment adds 40d2ef841b68 [clang-format][NFC] Replace an EXPECT_EQ with a verifyFormat adds 68050c235432 Revert "[CMake][Fuchsia] Use libunwind as the default unwinder" adds 9ac548e1181c [RISCV] isel (add (and X, 0xFFFFFFFE), Y) as (SH1ADD (SRLI [...] adds b2e9684fe4d1 [RISCV] isel (shl (and X, C2), C) -> (slli (srliw X, C3), C3+C). adds 7fc4518f4a70 [MLIR] Rename FusePadOpWithLinalgConsumer -> FusePadOpWith [...] adds 23ee84f43201 [globalisel] Add test case for regbank selection. adds b0da3c6fa44b [VPlan] Move setDebugLocFromInst to VPTransformState (NFC). adds 5d787689b145 [RISCV] Match RISCVISD::ADD_LO in SelectAddrRegImm. adds 5148c685e3bb [mlir][complex] Inverse canonicalization between exp and log adds 7788b0c09754 [lsan] malloc_usable_size returns 0 for nullptr adds 7e4ab9d5b8b8 [RISCV] Add more SHXADD isel patterns. adds 1ecfc12b0c67 [Bazel] Make `builtin_headers_gen` as subset of CMake's `c [...] adds f7819ce166bc [FPEnv] Allow CompoundStmt to keep FP options adds 8679cbc29fb7 Reland "[NFC] Add a missing test for for clang-repl" adds 022bd92c78ed [LowerMatrixMultiplication] Switch dummy values from undef [...] adds 6956840b5c00 Revert "Reland "[NFC] Add a missing test for for clang-repl"" adds 0f45eaf0da1f [RISCV] Add a scavenge spill slot when use ADDI to compute [...] adds 53dc0f107877 [NFC] Switch a few uses of undef to poison as placeholders [...] adds d100a30a5406 [AArch64] Regenerate more tests. NFC adds d71a8bb157ea [MLIR][Affine] Allow affine-expr on RHS in IntegerSet adds 13d58ff9f373 [RISCV] Replace call to APInt::countTrailingZeros with uin [...] adds 2aea8af25136 [libc++] Make _LIBCPP_DEBUG_RANDOMIZE_RANGE a function adds e1f61d864214 [gn build] Port 2aea8af25136 adds c1c3134ac422 [InstCombine] add tests for and-of-negated-lowbitmask; NFC adds f9f40aa10d98 [InstCombine] fold negated low-bit-mask to cmp+select adds b1f0efc06acc [clang-format] Tweak help text a bit adds 134363208b92 [clang] Fix gcc-6 compilation error. (NFC) adds a65a3bffd31f [clang-tidy] Don't treat invalid branches as identical adds f7a80c3d08d4 [clang-tidy] Properly forward clang-tidy output when runni [...] adds 2c3784cff859 [SCEV] recognize llvm.annotation intrinsic adds e98e13ac8f38 [mlir][Vector] Fold ShuffleOp(SplatOp(X), SplatOp(X)) to S [...] adds d2a35e4d39fe [AIX] Handling the label alignment of a global variable wi [...] adds 93d6fdfc232c [Driver] Ignore the clang modules validation-related flags [...] adds 8eb4dcb73747 [RISCV] Move some SHXADD matching cases into a ComplexPatt [...] adds d36e09cfe591 [RISCV] Add more SHXADD patterns. adds 1063dfc02853 [mlir][openmp] Added omp.taskloop adds 7283f48a05de [IR] Remove support for insertvalue constant expression adds b4694229aa9d [LV] Simplify setDebugLocFromInst by using early exit (NFC). adds f0089fae1d7e [AArch64] Add additional tests for D120481. adds 7fbf55c927f2 [mlir][Tensor] Move ParallelInsertSlice to the tensor dialect adds 9604601c9394 [SimplifyCFG] Remove redundant checks for hoisting (NFCI) adds 4887d047a31f [libc++][NFC] Replace enable_if with __enable_if_t in a fe [...] adds 04f6bf482b86 Revise outdated parts of the developer policy. adds 5f0a054f8954 [pseudo] Remove duplicated code in ClangPseudo.cpp adds c9fb3c6ea6cc [mlir][Tensor] Update ParallelInsertSlicOp semantics to ma [...] adds f4dd977537dc [AST] Use canonical constraint declaration for ASTContext: [...] adds 42f5b0509ded [mlir][NFC] Fix various warnings generated by GCC 9 adds cce64e7a9cba [DAG] visitTRUNCATE - move GetDemandedBits AFTER SimplifyD [...] adds f90f0e8fe7f5 [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description adds bf89d24f5319 [AArch64] NFC: Move safe predicate casting to a separate f [...] adds 740633ff08ff [flang] Add TODO for derived types with final procedure adds 4905bcac00e6 [ConstantFolding] Check return value of ConstantFoldInstOp [...] adds 8e70258b18ba [AMDGPUCodeGenPrepare] Check result of ConstantFoldBinaryO [...] adds 19a1e20b8a0f [VectorCombine] Improve shuffle select shuffle-of-shuffles adds 25607d143d1d [libc++] Implement `std::ranges::merge` adds 3912928aa891 [gn build] Port 25607d143d1d adds 32a76fc292d9 [SCEVExpander] Avoid ConstantExpr::get() (NFCI) adds 93cbdaef0455 [Reassociate] Avoid ConstantExpr::get() adds 2de05afc192d [SLP] Peek into loads when hitting the RecursionMaxDepth adds 2ab260eecfab [llvm-ar][test] Add additional MRI script testing adds 4e6c30c8354f [libc] Add a separate algorithm_test. adds d7697c175db9 [flang] Avoid segfault when defining op is not a fir::Convert adds f93cd56262d1 [BPI] Avoid ConstantExpr::get() adds aa78c5298ea3 Fix MLIR Python CMake bug causing duplicate sources target. adds 644a965c1efe [LV] Vectorize cases with larger number of RT checks, exec [...] adds c06d0b4d02ea [RISCV] Add ADDI instr for computing FrameIndex address adds c146af3f469a [LoopVectorize][NFC] Reinstate TTICapture workaround for gcc-6 adds 8471c6861992 [LTO] Update remark test after 644a965c1efef6. adds 89cb8cae606b [Bitcode] Use bitcode input for test (NFC) adds abbd684c02c7 [InstCombine] Avoid ConstantExpr::get() in phi binop fold adds 10ebaf76860e [SLP] add test for load combining + shuffling; NFC adds fdf505f3f223 [mlir][OpenMP] omp.task translation to LLVM IR adds 2bfca3561466 [X86] Disable combineVectorSizedSetCCEquality for soft float. adds 5785717e18d5 [AArch64] Add support for insert/extract for nxv1i1 types. adds 2fde26dfcabe [mlir][Linalg][NFC] Make getReassociationMapForFoldingUnit [...] adds 9eb657278611 [LV] Add back CantReorderMemOps remark. adds c3839c0b46a9 CombineContractBroadcast should not create dims unused in LHS+RHS adds bc70ba814dc1 Use add_llvm_install_targets for install-llvmlibc adds b37dafd5dc83 [pseudo] Store shift and goto actions in a compact structu [...] adds 12d26ce9b0ec [flang] Make code more homogenous in CodeGen adds 47bdf53a5dba [clang-format] Break on AfterColon only if not followed by [...] adds 1ab37d996ce3 [clang-format] Update documentation adds 2a82c15f63d4 [LV] Consider runtime checks profitable if scalar cost is zero. adds 623250b51139 [X86] Regenerate fold-tied-op.ll test checks adds a4e2c1f76295 [Orc][LLJIT] Use JITLink on RISC-V adds b6178ccfe852 [OffloadPackager] Use appropriate kind for LTO bitcode adds 4276d00b1253 [InstCombine] add helper function for sub-of-min/max folds; NFC adds 8ef053273abf [InstCombine] add tests for sub of smin/smax; NFC adds 142aca7741d5 [InstCombine] fold sub of min/max of sub with common operand adds b2b4c8721db0 [InstCombine] Make use of low zero bits to determine exact [...] adds 063500afc0b8 [RISCV][NFC] Merge the isolated decleration into foreach. adds 98c6a3c0c220 [NFC][ASTImporter] remove the unnecessary condition checks [...] adds 85318d328102 [NFC] Remove unused test inputs adds 939352b6ec31 [RISCV][Clang] Teach RISCVEmitter to generate BitCast for [...] adds 5b4851ed9113 [LoongArch] Add codegen support for load/store operations adds b940fe6fe2af [LoongArch] Add codegen support for conditional branches adds 3610d5f5d4c2 [LoongArch] Add initial support for function calls adds 0c01f42fad41 [llvm-objcopy] -O binary: align sh_offset for section chan [...] new 3e01af093f92 [mlir] Add InferIntRangeInterface to gpu.launch new 2028fe6fbca6 [lld-macho] Handle LOH_ARM64_ADRP_LDR_GOT optimization hints new 4996e3f68315 [test] Check for more -fsanitize=array-bounds behavior new 66790b70ea14 [RISCV] Rename some variables for clarity. NFC new f27672924e36 [RISCV] Replace an explicit check with an assert. The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bolt/runtime/CMakeLists.txt | 3 +- bolt/test/runtime/X86/instrumentation-xmm.c | 25 + .../clang-tidy/bugprone/BranchCloneCheck.cpp | 11 + clang-tools-extra/clangd/CodeComplete.cpp | 2 +- clang-tools-extra/clangd/SemanticHighlighting.cpp | 9 +- .../clangd/unittests/CodeCompleteTests.cpp | 20 + .../clangd/unittests/SemanticHighlightingTests.cpp | 5 + clang-tools-extra/docs/ReleaseNotes.rst | 4 + .../pseudo/include/clang-pseudo/grammar/LRTable.h | 125 +- clang-tools-extra/pseudo/lib/GLR.cpp | 16 +- clang-tools-extra/pseudo/lib/cli/CMakeLists.txt | 4 + clang-tools-extra/pseudo/lib/grammar/LRTable.cpp | 65 +- .../pseudo/lib/grammar/LRTableBuild.cpp | 61 +- clang-tools-extra/pseudo/tool/ClangPseudo.cpp | 48 +- clang-tools-extra/pseudo/unittests/LRTableTest.cpp | 2 +- .../test/clang-tidy/check_clang_tidy.py | 10 +- .../bugprone/branch-clone-unknown-expr.cpp | 9 + .../test/pp-trace/pp-trace-include.cpp | 10 +- clang/docs/ClangFormat.rst | 84 +- clang/docs/ClangFormatStyleOptions.rst | 5 + clang/include/clang-c/Index.h | 8 +- clang/include/clang/AST/ASTImportError.h | 1 - clang/include/clang/AST/JSONNodeDumper.h | 2 + clang/include/clang/AST/RecursiveASTVisitor.h | 3 + clang/include/clang/AST/Stmt.h | 38 +- clang/include/clang/AST/StmtOpenMP.h | 68 + clang/include/clang/AST/TextNodeDumper.h | 1 + clang/include/clang/Basic/BuiltinsAMDGPU.def | 24 + clang/include/clang/Basic/LangOptions.h | 13 + clang/include/clang/Basic/StmtNodes.td | 1 + clang/include/clang/Basic/riscv_vector.td | 99 +- clang/include/clang/Lex/PPCallbacks.h | 31 +- clang/include/clang/Sema/ScopeInfo.h | 7 +- clang/include/clang/Sema/Sema.h | 12 + clang/include/clang/Serialization/ASTBitCodes.h | 1 + clang/include/clang/Support/RISCVVIntrinsicUtils.h | 2 + clang/lib/AST/ASTContext.cpp | 3 + clang/lib/AST/ASTImporter.cpp | 17 +- clang/lib/AST/Interp/ByteCodeExprGen.cpp | 2 +- clang/lib/AST/JSONNodeDumper.cpp | 15 + clang/lib/AST/Stmt.cpp | 24 +- clang/lib/AST/StmtOpenMP.cpp | 47 + clang/lib/AST/StmtPrinter.cpp | 68 + clang/lib/AST/StmtProfile.cpp | 5 + clang/lib/AST/TextNodeDumper.cpp | 6 + clang/lib/Analysis/BodyFarm.cpp | 3 +- clang/lib/Basic/LangOptions.cpp | 9 + clang/lib/Basic/OpenMPKinds.cpp | 5 + clang/lib/CodeGen/CGBuiltin.cpp | 63 + clang/lib/CodeGen/CGCoroutine.cpp | 4 +- clang/lib/CodeGen/CGStmt.cpp | 4 + clang/lib/CodeGen/ItaniumCXXABI.cpp | 4 +- clang/lib/Driver/ToolChains/Clang.cpp | 63 +- clang/lib/Format/ContinuationIndenter.cpp | 4 +- clang/lib/Format/Format.cpp | 25 +- clang/lib/Format/TokenAnnotator.cpp | 8 +- clang/lib/Frontend/DependencyFile.cpp | 29 +- clang/lib/Lex/PPLexerChange.cpp | 23 +- clang/lib/Parse/ParseOpenMP.cpp | 6 +- clang/lib/Sema/Sema.cpp | 3 +- clang/lib/Sema/SemaDeclCXX.cpp | 8 +- clang/lib/Sema/SemaExceptionSpec.cpp | 1 + clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaOpenMP.cpp | 300 +- clang/lib/Sema/SemaStmt.cpp | 11 +- clang/lib/Sema/TreeTransform.h | 26 +- clang/lib/Serialization/ASTReaderStmt.cpp | 21 +- clang/lib/Serialization/ASTWriterStmt.cpp | 9 + clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 1 + clang/test/AST/ast-dump-fpfeatures.cpp | 46 + clang/test/AST/ast-dump-pragma-json.c | 485 + clang/test/AST/ast-print-fp-pragmas.c | 69 + clang/test/Analysis/cfg-openmp.cpp | 24 + clang/test/C/drs/dr2xx.c | 72 +- clang/test/CodeGen/bounds-checking-fam.c | 45 +- clang/test/CodeGen/thinlto-distributed-newpm.ll | 2 +- .../test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl | 82 + .../test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl | 84 + clang/test/Driver/modules.m | 30 +- clang/test/Frontend/optimization-remark-options.c | 2 +- clang/test/Modules/Inputs/concept/A.cppm | 3 - clang/test/Modules/Inputs/concept/foo.h | 13 - clang/test/Modules/concept.cppm | 50 +- clang/test/OpenMP/cancel_codegen.cpp | 3828 +---- clang/test/OpenMP/cancellation_point_codegen.cpp | 632 +- .../test/OpenMP/default_firstprivate_ast_print.cpp | 75 +- clang/test/OpenMP/default_private_ast_print.cpp | 53 + clang/test/OpenMP/distribute_codegen.cpp | 6026 +------ .../OpenMP/distribute_firstprivate_codegen.cpp | 1664 +- .../test/OpenMP/distribute_lastprivate_codegen.cpp | 1732 +- .../OpenMP/distribute_parallel_for_codegen.cpp | 12235 +------------ ...istribute_parallel_for_firstprivate_codegen.cpp | 2380 +-- .../OpenMP/distribute_parallel_for_if_codegen.cpp | 9093 +--------- ...distribute_parallel_for_lastprivate_codegen.cpp | 2542 +-- ...distribute_parallel_for_num_threads_codegen.cpp | 4436 +---- .../distribute_parallel_for_private_codegen.cpp | 1714 +- .../distribute_parallel_for_proc_bind_codegen.cpp | 465 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 621 +- .../distribute_parallel_for_simd_codegen.cpp | 15247 +---------------- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 3106 +--- .../distribute_parallel_for_simd_if_codegen.cpp | 7282 +------- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 3520 +--- ...ibute_parallel_for_simd_num_threads_codegen.cpp | 6818 +------- ...istribute_parallel_for_simd_private_codegen.cpp | 2540 +-- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 614 +- clang/test/OpenMP/distribute_private_codegen.cpp | 1308 +- clang/test/OpenMP/distribute_simd_codegen.cpp | 10094 +---------- .../distribute_simd_firstprivate_codegen.cpp | 2368 +-- .../OpenMP/distribute_simd_lastprivate_codegen.cpp | 2668 +-- .../OpenMP/distribute_simd_private_codegen.cpp | 2212 +-- .../OpenMP/distribute_simd_reduction_codegen.cpp | 851 +- clang/test/OpenMP/for_firstprivate_codegen.cpp | 595 +- clang/test/OpenMP/for_lastprivate_codegen.cpp | 3762 +--- clang/test/OpenMP/for_linear_codegen.cpp | 655 +- clang/test/OpenMP/for_private_codegen.cpp | 491 +- clang/test/OpenMP/for_reduction_codegen.cpp | 3917 +---- clang/test/OpenMP/for_reduction_codegen_UDR.cpp | 3633 +--- clang/test/OpenMP/for_reduction_task_codegen.cpp | 530 +- .../master_taskloop_in_reduction_codegen.cpp | 679 +- .../master_taskloop_simd_in_reduction_codegen.cpp | 810 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 345 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 366 +- .../OpenMP/nvptx_multi_target_parallel_codegen.cpp | 80 +- .../test/OpenMP/nvptx_nested_parallel_codegen.cpp | 133 +- clang/test/OpenMP/nvptx_target_codegen.cpp | 397 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 436 +- .../nvptx_target_parallel_num_threads_codegen.cpp | 449 +- ...get_parallel_reduction_codegen_tbaa_PR46146.cpp | 2472 +-- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 167 +- .../nvptx_target_teams_distribute_codegen.cpp | 124 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 1536 +- ...istribute_parallel_for_generic_mode_codegen.cpp | 1200 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 1040 +- clang/test/OpenMP/ordered_codegen.cpp | 2852 +--- clang/test/OpenMP/parallel_copyin_codegen.cpp | 1015 +- .../test/OpenMP/parallel_firstprivate_codegen.cpp | 1390 +- clang/test/OpenMP/parallel_for_codegen.cpp | 2663 +-- .../parallel_for_lastprivate_conditional.cpp | 250 +- clang/test/OpenMP/parallel_for_linear_codegen.cpp | 322 +- .../OpenMP/parallel_for_reduction_task_codegen.cpp | 526 +- .../OpenMP/parallel_for_simd_aligned_codegen.cpp | 249 +- clang/test/OpenMP/parallel_if_codegen.cpp | 688 +- ...allel_masked_taskloop_simd_aligned_messages.cpp | 205 + .../parallel_masked_taskloop_simd_ast_print.cpp | 93 + ...llel_masked_taskloop_simd_collapse_messages.cpp | 99 + ...arallel_masked_taskloop_simd_final_messages.cpp | 94 + ..._masked_taskloop_simd_firstprivate_messages.cpp | 336 + ...lel_masked_taskloop_simd_grainsize_messages.cpp | 103 + ...l_masked_taskloop_simd_lastprivate_messages.cpp | 306 + ...rallel_masked_taskloop_simd_linear_messages.cpp | 269 + ...parallel_masked_taskloop_simd_loop_messages.cpp | 746 + ...lel_masked_taskloop_simd_num_tasks_messages.cpp | 103 + ...llel_masked_taskloop_simd_priority_messages.cpp | 97 + ...allel_masked_taskloop_simd_private_messages.cpp | 260 + ...lel_masked_taskloop_simd_reduction_messages.cpp | 362 + ...allel_masked_taskloop_simd_safelen_messages.cpp | 95 + ...allel_masked_taskloop_simd_simdlen_messages.cpp | 95 + clang/test/OpenMP/parallel_master_codegen.cpp | 354 +- .../parallel_master_reduction_task_codegen.cpp | 481 +- .../OpenMP/parallel_master_taskloop_codegen.cpp | 928 +- ...arallel_master_taskloop_lastprivate_codegen.cpp | 836 +- .../parallel_master_taskloop_simd_codegen.cpp | 902 +- ...el_master_taskloop_simd_lastprivate_codegen.cpp | 1236 +- clang/test/OpenMP/parallel_private_codegen.cpp | 415 +- clang/test/OpenMP/parallel_reduction_codegen.cpp | 1382 +- .../OpenMP/parallel_reduction_task_codegen.cpp | 472 +- clang/test/OpenMP/parallel_sections_codegen.cpp | 164 +- .../parallel_sections_reduction_task_codegen.cpp | 514 +- .../test/OpenMP/sections_firstprivate_codegen.cpp | 553 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 1332 +- clang/test/OpenMP/sections_private_codegen.cpp | 391 +- clang/test/OpenMP/sections_reduction_codegen.cpp | 814 +- .../OpenMP/sections_reduction_task_codegen.cpp | 518 +- clang/test/OpenMP/single_codegen.cpp | 976 +- clang/test/OpenMP/single_firstprivate_codegen.cpp | 484 +- clang/test/OpenMP/single_private_codegen.cpp | 318 +- .../test/OpenMP/target_codegen_global_capture.cpp | 1870 +- clang/test/OpenMP/target_map_codegen_03.cpp | 840 +- clang/test/OpenMP/target_parallel_codegen.cpp | 8463 +-------- clang/test/OpenMP/target_parallel_for_codegen.cpp | 11156 +----------- .../target_parallel_for_reduction_task_codegen.cpp | 539 +- .../OpenMP/target_parallel_for_simd_codegen.cpp | 15870 +---------------- clang/test/OpenMP/target_parallel_if_codegen.cpp | 4647 +---- .../OpenMP/target_parallel_num_threads_codegen.cpp | 3825 +---- .../target_parallel_reduction_task_codegen.cpp | 485 +- clang/test/OpenMP/target_teams_codegen.cpp | 11250 +----------- .../OpenMP/target_teams_distribute_codegen.cpp | 15129 +---------------- .../target_teams_distribute_collapse_codegen.cpp | 1157 +- ...rget_teams_distribute_dist_schedule_codegen.cpp | 2553 +-- ...arget_teams_distribute_firstprivate_codegen.cpp | 1827 +- ...target_teams_distribute_lastprivate_codegen.cpp | 1749 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 2134 +-- ...ms_distribute_parallel_for_collapse_codegen.cpp | 1709 +- ...stribute_parallel_for_dist_schedule_codegen.cpp | 4137 +---- ...istribute_parallel_for_firstprivate_codegen.cpp | 3909 +---- ...et_teams_distribute_parallel_for_if_codegen.cpp | 9282 +--------- ...distribute_parallel_for_lastprivate_codegen.cpp | 2609 +-- ...teams_distribute_parallel_for_order_codegen.cpp | 161 +- ...ams_distribute_parallel_for_private_codegen.cpp | 2703 +-- ...s_distribute_parallel_for_proc_bind_codegen.cpp | 465 +- ...s_distribute_parallel_for_reduction_codegen.cpp | 1391 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 934 +- ...ms_distribute_parallel_for_schedule_codegen.cpp | 13434 +-------------- ..._teams_distribute_parallel_for_simd_codegen.cpp | 3357 +--- ...stribute_parallel_for_simd_collapse_codegen.cpp | 2393 +-- ...ute_parallel_for_simd_dist_schedule_codegen.cpp | 5337 +----- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 6265 +------ ...ams_distribute_parallel_for_simd_if_codegen.cpp | 7566 +-------- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 3571 +--- ...istribute_parallel_for_simd_private_codegen.cpp | 5395 +----- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 614 +- ...tribute_parallel_for_simd_reduction_codegen.cpp | 1677 +- ...stribute_parallel_for_simd_schedule_codegen.cpp | 15872 +---------------- .../target_teams_distribute_private_codegen.cpp | 1204 +- .../target_teams_distribute_reduction_codegen.cpp | 799 +- .../target_teams_distribute_simd_codegen.cpp | 16988 +------------------ ...rget_teams_distribute_simd_collapse_codegen.cpp | 1773 +- ...teams_distribute_simd_dist_schedule_codegen.cpp | 3583 +--- ..._teams_distribute_simd_firstprivate_codegen.cpp | 2648 +-- ...t_teams_distribute_simd_lastprivate_codegen.cpp | 2665 +-- ...arget_teams_distribute_simd_private_codegen.cpp | 2139 +-- ...get_teams_distribute_simd_reduction_codegen.cpp | 1050 +- clang/test/OpenMP/target_teams_map_codegen.cpp | 3047 +--- .../test/OpenMP/target_teams_num_teams_codegen.cpp | 3825 +---- .../OpenMP/target_teams_thread_limit_codegen.cpp | 3972 +---- clang/test/OpenMP/task_if_codegen.cpp | 1857 +- clang/test/OpenMP/task_in_reduction_codegen.cpp | 673 +- clang/test/OpenMP/task_member_call_codegen.cpp | 151 +- clang/test/OpenMP/taskgroup_codegen.cpp | 74 +- .../test/OpenMP/taskloop_in_reduction_codegen.cpp | 672 +- .../OpenMP/taskloop_simd_in_reduction_codegen.cpp | 803 +- clang/test/OpenMP/teams_codegen.cpp | 1956 +-- clang/test/OpenMP/teams_distribute_codegen.cpp | 2094 +-- .../OpenMP/teams_distribute_collapse_codegen.cpp | 1141 +- .../teams_distribute_dist_schedule_codegen.cpp | 2499 +-- .../teams_distribute_firstprivate_codegen.cpp | 1831 +- .../teams_distribute_lastprivate_codegen.cpp | 1714 +- .../teams_distribute_parallel_for_codegen.cpp | 3184 +--- ...ms_distribute_parallel_for_collapse_codegen.cpp | 1677 +- ...eams_distribute_parallel_for_copyin_codegen.cpp | 1023 +- ...stribute_parallel_for_dist_schedule_codegen.cpp | 4089 +---- ...istribute_parallel_for_firstprivate_codegen.cpp | 2458 +-- .../teams_distribute_parallel_for_if_codegen.cpp | 9373 +--------- ...distribute_parallel_for_lastprivate_codegen.cpp | 2524 +-- ...distribute_parallel_for_num_threads_codegen.cpp | 2292 +-- ...ams_distribute_parallel_for_private_codegen.cpp | 1688 +- ...s_distribute_parallel_for_proc_bind_codegen.cpp | 465 +- ...s_distribute_parallel_for_reduction_codegen.cpp | 1407 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 939 +- ...ms_distribute_parallel_for_schedule_codegen.cpp | 13274 +-------------- .../teams_distribute_parallel_for_simd_codegen.cpp | 4552 +---- ...stribute_parallel_for_simd_collapse_codegen.cpp | 2361 +-- ...ute_parallel_for_simd_dist_schedule_codegen.cpp | 5289 +----- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 3320 +--- ...ams_distribute_parallel_for_simd_if_codegen.cpp | 7462 +------- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 3494 +--- ...ibute_parallel_for_simd_num_threads_codegen.cpp | 3513 +--- ...istribute_parallel_for_simd_private_codegen.cpp | 2658 +-- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 614 +- ...tribute_parallel_for_simd_reduction_codegen.cpp | 1693 +- ...stribute_parallel_for_simd_schedule_codegen.cpp | 15712 +---------------- .../OpenMP/teams_distribute_private_codegen.cpp | 1209 +- .../OpenMP/teams_distribute_reduction_codegen.cpp | 815 +- .../test/OpenMP/teams_distribute_simd_codegen.cpp | 4987 +----- .../teams_distribute_simd_collapse_codegen.cpp | 1757 +- ...teams_distribute_simd_dist_schedule_codegen.cpp | 3529 +--- .../teams_distribute_simd_firstprivate_codegen.cpp | 2656 +-- .../teams_distribute_simd_lastprivate_codegen.cpp | 2638 +-- .../teams_distribute_simd_private_codegen.cpp | 2144 +-- .../teams_distribute_simd_reduction_codegen.cpp | 1066 +- clang/test/OpenMP/teams_firstprivate_codegen.cpp | 2511 +-- clang/test/OpenMP/teams_private_codegen.cpp | 1342 +- clang/tools/clang-format/ClangFormat.cpp | 10 +- clang/tools/clang-offload-packager/CMakeLists.txt | 1 + .../ClangOffloadPackager.cpp | 9 +- clang/tools/libclang/CIndex.cpp | 9 + clang/tools/libclang/CXCursor.cpp | 3 + clang/unittests/Format/FormatTest.cpp | 30 +- clang/utils/TableGen/RISCVVEmitter.cpp | 10 + clang/www/c_dr_status.html | 16 +- compiler-rt/lib/lsan/lsan_allocator.cpp | 2 + .../sanitizer_common_interceptors.inc | 14 +- .../lib/sanitizer_common/sanitizer_fuchsia.cpp | 2 +- .../TestCases/Linux/malloc_usable_size.c | 21 + flang/lib/Lower/Bridge.cpp | 4 +- flang/lib/Lower/ConvertExpr.cpp | 5 +- flang/lib/Lower/ConvertType.cpp | 4 + flang/lib/Lower/IO.cpp | 5 + flang/lib/Optimizer/Builder/FIRBuilder.cpp | 5 +- flang/lib/Optimizer/CodeGen/CodeGen.cpp | 49 +- flang/test/Fir/embox.fir | 23 + flang/test/Lower/extent_triplets.f90 | 11 + flang/test/Lower/io-statement-1.f90 | 2 +- libc/lib/CMakeLists.txt | 9 +- libc/test/src/math/exhaustive/exhaustive_test.cpp | 107 +- libc/test/src/math/exhaustive/exhaustive_test.h | 12 +- libc/test/src/math/exhaustive/exp2f_test.cpp | 24 +- libc/test/src/math/exhaustive/expf_test.cpp | 24 +- libc/test/src/math/exhaustive/expm1f_test.cpp | 24 +- libc/test/src/math/exhaustive/hypotf_test.cpp | 9 +- libc/test/src/math/exhaustive/log10f_test.cpp | 10 +- libc/test/src/math/exhaustive/log1pf_test.cpp | 9 +- libc/test/src/math/exhaustive/log2f_test.cpp | 8 +- libc/test/src/math/exhaustive/logf_test.cpp | 8 +- libc/test/src/string/memory_utils/CMakeLists.txt | 17 +- libcxx/benchmarks/CMakeLists.txt | 1 + .../algorithms/ranges_stable_sort.bench.cpp | 39 + libcxx/docs/Status/RangesAlgorithms.csv | 12 +- libcxx/include/CMakeLists.txt | 3 + libcxx/include/__algorithm/nth_element.h | 11 +- libcxx/include/__algorithm/partial_sort.h | 9 +- libcxx/include/__algorithm/ranges_merge.h | 142 + libcxx/include/__algorithm/ranges_sort.h | 3 +- .../{ranges_sort.h => ranges_stable_sort.h} | 31 +- libcxx/include/__algorithm/sort.h | 7 +- libcxx/include/__algorithm/stable_sort.h | 46 +- libcxx/include/__debug | 16 - libcxx/include/__debug_utils/randomize_range.h | 42 + libcxx/include/__hash_table | 16 +- libcxx/include/__mutex_base | 12 +- libcxx/include/__split_buffer | 26 +- libcxx/include/__tree | 32 +- libcxx/include/__tuple | 6 +- libcxx/include/algorithm | 34 +- libcxx/include/array | 7 +- libcxx/include/exception | 4 +- libcxx/include/forward_list | 42 +- libcxx/include/list | 16 +- libcxx/include/map | 52 +- libcxx/include/module.modulemap.in | 7 + libcxx/include/tuple | 16 +- libcxx/include/unordered_map | 12 +- ...ges_robust_against_copying_comparators.pass.cpp | 10 +- ...ges_robust_against_copying_projections.pass.cpp | 10 +- libcxx/test/libcxx/private_headers.verify.cpp | 3 + .../alg.sorting/alg.merge/ranges_merge.pass.cpp | 613 + .../stable.sort/ranges.stable.sort.pass.cpp | 269 + .../niebloid.compile.pass.cpp | 4 +- lld/COFF/Options.td | 1 + lld/MachO/Arch/ARM64.cpp | 126 +- lld/test/MachO/loh-adrp-ldr-got.s | 35 + lld/test/MachO/loh-adrp-ldr.s | 149 + .../Python/lldbsuite/test/lldbplatformutil.py | 14 +- lldb/packages/Python/lldbsuite/test/lldbtest.py | 1 - .../step-avoids-no-debug/TestStepNoDebug.py | 3 + .../lldb-server/attach-wait}/Makefile | 0 .../{ => attach-wait}/TestGdbRemoteAttachWait.py | 16 +- .../API/tools/lldb-server/attach-wait/main.cpp | 8 + .../API/tools/lldb-server/attach-wait/shim.cpp | 9 + llvm/bindings/go/llvm/ir.go | 10 - llvm/bindings/ocaml/llvm/llvm.ml | 2 - llvm/bindings/ocaml/llvm/llvm.mli | 5 - llvm/bindings/ocaml/llvm/llvm_ocaml.c | 17 - llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst | 764 +- llvm/docs/AMDGPU/AMDGPUAsmGFX908.rst | 173 +- llvm/docs/AMDGPU/AMDGPUAsmGFX940.rst | 186 +- llvm/docs/AMDGPU/gfx10_hwreg.rst | 42 +- .../AMDGPU/{gfx10_opt.rst => gfx10_opt_0d447d.rst} | 4 +- .../{gfx908_opt.rst => gfx10_opt_847aed.rst} | 2 +- ...soffset_c40a5a.rst => gfx10_soffset_73dae7.rst} | 6 +- ...soffset_59fade.rst => gfx10_soffset_d01a5c.rst} | 6 +- .../{gfx908_vdata_1.rst => gfx10_vdata_0aba12.rst} | 4 +- ...x10_vdata_c61803.rst => gfx10_vdata_16d321.rst} | 4 +- ...x10_vdata_325b78.rst => gfx10_vdata_35851e.rst} | 6 +- ...x10_vdata_87fb90.rst => gfx10_vdata_890652.rst} | 4 +- ...x10_vdata_4d8ecf.rst => gfx10_vdata_a9ff5a.rst} | 6 +- llvm/docs/AMDGPU/gfx10_vdata_b2a787.rst | 21 - ...gfx10_vdst_48d3a8.rst => gfx10_vdst_2ea017.rst} | 6 +- .../{gfx908_vdst.rst => gfx10_vdst_322561.rst} | 6 +- ...gfx10_vdst_5d50a1.rst => gfx10_vdst_709347.rst} | 4 +- llvm/docs/AMDGPU/gfx10_vdst_719833.rst | 21 - ...gfx10_vdst_a49b76.rst => gfx10_vdst_81a6ed.rst} | 4 +- ...gfx10_vdst_d7c57e.rst => gfx10_vdst_d71f1c.rst} | 4 +- ...gfx10_vdst_f47754.rst => gfx10_vdst_dd8a32.rst} | 4 +- llvm/docs/AMDGPU/gfx908_dst.rst | 13 - .../AMDGPU/{gfx908_m_1.rst => gfx908_m_254bcb.rst} | 2 +- .../AMDGPU/{gfx908_m.rst => gfx908_m_f5d306.rst} | 2 +- llvm/docs/AMDGPU/gfx908_saddr.rst | 2 +- .../{gfx908_src_2.rst => gfx908_src_4e78e6.rst} | 2 +- .../{gfx908_src_3.rst => gfx908_src_58d119.rst} | 2 +- .../{gfx908_src.rst => gfx908_src_73ab34.rst} | 2 +- .../{gfx908_src_4.rst => gfx908_src_955b45.rst} | 2 +- .../{gfx908_src_1.rst => gfx908_src_d578c4.rst} | 2 +- .../{gfx908_src_5.rst => gfx908_src_d95796.rst} | 2 +- llvm/docs/AMDGPU/gfx908_vaddr.rst | 20 - llvm/docs/AMDGPU/gfx908_vaddr_0212e3.rst | 20 + ...{gfx908_vaddr_1.rst => gfx908_vaddr_b73dc0.rst} | 2 +- .../{gfx908_vdata.rst => gfx908_vdata_6802ce.rst} | 2 +- .../{gfx908_vdata.rst => gfx908_vdata_fe1edf.rst} | 4 +- .../{gfx908_vdst_4.rst => gfx908_vdst_0c4ef8.rst} | 2 +- .../{gfx908_vdst_5.rst => gfx908_vdst_2c8d1e.rst} | 2 +- .../{gfx908_vdst_2.rst => gfx908_vdst_78dd0a.rst} | 2 +- .../{gfx908_vdst_1.rst => gfx908_vdst_89680f.rst} | 2 +- .../{gfx908_vdst_3.rst => gfx908_vdst_bcee7a.rst} | 2 +- .../{gfx908_vsrc_6.rst => gfx908_vsrc_036abe.rst} | 2 +- .../{gfx908_vsrc_1.rst => gfx908_vsrc_1027ca.rst} | 2 +- .../{gfx908_vsrc_5.rst => gfx908_vsrc_2d4632.rst} | 2 +- .../{gfx908_vsrc.rst => gfx908_vsrc_6802ce.rst} | 2 +- .../{gfx908_vsrc_2.rst => gfx908_vsrc_9ad749.rst} | 2 +- .../{gfx908_vsrc_4.rst => gfx908_vsrc_be4895.rst} | 2 +- .../{gfx908_vsrc_3.rst => gfx908_vsrc_f3d248.rst} | 2 +- ...offset_7b8c50.rst => gfx940_soffset_8a17c8.rst} | 6 +- ...offset_f33c5c.rst => gfx940_soffset_ba92ce.rst} | 6 +- llvm/docs/AMDGPU/gfx940_vdst_08b5ba.rst | 17 - llvm/docs/AMDGPU/gfx940_vdst_0c37de.rst | 17 - llvm/docs/AMDGPU/gfx940_vdst_63b743.rst | 17 - llvm/docs/AMDGPU/gfx940_vdst_c3d63a.rst | 17 - llvm/docs/DeveloperPolicy.rst | 38 +- llvm/docs/LangRef.rst | 16 +- llvm/docs/ReleaseNotes.rst | 2 + llvm/include/llvm-c/Core.h | 3 - llvm/include/llvm/Analysis/ConstantFolding.h | 23 +- .../include/llvm/Analysis/IRSimilarityIdentifier.h | 2 +- llvm/include/llvm/Analysis/InstSimplifyFolder.h | 7 - llvm/include/llvm/Analysis/TargetFolder.h | 9 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 7 +- llvm/include/llvm/CodeGen/DwarfStringPoolEntry.h | 86 +- llvm/include/llvm/Frontend/OpenMP/OMP.td | 31 + llvm/include/llvm/IR/CMakeLists.txt | 1 + llvm/include/llvm/IR/ConstantFolder.h | 11 +- llvm/include/llvm/IR/Constants.h | 11 - llvm/include/llvm/IR/IRBuilder.h | 16 +- llvm/include/llvm/IR/IRBuilderFolder.h | 3 - llvm/include/llvm/IR/Intrinsics.td | 1 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 8 +- llvm/include/llvm/IR/IntrinsicsDirectX.td | 20 + llvm/include/llvm/IR/NoFolder.h | 13 - llvm/include/llvm/Object/OffloadBinary.h | 2 +- llvm/include/llvm/ObjectYAML/ObjectYAML.h | 2 + llvm/include/llvm/ObjectYAML/OffloadYAML.h | 79 + llvm/include/llvm/ObjectYAML/yaml2obj.h | 5 + llvm/include/llvm/Support/RWMutex.h | 4 +- llvm/include/llvm/Transforms/Utils/BuildLibCalls.h | 4 + .../Vectorize/LoopVectorizationLegality.h | 7 - llvm/lib/Analysis/AliasSetTracker.cpp | 4 +- llvm/lib/Analysis/BranchProbabilityInfo.cpp | 6 +- llvm/lib/Analysis/ConstantFolding.cpp | 114 +- llvm/lib/Analysis/InstructionSimplify.cpp | 3 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 6 +- llvm/lib/Analysis/ScalarEvolution.cpp | 80 +- llvm/lib/AsmParser/LLParser.cpp | 28 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 3 - llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 91 +- .../lib/CodeGen/GlobalISel/InstructionSelector.cpp | 4 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 24 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 18 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 9 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 5 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 8 +- llvm/lib/IR/AsmWriter.cpp | 4 - llvm/lib/IR/ConstantRange.cpp | 5 +- llvm/lib/IR/Constants.cpp | 44 +- llvm/lib/IR/ConstantsContext.h | 60 +- llvm/lib/IR/Core.cpp | 12 - llvm/lib/IR/Function.cpp | 1 + llvm/lib/ObjCopy/ELF/ELFObject.cpp | 7 +- llvm/lib/Object/OffloadBinary.cpp | 5 + llvm/lib/ObjectYAML/CMakeLists.txt | 2 + llvm/lib/ObjectYAML/ObjectYAML.cpp | 3 + llvm/lib/ObjectYAML/OffloadEmitter.cpp | 68 + llvm/lib/ObjectYAML/OffloadYAML.cpp | 78 + llvm/lib/ObjectYAML/yaml2obj.cpp | 2 + llvm/lib/Passes/PassBuilderPipelines.cpp | 9 +- llvm/lib/Support/NativeFormatting.cpp | 4 + llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 2 +- .../lib/Target/AArch64/AArch64CallingConvention.td | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 135 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 6 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 1 + .../Target/AArch64/AArch64MachineFunctionInfo.h | 7 + llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 10 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.h | 2 - llvm/lib/Target/AArch64/AArch64RegisterInfo.td | 2 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 78 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 19 + llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 15 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 34 +- llvm/lib/Target/DirectX/DXIL.td | 39 +- llvm/lib/Target/DirectX/DXILOpLowering.cpp | 1 + llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h | 4 + .../Target/LoongArch/LoongArchFloat32InstrInfo.td | 8 + .../Target/LoongArch/LoongArchFloat64InstrInfo.td | 8 + llvm/lib/Target/LoongArch/LoongArchFrameLowering.h | 6 + .../lib/Target/LoongArch/LoongArchISelLowering.cpp | 154 + llvm/lib/Target/LoongArch/LoongArchISelLowering.h | 4 + llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp | 70 +- llvm/lib/Target/LoongArch/LoongArchInstrInfo.h | 10 + llvm/lib/Target/LoongArch/LoongArchInstrInfo.td | 143 +- llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp | 24 +- .../lib/Target/LoongArch/LoongArchRegisterInfo.cpp | 24 +- llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp | 4 - llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 45 +- .../Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | 6 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 73 +- llvm/lib/Target/RISCV/RISCVFrameLowering.h | 2 + llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 219 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 12 +- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 6 +- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 5 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 - llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 9 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 36 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 23 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 2 +- llvm/lib/Target/VE/VEISelLowering.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 23 +- llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 18 +- llvm/lib/Transforms/IPO/MergeFunctions.cpp | 2 +- llvm/lib/Transforms/IPO/PruneEH.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 78 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 + .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 9 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 2 + .../Transforms/InstCombine/InstCombineSelect.cpp | 10 + .../InstCombine/InstructionCombining.cpp | 8 +- llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 2 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 28 +- llvm/lib/Transforms/Scalar/Reassociate.cpp | 21 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 4 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 10 + llvm/lib/Transforms/Utils/LoopUtils.cpp | 14 +- llvm/lib/Transforms/Utils/SCCPSolver.cpp | 6 +- .../Transforms/Utils/ScalarEvolutionExpander.cpp | 3 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 5 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 61 +- .../Vectorize/LoopVectorizationLegality.cpp | 1 - .../Vectorize/LoopVectorizationPlanner.h | 16 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 392 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 14 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 50 +- llvm/lib/Transforms/Vectorize/VPlan.h | 36 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 164 +- .../ScalarEvolution/annotation-intrinsics.ll | 28 + llvm/test/Assembler/insertextractvalue.ll | 28 - llvm/test/Assembler/insertvalue-invalid-type-1.ll | 7 - llvm/test/Assembler/unsupported-constexprs.ll | 17 +- .../Inputs/bitcode-parseconstant-delay-select.bc | Bin 0 -> 1420 bytes .../Bitcode/bitcode-parseconstant-delay-select.ll | 2 +- .../CodeGen/AArch64/global-merge-group-by-use.ll | 68 +- .../AArch64/sve-calling-convention-mixed.ll | 187 + .../CodeGen/AArch64/sve-extract-scalable-vector.ll | 360 + .../AArch64/sve-fix-length-and-combine-512.ll | 36 +- llvm/test/CodeGen/AArch64/sve-fp-reduce.ll | 323 +- llvm/test/CodeGen/AArch64/sve-insert-vector.ll | 668 + llvm/test/CodeGen/AArch64/sve-select.ll | 3 + llvm/test/CodeGen/AArch64/sve-zeroinit.ll | 7 + llvm/test/CodeGen/AArch64/vector-gep.ll | 17 +- llvm/test/CodeGen/AArch64/vselect-ext.ll | 241 +- llvm/test/CodeGen/AArch64/win64_vararg.ll | 357 +- llvm/test/CodeGen/AArch64/win64_vararg_float.ll | 197 +- llvm/test/CodeGen/AArch64/win64_vararg_float_cc.ll | 221 +- .../AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll | 40 +- .../AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll | 40 +- .../AMDGPU/GlobalISel/regbankselect-fcmp.mir | 8 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll | 40 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll | 40 +- llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll | 60 +- llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll | 60 +- llvm/test/CodeGen/DirectX/comput_ids.ll | 51 + llvm/test/CodeGen/LoongArch/ir-instruction/br.ll | 358 + llvm/test/CodeGen/LoongArch/ir-instruction/call.ll | 79 + .../CodeGen/LoongArch/ir-instruction/indirectbr.ll | 30 + .../CodeGen/LoongArch/ir-instruction/load-store.ll | 368 + llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll | 79 + llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll | 74 + llvm/test/CodeGen/PowerPC/aix-alias.ll | 16 +- llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll | 66 +- llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 204 +- .../CodeGen/RISCV/double-stack-spill-restore.ll | 8 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 204 +- llvm/test/CodeGen/RISCV/frame-info.ll | 46 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 204 +- llvm/test/CodeGen/RISCV/rv32zbb.ll | 22 +- llvm/test/CodeGen/RISCV/rv64zba.ll | 205 + llvm/test/CodeGen/RISCV/rv64zbb.ll | 65 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 16 +- .../CodeGen/RISCV/rvv/addi-rvv-stack-object.mir | 60 + llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 98 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 62 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 162 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 24 - llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 12 - llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 24 - .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 16 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 111 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 301 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 148 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 36 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 5 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 10 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 24 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 112 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 122 +- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 32 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 24 +- .../RISCV/rvv/fixed-vectors-setcc-int-vp.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 16 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 8 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 8 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/masked-tama.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 19 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir | 22 +- llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll | 40 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 7 +- llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vaadd.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vaaddu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vadd.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vasub.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vasubu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 8 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmul.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulh.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulhu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrsub.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsub.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 16 +- llvm/test/CodeGen/RISCV/shrinkwrap.ll | 41 +- .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 74 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 4 +- llvm/test/CodeGen/X86/combine-udiv.ll | 25 +- llvm/test/CodeGen/X86/fold-tied-op.ll | 119 +- .../CodeGen/X86/insert-into-constant-vector.ll | 10 +- llvm/test/CodeGen/X86/nonconst-static-iv.ll | 8 - llvm/test/CodeGen/X86/pr56351.ll | 18 + llvm/test/DebugInfo/AArch64/debug-reg-bank.ll | 43 + llvm/test/DebugInfo/X86/debug-reg-bank.ll | 43 + llvm/test/LTO/X86/diagnostic-handler-remarks.ll | 4 +- llvm/test/MC/RISCV/riscv64-64b-pcrel.s | 10 +- llvm/test/Object/dynamic-reloc.test | 12 - llvm/test/ObjectYAML/Offload/binary.yaml | 25 + llvm/test/ObjectYAML/Offload/default.yaml | 11 + .../test/ObjectYAML/Offload/enumeration_kinds.yaml | 40 + .../ObjectYAML/Offload/malformed-entry-size.yaml | 15 + llvm/test/ObjectYAML/Offload/malformed-offset.yaml | 15 + llvm/test/ObjectYAML/Offload/malformed-size.yaml | 15 + .../test/ObjectYAML/Offload/malformed-version.yaml | 15 + llvm/test/ObjectYAML/Offload/multiple_members.yaml | 43 + llvm/test/Other/new-pm-defaults.ll | 2 +- llvm/test/Other/new-pm-lto-defaults.ll | 1 + llvm/test/Other/new-pm-thinlto-defaults.ll | 2 +- .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 2 +- .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 2 +- .../Transforms/Attributor/heap_to_stack_gpu.ll | 29 + .../Attributor/value-simplify-pointer-info.ll | 10 +- .../dfa-jump-threading-transform.ll | 4 +- .../DFAJumpThreading/dfa-unfold-select.ll | 6 +- llvm/test/Transforms/InstCombine/and.ll | 60 + llvm/test/Transforms/InstCombine/memchr-11.ll | 117 + llvm/test/Transforms/InstCombine/memrchr-4.ll | 2 +- llvm/test/Transforms/InstCombine/memrchr-8.ll | 87 + llvm/test/Transforms/InstCombine/memset_chk-1.ll | 10 +- .../Transforms/InstCombine/sadd-with-overflow.ll | 2 +- .../Transforms/InstCombine/select-of-bittest.ll | 764 +- llvm/test/Transforms/InstCombine/sitofp.ll | 31 +- llvm/test/Transforms/InstCombine/snprintf.ll | 12 +- llvm/test/Transforms/InstCombine/sprintf-1.ll | 2 +- .../Transforms/InstCombine/ssub-with-overflow.ll | 2 +- llvm/test/Transforms/InstCombine/strcall-no-nul.ll | 2 +- llvm/test/Transforms/InstCombine/strchr-1.ll | 2 +- llvm/test/Transforms/InstCombine/strchr-4.ll | 79 + llvm/test/Transforms/InstCombine/strncat-2.ll | 4 +- llvm/test/Transforms/InstCombine/strrchr-1.ll | 8 +- llvm/test/Transforms/InstCombine/strrchr-3.ll | 62 + llvm/test/Transforms/InstCombine/sub-minmax.ll | 145 +- .../Transforms/InstCombine/uadd-with-overflow.ll | 2 +- llvm/test/Transforms/InstCombine/with_overflow.ll | 30 +- .../InstSimplify/constant-fold-fp-denormal.ll | 22 +- llvm/test/Transforms/LICM/pr51333.ll | 31 + llvm/test/Transforms/LoopDeletion/pr56266.ll | 18 + .../AArch64/runtime-check-size-based-threshold.ll | 18 +- .../AArch64/sve-tail-folding-forced.ll | 2 +- .../AArch64/sve-tail-folding-unroll.ll | 4 +- .../LoopVectorize/AArch64/sve-tail-folding.ll | 22 +- .../Transforms/LoopVectorize/X86/gather_scatter.ll | 2 +- .../X86/pointer-runtime-checks-unprofitable.ll | 60 +- llvm/test/Transforms/LoopVectorize/X86/pr23997.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr42674.ll | 20 +- llvm/test/Transforms/LoopVectorize/X86/pr54634.ll | 2 +- ...xit-cond-optimization-epilogue-vectorization.ll | 83 + .../Transforms/LoopVectorize/X86/runtime-limit.ll | 22 +- .../bigger-expressions-double.ll | 12 +- .../multiply-right-transpose.ll | 4 +- .../LowerMatrixIntrinsics/propagate-backward.ll | 12 +- .../propagate-backwards-unsupported.ll | 18 +- .../LowerMatrixIntrinsics/propagate-forward.ll | 16 +- .../LowerMatrixIntrinsics/propagate-mixed-users.ll | 8 +- .../propagate-multiple-iterations.ll | 8 +- .../transpose-double-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-double.ll | 26 +- .../transpose-float-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-float.ll | 26 +- .../transpose-i32-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-i32.ll | 26 +- .../transpose-opts-iterator-invalidation.ll | 4 +- .../LowerMatrixIntrinsics/transpose-opts.ll | 12 +- .../MergeFunc/mergefunc-struct-return.ll | 2 +- llvm/test/Transforms/OpenMP/spmdization.ll | 8 +- llvm/test/Transforms/SCCP/PR26044.ll | 14 +- .../Transforms/SCCP/ipsccp-phi-one-pred-dead.ll | 12 +- .../Transforms/SLPVectorizer/AArch64/loadorder.ll | 151 +- .../X86/load-partial-vector-shuffle.ll | 73 + .../SLPVectorizer/X86/reduction-logical.ll | 28 + .../2010-06-26-MultipleReturnValues.ll | 6 +- .../Transforms/TailCallElim/accum_recursion.ll | 2 +- llvm/test/Transforms/TailCallElim/basic.ll | 2 +- .../VectorCombine/AArch64/select-shuffle.ll | 260 +- .../Transforms/WholeProgramDevirt/expand-check.ll | 2 +- .../Inputs/aarch64_function_name.ll | 4 +- .../Inputs/aarch64_function_name.ll.expected | 4 +- .../Inputs/amdgpu_function_name.ll | 4 +- .../Inputs/amdgpu_function_name.ll.expected | 4 +- .../Inputs/amdgpu_generated_funcs.ll | 2 +- .../amdgpu_generated_funcs.ll.generated.expected | 1 + .../amdgpu_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/arm_function_name.ll | 4 +- .../Inputs/arm_function_name.ll.expected | 4 +- .../Inputs/hexagon_function_name.ll | 4 +- .../Inputs/hexagon_function_name.ll.expected | 4 +- .../Inputs/hexagon_generated_funcs.ll | 2 +- .../hexagon_generated_funcs.ll.generated.expected | 1 + ...hexagon_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/lanai_function_name.ll | 4 +- .../Inputs/lanai_function_name.ll.expected | 4 +- .../Inputs/lanai_generated_funcs.ll | 2 +- .../lanai_generated_funcs.ll.generated.expected | 1 + .../lanai_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/mips_function_name.ll | 4 +- .../Inputs/mips_function_name.ll.expected | 4 +- .../Inputs/mips_generated_funcs.ll | 2 +- .../mips_generated_funcs.ll.generated.expected | 1 + .../mips_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/msp430_function_name.ll | 4 +- .../Inputs/msp430_function_name.ll.expected | 4 +- .../Inputs/msp430_generated_funcs.ll | 2 +- .../msp430_generated_funcs.ll.generated.expected | 1 + .../msp430_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/ppc_function_name.ll | 4 +- .../Inputs/ppc_function_name.ll.expected | 4 +- .../Inputs/ppc_generated_funcs.ll | 2 +- .../ppc_generated_funcs.ll.generated.expected | 1 + .../ppc_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/riscv_function_name.ll | 4 +- .../Inputs/riscv_function_name.ll.expected | 4 +- .../Inputs/sparc_function_name.ll | 4 +- .../Inputs/sparc_function_name.ll.expected | 4 +- .../Inputs/sparc_generated_funcs.ll | 2 +- .../sparc_generated_funcs.ll.generated.expected | 1 + .../sparc_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/systemz_function_name.ll | 4 +- .../Inputs/systemz_function_name.ll.expected | 4 +- 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mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 9 + mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td | 180 +- .../mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td | 2 +- mlir/include/mlir/Dialect/SCF/IR/SCF.h | 1 + mlir/include/mlir/Dialect/SCF/IR/SCFOps.td | 108 +- mlir/include/mlir/Dialect/Tensor/IR/Tensor.h | 1 + mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 149 + mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td | 5 +- mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td | 3 +- mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 1 + mlir/include/mlir/IR/AffineMap.h | 6 + mlir/include/mlir/Interfaces/CMakeLists.txt | 1 + .../mlir/Interfaces/ParallelCombiningOpInterface.h | 29 + .../Interfaces/ParallelCombiningOpInterface.td | 75 + mlir/lib/Analysis/Presburger/IntegerRelation.cpp | 17 +- mlir/lib/Analysis/Presburger/Simplex.cpp | 25 +- mlir/lib/Analysis/Presburger/Utils.cpp | 8 + mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 2 +- mlir/lib/Dialect/Complex/IR/ComplexOps.cpp | 28 + mlir/lib/Dialect/GPU/CMakeLists.txt | 2 + .../Dialect/GPU/IR/InferIntRangeInterfaceImpls.cpp | 97 + mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 2 +- .../lib/Dialect/Linalg/Transforms/DropUnitDims.cpp | 28 - ...rchange.cpp => FusePadOpWithLinalgProducer.cpp} | 6 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 28 + mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 55 +- mlir/lib/Dialect/SCF/IR/SCF.cpp | 150 +- .../SCF/Transforms/BufferizableOpInterfaceImpl.cpp | 242 +- .../SparseTensor/Transforms/Sparsification.cpp | 9 +- mlir/lib/Dialect/Tensor/IR/CMakeLists.txt | 1 + mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 256 +- .../Transforms/BufferizableOpInterfaceImpl.cpp | 244 + mlir/lib/Dialect/Tosa/IR/TosaOps.cpp | 21 +- .../Tosa/Transforms/TosaDecomposeTransposeConv.cpp | 28 +- mlir/lib/Dialect/Vector/IR/VectorOps.cpp | 37 +- .../Dialect/Vector/Transforms/VectorDistribute.cpp | 65 +- .../Dialect/Vector/Transforms/VectorTransforms.cpp | 21 +- mlir/lib/ExecutionEngine/OptUtils.cpp | 2 +- mlir/lib/ExecutionEngine/SparseTensorUtils.cpp | 2 +- mlir/lib/IR/AffineMap.cpp | 19 +- mlir/lib/Interfaces/CMakeLists.txt | 2 + .../Interfaces/ParallelCombiningOpInterface.cpp | 27 + mlir/lib/Parser/AffineParser.cpp | 44 +- .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 27 + mlir/test/Dialect/Complex/canonicalize.mlir | 20 + mlir/test/Dialect/GPU/int-range-interface.mlir | 128 + mlir/test/Dialect/OpenMP/invalid.mlir | 125 + mlir/test/Dialect/OpenMP/ops.mlir | 142 +- mlir/test/Dialect/SCF/canonicalize.mlir | 25 - .../SCF/foreach-thread-canonicalization.mlir | 50 +- mlir/test/Dialect/SCF/invalid.mlir | 8 +- .../one-shot-bufferize-tensor-copy-insertion.mlir | 4 +- mlir/test/Dialect/SCF/one-shot-bufferize.mlir | 6 +- mlir/test/Dialect/SCF/ops.mlir | 4 +- mlir/test/Dialect/Tensor/canonicalize.mlir | 27 + mlir/test/Dialect/Tosa/ops.mlir | 10 +- .../Tosa/tosa-decompose-transpose-conv.mlir | 25 +- mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir | 38 +- mlir/test/Dialect/Vector/canonicalize.mlir | 14 + mlir/test/Dialect/Vector/invalid.mlir | 2 +- .../Dialect/Vector/vector-reduce-to-contract.mlir | 35 + .../Dialect/Vector/vector-warp-distribute.mlir | 20 + mlir/test/IR/affine-set.mlir | 81 + mlir/test/IR/invalid.mlir | 18 +- mlir/test/Target/LLVMIR/openmp-llvm.mlir | 88 + .../Analysis/Presburger/IntegerPolyhedronTest.cpp | 78 +- .../Analysis/Presburger/IntegerRelationTest.cpp | 18 + mlir/unittests/Analysis/Presburger/Utils.h | 14 +- mlir/unittests/Dialect/SparseTensor/MergerTest.cpp | 456 +- mlir/utils/jupyter/mlir_opt_kernel/kernel.py | 2 - openmp/libomptarget/plugins/cuda/src/rtl.cpp | 4 - utils/bazel/llvm-project-overlay/clang/BUILD.bazel | 6 +- utils/bazel/llvm-project-overlay/llvm/BUILD.bazel | 4 + utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 43 + 986 files changed, 22919 insertions(+), 514894 deletions(-) create mode 100644 bolt/test/runtime/X86/instrumentation-xmm.c create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clon [...] create mode 100644 clang/test/AST/ast-dump-pragma-json.c create mode 100644 clang/test/AST/ast-print-fp-pragmas.c create mode 100644 clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl create mode 100644 clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl delete mode 100644 clang/test/Modules/Inputs/concept/A.cppm delete mode 100644 clang/test/Modules/Inputs/concept/foo.h create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_aligned_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_ast_print.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_collapse_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_final_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_firstprivate_me [...] create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_grainsize_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_lastprivate_mes [...] create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_linear_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_loop_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_num_tasks_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_priority_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_private_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_reduction_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_safelen_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_taskloop_simd_simdlen_messages.cpp create mode 100644 compiler-rt/test/sanitizer_common/TestCases/Linux/malloc_usable_size.c create mode 100644 flang/test/Lower/extent_triplets.f90 create mode 100644 libcxx/benchmarks/algorithms/ranges_stable_sort.bench.cpp create mode 100644 libcxx/include/__algorithm/ranges_merge.h copy libcxx/include/__algorithm/{ranges_sort.h => ranges_stable_sort.h} (70%) create mode 100644 libcxx/include/__debug_utils/randomize_range.h create mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.merge/ranges_merge.pass.cpp create mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/ran [...] create mode 100644 lld/test/MachO/loh-adrp-ldr-got.s create mode 100644 lld/test/MachO/loh-adrp-ldr.s copy lldb/test/API/{commands/command/script/import/rdar-12586188 => tools/lldb-ser [...] rename lldb/test/API/tools/lldb-server/{ => attach-wait}/TestGdbRemoteAttachWait.py (80%) create mode 100644 lldb/test/API/tools/lldb-server/attach-wait/main.cpp create mode 100644 lldb/test/API/tools/lldb-server/attach-wait/shim.cpp rename llvm/docs/AMDGPU/{gfx10_opt.rst => gfx10_opt_0d447d.rst} (83%) rename llvm/docs/AMDGPU/{gfx908_opt.rst => gfx10_opt_847aed.rst} (91%) rename llvm/docs/AMDGPU/{gfx10_soffset_c40a5a.rst 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create mode 100644 llvm/test/ObjectYAML/Offload/malformed-offset.yaml create mode 100644 llvm/test/ObjectYAML/Offload/malformed-size.yaml create mode 100644 llvm/test/ObjectYAML/Offload/malformed-version.yaml create mode 100644 llvm/test/ObjectYAML/Offload/multiple_members.yaml create mode 100644 llvm/test/Transforms/InstCombine/memchr-11.ll create mode 100644 llvm/test/Transforms/InstCombine/memrchr-8.ll create mode 100644 llvm/test/Transforms/InstCombine/strchr-4.ll create mode 100644 llvm/test/Transforms/InstCombine/strrchr-3.ll create mode 100644 llvm/test/Transforms/LICM/pr51333.ll create mode 100644 llvm/test/Transforms/LoopDeletion/pr56266.ll create mode 100644 llvm/test/Transforms/LoopVectorize/X86/pr56319-vector-exit-cond [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll create mode 100644 llvm/test/tools/llvm-objdump/ELF/relocations-in-nonreloc.test create mode 100644 llvm/test/tools/llvm-objdump/Offloading/Inputs/binary.yaml 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llvm/utils/gn/secondary/clang-tools-extra/pseudo/lib/cxx/BUILD.gn create mode 100644 mlir/include/mlir/Interfaces/ParallelCombiningOpInterface.h create mode 100644 mlir/include/mlir/Interfaces/ParallelCombiningOpInterface.td create mode 100644 mlir/lib/Dialect/GPU/IR/InferIntRangeInterfaceImpls.cpp rename mlir/lib/Dialect/Linalg/Transforms/{PadOpInterchange.cpp => FusePadOpWithLi [...] create mode 100644 mlir/lib/Interfaces/ParallelCombiningOpInterface.cpp create mode 100644 mlir/test/Dialect/GPU/int-range-interface.mlir create mode 100644 mlir/test/IR/affine-set.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (2899490953 -> c368d2a802)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/binutils-gdb. from 2899490953 Automatic date update in version.in adds 1dd024239b Add newline to the end of the rnglists displsy. adds c4de64f8f6 GDB/doc: Remove extraneous spaces from completion examples adds a89c17dac1 GDB/doc: Remove indentation from `print -elements' completio [...] adds f15f0ddd10 Automatic date update in version.in adds 47226049bb [gdb/testsuite] Fix gdb.base/early-init-file.exp with -fsani [...] adds 33fd0a3363 [gdb/symtab] Fix data race on per_cu->dwarf_version adds dcc9b683dc Automatic date update in version.in adds 1e3a4f12e7 Automatic date update in version.in adds 0f2f2e7019 RISC-V: Update Zihintpause extension version adds 9386188e95 x86-64: improve handling of branches to absolute addresses adds 02b83698ef x86: restore masking of displacement kinds adds a775efc84d x86: fold Disp32S and Disp32 adds 58098fd779 gas/testsuite: properly exclude aout in all/weakref1u adds 2c474c4694 [gdb/symtab] Add get/set functions for per_cu->lang/unit_type adds a0f3a4c646 opcodes/avr: Implement style support in the disassembler adds 407115429b Modified changes for split-dwarf and dwarf-5. adds d8efadbdd9 Synchronize libbierty sources with gcc. adds 0772daccb3 objcopy: bfd_alloc orelocation adds eeeaf705fe alloc gas seginfo on notes obstack adds 96c33f79de Fix snafu in rust demangler recursion limit code adds 10e52570b8 Automatic date update in version.in adds 8180707f90 x86: de-duplicate sub-architecture strings accumulation adds 6ceeed2506 x86: macro-ize cpu_arch[] entries adds c368d2a802 x86: introduce fake processor type to mark sub-arch entries [...] No new revisions were added by this update. Summary of changes: ChangeLog | 13 + bfd/elfxx-riscv.c | 2 +- bfd/version.h | 2 +- binutils/ChangeLog | 4 + binutils/bucomm.c | 13 + binutils/bucomm.h | 2 + binutils/dwarf.c | 13 +- binutils/objcopy.c | 37 +- gas/as.h | 1 + gas/config/tc-i386-intel.c | 9 +- gas/config/tc-i386.c | 625 +- gas/config/tc-i386.h | 8 +- gas/output-file.c | 42 +- gas/subsegs.c | 37 +- gas/testsuite/gas/all/weakref1u.d | 2 +- gas/testsuite/gas/i386/i386.exp | 1 + gas/testsuite/gas/i386/x86-64-branch-6.d | 21 + gas/testsuite/gas/i386/x86-64-branch-6.e | 7 + gas/testsuite/gas/i386/x86-64-branch-6.s | 18 + gdb/doc/gdb.texinfo | 13 +- gdb/dwarf2/cooked-index.c | 10 +- gdb/dwarf2/cu.c | 2 +- gdb/dwarf2/index-write.c | 2 +- gdb/dwarf2/read.c | 233 +- gdb/dwarf2/read.h | 59 +- gdb/testsuite/gdb.base/early-init-file.exp | 19 +- libiberty/ChangeLog | 146 +- libiberty/configure | 1 + libiberty/configure.ac | 1 + libiberty/rust-demangle.c | 47 +- opcodes/ChangeLog | 9 + opcodes/avr-dis.c | 51 +- opcodes/disassemble.c | 5 + opcodes/i386-gen.c | 10 +- opcodes/i386-init.h | 132 +- opcodes/i386-opc.h | 5 +- opcodes/i386-opc.tbl | 15 +- opcodes/i386-tbl.h | 25585 ++++++++++++++------------- 38 files changed, 13706 insertions(+), 13496 deletions(-) create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.d create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.e create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (cee18e8a -> b2fa4890)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards cee18e8a 0: update: binutils-llvm-linux-qemu: boot new b2fa4890 0: update: binutils-llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cee18e8a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1572 -> 1644 bytes 02-prepare_abe/console.log.xz | Bin 2740 -> 2740 bytes 03-build_abe-binutils/console.log.xz | Bin 30488 -> 30600 bytes 04-build_kernel_llvm/console.log.xz | Bin 64628 -> 64776 bytes 05-build_abe-qemu/console.log.xz | Bin 33376 -> 32876 bytes 06-build_linux/console.log.xz | Bin 4208 -> 3924 bytes 07-boot_linux/console.log.xz | Bin 504 -> 508 bytes 08-check_regression/console.log.xz | Bin 424 -> 412 bytes 09-update_baseline/console.log | 17 +++++++++-------- jenkins/manifest.sh | 22 +++++++++++----------- 10 files changed, 20 insertions(+), 19 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

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Tcwg-commits July 2022