Tcwg-commits July 2022

tcwg-commits@lists.linaro.org

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15101 discussions

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_gnu_cross_build updated (1dbccdc -> 70d187d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build in repository toolchain/ci/interesting-commits. from 1dbccdc Add last-good 05844d18f7893bf96965f163c428214fd5ebe10a from h [...] new 70d187d Add regression 7eae6a91e9b1670330c9f15730082c91c0b1d570 from [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: glibc | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_gnu_cross_build updated (259a6b3 -> 1dbccdc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build in repository toolchain/ci/interesting-commits. from 259a6b3 Add regression 10b502fb78351a4073b6682c026a92c82d3da6c5 from [...] new 1dbccdc Add last-good 05844d18f7893bf96965f163c428214fd5ebe10a from h [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: glibc | 1 + 1 file changed, 1 insertion(+) create mode 100644 glibc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (d495e432c0 -> d82423a697)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/qemu. from d495e432c0 Merge tag 'pull-aspeed-20220630' of https://github.com/legoa [...] adds af2ae2e8ac bsd-user: Implement mount, umount and nmount adds c7b62b4a87 bsd-user: Implement symlink, symlinkat, readlink and readlinkat adds 0db0db8f23 bsd-user: implement chmod, fchmod, lchmod and fchmodat adds 79cfae0c1b bsd-user: Implement freebsd11_mknod, freebsd11_mknodat and mknodat adds 58af3e295c bsd-user: Implement chown, fchown, lchown and fchownat adds c6f0a7d91a bsd-user: Implement chflags, lchflags and fchflags adds 17a4d13cea bsd-user: Implement chroot and flock adds 5fbd8011ff bsd-user: Implement mkfifo and mkfifoat adds d3f29ddacd bsd-user: Implement pathconf, lpathconf and fpathconf adds 952d5d30d6 bsd-user: Implement undelete adds 3f1b0235f6 bsd-user: Remove stray 'inline' from do_bsd_close adds ba45b82518 Merge tag 'bsd-user-syscall-2022q2b-pull-request' of ssh://g [...] adds 4e245a9e26 target/riscv: Remove condition guarding register zero for au [...] adds b97028b8c5 target/riscv: Set env->bins in gen_exception_illegal adds 5dacdbaeaf target/riscv: Remove generate_exception_mtval adds a9814e3e08 target/riscv: Minimize the calls to decode_save_opc adds 2e98339918 target/riscv/pmp: guard against PMP ranges with a negative size adds 562009e47c target/riscv: Fix PMU CSR predicate function adds a5a92fd6ef target/riscv: Implement PMU CSR predicate function for S-mode adds d3be1299fb target/riscv: pmu: Rename the counters extension to pmu adds 18d6d89efc target/riscv: pmu: Make number of counters configurable adds b1675eeb3e target/riscv: Implement mcountinhibit CSR adds 621f35bb2f target/riscv: Add support for hpmcounters/hpmevents adds 3780e33732 target/riscv: Support mcycle/minstret write operation adds b509caceaa target/riscv: Fixup MSECCFG minimum priv check adds be2265c776 target/riscv: Ibex: Support priv version 1.11 adds 188000952c target/riscv: Don't force update priv spec version to latest adds ec2c62dacc hw/riscv: boot: Reduce FDT address alignment constraints adds 598ca83706 target/riscv: Set minumum priv spec version for mcountinhibit adds df01af337f target/riscv: Remove CSRs that set/clear an IMSIC interrupt [...] adds 435774992e target/riscv: Update default priority table for local interrupts adds e8e86b484e Merge tag 'pull-riscv-to-apply-20220703-1' of github.com:ali [...] adds 8e72ceee5c Rename docs/specs/fw_cfg.txt to .rst adds 701caa3d6a Convert fw_cfg.rst to reStructuredText syntax adds 839a482695 ui/console: allow display device to be labeled with given id adds 8c0d80245f ui/cocoa: Fix clipboard text release adds ada270cd18 hw/usb/canokey: Fix CCID ZLP adds 1042563027 hw/usb/canokey: fix compatibility of qemu-xhci adds 8607b5149e docs/system/devices/usb/canokey: remove limitations on qemu-xhci adds 927b968d1b hw: canokey: Remove HS support as not compliant to the spec adds dfe2382f06 Merge tag 'kraxel-20220704-pull-request' of https://gitlab.c [...] adds 070f735333 linux-user: Add LoongArch generic header files adds 9d5cd6587a linux-user: Add LoongArch signal support adds 3418fe25fa linux-user: Add LoongArch elf support adds 1f63019632 linux-user: Add LoongArch syscall support adds da8c70ea82 linux-user: Add LoongArch cpu_loop support adds 0caebb9160 scripts: add loongarch64 binfmt config adds fffca8f227 target/loongarch: remove badaddr from CPULoongArch adds 7d552f0e0a target/loongarch: Fix missing update CSR_BADV adds 7fe7eea6ff target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong e [...] adds 9bc92b5013 target/loongarch: remove unused include hw/loader.h adds 0093b9a5ee target/loongarch: Adjust functions and structure to support [...] adds d32688ecdb default-configs: Add loongarch linux-user support adds 227e73c986 target/loongarch: Update README adds 490c03ab11 hw/intc/loongarch_pch_msi: Fix msi vector convertion adds 4f2c65877c hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing [...] adds df11f3ea69 hw/rtc/ls7a_rtc: Fix timer call back function adds 53a5eb2e7a hw/rtc/ls7a_rtc: Remove unimplemented device in realized function adds e5c0367e2b hw/rtc/ls7a_rtc: Add reset function adds 6935f132e5 hw/rtc/ls7a_rtc: Fix rtc enable and disable function adds 582788c3fb hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_t [...] adds 59e52dcff7 hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors adds 4623367697 target/loongarch: Fix the meaning of ECFG reg's VS field adds eb1e9ff8bb target/loongarch: Add lock when writing timer clear reg adds 1437479e5e Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/q [...] adds c1ca312a6f hw/rtc/ls7a_rtc: Drop unused inline functions adds 3517fb7267 target/loongarch: Clean up tlb when cpu reset adds f8d1ae8262 scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() adds 0df0a66555 tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER adds ddf9326184 hw/intc/loongarch_ipi: Fix ipi device access of 64bits adds bf7ce37f8f hw/intc/loongarch_ipi: Fix mail send and any send function adds 19361471b5 Merge tag 'pull-la-20220705' of https://gitlab.com/rth7680/q [...] new 9323af2e81 tests: fix test-cutils leaks new e0a2602070 tests/fp: Do not build softfloat3 tests if TCG is disabled new 94b731874a gitlab: normalize indentation in edk2/opensbi rules new 37a2b95231 gitlab: tweak comments in edk2/opensbi jobs new 6e131bf69b gitlab: honour QEMU_CI variable in edk2/opensbi jobs new 3a751770ee gitlab-ci: Extend timeout for ubuntu-20.04-s390x-all to 75m new 276dfd03f0 tests: wait max 120 seconds for migration test status changes new 8d4e897a99 tests: wait for migration completion before looking for STOP event new 6843ad8c03 tests: increase migration test converge downtime to 30 seconds new 886dfe9db3 tests: use consistent bandwidth/downtime limits in migration tests new 2116650254 disas: Remove libvixl disassembler new 6d17020a80 po: add ukrainian translation new 1ec8c2c01e meson.build: Require a recent version of libpng new 7a890b7566 include/qemu/host-utils: Remove unused code in the *_overflo [...] new d82423a697 Merge tag 'pull-request-2022-07-05' of https://gitlab.com/th [...] The 15 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml | 1 + .gitlab-ci.d/edk2.yml | 133 +- .gitlab-ci.d/opensbi.yml | 134 +- MAINTAINERS | 4 - bsd-user/bsd-file.h | 392 +- bsd-user/freebsd/os-syscall.c | 118 + configs/targets/loongarch64-linux-user.mak | 3 + disas.c | 3 - disas/arm-a64.cc | 101 - disas/libvixl/LICENCE | 30 - disas/libvixl/README | 11 - disas/libvixl/meson.build | 7 - disas/libvixl/vixl/a64/assembler-a64.h | 4624 -------------------- disas/libvixl/vixl/a64/constants-a64.h | 2116 --------- disas/libvixl/vixl/a64/cpu-a64.h | 83 - disas/libvixl/vixl/a64/decoder-a64.cc | 877 ---- disas/libvixl/vixl/a64/decoder-a64.h | 275 -- disas/libvixl/vixl/a64/disasm-a64.cc | 3495 --------------- disas/libvixl/vixl/a64/disasm-a64.h | 177 - disas/libvixl/vixl/a64/instructions-a64.cc | 622 --- disas/libvixl/vixl/a64/instructions-a64.h | 757 ---- disas/libvixl/vixl/code-buffer.h | 113 - disas/libvixl/vixl/compiler-intrinsics.cc | 144 - disas/libvixl/vixl/compiler-intrinsics.h | 155 - disas/libvixl/vixl/globals.h | 155 - disas/libvixl/vixl/invalset.h | 775 ---- disas/libvixl/vixl/platform.h | 39 - disas/libvixl/vixl/utils.cc | 142 - disas/libvixl/vixl/utils.h | 286 -- disas/meson.build | 5 - docs/specs/{fw_cfg.txt => fw_cfg.rst} | 211 +- docs/specs/index.rst | 1 + docs/system/devices/canokey.rst | 10 - hw/intc/loongarch_ipi.c | 92 +- hw/intc/loongarch_pch_msi.c | 22 +- hw/loongarch/loongson3.c | 6 +- hw/riscv/boot.c | 4 +- hw/rtc/ls7a_rtc.c | 154 +- hw/usb/canokey.c | 31 +- include/exec/poison.h | 2 - include/hw/intc/loongarch_ipi.h | 7 +- include/hw/intc/loongarch_pch_msi.h | 2 + include/qemu/host-utils.h | 65 - include/ui/console.h | 1 + linux-user/elfload.c | 91 + linux-user/loongarch64/cpu_loop.c | 96 + linux-user/loongarch64/signal.c | 335 ++ linux-user/loongarch64/sockbits.h | 11 + linux-user/loongarch64/syscall_nr.h | 312 ++ linux-user/loongarch64/target_cpu.h | 34 + linux-user/loongarch64/target_elf.h | 12 + linux-user/loongarch64/target_errno_defs.h | 12 + linux-user/loongarch64/target_fcntl.h | 11 + linux-user/{arm => loongarch64}/target_prctl.h | 0 linux-user/loongarch64/target_resource.h | 11 + linux-user/loongarch64/target_signal.h | 13 + linux-user/loongarch64/target_structs.h | 11 + linux-user/loongarch64/target_syscall.h | 48 + linux-user/loongarch64/termbits.h | 11 + linux-user/syscall_defs.h | 6 +- meson.build | 6 +- po/LINGUAS | 1 + po/uk.po | 75 + scripts/clean-header-guards.pl | 4 +- scripts/clean-includes | 2 +- scripts/coverity-scan/COMPONENTS.md | 3 - scripts/gensyscalls.sh | 2 + scripts/qemu-binfmt-conf.sh | 9 +- target/arm/cpu.c | 7 - target/loongarch/README | 39 +- target/loongarch/cpu.c | 39 +- target/loongarch/cpu.h | 8 +- target/loongarch/csr_helper.c | 2 + target/loongarch/gdbstub.c | 2 +- target/loongarch/helper.h | 2 + target/loongarch/insn_trans/trans_privileged.c.inc | 36 + target/loongarch/internals.h | 2 + target/loongarch/op_helper.c | 10 +- target/riscv/cpu.c | 17 +- target/riscv/cpu.h | 24 +- target/riscv/cpu_bits.h | 30 +- target/riscv/cpu_helper.c | 134 +- target/riscv/csr.c | 857 ++-- target/riscv/insn_trans/trans_privileged.c.inc | 4 + target/riscv/insn_trans/trans_rvh.c.inc | 2 + target/riscv/insn_trans/trans_rvi.c.inc | 10 +- target/riscv/machine.c | 25 + target/riscv/meson.build | 3 +- target/riscv/pmp.c | 3 + target/riscv/pmu.c | 32 + target/riscv/pmu.h | 28 + target/riscv/translate.c | 31 +- tcg/tci/tcg-target.c.inc | 7 - tcg/tci/tcg-target.h | 5 - tests/fp/meson.build | 3 + tests/qtest/migration-helpers.c | 14 + tests/qtest/migration-test.c | 59 +- tests/tcg/riscv64/Makefile.softmmu-target | 21 + tests/tcg/riscv64/issue1060.S | 53 + tests/tcg/riscv64/semihost.ld | 21 + tests/unit/test-cutils.c | 42 +- ui/cocoa.m | 4 +- ui/console.c | 41 +- 103 files changed, 3158 insertions(+), 15960 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak delete mode 100644 disas/arm-a64.cc delete mode 100644 disas/libvixl/LICENCE delete mode 100644 disas/libvixl/README delete mode 100644 disas/libvixl/meson.build delete mode 100644 disas/libvixl/vixl/a64/assembler-a64.h delete mode 100644 disas/libvixl/vixl/a64/constants-a64.h delete mode 100644 disas/libvixl/vixl/a64/cpu-a64.h delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.cc delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.h delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.cc delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.h delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.cc delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.h delete mode 100644 disas/libvixl/vixl/code-buffer.h delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.cc delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.h delete mode 100644 disas/libvixl/vixl/globals.h delete mode 100644 disas/libvixl/vixl/invalset.h delete mode 100644 disas/libvixl/vixl/platform.h delete mode 100644 disas/libvixl/vixl/utils.cc delete mode 100644 disas/libvixl/vixl/utils.h rename docs/specs/{fw_cfg.txt => fw_cfg.rst} (58%) create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h copy linux-user/{arm => loongarch64}/target_prctl.h (100%) create mode 100644 linux-user/loongarch64/target_resource.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 po/uk.po create mode 100644 target/riscv/pmu.c create mode 100644 target/riscv/pmu.h create mode 100644 tests/tcg/riscv64/Makefile.softmmu-target create mode 100644 tests/tcg/riscv64/issue1060.S create mode 100644 tests/tcg/riscv64/semihost.ld -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (a175eca0f3d7 -> e35e5b6f695d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/linux. from a175eca0f3d7 Merge tag 'drm-fixes-2022-07-01' of git://anongit.freedesk [...] adds a1ea0857b597 clk: stm32: rcc_reset: Fix missing spin_lock_init() adds a79e69c8714f MAINTAINERS: add include/dt-bindings/clock to COMMON CLK F [...] adds 9650910d05a3 Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pu [...] adds 32788beb103f ata: pata_cs5535: Fix W=1 warnings adds 690685ffcdce Merge tag 'ata-5.19-rc5' of git://git.kernel.org/pub/scm/l [...] adds fce54ed02757 scsi: hisi_sas: Limit max hw sectors for v3 HW adds 067c227379c0 Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/lin [...] adds fbb564a55780 lib/sbitmap: Fix invalid loop in __sbitmap_queue_get_batch() adds ed0691cf5514 nvmet-tcp: fix regression in data_digest calculation adds 41d07df7de84 nvme-tcp: always fail a request when sending it failed adds 1629de0e0373 nvme-pci: add NVME_QUIRK_BOGUS_NID for ADATA XPG SX6000LNP [...] adds f7f70f4aa09d nvme: fix regression when disconnect a recovering ctrl adds 34ad61514c4c nvmet: add a clear_ids attribute for passthru targets adds e1c70d793463 nvme-pci: add NVME_QUIRK_BOGUS_NID for ADATA IM2P33F8ABR1 adds f3163d8567ad Merge tag 'nvme-5.19-2022-06-30' of git://git.infradead.or [...] adds d516e221e2fb Merge tag 'block-5.19-2022-07-01' of git://git.kernel.dk/l [...] adds 29c1ac230e60 io_uring: keep sendrecv flags in ioprio adds 09007af2b627 io_uring: fix provided buffer import adds 0a35d1622d5c Merge tag 'io_uring-5.19-2022-07-01' of git://git.kernel.d [...] adds 332bd0778775 dm raid: fix accesses beyond end of raid member array adds 1ebc2cec0b7d dm raid: fix KASAN warning in raid5_remove_disk adds 617b365872a2 dm raid: fix KASAN warning in raid5_add_disks adds 8300d380309a Merge tag 'for-5.19/dm-fixes-5' of git://git.kernel.org/pu [...] adds 8692969e9164 ceph: wait on async create before checking caps for syncfs adds 6f8693ea2bfe Merge tag 'ceph-for-5.19-rc5' of https://github.com/ceph/c [...] adds 080abad71e99 NFS: restore module put when manager exits. adds 4f40a5b55446 NFSv4: Add an fattr allocation to _nfs4_discover_trunking() adds 76ff294e1619 Merge tag 'nfs-for-5.19-3' of git://git.linux-nfs.org/proj [...] adds 25deecb21c18 s390: remove unneeded 'select BUILD_BIN2C' adds b9a56c113f90 s390/purgatory: hard-code obj-y in Makefile adds 20159e287a03 s390/purgatory: remove duplicated build rule of kexec-purgatory.o adds e4f74400308c s390/archrandom: simplify back to earlier design and initi [...] adds d608f45ed3cf s390/sclp: Fix typo in comments adds d7d488f41b41 s390/qdio: Fix spelling mistake adds cec84e7547d3 Merge tag 's390-5.19-5' of git://git.kernel.org/pub/scm/li [...] adds 410982303772 arm64: hugetlb: Restore TLB invalidation for BBM on contig [...] adds d0f67adb7906 Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/li [...] adds 1bbb2809040a hwmon: (occ) Prevent power cap command overwriting poll response adds f0aa153b6ce8 hwmon: (pmbus/ucd9200) fix typos in comments adds d0e51022a025 hwmon: (ibmaem) don't call platform_device_del() if platfo [...] adds b336ad598a3b Merge tag 'hwmon-for-v5.19-rc5' of git://git.kernel.org/pu [...] adds 57e00b40033a PM / devfreq: Fix kernel panic with cpu based scaling to p [...] adds e52b045fe07d PM / devfreq: Mute warning on governor PROBE_DEFER adds 0cca7e8dcfa9 PM / devfreq: Fix cpufreq passive unregister erroring on P [...] adds 20e6c3cc90c0 PM / devfreq: passive: Use HZ_PER_KHZ macro in units.h adds f44b799603a9 PM / devfreq: exynos-ppmu: Fix refcount leak in of_get_dev [...] adds b5d281f6c16d PM / devfreq: Rework freq_table to be local to devfreq struct adds 82c66d2bbbed PM / devfreq: Fix kernel warning with cpufreq passive regi [...] adds f08fe6fcbe13 PM / devfreq: passive: revert an editing accident in SPDX- [...] adds 589cb2c0b8da Merge tag 'devfreq-fixes-for-5.19-rc5' of git://git.kernel [...] adds b376471fb47d cpufreq: amd-pstate: Add resume and suspend callbacks adds 4ff5a9b6d95f drivers: cpufreq: Add missing of_node_put() in qoriq-cpufreq.c adds 668a7a12ded7 cpufreq: qcom-hw: Don't do lmh things without a throttle i [...] adds ccd7567d4b6c cpufreq: pmac32-cpufreq: Fix refcount leak bug adds be4b61ec45b3 cpufreq: Add MT8186 to cpufreq-dt-platdev blocklist adds 049b1ed9bef1 Merge tag 'cpufreq-arm-fixes-5.19-rc5' of git://git.kernel [...] adds bc621588ff59 Merge branch 'pm-cpufreq' adds 9ee7827668c7 Merge tag 'pm-5.19-rc5' of git://git.kernel.org/pub/scm/li [...] adds 62f46fc7b8c6 thermal: intel_tcc_cooling: Add TCC cooling support for Ra [...] adds 1ce8c443e956 Merge tag 'thermal-5.19-rc5' of git://git.kernel.org/pub/s [...] adds ef9102004a87 nvdimm: Fix badblocks clear off-by-one error adds 089866061428 Merge tag 'libnvdimm-fixes-5.19-rc5' of git://git.kernel.o [...] adds 19fc5bb93c6b powerpc/xive/spapr: correct bitmap allocation size adds 986481618023 powerpc/book3e: Fix PUD allocation size in map_kernel_page() adds 6886da5f49e6 powerpc/prom_init: Fix kernel config grep adds b21bd5a4b130 powerpc/bpf: Fix use of user_pt_regs in uapi adds ac790d09885d powerpc/memhotplug: Add add_pages override for PPC adds 5411de073362 Merge tag 'powerpc-5.19-4' of git://git.kernel.org/pub/scm [...] adds d6838ec44b45 perf offcpu: Fix build failure on old kernels adds 49c692b7dfc9 perf offcpu: Accept allowed sample types only adds 117c49505b59 tools kvm headers arm64: Update KVM headers from the kerne [...] adds 579d6c6d77a7 perf bpf: 8 byte align bpil data adds 7fe718fb8f3f tools headers UAPI: Sync linux/kvm.h with the kernel sources adds 5eb502b2e1ae perf unwind: Fix unitialized 'offset' variable on aarch64 adds 363afa3aef24 perf synthetic-events: Don't sort the task scan result from /proc adds ff898552fb32 perf synthetic-events: Ignore dead threads during event synthesis adds bb7c51268776 Merge tag 'perf-tools-fixes-for-v5.19-2022-07-02' of git:/ [...] adds 96b80fcd2705 parisc/unaligned: Fix emulate_ldw() breakage adds aa78fa905b44 parisc: Fix vDSO signal breakage on 32-bit kernel adds 34074da5424c Merge tag 'for-5.19/parisc-4' of git://git.kernel.org/pub/ [...] adds 8a9ffb8c857c NFSD: restore EINVAL error translation in nfsd_commit() adds a23dd544debc SUNRPC: Fix READ_PLUS crasher adds 69cb6c6556ad Merge tag 'nfsd-5.19-2' of git://git.kernel.org/pub/scm/li [...] adds 7cf2b0f9611b xfs: bound maximum wait time for inodegc work adds 5e672cd69f0a xfs: introduce xfs_inodegc_push() adds ca76a761ea24 xfs: factor out the common lock flags assert adds 82af88063961 xfs: use invalidate_lock to check the state of mmap_lock adds b822ea17fd15 xfs: always free xattri_leaf_bp when cancelling a deferred op adds f94e08b602d4 xfs: clean up the end of xfs_attri_item_recover adds 7be3bd8856fb xfs: empty xattr leaf header blocks are not corruption adds e53bcffad032 xfs: don't hold xattr leaf buffers across transaction rolls adds 8944c6fb8add xfs: dont treat rt extents beyond EOF as eofblocks to be cleared adds 7561cea5dbb9 xfs: prevent a UAF when log IO errors race with unmount adds 20855e4cb361 Merge tag 'xfs-5.19-fixes-4' of git://git.kernel.org/pub/s [...] adds 4a557a5d1a61 sparse: introduce conditional lock acquire function attribute adds b8d5109f5096 lockref: remove unused 'lockref_get_or_lock()' function adds 88084a3df167 Linux 5.19-rc5 adds 620f83b8326c soc: ixp4xx/npe: Fix unused match warning adds ddc980da8043 ARM: at91: pm: use proper compatible for sama5d2's rtc adds 641522665dbb ARM: at91: pm: use proper compatibles for sam9x60's rtc and rtt adds 1c40169b35ad ARM: at91: pm: use proper compatibles for sama7g5's rtc and rtt adds f2cbbc3f9263 ARM: dts: at91: sam9x60ek: fix eeprom compatible and size adds 416ce193d73a ARM: dts: at91: sama5d2_icp: fix eeprom compatibles adds 35074df65a8d ARM: at91: fix soc detection for SAM9X60 SiPs adds 91d60e259c0f ARM: at91: pm: Mark at91_pm_secure_init as __init adds a38dbb4f2028 Merge tag 'at91-fixes-5.19' of git://git.kernel.org/pub/sc [...] adds a1016ba9f908 ARM: dts: imx7d-smegw01: Fix the SDIO description adds 3fdd4ef444f9 arm64: dts: imx8mp: correct clock of pgc_ispdwp adds b10ef5f2ddb3 ARM: mxs_defconfig: Enable the framebuffer adds 01785f1f1565 arm64: dts: imx8mp-evk: correct mmc pad settings adds 2d4fb72b6812 arm64: dts: imx8mp-evk: correct the uart2 pinctl value adds b838582ab8d5 arm64: dts: imx8mp-evk: correct gpio-led pad settings adds e2c00820a99c arm64: dts: imx8mp-evk: correct vbus pad settings adds e6e1bc0ec9e8 arm64: dts: imx8mp-evk: correct eqos pad settings adds 95587ecfcf25 arm64: dts: imx8mp-evk: correct vbus pad settings adds 8c214b78e149 arm64: dts: imx8mp-evk: correct I2C5 pad settings adds 05a7f43478e8 arm64: dts: imx8mp-evk: correct I2C1 pad settings adds 0836de513eba arm64: dts: imx8mp-evk: correct I2C3 pad settings adds 843af59e5770 arm64: dts: imx8mp-venice-gw74xx: correct pad settings adds e266c155bd88 arm64: dts: imx8mp-phyboard-pollux-rdk: correct uart pad settings adds bae4de618efe arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settings adds 242d8ee91111 arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc [...] adds 8630354f42be arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settings adds 1f66f63c7312 Merge tag 'imx-fixes-5.19-2' of git://git.kernel.org/pub/s [...] adds 754f04cac362 firmware: arm_scmi: Relax CLOCK_DESCRIBE_RATES out-of-spec checks adds 75c8f430d859 firmware: arm_scmi: Fix response size warning for OPTEE transport adds 4ce7e51dc712 firmware: arm_scmi: Remove usage of the deprecated ida_sim [...] adds d95ce66d4cc3 Merge tag 'scmi-fixes-5.19-2' of git://git.kernel.org/pub/ [...] adds 34d2cd3fccce ARM: meson: Fix refcount leak in meson_smp_prepare_cpus adds f99d621133ef Merge tag 'amlogic-arm-for-v5.20' of git://git.kernel.org/ [...] adds 372b2aee9702 arm64: dts: qcom: Remove duplicate sc7180-trogdor include [...] adds de9b3d961607 arm64: dts: qcom: sm8450: fix interconnects property of UFS node adds 47bf59c47559 arm64: dts: qcom: msm8994: Fix CPU6/7 reg values adds fc8b0b9b630d arm64: dts: qcom: sm8450 add ITS device tree node adds 3ba500dee327 arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss node adds d640974d1c4e MAINTAINERS: Add myself as a reviewer for Qualcomm ARM/64 support adds 5fb779558f1c arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo adds 7ecd8a7af36e Merge tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel. [...] adds 0ec29ccf94eb soc: qcom: smem: use correct format characters adds a34b42f8690c ARM: dts: stm32: fix pwr regulators references to use scmi adds 78ece8cce1ba ARM: dts: stm32: use the correct clock source for CEC on s [...] adds cfd7ea394cd3 ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 [...] adds bf74181e75c9 ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI adds 1d0c1aadf1fd ARM: dts: stm32: add missing usbh clock and fix clk order [...] adds c0d1a7bd6574 Merge tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel [...] adds c1084b6c5620 Merge tag 'soc-fixes-5.19-2' of git://git.kernel.org/pub/s [...] new 2f446ffe9d73 xen/blkfront: fix leaking data in shared pages new 307c8de2b023 xen/netfront: fix leaking data in shared pages new 4491001c2e0f xen/netfront: force data bouncing when backend is untrusted new 2400617da7ee xen/blkfront: force data bouncing when backend is untrusted new f63c2c2032c2 xen-netfront: restore __skb_queue_tail() positioning in xe [...] new b75cd218274e xen/arm: Fix race in RB-tree based P2M accounting new e35e5b6f695d Merge tag 'xsa-5.19-tag' of git://git.kernel.org/pub/scm/l [...] The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: MAINTAINERS | 2 + Makefile | 2 +- arch/arm/boot/dts/at91-sam9x60ek.dts | 3 +- arch/arm/boot/dts/at91-sama5d2_icp.dts | 6 +- arch/arm/boot/dts/imx7d-smegw01.dts | 4 +- arch/arm/boot/dts/stm32mp15-scmi.dtsi | 58 ++++++ arch/arm/boot/dts/stm32mp151.dtsi | 6 +- arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts | 4 + arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts | 1 + arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts | 4 + arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts | 1 + arch/arm/configs/mxs_defconfig | 1 + arch/arm/mach-at91/pm.c | 12 +- arch/arm/mach-meson/platsmp.c | 2 + arch/arm/xen/p2m.c | 6 +- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 88 ++++----- .../dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts | 40 ++-- .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 48 ++--- .../boot/dts/freescale/imx8mp-venice-gw74xx.dts | 116 +++++------ arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8992-lg-bullhead.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts | 2 +- arch/arm64/boot/dts/qcom/msm8994.dtsi | 4 +- .../boot/dts/qcom/sc7180-trogdor-homestar.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8450.dtsi | 14 +- arch/arm64/mm/hugetlbpage.c | 30 ++- arch/parisc/kernel/asm-offsets.c | 5 + arch/parisc/kernel/unaligned.c | 2 +- arch/powerpc/Kconfig | 4 + arch/powerpc/include/asm/bpf_perf_event.h | 9 + arch/powerpc/include/uapi/asm/bpf_perf_event.h | 9 - arch/powerpc/kernel/prom_init_check.sh | 2 +- arch/powerpc/mm/mem.c | 33 +++- arch/powerpc/mm/nohash/book3e_pgtable.c | 6 +- arch/powerpc/sysdev/xive/spapr.c | 5 +- arch/s390/Kconfig | 1 - arch/s390/crypto/arch_random.c | 217 --------------------- arch/s390/include/asm/archrandom.h | 14 +- arch/s390/include/asm/qdio.h | 6 +- arch/s390/kernel/setup.c | 5 + arch/s390/purgatory/Makefile | 5 +- drivers/ata/pata_cs5535.c | 4 +- drivers/block/xen-blkfront.c | 54 +++-- drivers/clk/stm32/reset-stm32.c | 1 + drivers/cpufreq/amd-pstate.c | 24 +++ drivers/cpufreq/cpufreq-dt-platdev.c | 1 + drivers/cpufreq/pmac32-cpufreq.c | 4 + drivers/cpufreq/qcom-cpufreq-hw.c | 6 + drivers/cpufreq/qoriq-cpufreq.c | 1 + drivers/devfreq/devfreq.c | 76 ++++---- drivers/devfreq/event/exynos-ppmu.c | 8 +- drivers/devfreq/governor_passive.c | 62 +++--- drivers/firmware/arm_scmi/bus.c | 6 +- drivers/firmware/arm_scmi/clock.c | 26 ++- drivers/firmware/arm_scmi/driver.c | 1 + drivers/firmware/arm_scmi/optee.c | 7 +- drivers/firmware/arm_scmi/protocols.h | 3 + drivers/hwmon/ibmaem.c | 12 +- drivers/hwmon/occ/common.c | 5 +- drivers/hwmon/occ/common.h | 3 +- drivers/hwmon/occ/p8_i2c.c | 13 +- drivers/hwmon/occ/p9_sbe.c | 7 +- drivers/hwmon/pmbus/ucd9200.c | 2 +- drivers/md/dm-raid.c | 34 ++-- drivers/md/raid5.c | 6 +- drivers/net/xen-netfront.c | 56 +++++- drivers/nvdimm/bus.c | 4 +- drivers/nvme/host/core.c | 2 + drivers/nvme/host/nvme.h | 1 + drivers/nvme/host/pci.c | 5 +- drivers/nvme/host/rdma.c | 12 +- drivers/nvme/host/tcp.c | 13 +- drivers/nvme/target/configfs.c | 20 ++ drivers/nvme/target/core.c | 6 + drivers/nvme/target/nvmet.h | 1 + drivers/nvme/target/passthru.c | 55 ++++++ drivers/nvme/target/tcp.c | 23 +-- drivers/s390/char/sclp.c | 2 +- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 7 + drivers/soc/atmel/soc.c | 12 +- drivers/soc/ixp4xx/ixp4xx-npe.c | 2 +- drivers/soc/qcom/smem.c | 6 +- drivers/thermal/intel/intel_tcc_cooling.c | 1 + fs/ceph/caps.c | 1 + fs/io_uring.c | 19 +- fs/nfs/nfs4proc.c | 19 +- fs/nfs/nfs4state.c | 1 + fs/nfsd/vfs.c | 3 +- fs/xfs/libxfs/xfs_attr.c | 38 +--- fs/xfs/libxfs/xfs_attr.h | 5 - fs/xfs/libxfs/xfs_attr_leaf.c | 35 ++-- fs/xfs/libxfs/xfs_attr_leaf.h | 3 +- fs/xfs/xfs_attr_item.c | 27 +-- fs/xfs/xfs_bmap_util.c | 2 + fs/xfs/xfs_icache.c | 56 ++++-- fs/xfs/xfs_icache.h | 1 + fs/xfs/xfs_inode.c | 64 +++--- fs/xfs/xfs_log.c | 9 +- fs/xfs/xfs_mount.h | 2 +- fs/xfs/xfs_qm_syscalls.c | 9 +- fs/xfs/xfs_super.c | 9 +- fs/xfs/xfs_trace.h | 1 + include/linux/compiler_types.h | 2 + include/linux/devfreq.h | 5 + include/linux/lockref.h | 1 - include/linux/refcount.h | 6 +- include/uapi/linux/io_uring.h | 2 +- lib/lockref.c | 25 --- lib/sbitmap.c | 5 +- net/sunrpc/xdr.c | 2 +- tools/arch/arm64/include/uapi/asm/kvm.h | 36 ++++ tools/include/uapi/linux/kvm.h | 54 ++++- tools/perf/util/bpf-utils.c | 5 +- tools/perf/util/bpf_off_cpu.c | 7 +- tools/perf/util/bpf_skel/off_cpu.bpf.c | 20 +- tools/perf/util/evsel.c | 9 + tools/perf/util/off_cpu.h | 9 + tools/perf/util/synthetic-events.c | 9 +- tools/perf/util/unwind-libunwind-local.c | 2 +- 121 files changed, 1076 insertions(+), 808 deletions(-) create mode 100644 arch/powerpc/include/asm/bpf_perf_event.h delete mode 100644 arch/powerpc/include/uapi/asm/bpf_perf_event.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (291e3a85658e -> 3f58177d7ffa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 291e3a85658e [compiler-rt] Update Fuchsia sanitizer sched_yield adds 6450daddd20a Test a few more C99 DRs adds 43dc31904951 [DirectX] add thread/group id DXIL operations. adds daeb2dcea098 [mlir][sparse] add more unittest cases to sparse dialect merger adds b764e58865ff Remove redundant code. [NFC] adds 6e8ec13d3f01 [MC][RISCV] Suppress R_RISCV_{ADD,SUB}32 in .apple_names . [...] adds c99827349927 [pseudo] Fix an out-of-bound issue in getReduceRules. adds 188582b7e0f3 [RISCV] Considering existing offset in the alignment when [...] adds 258c3aee54e1 Revert "Re-apply "Deferred Concept Instantiation Implement [...] adds f59c279b7255 [mlir] Fix usages of `run-reproducer`. adds 3d7aeb3c734e [gn build] Manually port 43dc3190 adds ab3630dd4186 [UpdateTestChecks][test] Remove stray ; before/after non-R [...] adds 48aa787ab3a4 [SLP][NFC]Add a test for logical and operands, requiring e [...] adds b7f4335d6a99 [mlir][tosa] Update TOSA transpose_conv2d to match spec adds bbcd8e5271f4 [pseudo] NFC, polish the fix of c99827349927a44334f2b04139 [...] adds 34073b5538b9 [SLP][NFC]Rework the test for logical and freeze, need som [...] adds b19cbda45a01 [flang][NFC] Add embox test with character adds 875ee0ed1c5a [mlir][sparse] Reducing computational complexity adds feb4b628ac09 [InstCombine] avoid 'tmp' usage in test files; NFC adds 9c8a39c67b59 [InstCombine] restrict select of bit-tests to constant shi [...] adds 5a65c5180e50 [bazel] Port 43dc3190, adding rules to generate dxil intrinsics adds bcd153485ebf [bazel] Fix invalid characters adds 0d3a2b4c6601 [Lex] Introduce `PPCallbacks::LexedFileChanged()` preproce [...] adds fd25a0aa41c0 [llvm-lto2] Remove unneeded cl::init(false). NFC adds 3a47037fcc3c [BOLT] Fix instrumentation problem with floating point adds 47e6f98f84ac [LowerMatrixMultiplication] Switch dummy values from undef [...] adds 3e701bcd2a6a attempt to fix aarch64 build bot adds 7c4f45f87a94 Revert [LowerMatrixMultiplication] Switch dummy values fro [...] adds f2fa4f97591a [sanitizer] Update dn_expand interceptor for glibc 2.34 adds 94c7b89fe5b0 [libc++][ranges] Implement `ranges::stable_sort`. adds 17c811956464 [gn build] Port 94c7b89fe5b0 adds 927156a67445 Generate the capture for the field when the field is used [...] adds 228c8f9cc0b2 [ObjectYAML] Add offloading binary implementations for obj [...] adds d2d8b0aa4f80 [llvm-objdump] Add support for dumping embedded offloading data adds 9c4d301dddfc [gn build] Port 228c8f9cc0b2 adds 0dbf0ba033f6 [gn build] Port d2d8b0aa4f80 adds 8590a35ef900 [RISCV][NFC] Simplify condition of IsTU. adds 537db49596f6 [mlir][sparse] Silencing some -Wunused-function in unittests adds cc55d97cebf2 [clang-format] Run dump_format_style.py for LK_Verilog adds b52d33e6de55 [OpenMP][NFC] Reuse check lines for Clang/OpenMP tests adds 07766f407030 [Attributor] Move heap2stack allocas to the entry block if [...] adds 5744b9cb7998 [RISCV] Restore "Enable shrink wrap by default" adds ccf7dd5e813d [llvm-objdump] Ensure offloading sections have proper alignment adds 40d2ef841b68 [clang-format][NFC] Replace an EXPECT_EQ with a verifyFormat adds 68050c235432 Revert "[CMake][Fuchsia] Use libunwind as the default unwinder" adds 9ac548e1181c [RISCV] isel (add (and X, 0xFFFFFFFE), Y) as (SH1ADD (SRLI [...] adds b2e9684fe4d1 [RISCV] isel (shl (and X, C2), C) -> (slli (srliw X, C3), C3+C). adds 7fc4518f4a70 [MLIR] Rename FusePadOpWithLinalgConsumer -> FusePadOpWith [...] adds 23ee84f43201 [globalisel] Add test case for regbank selection. adds b0da3c6fa44b [VPlan] Move setDebugLocFromInst to VPTransformState (NFC). adds 5d787689b145 [RISCV] Match RISCVISD::ADD_LO in SelectAddrRegImm. adds 5148c685e3bb [mlir][complex] Inverse canonicalization between exp and log adds 7788b0c09754 [lsan] malloc_usable_size returns 0 for nullptr adds 7e4ab9d5b8b8 [RISCV] Add more SHXADD isel patterns. adds 1ecfc12b0c67 [Bazel] Make `builtin_headers_gen` as subset of CMake's `c [...] adds f7819ce166bc [FPEnv] Allow CompoundStmt to keep FP options adds 8679cbc29fb7 Reland "[NFC] Add a missing test for for clang-repl" adds 022bd92c78ed [LowerMatrixMultiplication] Switch dummy values from undef [...] adds 6956840b5c00 Revert "Reland "[NFC] Add a missing test for for clang-repl"" adds 0f45eaf0da1f [RISCV] Add a scavenge spill slot when use ADDI to compute [...] adds 53dc0f107877 [NFC] Switch a few uses of undef to poison as placeholders [...] adds d100a30a5406 [AArch64] Regenerate more tests. NFC adds d71a8bb157ea [MLIR][Affine] Allow affine-expr on RHS in IntegerSet adds 13d58ff9f373 [RISCV] Replace call to APInt::countTrailingZeros with uin [...] adds 2aea8af25136 [libc++] Make _LIBCPP_DEBUG_RANDOMIZE_RANGE a function adds e1f61d864214 [gn build] Port 2aea8af25136 adds c1c3134ac422 [InstCombine] add tests for and-of-negated-lowbitmask; NFC adds f9f40aa10d98 [InstCombine] fold negated low-bit-mask to cmp+select adds b1f0efc06acc [clang-format] Tweak help text a bit adds 134363208b92 [clang] Fix gcc-6 compilation error. (NFC) adds a65a3bffd31f [clang-tidy] Don't treat invalid branches as identical adds f7a80c3d08d4 [clang-tidy] Properly forward clang-tidy output when runni [...] adds 2c3784cff859 [SCEV] recognize llvm.annotation intrinsic adds e98e13ac8f38 [mlir][Vector] Fold ShuffleOp(SplatOp(X), SplatOp(X)) to S [...] adds d2a35e4d39fe [AIX] Handling the label alignment of a global variable wi [...] adds 93d6fdfc232c [Driver] Ignore the clang modules validation-related flags [...] adds 8eb4dcb73747 [RISCV] Move some SHXADD matching cases into a ComplexPatt [...] adds d36e09cfe591 [RISCV] Add more SHXADD patterns. adds 1063dfc02853 [mlir][openmp] Added omp.taskloop adds 7283f48a05de [IR] Remove support for insertvalue constant expression adds b4694229aa9d [LV] Simplify setDebugLocFromInst by using early exit (NFC). adds f0089fae1d7e [AArch64] Add additional tests for D120481. adds 7fbf55c927f2 [mlir][Tensor] Move ParallelInsertSlice to the tensor dialect adds 9604601c9394 [SimplifyCFG] Remove redundant checks for hoisting (NFCI) adds 4887d047a31f [libc++][NFC] Replace enable_if with __enable_if_t in a fe [...] adds 04f6bf482b86 Revise outdated parts of the developer policy. adds 5f0a054f8954 [pseudo] Remove duplicated code in ClangPseudo.cpp adds c9fb3c6ea6cc [mlir][Tensor] Update ParallelInsertSlicOp semantics to ma [...] adds f4dd977537dc [AST] Use canonical constraint declaration for ASTContext: [...] adds 42f5b0509ded [mlir][NFC] Fix various warnings generated by GCC 9 adds cce64e7a9cba [DAG] visitTRUNCATE - move GetDemandedBits AFTER SimplifyD [...] adds f90f0e8fe7f5 [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description adds bf89d24f5319 [AArch64] NFC: Move safe predicate casting to a separate f [...] adds 740633ff08ff [flang] Add TODO for derived types with final procedure adds 4905bcac00e6 [ConstantFolding] Check return value of ConstantFoldInstOp [...] adds 8e70258b18ba [AMDGPUCodeGenPrepare] Check result of ConstantFoldBinaryO [...] adds 19a1e20b8a0f [VectorCombine] Improve shuffle select shuffle-of-shuffles adds 25607d143d1d [libc++] Implement `std::ranges::merge` adds 3912928aa891 [gn build] Port 25607d143d1d adds 32a76fc292d9 [SCEVExpander] Avoid ConstantExpr::get() (NFCI) adds 93cbdaef0455 [Reassociate] Avoid ConstantExpr::get() adds 2de05afc192d [SLP] Peek into loads when hitting the RecursionMaxDepth adds 2ab260eecfab [llvm-ar][test] Add additional MRI script testing adds 4e6c30c8354f [libc] Add a separate algorithm_test. adds d7697c175db9 [flang] Avoid segfault when defining op is not a fir::Convert adds f93cd56262d1 [BPI] Avoid ConstantExpr::get() adds aa78c5298ea3 Fix MLIR Python CMake bug causing duplicate sources target. adds 644a965c1efe [LV] Vectorize cases with larger number of RT checks, exec [...] adds c06d0b4d02ea [RISCV] Add ADDI instr for computing FrameIndex address adds c146af3f469a [LoopVectorize][NFC] Reinstate TTICapture workaround for gcc-6 adds 8471c6861992 [LTO] Update remark test after 644a965c1efef6. adds 89cb8cae606b [Bitcode] Use bitcode input for test (NFC) adds abbd684c02c7 [InstCombine] Avoid ConstantExpr::get() in phi binop fold adds 10ebaf76860e [SLP] add test for load combining + shuffling; NFC adds fdf505f3f223 [mlir][OpenMP] omp.task translation to LLVM IR adds 2bfca3561466 [X86] Disable combineVectorSizedSetCCEquality for soft float. adds 5785717e18d5 [AArch64] Add support for insert/extract for nxv1i1 types. adds 2fde26dfcabe [mlir][Linalg][NFC] Make getReassociationMapForFoldingUnit [...] adds 9eb657278611 [LV] Add back CantReorderMemOps remark. adds c3839c0b46a9 CombineContractBroadcast should not create dims unused in LHS+RHS adds bc70ba814dc1 Use add_llvm_install_targets for install-llvmlibc adds b37dafd5dc83 [pseudo] Store shift and goto actions in a compact structu [...] adds 12d26ce9b0ec [flang] Make code more homogenous in CodeGen adds 47bdf53a5dba [clang-format] Break on AfterColon only if not followed by [...] adds 1ab37d996ce3 [clang-format] Update documentation adds 2a82c15f63d4 [LV] Consider runtime checks profitable if scalar cost is zero. adds 623250b51139 [X86] Regenerate fold-tied-op.ll test checks adds a4e2c1f76295 [Orc][LLJIT] Use JITLink on RISC-V adds b6178ccfe852 [OffloadPackager] Use appropriate kind for LTO bitcode adds 4276d00b1253 [InstCombine] add helper function for sub-of-min/max folds; NFC adds 8ef053273abf [InstCombine] add tests for sub of smin/smax; NFC adds 142aca7741d5 [InstCombine] fold sub of min/max of sub with common operand adds b2b4c8721db0 [InstCombine] Make use of low zero bits to determine exact [...] adds 063500afc0b8 [RISCV][NFC] Merge the isolated decleration into foreach. adds 98c6a3c0c220 [NFC][ASTImporter] remove the unnecessary condition checks [...] adds 85318d328102 [NFC] Remove unused test inputs adds 939352b6ec31 [RISCV][Clang] Teach RISCVEmitter to generate BitCast for [...] adds 5b4851ed9113 [LoongArch] Add codegen support for load/store operations adds b940fe6fe2af [LoongArch] Add codegen support for conditional branches adds 3610d5f5d4c2 [LoongArch] Add initial support for function calls adds 0c01f42fad41 [llvm-objcopy] -O binary: align sh_offset for section chan [...] adds 3e01af093f92 [mlir] Add InferIntRangeInterface to gpu.launch adds 2028fe6fbca6 [lld-macho] Handle LOH_ARM64_ADRP_LDR_GOT optimization hints adds 4996e3f68315 [test] Check for more -fsanitize=array-bounds behavior adds 66790b70ea14 [RISCV] Rename some variables for clarity. NFC adds f27672924e36 [RISCV] Replace an explicit check with an assert. adds 7a550212e8ff [clang-tidy] Fix confusable identifiers interaction with D [...] adds b094c737cd85 [flang] Avoid opaque pointer issue with character array su [...] adds b69c75d53f8d Revert "[VectorCombine] Improve shuffle select shuffle-of- [...] adds 00927334df9a [libc++] Use __is_exactly_{input, forward}_iterator adds 0d0bd17fcfbd [libc++] Fix __split_buffer::__construct_at_end definition [...] adds 4de0680fbf4e Fix use of pointer arithmetic instead of iterators. adds df5c981be35a [mlir][Linalg] Add DropUnitDims support for tensor::Parall [...] adds 774fc6349093 [LV] Consider minimum vscale assmuption for RT check cost. adds dfb77f2e99a1 [LLD][ELF] Add FORCE_LLD_DIAGNOSTICS_CRASH to force LLD to crash adds 77b13a57a930 [AArch64][SME] Add SME addha/va intrinsics adds 00cb1c33ee2e [InstCombine] add negtive tests for (%x & C) == 0 -> %x u< [...] adds dc46ae6df5f7 [lldb] Add support to load object files from thin archives adds b6ad8cbb3575 [gn build] (manually) port dfb77f2e99a1 adds b66220f25aea [InstCombine] [NFC] use C.isNegatedPowerOf2() instead of ( [...] adds 220366d5b545 [gn build] (manually) port 6b3956e123db adds b43dd2f6c4a3 [InstCombine] improve fold for icmp_eq_and to icmp_ult adds 271b470f3f1a [IndVars] Precommit test with redundant FPToSI. adds f8e658ec9ff5 [OpenCL] Remove fast_ half geometric builtins adds f6fa9985900e Fix tests with non-default CLANG_DEFAULT_LINKER adds 1666f09933ee [ARM] Add Support for Cortex-M85 adds ba14e4d65cdd [LLDB] Disable TestGdbRemoteFork* for Arm/AArch64 Linux adds f03b876e7e95 Reland "Reland "[NFC] Add a missing test for for clang-repl"" adds 98e52e8bff52 [VE] Restructure eliminateFrameIndex adds 9ad38e5288a1 Revert "[VE] Restructure eliminateFrameIndex" adds 3897d3cf71ef [clang-tidy] By-pass portability issues in confusable-iden [...] adds bc366183a592 Correct XFAIL according to bot owner's advice adds da5a6b2bf574 [VE] Restructure eliminateFrameIndex adds 3b2496e8faae [LLDB] Skip TestTwoHitsOneActual.py on Arm/AArch64 Linux adds 989270628226 Updating office hours adds 3c043ab007a1 [MLIR][Affine] Allow `<=` in IntegerSet constraints adds b7b11091efd2 [LLDB] Fix decorator import in TestTwoHitsOneActual.py adds 04c5fed5e0c6 [NFC] Fix wrong comment. adds e6ff553979e8 [clang-extdef-mapping] Directly process .ast files adds 02ab87f54305 [SimplifyCFG] Add additional jump threading test (NFC) adds ebb78a95cede [LV] Remove stray dbgs() call after 774fc63490939. adds dc969061c68e [SimplifyCFG] Thread all predecessors with same value at once adds 9fbf1107cc76 [pseudo] Eliminate LRTable::Action. NFC adds 8cd79bc12c36 [AMDGPU][GlobalISel] Support register offsets for SMRDs. new 4696a33dfaef [AMDGPU][NFC] Refine matching SMRD offsets. new 70c0d92930b2 [pseudo] Use the prebuilt cxx grammar for the lit tests, NFC. new 6e2058e58832 [Compiler-RT] Remove FlushViewOfFile call when unmapping [...] new e4d1d0cc2c9c [SCEV] Fix isImpliedViaMerge() with values from previous i [...] new b27d6ffe4e4a [RuntimeDyld] Fix R_AARCH64_TSTBR14 relocation new d26344731128 [pseudo] Fix the build for the benchmark tool. new d1af09ad9617 [AMDGPU] gfx11 Generate VOPD Instructions new f10d271ae27f [clang][dataflow] Handle null pointers of type std::nullptr_t new 935570b2ad80 [ConstExpr] Don't create div/rem expressions new 9ab67cc8bfe7 [pseudo] Implement guard extension. new cccc03df3c17 [gn build] Port d1af09ad9617 new cc6462a475e2 [mlir][tensor][bufferize][NFC] Clean up test case new 0483c91eee9e [AMDGPU] gfx11 CodeGen for new DPP instructions new 6c3c5f8069d9 [mlir][memref] Improve type inference for rank-reducing subviews new a4772cbaf0dc Revert "[SimplifyCFG] Thread branches on same condition in [...] new fb0654ced388 [mlir][interfaces][NFC] Remove ViewLikeInterface::expandToRank new 58809a1eb1af [mlir][memref][NFC] Silence compiler warnings new c35a6454b1af [BUILD] Add missed CMakeLists.txt change from dfb77f2 new 12fd00ee1777 [AMDGPU] Add patterns for GFX11 v_minmax and v_maxmin inst [...] new ed3b040b54f4 [MLIR][Presburger] Rename attachments to identifiers in Pr [...] new e7a0fa4df00c [DAG] foldAddSubOfSignBit - don't bother creating the new [...] new 7068c843d254 [DAG] visitREM - use isAllOnesOrAllOnesSplat instead of is [...] new 988d4f576fdf Revert "[mlir][sparse] add more unittest cases to sparse d [...] new e70ea18e2fde [Assembler] Name globals in test (NFC) new 5493f8fc59ca [VectorCombine] Improve shuffle select shuffle-of-shuffles new 07b185ed8157 [Thumb2] Remove unneeded IR from MIR test (NFC) new 4dbc2876cff2 [AMDGPU] GFX11 trivial NFC tweaks new a2158374ba1a [mlir][LLVMIR] Apply CallOp/CallableInterface on suitable [...] new b8dbc6ffea93 [HLSL] Add ExternalSemaSource & vector alias new dbf6ab5ef9ae [LSR] Fix bug for optimizing unused IVs to final values new 7b1ff859feaa [gn build] Port b8dbc6ffea93 new 5d7fa481cf4d [analyzer] Do not emit redundant SymbolCasts new 2df120784af4 [analyzer] Fix assertion in simplifySymbolCast new f51c47d98791 Revert "[lldb/test] Don't use preexec_fn for launching inferiors" new 3f58177d7ffa [llvm-lib] Ignore /NODEFAULTLIB flag The 35 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bolt/runtime/CMakeLists.txt | 3 +- bolt/test/runtime/X86/instrumentation-xmm.c | 25 + .../clang-tidy/bugprone/BranchCloneCheck.cpp | 11 + .../clang-tidy/misc/ConfusableIdentifierCheck.cpp | 70 +- clang-tools-extra/docs/ReleaseNotes.rst | 4 + clang-tools-extra/pseudo/benchmarks/Benchmark.cpp | 9 +- clang-tools-extra/pseudo/fuzzer/Fuzzer.cpp | 5 +- clang-tools-extra/pseudo/gen/Main.cpp | 18 + .../pseudo/include/clang-pseudo/GLR.h | 18 +- .../pseudo/include/clang-pseudo/Language.h | 16 + .../pseudo/include/clang-pseudo/cxx/CXX.h | 6 + .../pseudo/include/clang-pseudo/grammar/LRTable.h | 222 +- clang-tools-extra/pseudo/lib/GLR.cpp | 82 +- clang-tools-extra/pseudo/lib/cli/CLI.cpp | 4 +- clang-tools-extra/pseudo/lib/cxx/CMakeLists.txt | 1 + clang-tools-extra/pseudo/lib/cxx/CXX.cpp | 27 +- clang-tools-extra/pseudo/lib/cxx/cxx.bnf | 4 +- clang-tools-extra/pseudo/lib/grammar/LRTable.cpp | 78 +- .../pseudo/lib/grammar/LRTableBuild.cpp | 162 +- clang-tools-extra/pseudo/test/cxx/capture-list.cpp | 2 +- .../pseudo/test/cxx/contextual-keywords.cpp | 9 + .../pseudo/test/cxx/declarator-function.cpp | 2 +- .../pseudo/test/cxx/declarator-var.cpp | 2 +- .../pseudo/test/cxx/empty-member-spec.cpp | 2 +- clang-tools-extra/pseudo/test/cxx/keyword.cpp | 2 +- .../pseudo/test/cxx/mixed-designator.cpp | 2 +- .../pseudo/test/cxx/parameter-decl-clause.cpp | 2 +- .../pseudo/test/cxx/predefined-identifier.cpp | 2 +- .../test/cxx/template-empty-type-parameter.cpp | 2 +- .../pseudo/test/cxx/unsized-array.cpp | 2 +- clang-tools-extra/pseudo/tool/ClangPseudo.cpp | 53 +- clang-tools-extra/pseudo/unittests/GLRTest.cpp | 152 +- clang-tools-extra/pseudo/unittests/LRTableTest.cpp | 22 +- .../test/clang-tidy/check_clang_tidy.py | 10 +- .../bugprone/branch-clone-unknown-expr.cpp | 9 + .../checkers/misc/confusable-identifiers.cpp | 96 +- .../test/pp-trace/pp-trace-include.cpp | 10 +- clang/cmake/caches/Fuchsia-stage2.cmake | 8 +- clang/cmake/caches/Fuchsia.cmake | 1 - clang/docs/ClangFormat.rst | 84 +- clang/docs/ClangFormatStyleOptions.rst | 5 + clang/docs/ReleaseNotes.rst | 20 +- clang/include/clang/AST/ASTImportError.h | 1 - clang/include/clang/AST/Decl.h | 36 +- clang/include/clang/AST/DeclBase.h | 8 +- clang/include/clang/AST/JSONNodeDumper.h | 2 + clang/include/clang/AST/Stmt.h | 38 +- clang/include/clang/AST/TextNodeDumper.h | 1 + .../FlowSensitive/DataflowAnalysisContext.h | 15 +- clang/include/clang/Basic/LangOptions.h | 13 + clang/include/clang/Basic/riscv_vector.td | 99 +- clang/include/clang/Lex/PPCallbacks.h | 31 +- clang/include/clang/Sema/HLSLExternalSemaSource.h | 43 + clang/include/clang/Sema/ScopeInfo.h | 7 +- clang/include/clang/Sema/Sema.h | 92 +- clang/include/clang/Sema/Template.h | 41 +- clang/include/clang/Support/RISCVVIntrinsicUtils.h | 2 + clang/lib/AST/ASTContext.cpp | 3 + clang/lib/AST/ASTImporter.cpp | 22 +- clang/lib/AST/Decl.cpp | 23 +- clang/lib/AST/DeclBase.cpp | 5 +- clang/lib/AST/Interp/ByteCodeExprGen.cpp | 2 +- clang/lib/AST/JSONNodeDumper.cpp | 15 + clang/lib/AST/Stmt.cpp | 24 +- clang/lib/AST/StmtPrinter.cpp | 62 + clang/lib/AST/TextNodeDumper.cpp | 6 + clang/lib/Analysis/BodyFarm.cpp | 3 +- .../FlowSensitive/DataflowAnalysisContext.cpp | 8 +- clang/lib/Basic/LangOptions.cpp | 9 + clang/lib/CodeGen/CGCoroutine.cpp | 4 +- clang/lib/Driver/ToolChains/Clang.cpp | 63 +- clang/lib/ExtractAPI/ExtractAPIConsumer.cpp | 1 - clang/lib/Format/ContinuationIndenter.cpp | 4 +- clang/lib/Format/Format.cpp | 25 +- clang/lib/Format/TokenAnnotator.cpp | 8 +- clang/lib/Format/UnwrappedLineParser.cpp | 16 +- clang/lib/Frontend/DependencyFile.cpp | 29 +- clang/lib/Frontend/FrontendAction.cpp | 8 + clang/lib/Headers/hlsl/hlsl_basic_types.h | 54 +- clang/lib/Headers/opencl-c.h | 18 - clang/lib/Lex/PPLexerChange.cpp | 23 +- clang/lib/Sema/CMakeLists.txt | 1 + clang/lib/Sema/HLSLExternalSemaSource.cpp | 98 + clang/lib/Sema/Sema.cpp | 3 +- clang/lib/Sema/SemaConcept.cpp | 349 +- clang/lib/Sema/SemaDeclCXX.cpp | 8 +- clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaOpenMP.cpp | 203 +- clang/lib/Sema/SemaOverload.cpp | 81 - clang/lib/Sema/SemaStmt.cpp | 11 +- clang/lib/Sema/SemaTemplate.cpp | 86 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 40 +- clang/lib/Sema/SemaTemplateInstantiate.cpp | 89 +- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 63 +- clang/lib/Sema/TreeTransform.h | 23 +- clang/lib/Serialization/ASTReaderDecl.cpp | 4 - clang/lib/Serialization/ASTReaderStmt.cpp | 8 +- clang/lib/Serialization/ASTWriterDecl.cpp | 3 - clang/lib/Serialization/ASTWriterStmt.cpp | 3 + clang/lib/StaticAnalyzer/Core/SValBuilder.cpp | 6 + clang/test/AST/HLSL/vector-alias.hlsl | 53 + clang/test/AST/ast-dump-fpfeatures.cpp | 46 + clang/test/AST/ast-dump-pragma-json.c | 485 + clang/test/AST/ast-print-fp-pragmas.c | 69 + clang/test/Analysis/func-mapping-test.cpp | 2 + clang/test/Analysis/produce-symbolcast_x86.cpp | 9 + clang/test/Analysis/symbolcast-floatingpoint.cpp | 24 + clang/test/C/drs/dr2xx.c | 57 + .../temp.constr.constr/non-function-templates.cpp | 21 - .../class-template-partial-specializations.cpp | 24 - .../var-template-partial-specializations.cpp | 19 +- clang/test/CodeGen/arm-target-features.c | 3 + clang/test/CodeGen/bounds-checking-fam.c | 45 +- clang/test/CodeGenCUDA/managed-var.cu | 6 +- clang/test/CodeGenObjC/exceptions.m | 15 +- clang/test/CodeGenObjCXX/exceptions-legacy.mm | 11 +- clang/test/Driver/arm-cortex-cpus-2.c | 3 + clang/test/Driver/arm-nofp-disabled-features.c | 2 + clang/test/Driver/arm-nopacbti-disabled-features.c | 7 + clang/test/Driver/instrprof-ld.c | 4 +- clang/test/Driver/modules.m | 30 +- clang/test/Frontend/optimization-remark-options.c | 2 +- clang/test/Interpreter/execute.cpp | 5 + clang/test/Misc/target-invalid-cpu-note.c | 2 +- clang/test/Modules/Inputs/concept/A.cppm | 3 - clang/test/Modules/Inputs/concept/foo.h | 13 - clang/test/Modules/concept.cppm | 50 +- clang/test/OpenMP/cancel_codegen.cpp | 3828 +---- clang/test/OpenMP/cancellation_point_codegen.cpp | 632 +- .../test/OpenMP/default_firstprivate_ast_print.cpp | 75 +- clang/test/OpenMP/default_private_ast_print.cpp | 53 + clang/test/OpenMP/distribute_codegen.cpp | 6026 +------ .../OpenMP/distribute_firstprivate_codegen.cpp | 1664 +- .../test/OpenMP/distribute_lastprivate_codegen.cpp | 1732 +- .../OpenMP/distribute_parallel_for_codegen.cpp | 12235 +------------ ...istribute_parallel_for_firstprivate_codegen.cpp | 2380 +-- .../OpenMP/distribute_parallel_for_if_codegen.cpp | 9093 +--------- ...distribute_parallel_for_lastprivate_codegen.cpp | 2542 +-- ...distribute_parallel_for_num_threads_codegen.cpp | 4436 +---- .../distribute_parallel_for_private_codegen.cpp | 1714 +- .../distribute_parallel_for_proc_bind_codegen.cpp | 465 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 621 +- .../distribute_parallel_for_simd_codegen.cpp | 15247 +---------------- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 3106 +--- .../distribute_parallel_for_simd_if_codegen.cpp | 7282 +------- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 3520 +--- ...ibute_parallel_for_simd_num_threads_codegen.cpp | 6818 +------- ...istribute_parallel_for_simd_private_codegen.cpp | 2540 +-- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 614 +- clang/test/OpenMP/distribute_private_codegen.cpp | 1308 +- clang/test/OpenMP/distribute_simd_codegen.cpp | 10094 +---------- .../distribute_simd_firstprivate_codegen.cpp | 2368 +-- .../OpenMP/distribute_simd_lastprivate_codegen.cpp | 2668 +-- .../OpenMP/distribute_simd_private_codegen.cpp | 2212 +-- .../OpenMP/distribute_simd_reduction_codegen.cpp | 851 +- clang/test/OpenMP/for_firstprivate_codegen.cpp | 595 +- clang/test/OpenMP/for_lastprivate_codegen.cpp | 3762 +--- clang/test/OpenMP/for_linear_codegen.cpp | 655 +- clang/test/OpenMP/for_private_codegen.cpp | 491 +- clang/test/OpenMP/for_reduction_codegen.cpp | 3917 +---- clang/test/OpenMP/for_reduction_codegen_UDR.cpp | 3633 +--- clang/test/OpenMP/for_reduction_task_codegen.cpp | 530 +- .../master_taskloop_in_reduction_codegen.cpp | 679 +- .../master_taskloop_simd_in_reduction_codegen.cpp | 810 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 345 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 366 +- .../OpenMP/nvptx_multi_target_parallel_codegen.cpp | 80 +- .../test/OpenMP/nvptx_nested_parallel_codegen.cpp | 133 +- clang/test/OpenMP/nvptx_target_codegen.cpp | 397 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 436 +- .../nvptx_target_parallel_num_threads_codegen.cpp | 449 +- ...get_parallel_reduction_codegen_tbaa_PR46146.cpp | 2472 +-- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 167 +- .../nvptx_target_teams_distribute_codegen.cpp | 124 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 1536 +- ...istribute_parallel_for_generic_mode_codegen.cpp | 1200 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 1040 +- clang/test/OpenMP/ordered_codegen.cpp | 2852 +--- clang/test/OpenMP/parallel_copyin_codegen.cpp | 1015 +- .../test/OpenMP/parallel_firstprivate_codegen.cpp | 1390 +- clang/test/OpenMP/parallel_for_codegen.cpp | 2663 +-- .../parallel_for_lastprivate_conditional.cpp | 250 +- clang/test/OpenMP/parallel_for_linear_codegen.cpp | 322 +- .../OpenMP/parallel_for_reduction_task_codegen.cpp | 526 +- .../OpenMP/parallel_for_simd_aligned_codegen.cpp | 249 +- clang/test/OpenMP/parallel_if_codegen.cpp | 688 +- clang/test/OpenMP/parallel_master_codegen.cpp | 354 +- .../parallel_master_reduction_task_codegen.cpp | 481 +- .../OpenMP/parallel_master_taskloop_codegen.cpp | 928 +- ...arallel_master_taskloop_lastprivate_codegen.cpp | 836 +- .../parallel_master_taskloop_simd_codegen.cpp | 902 +- ...el_master_taskloop_simd_lastprivate_codegen.cpp | 1236 +- clang/test/OpenMP/parallel_private_codegen.cpp | 415 +- clang/test/OpenMP/parallel_reduction_codegen.cpp | 1382 +- .../OpenMP/parallel_reduction_task_codegen.cpp | 472 +- clang/test/OpenMP/parallel_sections_codegen.cpp | 164 +- .../parallel_sections_reduction_task_codegen.cpp | 514 +- .../test/OpenMP/sections_firstprivate_codegen.cpp | 553 +- clang/test/OpenMP/sections_lastprivate_codegen.cpp | 1332 +- clang/test/OpenMP/sections_private_codegen.cpp | 391 +- clang/test/OpenMP/sections_reduction_codegen.cpp | 814 +- .../OpenMP/sections_reduction_task_codegen.cpp | 518 +- clang/test/OpenMP/single_codegen.cpp | 976 +- clang/test/OpenMP/single_firstprivate_codegen.cpp | 484 +- clang/test/OpenMP/single_private_codegen.cpp | 318 +- .../test/OpenMP/target_codegen_global_capture.cpp | 1870 +- clang/test/OpenMP/target_data_codegen.cpp | 3 +- clang/test/OpenMP/target_enter_data_codegen.cpp | 3 +- .../OpenMP/target_enter_data_depend_codegen.cpp | 3 +- clang/test/OpenMP/target_exit_data_codegen.cpp | 3 +- .../OpenMP/target_exit_data_depend_codegen.cpp | 3 +- clang/test/OpenMP/target_map_codegen_03.cpp | 840 +- clang/test/OpenMP/target_parallel_codegen.cpp | 8463 +-------- clang/test/OpenMP/target_parallel_for_codegen.cpp | 11156 +----------- .../target_parallel_for_reduction_task_codegen.cpp | 539 +- .../OpenMP/target_parallel_for_simd_codegen.cpp | 15870 +---------------- clang/test/OpenMP/target_parallel_if_codegen.cpp | 4647 +---- .../OpenMP/target_parallel_num_threads_codegen.cpp | 3825 +---- .../target_parallel_reduction_task_codegen.cpp | 485 +- clang/test/OpenMP/target_teams_codegen.cpp | 11250 +----------- .../OpenMP/target_teams_distribute_codegen.cpp | 15129 +---------------- .../target_teams_distribute_collapse_codegen.cpp | 1157 +- ...rget_teams_distribute_dist_schedule_codegen.cpp | 2553 +-- ...arget_teams_distribute_firstprivate_codegen.cpp | 1827 +- ...target_teams_distribute_lastprivate_codegen.cpp | 1749 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 2134 +-- ...ms_distribute_parallel_for_collapse_codegen.cpp | 1709 +- ...stribute_parallel_for_dist_schedule_codegen.cpp | 4137 +---- ...istribute_parallel_for_firstprivate_codegen.cpp | 3909 +---- ...et_teams_distribute_parallel_for_if_codegen.cpp | 9282 +--------- ...distribute_parallel_for_lastprivate_codegen.cpp | 2609 +-- ...teams_distribute_parallel_for_order_codegen.cpp | 161 +- ...ams_distribute_parallel_for_private_codegen.cpp | 2703 +-- ...s_distribute_parallel_for_proc_bind_codegen.cpp | 465 +- ...s_distribute_parallel_for_reduction_codegen.cpp | 1391 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 934 +- ...ms_distribute_parallel_for_schedule_codegen.cpp | 13434 +-------------- ..._teams_distribute_parallel_for_simd_codegen.cpp | 3357 +--- ...stribute_parallel_for_simd_collapse_codegen.cpp | 2393 +-- ...ute_parallel_for_simd_dist_schedule_codegen.cpp | 5337 +----- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 6265 +------ ...ams_distribute_parallel_for_simd_if_codegen.cpp | 7566 +-------- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 3571 +--- ...istribute_parallel_for_simd_private_codegen.cpp | 5395 +----- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 614 +- ...tribute_parallel_for_simd_reduction_codegen.cpp | 1677 +- ...stribute_parallel_for_simd_schedule_codegen.cpp | 15872 +---------------- .../target_teams_distribute_private_codegen.cpp | 1204 +- .../target_teams_distribute_reduction_codegen.cpp | 799 +- .../target_teams_distribute_simd_codegen.cpp | 16988 +------------------ ...rget_teams_distribute_simd_collapse_codegen.cpp | 1773 +- ...teams_distribute_simd_dist_schedule_codegen.cpp | 3583 +--- ..._teams_distribute_simd_firstprivate_codegen.cpp | 2648 +-- ...t_teams_distribute_simd_lastprivate_codegen.cpp | 2665 +-- ...arget_teams_distribute_simd_private_codegen.cpp | 2139 +-- ...get_teams_distribute_simd_reduction_codegen.cpp | 1050 +- clang/test/OpenMP/target_teams_map_codegen.cpp | 3047 +--- .../test/OpenMP/target_teams_num_teams_codegen.cpp | 3825 +---- .../OpenMP/target_teams_thread_limit_codegen.cpp | 3972 +---- clang/test/OpenMP/target_update_codegen.cpp | 3 +- clang/test/OpenMP/target_update_depend_codegen.cpp | 3 +- clang/test/OpenMP/task_if_codegen.cpp | 1857 +- clang/test/OpenMP/task_in_reduction_codegen.cpp | 673 +- clang/test/OpenMP/task_member_call_codegen.cpp | 151 +- clang/test/OpenMP/taskgroup_codegen.cpp | 74 +- .../test/OpenMP/taskloop_in_reduction_codegen.cpp | 672 +- .../OpenMP/taskloop_simd_in_reduction_codegen.cpp | 803 +- clang/test/OpenMP/teams_codegen.cpp | 1956 +-- clang/test/OpenMP/teams_distribute_codegen.cpp | 2094 +-- .../OpenMP/teams_distribute_collapse_codegen.cpp | 1141 +- .../teams_distribute_dist_schedule_codegen.cpp | 2499 +-- .../teams_distribute_firstprivate_codegen.cpp | 1831 +- .../teams_distribute_lastprivate_codegen.cpp | 1714 +- .../teams_distribute_parallel_for_codegen.cpp | 3184 +--- ...ms_distribute_parallel_for_collapse_codegen.cpp | 1677 +- ...eams_distribute_parallel_for_copyin_codegen.cpp | 1023 +- ...stribute_parallel_for_dist_schedule_codegen.cpp | 4089 +---- ...istribute_parallel_for_firstprivate_codegen.cpp | 2458 +-- .../teams_distribute_parallel_for_if_codegen.cpp | 9373 +--------- ...distribute_parallel_for_lastprivate_codegen.cpp | 2524 +-- ...distribute_parallel_for_num_threads_codegen.cpp | 2292 +-- ...ams_distribute_parallel_for_private_codegen.cpp | 1688 +- ...s_distribute_parallel_for_proc_bind_codegen.cpp | 465 +- ...s_distribute_parallel_for_reduction_codegen.cpp | 1407 +- ...tribute_parallel_for_reduction_task_codegen.cpp | 939 +- ...ms_distribute_parallel_for_schedule_codegen.cpp | 13274 +-------------- .../teams_distribute_parallel_for_simd_codegen.cpp | 4552 +---- ...stribute_parallel_for_simd_collapse_codegen.cpp | 2361 +-- ...ute_parallel_for_simd_dist_schedule_codegen.cpp | 5289 +----- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 3320 +--- ...ams_distribute_parallel_for_simd_if_codegen.cpp | 7462 +------- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 3494 +--- ...ibute_parallel_for_simd_num_threads_codegen.cpp | 3513 +--- ...istribute_parallel_for_simd_private_codegen.cpp | 2658 +-- ...tribute_parallel_for_simd_proc_bind_codegen.cpp | 614 +- ...tribute_parallel_for_simd_reduction_codegen.cpp | 1693 +- ...stribute_parallel_for_simd_schedule_codegen.cpp | 15712 +---------------- .../OpenMP/teams_distribute_private_codegen.cpp | 1209 +- .../OpenMP/teams_distribute_reduction_codegen.cpp | 815 +- .../test/OpenMP/teams_distribute_simd_codegen.cpp | 4987 +----- .../teams_distribute_simd_collapse_codegen.cpp | 1757 +- ...teams_distribute_simd_dist_schedule_codegen.cpp | 3529 +--- .../teams_distribute_simd_firstprivate_codegen.cpp | 2656 +-- .../teams_distribute_simd_lastprivate_codegen.cpp | 2638 +-- .../teams_distribute_simd_private_codegen.cpp | 2144 +-- .../teams_distribute_simd_reduction_codegen.cpp | 1066 +- clang/test/OpenMP/teams_firstprivate_codegen.cpp | 2511 +-- clang/test/OpenMP/teams_private_codegen.cpp | 1342 +- clang/test/SemaTemplate/concepts-friends.cpp | 371 - clang/test/SemaTemplate/concepts.cpp | 318 - clang/test/SemaTemplate/deferred-concept-inst.cpp | 23 - .../SemaTemplate/instantiate-requires-clause.cpp | 16 +- .../SemaTemplate/trailing-return-short-circuit.cpp | 62 - .../clang-extdef-mapping/ClangExtDefMapGen.cpp | 101 +- clang/tools/clang-format/ClangFormat.cpp | 10 +- clang/tools/clang-offload-packager/CMakeLists.txt | 1 + .../ClangOffloadPackager.cpp | 9 +- .../Analysis/FlowSensitive/TransferTest.cpp | 12 + clang/unittests/Format/FormatTest.cpp | 30 +- clang/utils/TableGen/RISCVVEmitter.cpp | 10 + clang/www/c_dr_status.html | 16 +- compiler-rt/lib/lsan/lsan_allocator.cpp | 2 + compiler-rt/lib/profile/GCDAProfiling.c | 11 +- .../sanitizer_common_interceptors.inc | 14 +- .../TestCases/Linux/malloc_usable_size.c | 21 + flang/lib/Lower/ConvertType.cpp | 4 + flang/lib/Optimizer/Builder/FIRBuilder.cpp | 5 +- flang/lib/Optimizer/CodeGen/CodeGen.cpp | 77 +- flang/test/Fir/embox.fir | 23 + flang/test/Lower/extent_triplets.f90 | 11 + libc/lib/CMakeLists.txt | 9 +- libc/test/src/string/memory_utils/CMakeLists.txt | 17 +- libcxx/benchmarks/CMakeLists.txt | 1 + .../algorithms/ranges_stable_sort.bench.cpp | 39 + libcxx/docs/Status/RangesAlgorithms.csv | 12 +- libcxx/include/CMakeLists.txt | 3 + libcxx/include/__algorithm/nth_element.h | 11 +- libcxx/include/__algorithm/partial_sort.h | 9 +- libcxx/include/__algorithm/ranges_merge.h | 142 + libcxx/include/__algorithm/ranges_sort.h | 3 +- .../{ranges_sort.h => ranges_stable_sort.h} | 31 +- libcxx/include/__algorithm/sort.h | 7 +- libcxx/include/__algorithm/stable_sort.h | 46 +- libcxx/include/__debug | 16 - libcxx/include/__debug_utils/randomize_range.h | 42 + libcxx/include/__hash_table | 16 +- libcxx/include/__iterator/iterator_traits.h | 6 + libcxx/include/__mutex_base | 12 +- libcxx/include/__split_buffer | 26 +- libcxx/include/__tree | 32 +- libcxx/include/__tuple | 6 +- libcxx/include/algorithm | 34 +- libcxx/include/array | 7 +- libcxx/include/deque | 18 +- libcxx/include/exception | 4 +- libcxx/include/forward_list | 42 +- libcxx/include/list | 16 +- libcxx/include/map | 52 +- libcxx/include/module.modulemap.in | 7 + libcxx/include/regex | 7 +- libcxx/include/tuple | 16 +- libcxx/include/unordered_map | 12 +- libcxx/include/vector | 64 +- ...ges_robust_against_copying_comparators.pass.cpp | 10 +- ...ges_robust_against_copying_projections.pass.cpp | 10 +- libcxx/test/libcxx/private_headers.verify.cpp | 3 + .../alg.sorting/alg.merge/ranges_merge.pass.cpp | 613 + .../stable.sort/ranges.stable.sort.pass.cpp | 269 + .../deque/deque.cons/assign_iter_iter.pass.cpp | 34 +- .../niebloid.compile.pass.cpp | 4 +- lld/MachO/Arch/ARM64.cpp | 16 +- lld/docs/ReleaseNotes.rst | 2 + lld/test/CMakeLists.txt | 1 + lld/test/ELF/crash-report.test | 10 + lld/test/MachO/loh-adrp-ldr-got.s | 35 + lld/test/lit.cfg.py | 3 + lld/test/lit.site.cfg.py.in | 1 + lld/tools/lld/lld.cpp | 6 + .../Python/lldbsuite/test/lldbplatformutil.py | 14 +- lldb/packages/Python/lldbsuite/test/lldbtest.py | 1 + .../BSD-Archive/ObjectContainerBSDArchive.cpp | 208 +- .../BSD-Archive/ObjectContainerBSDArchive.h | 22 +- lldb/test/API/functionalities/archives/Makefile | 11 +- .../functionalities/archives/TestBSDArchives.py | 7 + lldb/test/API/functionalities/archives/c.c | 11 + .../two_hits_one_actual/TestTwoHitsOneActual.py | 2 + lldb/test/API/lit.cfg.py | 4 + .../{attach-wait => }/TestGdbRemoteAttachWait.py | 16 +- .../API/tools/lldb-server/TestGdbRemoteFork.py | 5 + .../tools/lldb-server/TestGdbRemoteForkNonStop.py | 5 + .../API/tools/lldb-server/attach-wait/Makefile | 1 - .../API/tools/lldb-server/attach-wait/main.cpp | 8 - .../API/tools/lldb-server/attach-wait/shim.cpp | 9 - lldb/test/CMakeLists.txt | 1 + llvm/bindings/go/llvm/ir.go | 10 - llvm/bindings/ocaml/llvm/llvm.ml | 2 - llvm/bindings/ocaml/llvm/llvm.mli | 5 - llvm/bindings/ocaml/llvm/llvm_ocaml.c | 17 - llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst | 764 +- llvm/docs/AMDGPU/gfx10_hwreg.rst | 42 +- .../AMDGPU/{gfx10_opt.rst => gfx10_opt_0d447d.rst} | 4 +- .../AMDGPU/{gfx10_opt.rst => gfx10_opt_847aed.rst} | 2 +- ...soffset_c40a5a.rst => gfx10_soffset_73dae7.rst} | 6 +- ...soffset_59fade.rst => gfx10_soffset_d01a5c.rst} | 6 +- ...x10_vdata_c61803.rst => gfx10_vdata_0aba12.rst} | 4 +- ...x10_vdata_87fb90.rst => gfx10_vdata_16d321.rst} | 4 +- ...x10_vdata_325b78.rst => gfx10_vdata_35851e.rst} | 6 +- ...x10_vdata_b2a787.rst => gfx10_vdata_890652.rst} | 4 +- ...x10_vdata_4d8ecf.rst => gfx10_vdata_a9ff5a.rst} | 6 +- ...gfx10_vdst_48d3a8.rst => gfx10_vdst_2ea017.rst} | 6 +- ...gfx10_vdst_a49b76.rst => gfx10_vdst_322561.rst} | 6 +- ...gfx10_vdst_5d50a1.rst => gfx10_vdst_709347.rst} | 4 +- llvm/docs/AMDGPU/gfx10_vdst_719833.rst | 21 - ...gfx10_vdst_d7c57e.rst => gfx10_vdst_81a6ed.rst} | 4 +- ...gfx10_vdst_f47754.rst => gfx10_vdst_d71f1c.rst} | 4 +- ...gfx10_vdst_a49b76.rst => gfx10_vdst_dd8a32.rst} | 4 +- llvm/docs/DeveloperPolicy.rst | 38 +- llvm/docs/GettingInvolved.rst | 5 + llvm/docs/LangRef.rst | 16 +- llvm/docs/ReleaseNotes.rst | 3 + llvm/include/llvm-c/Core.h | 3 - .../include/llvm/Analysis/IRSimilarityIdentifier.h | 2 +- llvm/include/llvm/Analysis/TargetFolder.h | 32 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 7 +- llvm/include/llvm/IR/CMakeLists.txt | 1 + llvm/include/llvm/IR/ConstantFolder.h | 31 +- llvm/include/llvm/IR/Constants.h | 15 +- llvm/include/llvm/IR/Intrinsics.td | 1 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 10 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/IR/IntrinsicsDirectX.td | 20 + llvm/include/llvm/Object/OffloadBinary.h | 2 +- llvm/include/llvm/ObjectYAML/ObjectYAML.h | 2 + llvm/include/llvm/ObjectYAML/OffloadYAML.h | 79 + llvm/include/llvm/ObjectYAML/yaml2obj.h | 5 + llvm/include/llvm/Support/ARMTargetParser.def | 3 + llvm/include/llvm/Transforms/Utils/LoopUtils.h | 8 +- .../Vectorize/LoopVectorizationLegality.h | 7 - llvm/lib/Analysis/BranchProbabilityInfo.cpp | 6 +- llvm/lib/Analysis/ConstantFolding.cpp | 13 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 6 +- llvm/lib/Analysis/ScalarEvolution.cpp | 19 +- llvm/lib/AsmParser/LLParser.cpp | 28 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 3 - llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 91 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 39 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 9 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 5 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 8 +- llvm/lib/IR/AsmWriter.cpp | 4 - llvm/lib/IR/ConstantFold.cpp | 27 +- llvm/lib/IR/Constants.cpp | 71 +- llvm/lib/IR/ConstantsContext.h | 60 +- llvm/lib/IR/Core.cpp | 12 - llvm/lib/IR/Function.cpp | 1 + llvm/lib/ObjCopy/ELF/ELFObject.cpp | 7 +- llvm/lib/Object/OffloadBinary.cpp | 5 + llvm/lib/ObjectYAML/CMakeLists.txt | 2 + llvm/lib/ObjectYAML/ObjectYAML.cpp | 3 + llvm/lib/ObjectYAML/OffloadEmitter.cpp | 68 + llvm/lib/ObjectYAML/OffloadYAML.cpp | 78 + llvm/lib/ObjectYAML/yaml2obj.cpp | 2 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 113 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 59 +- llvm/lib/Target/AArch64/SMEInstrFormats.td | 34 + llvm/lib/Target/AMDGPU/AMDGPU.h | 3 + llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 53 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h | 8 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 43 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 13 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 + llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp | 175 + llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 127 +- llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp | 212 + llvm/lib/Target/AMDGPU/GCNVOPDUtils.h | 32 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 12 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 3 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 63 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 29 + llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 2 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 34 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 14 + llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 +- llvm/lib/Target/AMDGPU/VOPCInstructions.td | 2 - llvm/lib/Target/AMDGPU/VOPInstructions.td | 6 +- llvm/lib/Target/ARM/ARM.td | 7 + llvm/lib/Target/DirectX/DXIL.td | 39 +- llvm/lib/Target/DirectX/DXILOpLowering.cpp | 1 + llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h | 4 + .../Target/LoongArch/LoongArchFloat32InstrInfo.td | 8 + .../Target/LoongArch/LoongArchFloat64InstrInfo.td | 8 + llvm/lib/Target/LoongArch/LoongArchFrameLowering.h | 6 + .../lib/Target/LoongArch/LoongArchISelLowering.cpp | 154 + llvm/lib/Target/LoongArch/LoongArchISelLowering.h | 4 + llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp | 70 +- llvm/lib/Target/LoongArch/LoongArchInstrInfo.h | 10 + llvm/lib/Target/LoongArch/LoongArchInstrInfo.td | 143 +- llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp | 24 +- .../lib/Target/LoongArch/LoongArchRegisterInfo.cpp | 24 +- llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp | 4 - llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 45 +- .../Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | 6 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 73 +- llvm/lib/Target/RISCV/RISCVFrameLowering.h | 2 + llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 219 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 12 +- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 6 +- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 5 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 - llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 9 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 36 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 23 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 2 +- llvm/lib/Target/VE/VERegisterInfo.cpp | 203 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 10 +- llvm/lib/ToolDrivers/llvm-lib/Options.td | 2 + llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 18 +- llvm/lib/Transforms/IPO/MergeFunctions.cpp | 2 +- llvm/lib/Transforms/IPO/PruneEH.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 78 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 + .../Transforms/InstCombine/InstCombineCalls.cpp | 7 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 9 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 11 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 10 + .../InstCombine/InstructionCombining.cpp | 8 +- llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 19 +- llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 2 +- 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llvm/test/Transforms/SimplifyCFG/jump-threading.ll | 174 +- llvm/test/Transforms/SimplifyCFG/pr55765.ll | 4 +- llvm/test/Transforms/SimplifyCFG/wc-widen-block.ll | 11 +- .../2010-06-26-MultipleReturnValues.ll | 6 +- .../Transforms/TailCallElim/accum_recursion.ll | 2 +- llvm/test/Transforms/TailCallElim/basic.ll | 2 +- .../VectorCombine/AArch64/select-shuffle.ll | 344 +- .../Transforms/WholeProgramDevirt/expand-check.ll | 2 +- .../Inputs/aarch64_function_name.ll | 4 +- .../Inputs/aarch64_function_name.ll.expected | 4 +- .../Inputs/amdgpu_function_name.ll | 4 +- .../Inputs/amdgpu_function_name.ll.expected | 4 +- .../Inputs/amdgpu_generated_funcs.ll | 2 +- .../amdgpu_generated_funcs.ll.generated.expected | 1 + .../amdgpu_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/arm_function_name.ll | 4 +- .../Inputs/arm_function_name.ll.expected | 4 +- .../Inputs/hexagon_function_name.ll | 4 +- .../Inputs/hexagon_function_name.ll.expected | 4 +- .../Inputs/hexagon_generated_funcs.ll | 2 +- .../hexagon_generated_funcs.ll.generated.expected | 1 + ...hexagon_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/lanai_function_name.ll | 4 +- .../Inputs/lanai_function_name.ll.expected | 4 +- .../Inputs/lanai_generated_funcs.ll | 2 +- .../lanai_generated_funcs.ll.generated.expected | 1 + .../lanai_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/mips_function_name.ll | 4 +- .../Inputs/mips_function_name.ll.expected | 4 +- .../Inputs/mips_generated_funcs.ll | 2 +- .../mips_generated_funcs.ll.generated.expected | 1 + .../mips_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/msp430_function_name.ll | 4 +- .../Inputs/msp430_function_name.ll.expected | 4 +- .../Inputs/msp430_generated_funcs.ll | 2 +- .../msp430_generated_funcs.ll.generated.expected | 1 + .../msp430_generated_funcs.ll.nogenerated.expected | 2 +- .../Inputs/ppc_function_name.ll | 4 +- .../Inputs/ppc_function_name.ll.expected | 4 +- .../Inputs/ppc_generated_funcs.ll | 2 +- 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llvm/tools/obj2yaml/obj2yaml.h | 7 +- llvm/tools/obj2yaml/offload2yaml.cpp | 82 + llvm/unittests/Support/TargetParserTest.cpp | 8 +- llvm/utils/UpdateTestChecks/asm.py | 3 +- llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 1 + llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 3 + llvm/utils/gn/secondary/lld/test/BUILD.gn | 1 + .../gn/secondary/llvm/include/llvm/IR/BUILD.gn | 11 + .../gn/secondary/llvm/lib/ObjectYAML/BUILD.gn | 2 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 2 + .../gn/secondary/llvm/tools/llvm-objdump/BUILD.gn | 1 + .../gn/secondary/llvm/tools/llvm-reduce/BUILD.gn | 1 + .../gn/secondary/llvm/tools/obj2yaml/BUILD.gn | 1 + mlir/cmake/modules/AddMLIRPython.cmake | 2 +- mlir/docs/Dialects/Affine.md | 5 +- mlir/docs/PassManagement.md | 6 +- .../mlir/Analysis/Presburger/PresburgerSpace.h | 117 +- mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td | 4 + mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h | 1 + mlir/include/mlir/Dialect/GPU/IR/GPUOps.td | 21 +- mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 1 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 16 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 9 + mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td | 12 +- mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td | 180 +- .../mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td | 2 +- mlir/include/mlir/Dialect/SCF/IR/SCFOps.td | 109 - mlir/include/mlir/Dialect/Tensor/IR/Tensor.h | 1 + mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 149 + mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td | 5 +- mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td | 3 +- mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 1 + mlir/include/mlir/IR/AffineMap.h | 6 + mlir/include/mlir/Interfaces/ViewLikeInterface.td | 15 +- mlir/lib/Analysis/Presburger/PresburgerSpace.cpp | 49 +- mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 2 +- .../Transforms/AllocTensorElimination.cpp | 21 +- mlir/lib/Dialect/Complex/IR/ComplexOps.cpp | 28 + mlir/lib/Dialect/GPU/CMakeLists.txt | 2 + .../Dialect/GPU/IR/InferIntRangeInterfaceImpls.cpp | 97 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 24 + mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 2 +- .../lib/Dialect/Linalg/Transforms/DropUnitDims.cpp | 75 +- ...onsumer.cpp => FusePadOpWithLinalgProducer.cpp} | 2 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 28 + mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 47 +- mlir/lib/Dialect/MemRef/Transforms/MultiBuffer.cpp | 4 +- mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 55 +- mlir/lib/Dialect/SCF/IR/CMakeLists.txt | 1 - mlir/lib/Dialect/SCF/IR/SCF.cpp | 143 +- .../SCF/Transforms/BufferizableOpInterfaceImpl.cpp | 246 +- .../SparseTensor/Transforms/Sparsification.cpp | 9 +- mlir/lib/Dialect/Tensor/IR/CMakeLists.txt | 1 + mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 256 +- .../Transforms/BufferizableOpInterfaceImpl.cpp | 309 +- mlir/lib/Dialect/Tosa/IR/TosaOps.cpp | 21 +- .../Tosa/Transforms/TosaDecomposeTransposeConv.cpp | 28 +- mlir/lib/Dialect/Vector/IR/VectorOps.cpp | 37 +- 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compiler-rt/test/sanitizer_common/TestCases/Linux/malloc_usable_size.c create mode 100644 flang/test/Lower/extent_triplets.f90 create mode 100644 libcxx/benchmarks/algorithms/ranges_stable_sort.bench.cpp create mode 100644 libcxx/include/__algorithm/ranges_merge.h copy libcxx/include/__algorithm/{ranges_sort.h => ranges_stable_sort.h} (70%) create mode 100644 libcxx/include/__debug_utils/randomize_range.h create mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.merge/ranges_merge.pass.cpp create mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/ran [...] create mode 100644 lld/test/ELF/crash-report.test create mode 100644 lld/test/MachO/loh-adrp-ldr-got.s create mode 100644 lldb/test/API/functionalities/archives/c.c rename lldb/test/API/tools/lldb-server/{attach-wait => }/TestGdbRemoteAttachWait.py (80%) delete mode 100644 lldb/test/API/tools/lldb-server/attach-wait/Makefile delete mode 100644 lldb/test/API/tools/lldb-server/attach-wait/main.cpp delete mode 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2 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (a89c17dac1 -> 99298c958c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/binutils-gdb. from a89c17dac1 GDB/doc: Remove indentation from `print -elements' completio [...] adds f15f0ddd10 Automatic date update in version.in adds 47226049bb [gdb/testsuite] Fix gdb.base/early-init-file.exp with -fsani [...] adds 33fd0a3363 [gdb/symtab] Fix data race on per_cu->dwarf_version adds dcc9b683dc Automatic date update in version.in adds 1e3a4f12e7 Automatic date update in version.in adds 0f2f2e7019 RISC-V: Update Zihintpause extension version adds 9386188e95 x86-64: improve handling of branches to absolute addresses adds 02b83698ef x86: restore masking of displacement kinds adds a775efc84d x86: fold Disp32S and Disp32 adds 58098fd779 gas/testsuite: properly exclude aout in all/weakref1u adds 2c474c4694 [gdb/symtab] Add get/set functions for per_cu->lang/unit_type adds a0f3a4c646 opcodes/avr: Implement style support in the disassembler adds 407115429b Modified changes for split-dwarf and dwarf-5. adds d8efadbdd9 Synchronize libbierty sources with gcc. adds 0772daccb3 objcopy: bfd_alloc orelocation adds eeeaf705fe alloc gas seginfo on notes obstack adds 96c33f79de Fix snafu in rust demangler recursion limit code adds 10e52570b8 Automatic date update in version.in adds 8180707f90 x86: de-duplicate sub-architecture strings accumulation adds 6ceeed2506 x86: macro-ize cpu_arch[] entries adds c368d2a802 x86: introduce fake processor type to mark sub-arch entries [...] adds 4694a0e5fe Support for location and range lists for split-dwarf and dwarf-5. adds 736918239b gdb: LoongArch: add orig_a0 into register set new 3acd9a692d Make 'import gdb.events' work new 99298c958c Add gdb.Objfile.is_file attribute The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 13 + bfd/elfxx-riscv.c | 2 +- bfd/version.h | 2 +- binutils/bucomm.c | 13 + binutils/bucomm.h | 2 + binutils/dwarf.c | 53 +- binutils/dwarf.h | 2 + binutils/objcopy.c | 37 +- gas/as.h | 1 + gas/config/tc-i386-intel.c | 9 +- gas/config/tc-i386.c | 625 +- gas/config/tc-i386.h | 8 +- gas/output-file.c | 42 +- gas/subsegs.c | 37 +- gas/testsuite/gas/all/weakref1u.d | 2 +- gas/testsuite/gas/i386/i386.exp | 1 + gas/testsuite/gas/i386/x86-64-branch-6.d | 21 + gas/testsuite/gas/i386/x86-64-branch-6.e | 7 + gas/testsuite/gas/i386/x86-64-branch-6.s | 18 + gdb/NEWS | 3 + gdb/doc/python.texi | 7 + gdb/dwarf2/cooked-index.c | 10 +- gdb/dwarf2/cu.c | 2 +- gdb/dwarf2/index-write.c | 2 +- gdb/dwarf2/read.c | 233 +- gdb/dwarf2/read.h | 59 +- gdb/features/loongarch/base32.c | 1 + gdb/features/loongarch/base32.xml | 1 + gdb/features/loongarch/base64.c | 1 + gdb/features/loongarch/base64.xml | 1 + gdb/loongarch-linux-nat.c | 2 + gdb/loongarch-linux-tdep.c | 8 + gdb/loongarch-tdep.c | 1 + gdb/loongarch-tdep.h | 7 +- gdb/python/lib/gdb/__init__.py | 5 + gdb/python/py-evtregistry.c | 4 +- gdb/python/py-evts.c | 28 +- gdb/python/py-objfile.c | 14 + gdb/python/python-internal.h | 4 +- gdb/python/python.c | 16 +- gdb/testsuite/gdb.base/early-init-file.exp | 19 +- gdb/testsuite/gdb.base/jit-reader.exp | 12 + gdb/testsuite/gdb.python/py-events.exp | 2 + libiberty/ChangeLog | 146 +- libiberty/configure | 1 + libiberty/configure.ac | 1 + libiberty/rust-demangle.c | 47 +- opcodes/ChangeLog | 9 + opcodes/avr-dis.c | 51 +- opcodes/disassemble.c | 5 + opcodes/i386-gen.c | 10 +- opcodes/i386-init.h | 132 +- opcodes/i386-opc.h | 5 +- opcodes/i386-opc.tbl | 15 +- opcodes/i386-tbl.h | 25585 ++++++++++++++------------- 55 files changed, 13820 insertions(+), 13524 deletions(-) create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.d create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.e create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig updated (f39510a8 -> 0f5da250)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards f39510a8 0: update: binutils-llvm-linux-qemu: all new 0f5da250 0: update: binutils-llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f39510a8) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1656 -> 1844 bytes 02-prepare_abe/console.log.xz | Bin 2744 -> 2728 bytes 03-build_abe-binutils/console.log.xz | Bin 30492 -> 30320 bytes 04-build_kernel_llvm/console.log.xz | Bin 63328 -> 62196 bytes 05-build_abe-qemu/console.log.xz | Bin 32988 -> 32940 bytes 06-build_linux/console.log.xz | Bin 3632 -> 3768 bytes 07-boot_linux/console.log.xz | Bin 496 -> 496 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 2 +- jenkins/manifest.sh | 22 +++++++++++----------- 10 files changed, 12 insertions(+), 12 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_native_check_gcc/release-aarch64 updated (4d905b269f -> 176b5961ce)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/release-aarch64 in repository toolchain/ci/gdb. from 4d905b269f Automatic date update in version.in adds 741d8b0429 Automatic date update in version.in adds 9c9114ea34 Automatic date update in version.in adds 176b5961ce Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_native_check_gcc/release-aarch64 updated (ad5d760b815 -> 92d1e271a92)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/release-aarch64 in repository toolchain/ci/gcc. from ad5d760b815 jit: avoid calloc() poisoning on musl [PR106102] adds a60152e87cc Daily bump. adds 55899e33de7 PR target/106122: Don't update %esp via the stack with -Oz on x86. adds cf12a703cf7 Fortran: improve error recovery for EXTENDS_TYPE_OF() [PR106121] adds d870ce1a112 Fortran: error recovery on invalid CLASS(), PARAMETER decla [...] adds 554fa149a0b Daily bump. adds d6bedcfcefc loongarch: use -mno-check-zero-division as the default for [...] adds 6c175b3d170 PR target/105991: Recognize PLUS and XOR forms of rldimi in [...] adds 32dfb075ad3 d: Fix error: aggregate value used where floating point was [...] adds d4738cbb02e Don't use gori depedencies to optimize. adds 92d1e271a92 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 46 ++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/common/config/loongarch/loongarch-common.cc | 3 -- gcc/config/i386/i386.md | 3 +- gcc/config/loongarch/loongarch.cc | 18 +++++-- gcc/config/rs6000/rs6000.md | 21 ++++++++- gcc/cp/ChangeLog | 10 ++++ gcc/d/ChangeLog | 15 ++++++ gcc/d/d-convert.cc | 44 ++++++++++++++++- gcc/d/expr.cc | 10 +++- gcc/d/toir.cc | 1 + gcc/doc/invoke.texi | 3 +- gcc/fortran/ChangeLog | 24 ++++++++++ gcc/fortran/decl.cc | 8 ++++ gcc/fortran/simplify.cc | 4 ++ gcc/gimple-range-fold.cc | 30 +++++++----- gcc/jit/ChangeLog | 11 +++++ gcc/testsuite/ChangeLog | 60 ++++++++++++++++++++++++ gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 1 + gcc/testsuite/gcc.dg/pr106114.c | 14 ++++++ gcc/testsuite/gcc.target/i386/pr106122.c | 15 ++++++ gcc/testsuite/gcc.target/powerpc/pr105991.c | 12 +++++ gcc/testsuite/gdc.dg/pr106139a.d | 36 ++++++++++++++ gcc/testsuite/gdc.dg/pr106139b.d | 36 ++++++++++++++ gcc/testsuite/gdc.dg/pr106139c.d | 27 +++++++++++ gcc/testsuite/gdc.dg/pr106139d.d | 27 +++++++++++ gcc/testsuite/gfortran.dg/class_58.f90 | 2 +- gcc/testsuite/gfortran.dg/class_73.f90 | 17 +++++++ gcc/testsuite/gfortran.dg/extends_type_of_4.f90 | 20 ++++++++ libcc1/ChangeLog | 9 ++++ 30 files changed, 502 insertions(+), 27 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr106114.c create mode 100644 gcc/testsuite/gcc.target/i386/pr106122.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr105991.c create mode 100644 gcc/testsuite/gdc.dg/pr106139a.d create mode 100644 gcc/testsuite/gdc.dg/pr106139b.d create mode 100644 gcc/testsuite/gdc.dg/pr106139c.d create mode 100644 gcc/testsuite/gdc.dg/pr106139d.d create mode 100644 gcc/testsuite/gfortran.dg/class_73.f90 create mode 100644 gcc/testsuite/gfortran.dg/extends_type_of_4.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_native_check_gcc/release-aarch64 updated (4d905b269f -> 176b5961ce)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/release-aarch64 in repository toolchain/ci/binutils-gdb. from 4d905b269f Automatic date update in version.in adds 741d8b0429 Automatic date update in version.in adds 9c9114ea34 Automatic date update in version.in adds 176b5961ce Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

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