Tcwg-commits July 2022

tcwg-commits@lists.linaro.org

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15101 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-norov-defconfig updated (8190d4dd -> 87410259)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-norov-defconfig in repository toolchain/ci/base-artifacts. discards 8190d4dd 0: update: binutils-f68697e82319687871943f949078ed334f188211: boot new 87410259 0: update: qemu-180c2f24d5e8eada41e012a3899d29bb695aae06: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8190d4dd) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1684 -> 1680 bytes 02-prepare_abe/console.log.xz | Bin 2764 -> 2744 bytes 03-build_abe-binutils/console.log.xz | Bin 31316 -> 30176 bytes 04-build_kernel_llvm/console.log.xz | Bin 65924 -> 65824 bytes 05-build_abe-qemu/console.log.xz | Bin 35876 -> 32216 bytes 06-build_linux/console.log.xz | Bin 6088 -> 5472 bytes 07-boot_linux/console.log.xz | Bin 6260 -> 6232 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 8 ++++---- 10 files changed, 9 insertions(+), 9 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[gcc] branch devel/omp/gcc-12 updated (72777e6c3cd -> c4b637d1104)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/omp/gcc-12 in repository gcc. from 72777e6c3cd Restore 'GOMP_offload_unregister_ver' functionality new f86ab292ecc Adjust 'libgomp.c-c++-common/requires-3.c' new 8bdc6ae489a Enhance 'libgomp.c-c++-common/requires-4.c', 'libgomp.c-c++ [...] new c4b637d1104 Fix Intel MIC 'mkoffload' for OpenMP 'requires' The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog.omp | 10 ++++ gcc/config/i386/intelmic-mkoffload.cc | 56 +++++++++++++++++----- libgomp/ChangeLog.omp | 30 ++++++++++++ libgomp/target.c | 4 ++ libgomp/testsuite/lib/libgomp.exp | 5 ++ .../testsuite/libgomp.c-c++-common/requires-1.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-3.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-4.c | 21 ++++++-- .../testsuite/libgomp.c-c++-common/requires-5.c | 22 ++++++--- .../testsuite/libgomp.c-c++-common/requires-7.c | 2 +- libgomp/testsuite/libgomp.fortran/requires-1.f90 | 2 +- 11 files changed, 128 insertions(+), 28 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-norov-defconfig updated (e8e86b484e -> a74c66b1b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-norov-defconfig in repository toolchain/ci/qemu. from e8e86b484e Merge tag 'pull-riscv-to-apply-20220703-1' of github.com:ali [...] adds 8e72ceee5c Rename docs/specs/fw_cfg.txt to .rst adds 701caa3d6a Convert fw_cfg.rst to reStructuredText syntax adds 839a482695 ui/console: allow display device to be labeled with given id adds 8c0d80245f ui/cocoa: Fix clipboard text release adds ada270cd18 hw/usb/canokey: Fix CCID ZLP adds 1042563027 hw/usb/canokey: fix compatibility of qemu-xhci adds 8607b5149e docs/system/devices/usb/canokey: remove limitations on qemu-xhci adds 927b968d1b hw: canokey: Remove HS support as not compliant to the spec adds dfe2382f06 Merge tag 'kraxel-20220704-pull-request' of https://gitlab.c [...] adds 070f735333 linux-user: Add LoongArch generic header files adds 9d5cd6587a linux-user: Add LoongArch signal support adds 3418fe25fa linux-user: Add LoongArch elf support adds 1f63019632 linux-user: Add LoongArch syscall support adds da8c70ea82 linux-user: Add LoongArch cpu_loop support adds 0caebb9160 scripts: add loongarch64 binfmt config adds fffca8f227 target/loongarch: remove badaddr from CPULoongArch adds 7d552f0e0a target/loongarch: Fix missing update CSR_BADV adds 7fe7eea6ff target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong e [...] adds 9bc92b5013 target/loongarch: remove unused include hw/loader.h adds 0093b9a5ee target/loongarch: Adjust functions and structure to support [...] adds d32688ecdb default-configs: Add loongarch linux-user support adds 227e73c986 target/loongarch: Update README adds 490c03ab11 hw/intc/loongarch_pch_msi: Fix msi vector convertion adds 4f2c65877c hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing [...] adds df11f3ea69 hw/rtc/ls7a_rtc: Fix timer call back function adds 53a5eb2e7a hw/rtc/ls7a_rtc: Remove unimplemented device in realized function adds e5c0367e2b hw/rtc/ls7a_rtc: Add reset function adds 6935f132e5 hw/rtc/ls7a_rtc: Fix rtc enable and disable function adds 582788c3fb hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_t [...] adds 59e52dcff7 hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors adds 4623367697 target/loongarch: Fix the meaning of ECFG reg's VS field adds eb1e9ff8bb target/loongarch: Add lock when writing timer clear reg adds 1437479e5e Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/q [...] adds c1ca312a6f hw/rtc/ls7a_rtc: Drop unused inline functions adds 3517fb7267 target/loongarch: Clean up tlb when cpu reset adds f8d1ae8262 scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() adds 0df0a66555 tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER adds ddf9326184 hw/intc/loongarch_ipi: Fix ipi device access of 64bits adds bf7ce37f8f hw/intc/loongarch_ipi: Fix mail send and any send function adds 19361471b5 Merge tag 'pull-la-20220705' of https://gitlab.com/rth7680/q [...] adds 9323af2e81 tests: fix test-cutils leaks adds e0a2602070 tests/fp: Do not build softfloat3 tests if TCG is disabled adds 94b731874a gitlab: normalize indentation in edk2/opensbi rules adds 37a2b95231 gitlab: tweak comments in edk2/opensbi jobs adds 6e131bf69b gitlab: honour QEMU_CI variable in edk2/opensbi jobs adds 3a751770ee gitlab-ci: Extend timeout for ubuntu-20.04-s390x-all to 75m adds 276dfd03f0 tests: wait max 120 seconds for migration test status changes adds 8d4e897a99 tests: wait for migration completion before looking for STOP event adds 6843ad8c03 tests: increase migration test converge downtime to 30 seconds adds 886dfe9db3 tests: use consistent bandwidth/downtime limits in migration tests adds 2116650254 disas: Remove libvixl disassembler adds 6d17020a80 po: add ukrainian translation adds 1ec8c2c01e meson.build: Require a recent version of libpng adds 7a890b7566 include/qemu/host-utils: Remove unused code in the *_overflo [...] adds d82423a697 Merge tag 'pull-request-2022-07-05' of https://gitlab.com/th [...] adds be9c61da9f xen/pass-through: merge emulated bits correctly adds c0e86b7624 xen/pass-through: don't create needless register group adds 39e19f5f67 Merge tag 'pull-xen-20220705' of https://xenbits.xen.org/git [...] adds 034d00d485 e1000: set RX descriptor status in a separate operation adds a495eba03c ebpf: replace deprecated bpf_program__set_socket_filter adds 180c2f24d5 Merge tag 'net-pull-request' of https://github.com/jasowang/ [...] adds 23f0a6c80d m68k: use correct variable name in boot info string macro adds a988465d0e m68k: virt: pass RNG seed via bootinfo block adds 0e3723005b Merge tag 'm68k-for-7.1-pull-request' of https://github.com/ [...] adds 1c69cb4e75 ppc/pnv: move root port attach to pnv_phb4_realize() adds 8625164a38 ppc/pnv: attach phb3/phb4 root ports in QOM tree adds 792e8bb629 ppc/pnv: assign pnv-phb-root-port chassis/slot earlier adds da6be50136 ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array adds ca45948991 ppc/pnv: make pnv_ics_resend() use chip8->phbs[] adds 8a69bca77a ppc/pnv: make pnv_chip_power8_pic_print_info() use chip8->phbs[] adds 71cd3e5ecb ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus adds 21870aab36 ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 root bus adds 59f11543e2 target/ppc: Change FPSCR_* to follow POWER ISA numbering convention adds 31cc81f728 spapr/ddw: Reset DMA when the last non-default window is removed adds c0e765dafb spapr/ddw: Implement 64bit query extension adds e82ca8acdd target/ppc: use int128.h methods in vpmsumd adds 7ca0428687 target/ppc: use int128.h methods in vadduqm adds 896d92c81d target/ppc: use int128.h methods in vaddecuq and vaddeuqm adds 8290ea509f target/ppc: use int128.h methods in vaddcuq adds b132be53a4 target/ppc: use int128.h methods in vsubuqm adds e6a5ad43de target/ppc: use int128.h methods in vsubecuq and vsubeuqm adds b7d30fae5b target/ppc: use int128.h methods in vsubcuq adds 95444afcab ppc: Define SETFIELD for the ppc target adds 81b205cecf ppc/spapr: Implement H_WATCHDOG adds bbecdb22ae target/ppc: Fix insn32.decode style issues adds bf8adfd88b target/ppc: Move mffscrn[i] to decodetree adds 394c2e2fda target/ppc: Move mffsce to decodetree adds 3e5bce70ef target/ppc: Move mffsl to decodetree adds f80d04d548 target/ppc: Move mffs[.] to decodetree adds 6cef305fe7 target/ppc: Implement mffscdrn[i] instructions adds 7141a173c8 tests/tcg/ppc64: Add mffsce test adds 4dc5f8abdc target/ppc: Add flag for ISA v2.06 BCDA instructions adds 6addef4d27 target/ppc: implement addg6s adds 38d3690bda target/ppc: implement cbcdtd adds 6b924d4afc target/ppc: implement cdtbcd adds c7e89de132 target/ppc: Return default CPU for max CPU adds 7886605961 target/ppc/cpu-models: Remove the "default" CPU alias adds 0b83377f46 target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 adds 8e9398e3b1 Merge tag 'pull-ppc-20220706' of https://gitlab.com/danielhb [...] new c06fc7ce14 io_uring: fix short read slow path new be6a166fde block/io_uring: clarify that short reads can happen new a74c66b1b9 Merge tag 'block-pull-request' of https://gitlab.com/stefanh [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml | 1 + .gitlab-ci.d/edk2.yml | 133 +- .gitlab-ci.d/opensbi.yml | 134 +- MAINTAINERS | 4 - block/io_uring.c | 12 +- configs/targets/loongarch64-linux-user.mak | 3 + disas.c | 3 - disas/arm-a64.cc | 101 - disas/libvixl/LICENCE | 30 - disas/libvixl/README | 11 - disas/libvixl/meson.build | 7 - disas/libvixl/vixl/a64/assembler-a64.h | 4624 -------------------- disas/libvixl/vixl/a64/constants-a64.h | 2116 --------- disas/libvixl/vixl/a64/cpu-a64.h | 83 - disas/libvixl/vixl/a64/decoder-a64.cc | 877 ---- disas/libvixl/vixl/a64/decoder-a64.h | 275 -- disas/libvixl/vixl/a64/disasm-a64.cc | 3495 --------------- disas/libvixl/vixl/a64/disasm-a64.h | 177 - disas/libvixl/vixl/a64/instructions-a64.cc | 622 --- disas/libvixl/vixl/a64/instructions-a64.h | 757 ---- disas/libvixl/vixl/code-buffer.h | 113 - disas/libvixl/vixl/compiler-intrinsics.cc | 144 - disas/libvixl/vixl/compiler-intrinsics.h | 155 - disas/libvixl/vixl/globals.h | 155 - disas/libvixl/vixl/invalset.h | 775 ---- disas/libvixl/vixl/platform.h | 39 - disas/libvixl/vixl/utils.cc | 142 - disas/libvixl/vixl/utils.h | 286 -- disas/meson.build | 5 - docs/specs/{fw_cfg.txt => fw_cfg.rst} | 211 +- docs/specs/index.rst | 1 + docs/system/devices/canokey.rst | 10 - ebpf/ebpf_rss.c | 2 +- hw/intc/loongarch_ipi.c | 92 +- hw/intc/loongarch_pch_msi.c | 22 +- hw/intc/pnv_xive.c | 20 - hw/intc/pnv_xive2.c | 20 - hw/loongarch/loongson3.c | 6 +- hw/m68k/bootinfo.h | 18 +- hw/m68k/virt.c | 7 + hw/net/e1000.c | 5 +- hw/pci-host/pnv_phb3.c | 22 +- hw/pci-host/pnv_phb4.c | 40 +- hw/pci-host/pnv_phb4_pec.c | 3 - hw/ppc/pnv.c | 102 +- hw/ppc/spapr.c | 4 + hw/ppc/spapr_iommu.c | 3 +- hw/ppc/spapr_pci.c | 6 +- hw/ppc/spapr_rtas_ddw.c | 34 +- hw/rtc/ls7a_rtc.c | 154 +- hw/usb/canokey.c | 31 +- hw/watchdog/meson.build | 1 + hw/watchdog/spapr_watchdog.c | 274 ++ hw/watchdog/trace-events | 7 + hw/xen/xen_pt_config_init.c | 25 +- include/exec/poison.h | 2 - include/hw/intc/loongarch_ipi.h | 7 +- include/hw/intc/loongarch_pch_msi.h | 2 + include/hw/pci-host/pnv_phb3_regs.h | 16 - include/hw/ppc/pnv.h | 3 +- include/hw/ppc/spapr.h | 26 +- include/qemu/host-utils.h | 65 - include/standard-headers/asm-m68k/bootinfo-virt.h | 1 + include/ui/console.h | 1 + linux-user/elfload.c | 91 + linux-user/loongarch64/cpu_loop.c | 96 + linux-user/loongarch64/signal.c | 335 ++ linux-user/loongarch64/sockbits.h | 11 + linux-user/loongarch64/syscall_nr.h | 312 ++ linux-user/loongarch64/target_cpu.h | 34 + linux-user/loongarch64/target_elf.h | 12 + linux-user/loongarch64/target_errno_defs.h | 12 + linux-user/loongarch64/target_fcntl.h | 11 + linux-user/{arm => loongarch64}/target_prctl.h | 0 linux-user/loongarch64/target_resource.h | 11 + linux-user/loongarch64/target_signal.h | 13 + linux-user/loongarch64/target_structs.h | 11 + linux-user/loongarch64/target_syscall.h | 48 + linux-user/loongarch64/termbits.h | 11 + linux-user/syscall_defs.h | 6 +- meson.build | 6 +- po/LINGUAS | 1 + po/uk.po | 75 + scripts/clean-header-guards.pl | 4 +- scripts/clean-includes | 2 +- scripts/coverity-scan/COMPONENTS.md | 3 - scripts/gensyscalls.sh | 2 + scripts/qemu-binfmt-conf.sh | 9 +- target/arm/cpu.c | 7 - target/loongarch/README | 39 +- target/loongarch/cpu.c | 39 +- target/loongarch/cpu.h | 8 +- target/loongarch/csr_helper.c | 2 + target/loongarch/gdbstub.c | 2 +- target/loongarch/helper.h | 2 + target/loongarch/insn_trans/trans_privileged.c.inc | 36 + target/loongarch/internals.h | 2 + target/loongarch/op_helper.c | 10 +- target/ppc/cpu-models.c | 17 +- target/ppc/cpu-models.h | 14 +- target/ppc/cpu.h | 89 +- target/ppc/cpu_init.c | 29 +- target/ppc/dfp_helper.c | 65 + target/ppc/helper.h | 20 +- target/ppc/insn32.decode | 71 +- target/ppc/int_helper.c | 229 +- target/ppc/internal.h | 3 - target/ppc/translate/fixedpoint-impl.c.inc | 51 + target/ppc/translate/fp-impl.c.inc | 203 +- target/ppc/translate/fp-ops.c.inc | 9 - target/ppc/translate/vmx-impl.c.inc | 32 +- target/ppc/translate/vmx-ops.c.inc | 9 +- tcg/tci/tcg-target.c.inc | 7 - tcg/tci/tcg-target.h | 5 - tests/fp/meson.build | 3 + tests/qtest/migration-helpers.c | 14 + tests/qtest/migration-test.c | 59 +- tests/tcg/ppc64/Makefile.target | 1 + tests/tcg/ppc64le/Makefile.target | 1 + tests/tcg/ppc64le/mffsce.c | 37 + tests/unit/test-cutils.c | 42 +- ui/cocoa.m | 4 +- ui/console.c | 41 +- 123 files changed, 2740 insertions(+), 16100 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak delete mode 100644 disas/arm-a64.cc delete mode 100644 disas/libvixl/LICENCE delete mode 100644 disas/libvixl/README delete mode 100644 disas/libvixl/meson.build delete mode 100644 disas/libvixl/vixl/a64/assembler-a64.h delete mode 100644 disas/libvixl/vixl/a64/constants-a64.h delete mode 100644 disas/libvixl/vixl/a64/cpu-a64.h delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.cc delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.h delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.cc delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.h delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.cc delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.h delete mode 100644 disas/libvixl/vixl/code-buffer.h delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.cc delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.h delete mode 100644 disas/libvixl/vixl/globals.h delete mode 100644 disas/libvixl/vixl/invalset.h delete mode 100644 disas/libvixl/vixl/platform.h delete mode 100644 disas/libvixl/vixl/utils.cc delete mode 100644 disas/libvixl/vixl/utils.h rename docs/specs/{fw_cfg.txt => fw_cfg.rst} (58%) create mode 100644 hw/watchdog/spapr_watchdog.c create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h copy linux-user/{arm => loongarch64}/target_prctl.h (100%) create mode 100644 linux-user/loongarch64/target_resource.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 po/uk.po create mode 100644 tests/tcg/ppc64le/mffsce.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-norov-defconfig updated (a60152e87cc -> ce40e06ea99)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-norov-defconfig in repository toolchain/ci/gcc. from a60152e87cc Daily bump. adds 55899e33de7 PR target/106122: Don't update %esp via the stack with -Oz on x86. adds cf12a703cf7 Fortran: improve error recovery for EXTENDS_TYPE_OF() [PR106121] adds d870ce1a112 Fortran: error recovery on invalid CLASS(), PARAMETER decla [...] adds 554fa149a0b Daily bump. adds d6bedcfcefc loongarch: use -mno-check-zero-division as the default for [...] adds 6c175b3d170 PR target/105991: Recognize PLUS and XOR forms of rldimi in [...] adds 32dfb075ad3 d: Fix error: aggregate value used where floating point was [...] adds d4738cbb02e Don't use gori depedencies to optimize. adds 92d1e271a92 Daily bump. adds 24f321345d8 Daily bump. adds 65941a91091 c-family: Prevent -Wformat warnings with u8 strings [PR105626] adds 40ddc305802 c-family: Add <time.h> names to diagnostics for known headers adds ce40e06ea99 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 38 ++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 17 ++++++ gcc/c-family/c-format.cc | 3 +- gcc/c-family/known-headers.cc | 14 +++++ gcc/common/config/loongarch/loongarch-common.cc | 3 - gcc/config/i386/i386.md | 3 +- gcc/config/loongarch/loongarch.cc | 18 +++++- gcc/config/rs6000/rs6000.md | 21 ++++++- gcc/d/ChangeLog | 15 +++++ gcc/d/d-convert.cc | 44 +++++++++++++- gcc/d/expr.cc | 10 +++- gcc/d/toir.cc | 1 + gcc/doc/invoke.texi | 3 +- gcc/fortran/ChangeLog | 24 ++++++++ gcc/fortran/decl.cc | 8 +++ gcc/fortran/simplify.cc | 4 ++ gcc/gimple-range-fold.cc | 30 ++++++---- gcc/testsuite/ChangeLog | 75 ++++++++++++++++++++++++ gcc/testsuite/g++.dg/spellcheck-stdlib.C | 29 +++++++++ gcc/testsuite/g++.dg/warn/Wformat-char8_t-1.C | 10 ++++ gcc/testsuite/gcc.c-torture/execute/20101011-1.c | 1 + gcc/testsuite/gcc.dg/pr106114.c | 14 +++++ gcc/testsuite/gcc.target/i386/pr106122.c | 15 +++++ gcc/testsuite/gcc.target/powerpc/pr105991.c | 12 ++++ gcc/testsuite/gdc.dg/pr106139a.d | 36 ++++++++++++ gcc/testsuite/gdc.dg/pr106139b.d | 36 ++++++++++++ gcc/testsuite/gdc.dg/pr106139c.d | 27 +++++++++ gcc/testsuite/gdc.dg/pr106139d.d | 27 +++++++++ gcc/testsuite/gfortran.dg/class_58.f90 | 2 +- gcc/testsuite/gfortran.dg/class_73.f90 | 17 ++++++ gcc/testsuite/gfortran.dg/extends_type_of_4.f90 | 20 +++++++ 32 files changed, 551 insertions(+), 28 deletions(-) create mode 100644 gcc/testsuite/g++.dg/warn/Wformat-char8_t-1.C create mode 100644 gcc/testsuite/gcc.dg/pr106114.c create mode 100644 gcc/testsuite/gcc.target/i386/pr106122.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr105991.c create mode 100644 gcc/testsuite/gdc.dg/pr106139a.d create mode 100644 gcc/testsuite/gdc.dg/pr106139b.d create mode 100644 gcc/testsuite/gdc.dg/pr106139c.d create mode 100644 gcc/testsuite/gdc.dg/pr106139d.d create mode 100644 gcc/testsuite/gfortran.dg/class_73.f90 create mode 100644 gcc/testsuite/gfortran.dg/extends_type_of_4.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-norov-defconfig updated (f0b3db3175 -> 2365eacffe)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-norov-defconfig in repository toolchain/ci/binutils-gdb. from f0b3db3175 Automatic date update in version.in adds 37eaf1f099 Automatic date update in version.in adds 178b942b8e Automatic date update in version.in adds 3972c8ffe0 Automatic date update in version.in adds 2365eacffe Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-norov-defconfig updated (871d175f -> 75e62a1d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-norov-defconfig in repository toolchain/ci/base-artifacts. discards 871d175f 0: update: binutils-gcc-linux-qemu: boot new 75e62a1d 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (871d175f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1644 -> 1624 bytes 02-prepare_abe/console.log.xz | Bin 2744 -> 2736 bytes 03-build_abe-binutils/console.log.xz | Bin 29824 -> 29992 bytes 04-build_abe-stage1/console.log.xz | Bin 85456 -> 85856 bytes 05-build_abe-qemu/console.log.xz | Bin 32356 -> 31604 bytes 06-build_linux/console.log.xz | Bin 3936 -> 3824 bytes 07-boot_linux/console.log.xz | Bin 5736 -> 5744 bytes 08-check_regression/console.log.xz | Bin 400 -> 412 bytes 09-update_baseline/console.log | 13 ++++++++----- jenkins/manifest.sh | 18 +++++++++--------- 10 files changed, 17 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (dc969061c68e -> 0880b9d52620)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/llvm-project. from dc969061c68e [SimplifyCFG] Thread all predecessors with same value at once adds 9fbf1107cc76 [pseudo] Eliminate LRTable::Action. NFC adds 8cd79bc12c36 [AMDGPU][GlobalISel] Support register offsets for SMRDs. adds 4696a33dfaef [AMDGPU][NFC] Refine matching SMRD offsets. adds 70c0d92930b2 [pseudo] Use the prebuilt cxx grammar for the lit tests, NFC. adds 6e2058e58832 [Compiler-RT] Remove FlushViewOfFile call when unmapping [...] adds e4d1d0cc2c9c [SCEV] Fix isImpliedViaMerge() with values from previous i [...] adds b27d6ffe4e4a [RuntimeDyld] Fix R_AARCH64_TSTBR14 relocation adds d26344731128 [pseudo] Fix the build for the benchmark tool. adds d1af09ad9617 [AMDGPU] gfx11 Generate VOPD Instructions adds f10d271ae27f [clang][dataflow] Handle null pointers of type std::nullptr_t adds 935570b2ad80 [ConstExpr] Don't create div/rem expressions adds 9ab67cc8bfe7 [pseudo] Implement guard extension. adds cccc03df3c17 [gn build] Port d1af09ad9617 adds cc6462a475e2 [mlir][tensor][bufferize][NFC] Clean up test case adds 0483c91eee9e [AMDGPU] gfx11 CodeGen for new DPP instructions adds 6c3c5f8069d9 [mlir][memref] Improve type inference for rank-reducing subviews adds a4772cbaf0dc Revert "[SimplifyCFG] Thread branches on same condition in [...] adds fb0654ced388 [mlir][interfaces][NFC] Remove ViewLikeInterface::expandToRank adds 58809a1eb1af [mlir][memref][NFC] Silence compiler warnings adds c35a6454b1af [BUILD] Add missed CMakeLists.txt change from dfb77f2 adds 12fd00ee1777 [AMDGPU] Add patterns for GFX11 v_minmax and v_maxmin inst [...] adds ed3b040b54f4 [MLIR][Presburger] Rename attachments to identifiers in Pr [...] adds e7a0fa4df00c [DAG] foldAddSubOfSignBit - don't bother creating the new [...] adds 7068c843d254 [DAG] visitREM - use isAllOnesOrAllOnesSplat instead of is [...] adds 988d4f576fdf Revert "[mlir][sparse] add more unittest cases to sparse d [...] adds e70ea18e2fde [Assembler] Name globals in test (NFC) adds 5493f8fc59ca [VectorCombine] Improve shuffle select shuffle-of-shuffles adds 07b185ed8157 [Thumb2] Remove unneeded IR from MIR test (NFC) adds 4dbc2876cff2 [AMDGPU] GFX11 trivial NFC tweaks adds a2158374ba1a [mlir][LLVMIR] Apply CallOp/CallableInterface on suitable [...] adds b8dbc6ffea93 [HLSL] Add ExternalSemaSource & vector alias adds dbf6ab5ef9ae [LSR] Fix bug for optimizing unused IVs to final values adds 7b1ff859feaa [gn build] Port b8dbc6ffea93 adds 5d7fa481cf4d [analyzer] Do not emit redundant SymbolCasts adds 2df120784af4 [analyzer] Fix assertion in simplifySymbolCast adds f51c47d98791 Revert "[lldb/test] Don't use preexec_fn for launching inferiors" adds 3f58177d7ffa [llvm-lib] Ignore /NODEFAULTLIB flag adds 0bb1bf1b1761 [LinkerWrapper] Add AMDGPU specific options to the LLD invocation adds f2beca908d4e [mlir][tblgen] Consistently use `$_ctxt` instead of `$_ctx` adds b170d856a3a3 [SimplifyCFG] Skip hoisting common instructions that retur [...] adds a0468a56f09b [InstCombine] add tests for sqrt libcalls; NFC adds 1562b1dcb978 [InstCombine] avoid conflict between CHECK prefix and valu [...] adds 312116748890 [pseudo] Add error-recovery framework & brace-based recovery adds d27d0a673c64 [Libomptarget][NFC] Make Libomptarget use the LLVM naming [...] adds 1d27faa5fec0 [AMDGPU] NFC. Add a test of the error message for assembli [...] adds 3ff319c69047 [PowerPC] PPCTLSDynamicCall does not preserve LiveIntervals adds c15bcad2f9c3 [RISCV] Update PreprocessISelDAG to use RemoveDeadNodes. adds a1cd3f49b680 [RISCV] Use a switch statement in PreprocessISelDAG. NFC adds ac3e26bcffa2 [RISCV] Add more SHXADD tests. NFC adds 05130a6ba7d9 new clang-tidy checker for assignments within condition cl [...] adds 6bb17d7fac6d [gn build] Port 05130a6ba7d9 adds 40af95d80bcb [clang-tools-extra] Fix a link in ReleaseNotes.rst adds 5cca2ef3c35a [LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator adds a6e63e35ede4 [NFC][HLSL] Add tests for vector alias. Remove dead code. adds bb9b30ffbe7c [LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator adds f553287b5889 [RISCV][Driver] Add libm linking to `RISCVToolchain` for C++ adds 9b1cf2e2b2a8 Fix running orc-rt tests with LLVM_BUILD_EXTERNAL_COMPILER [...] adds b97013fd6097 [AArch64][GlobalISel] Add support for sret demotion. adds 43d5c4d5394e [OpenMP] add 4 custom APIs supporting MSVC OMP codegen adds ab9cdf09f4f0 [mlir:Parser] Don't use strings for the "ugly" form of Att [...] adds 088bb8a328e0 [RISCV] Add more SHXADD patterns where the input is (and ( [...] adds ea8b811bf800 [lldb/Core] Fix finite progress event reporting adds 18e4674ea6fe [Sanitizer][Darwin] Fix log-path_test.cpp adds 92edd74b37c7 Allow non-variadic functions to be attributed with `__attr [...] adds db3013d684dd [mlir] Silence warnings when building with Clang ToT adds 18f230a89aa2 [Clang] Silence warning when building with MSVC 2022 adds 0880b9d52620 [Clang][unittests] Silence trucation warning with MSVC 2022 No new revisions were added by this update. Summary of changes: .../bugprone/AssignmentInIfConditionCheck.cpp | 49 + .../bugprone/AssignmentInIfConditionCheck.h | 34 + .../clang-tidy/bugprone/BugproneTidyModule.cpp | 21 +- .../clang-tidy/bugprone/CMakeLists.txt | 1 + clang-tools-extra/docs/ReleaseNotes.rst | 5 + .../checks/bugprone/assignment-in-if-condition.rst | 23 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + clang-tools-extra/pseudo/benchmarks/Benchmark.cpp | 9 +- clang-tools-extra/pseudo/fuzzer/Fuzzer.cpp | 5 +- clang-tools-extra/pseudo/gen/Main.cpp | 18 + .../pseudo/include/clang-pseudo/GLR.h | 37 +- .../pseudo/include/clang-pseudo/Language.h | 16 + .../pseudo/include/clang-pseudo/cxx/CXX.h | 6 + .../pseudo/include/clang-pseudo/grammar/Grammar.h | 15 +- .../pseudo/include/clang-pseudo/grammar/LRGraph.h | 17 +- .../pseudo/include/clang-pseudo/grammar/LRTable.h | 112 +- clang-tools-extra/pseudo/lib/GLR.cpp | 303 +++- clang-tools-extra/pseudo/lib/cli/CLI.cpp | 4 +- clang-tools-extra/pseudo/lib/cxx/CMakeLists.txt | 1 + clang-tools-extra/pseudo/lib/cxx/CXX.cpp | 27 +- clang-tools-extra/pseudo/lib/cxx/cxx.bnf | 4 +- clang-tools-extra/pseudo/lib/grammar/Grammar.cpp | 7 +- .../pseudo/lib/grammar/GrammarBNF.cpp | 11 + clang-tools-extra/pseudo/lib/grammar/LRGraph.cpp | 37 +- clang-tools-extra/pseudo/lib/grammar/LRTable.cpp | 13 - .../pseudo/lib/grammar/LRTableBuild.cpp | 158 +- clang-tools-extra/pseudo/test/cxx/capture-list.cpp | 2 +- .../pseudo/test/cxx/contextual-keywords.cpp | 9 + .../pseudo/test/cxx/declarator-function.cpp | 2 +- .../pseudo/test/cxx/declarator-var.cpp | 2 +- .../pseudo/test/cxx/empty-member-spec.cpp | 4 +- clang-tools-extra/pseudo/test/cxx/keyword.cpp | 2 +- .../pseudo/test/cxx/mixed-designator.cpp | 2 +- .../pseudo/test/cxx/parameter-decl-clause.cpp | 2 +- .../pseudo/test/cxx/predefined-identifier.cpp | 2 +- .../pseudo/test/cxx/recovery-init-list.cpp | 13 + .../test/cxx/template-empty-type-parameter.cpp | 2 +- .../pseudo/test/cxx/unsized-array.cpp | 2 +- clang-tools-extra/pseudo/tool/ClangPseudo.cpp | 5 +- clang-tools-extra/pseudo/unittests/GLRTest.cpp | 311 +++- clang-tools-extra/pseudo/unittests/LRTableTest.cpp | 20 +- .../bugprone-assignment-in-if-condition.cpp | 103 ++ clang/docs/ReleaseNotes.rst | 4 + .../FlowSensitive/DataflowAnalysisContext.h | 15 +- clang/include/clang/Analysis/SelectorExtras.h | 2 +- clang/include/clang/Basic/AttrDocs.td | 25 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 5 +- clang/include/clang/Sema/HLSLExternalSemaSource.h | 41 + clang/include/clang/Sema/Sema.h | 35 +- clang/lib/AST/FormatString.cpp | 6 + .../FlowSensitive/DataflowAnalysisContext.cpp | 8 +- clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 7 +- clang/lib/Frontend/FrontendAction.cpp | 8 + clang/lib/Headers/hlsl/hlsl_basic_types.h | 54 +- clang/lib/Sema/CMakeLists.txt | 1 + clang/lib/Sema/HLSLExternalSemaSource.cpp | 96 + clang/lib/Sema/SemaChecking.cpp | 335 ++-- clang/lib/Sema/SemaDeclAttr.cpp | 8 +- clang/lib/StaticAnalyzer/Core/SValBuilder.cpp | 6 + clang/runtime/CMakeLists.txt | 2 +- clang/test/AST/HLSL/vector-alias.hlsl | 53 + clang/test/Analysis/produce-symbolcast_x86.cpp | 9 + clang/test/Analysis/symbolcast-floatingpoint.cpp | 24 + clang/test/CodeGenCUDA/managed-var.cu | 6 +- clang/test/CodeGenObjC/exceptions.m | 15 +- clang/test/CodeGenObjCXX/exceptions-legacy.mm | 11 +- clang/test/Driver/linker-wrapper.c | 4 +- clang/test/Driver/riscv32-toolchain.c | 4 +- clang/test/Driver/riscv64-toolchain.c | 4 +- clang/test/OpenMP/target_data_codegen.cpp | 3 +- clang/test/OpenMP/target_enter_data_codegen.cpp | 3 +- .../OpenMP/target_enter_data_depend_codegen.cpp | 3 +- clang/test/OpenMP/target_exit_data_codegen.cpp | 3 +- .../OpenMP/target_exit_data_depend_codegen.cpp | 3 +- clang/test/OpenMP/target_update_codegen.cpp | 3 +- clang/test/OpenMP/target_update_depend_codegen.cpp | 3 +- clang/test/Sema/attr-format.c | 79 +- clang/test/Sema/format-strings.c | 1 + clang/test/SemaCXX/attr-format.cpp | 51 +- clang/test/SemaHLSL/BuiltIns/vector-errors.hlsl | 30 + .../clang-linker-wrapper/ClangLinkerWrapper.cpp | 9 +- .../Analysis/FlowSensitive/TransferTest.cpp | 12 + clang/unittests/StaticAnalyzer/RangeSetTest.cpp | 10 + compiler-rt/lib/profile/GCDAProfiling.c | 11 +- .../sanitizer_common/sanitizer_procmaps_mac.cpp | 8 +- flang/lib/Optimizer/Dialect/FIRType.cpp | 7 +- lld/test/CMakeLists.txt | 1 + .../Python/lldbsuite/test/lldbplatformutil.py | 14 +- lldb/packages/Python/lldbsuite/test/lldbtest.py | 1 + lldb/source/Core/Debugger.cpp | 15 +- .../functionalities/load_unload/TestLoadUnload.py | 2 - .../{attach-wait => }/TestGdbRemoteAttachWait.py | 16 +- .../API/tools/lldb-server/attach-wait/Makefile | 1 - .../API/tools/lldb-server/attach-wait/main.cpp | 8 - .../API/tools/lldb-server/attach-wait/shim.cpp | 9 - llvm/include/llvm/Analysis/TargetFolder.h | 32 +- llvm/include/llvm/IR/ConstantFolder.h | 31 +- llvm/include/llvm/IR/Constants.h | 4 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 8 +- llvm/lib/Analysis/ConstantFolding.cpp | 5 +- llvm/lib/Analysis/ScalarEvolution.cpp | 11 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 15 +- .../ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp | 2 +- llvm/lib/IR/ConstantFold.cpp | 27 +- llvm/lib/IR/Constants.cpp | 27 + .../Target/AArch64/GISel/AArch64CallLowering.cpp | 29 +- .../lib/Target/AArch64/GISel/AArch64CallLowering.h | 4 + llvm/lib/Target/AMDGPU/AMDGPU.h | 3 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 53 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h | 8 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 43 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 13 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 + llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp | 175 ++ llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 127 +- llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp | 212 +++ llvm/lib/Target/AMDGPU/GCNVOPDUtils.h | 32 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 12 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 3 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 63 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 29 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 34 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 14 + llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 +- llvm/lib/Target/AMDGPU/VOPCInstructions.td | 2 - llvm/lib/Target/AMDGPU/VOPInstructions.td | 6 +- llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp | 20 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 204 ++- llvm/lib/ToolDrivers/llvm-lib/Options.td | 2 + .../Transforms/InstCombine/InstCombineCalls.cpp | 5 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 19 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 25 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 51 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 31 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 170 +- .../ScalarEvolution/ptrtoint-constantexpr-loop.ll | 8 +- llvm/test/Assembler/ConstantExprFold.ll | 70 +- .../GlobalISel/call-lowering-sret-demotion.ll | 119 ++ llvm/test/CodeGen/AArch64/arm64-andCmpBrToTBZ.ll | 2 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 22 + .../GlobalISel/llvm.amdgcn.image.gather4.dim.ll | 2 +- .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll | 28 +- .../llvm.amdgcn.image.load.2darraymsaa.a16.ll | 2 +- .../llvm.amdgcn.image.load.2darraymsaa.ll | 34 +- .../GlobalISel/llvm.amdgcn.image.load.3d.a16.ll | 20 +- .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll | 38 +- .../GlobalISel/llvm.amdgcn.image.sample.g16.ll | 2 +- .../GlobalISel/llvm.amdgcn.image.store.2d.ll | 3 +- .../AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll | 5 +- .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 108 +- .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll | 25 + .../AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll | 28 + llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll | 491 ++++-- llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll | 637 ++++--- llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll | 155 +- llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll | 147 +- .../CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll | 4 + .../AMDGPU/atomic_optimizations_local_pointer.ll | 36 +- llvm/test/CodeGen/AMDGPU/build_vector.ll | 2 +- llvm/test/CodeGen/AMDGPU/clamp.ll | 34 +- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 51 +- llvm/test/CodeGen/AMDGPU/dpp64_combine.ll | 19 +- llvm/test/CodeGen/AMDGPU/dpp_combine.ll | 7 +- llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir | 810 +++++++++ .../CodeGen/AMDGPU/dual-source-blend-export.ll | 14 +- llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll | 99 +- llvm/test/CodeGen/AMDGPU/flat-scratch.ll | 170 +- .../CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll | 8 +- llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 4 + .../AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll | 192 +- .../AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll | 2 +- .../AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll | 112 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll | 134 +- .../AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll | 5 +- .../CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll | 68 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 1 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll | 8 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll | 36 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.mulo.ll | 47 +- llvm/test/CodeGen/AMDGPU/mad_64_32.ll | 49 +- llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll | 30 +- .../CodeGen/AMDGPU/memory-legalizer-flat-agent.ll | 960 ++++------ .../AMDGPU/memory-legalizer-flat-nontemporal.ll | 40 +- .../AMDGPU/memory-legalizer-flat-singlethread.ll | 960 ++++------ .../CodeGen/AMDGPU/memory-legalizer-flat-system.ll | 960 ++++------ .../AMDGPU/memory-legalizer-flat-volatile.ll | 58 +- .../AMDGPU/memory-legalizer-flat-wavefront.ll | 948 ++++------ .../AMDGPU/memory-legalizer-flat-workgroup.ll | 912 ++++------ .../AMDGPU/memory-legalizer-global-agent.ll | 498 ++---- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 24 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 504 ++---- .../AMDGPU/memory-legalizer-global-system.ll | 474 ++--- .../AMDGPU/memory-legalizer-global-volatile.ll | 24 +- .../AMDGPU/memory-legalizer-global-wavefront.ll | 504 ++---- .../AMDGPU/memory-legalizer-global-workgroup.ll | 504 ++---- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 552 ++---- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 12 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 552 ++---- .../AMDGPU/memory-legalizer-local-system.ll | 552 ++---- .../AMDGPU/memory-legalizer-local-volatile.ll | 24 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 552 ++---- .../AMDGPU/memory-legalizer-local-workgroup.ll | 552 ++---- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 12 +- .../AMDGPU/memory-legalizer-private-volatile.ll | 12 +- llvm/test/CodeGen/AMDGPU/minmax.ll | 422 +++++ llvm/test/CodeGen/AMDGPU/verify-vopd.mir | 11 + llvm/test/CodeGen/AMDGPU/vopc_dpp.mir | 68 + llvm/test/CodeGen/AMDGPU/vopd-combine.mir | 543 ++++++ llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll | 8 +- llvm/test/CodeGen/PowerPC/tls-crash.mir | 25 + llvm/test/CodeGen/RISCV/rv64zba.ll | 105 ++ .../CodeGen/Thumb2/constant-islands-cbzundef.mir | 30 +- .../RuntimeDyld/AArch64/ELF_ARM64_TSTBR14.s | 14 + llvm/test/MC/AMDGPU/gfx11-flat-errs.s | 4 + llvm/test/Transforms/GVNSink/sink-common-code.ll | 2 +- llvm/test/Transforms/IRCE/decrementing-loop.ll | 11 +- llvm/test/Transforms/IndVarSimplify/pr56242.ll | 6 +- llvm/test/Transforms/InstCombine/not-add.ll | 6 +- llvm/test/Transforms/InstCombine/pow-4.ll | 35 +- llvm/test/Transforms/InstCombine/sqrt.ll | 41 +- .../LoopStrengthReduce/remove_scev_indvars.ll | 36 + .../Transforms/SimplifyCFG/X86/sink-common-code.ll | 4 +- .../Transforms/SimplifyCFG/hoist-skip-token.ll | 39 + llvm/test/Transforms/SimplifyCFG/jump-threading.ll | 80 +- llvm/test/Transforms/SimplifyCFG/pr55765.ll | 21 +- llvm/test/Transforms/SimplifyCFG/wc-widen-block.ll | 11 +- .../VectorCombine/AArch64/select-shuffle.ll | 344 ++-- .../clang-tools-extra/clang-tidy/bugprone/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 2 + mlir/docs/AttributesAndTypes.md | 4 +- mlir/docs/LangRef.md | 104 +- .../mlir/Analysis/Presburger/PresburgerSpace.h | 117 +- mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 1 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 16 +- mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td | 12 +- mlir/include/mlir/ExecutionEngine/MemRefUtils.h | 2 +- mlir/include/mlir/IR/AttrTypeBase.td | 2 +- mlir/include/mlir/IR/OpBase.td | 2 +- mlir/include/mlir/Interfaces/ViewLikeInterface.td | 15 +- mlir/include/mlir/Tools/PDLL/ODS/Operation.h | 1 + mlir/lib/Analysis/Presburger/PresburgerSpace.cpp | 49 +- .../Transforms/AllocTensorElimination.cpp | 21 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 24 + mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 47 +- mlir/lib/Dialect/MemRef/Transforms/MultiBuffer.cpp | 4 +- .../Transforms/BufferizableOpInterfaceImpl.cpp | 67 +- .../Transforms/VectorTransferOpTransforms.cpp | 4 +- mlir/lib/IR/AsmPrinter.cpp | 68 +- mlir/lib/Interfaces/ViewLikeInterface.cpp | 19 - mlir/lib/Parser/DialectSymbolParser.cpp | 214 +-- mlir/lib/Parser/Parser.h | 35 +- mlir/lib/Parser/ParserState.h | 26 +- mlir/test/Dialect/EmitC/types.mlir | 12 +- mlir/test/Dialect/GPU/invalid.mlir | 4 +- mlir/test/Dialect/LLVMIR/callgraph.mlir | 93 + mlir/test/Dialect/OpenACC/ops.mlir | 20 +- mlir/test/Dialect/OpenMP/ops.mlir | 10 +- mlir/test/Dialect/Quant/parse-any-invalid.mlir | 4 +- .../Dialect/Quant/parse-calibrated-invalid.mlir | 4 +- mlir/test/Dialect/Quant/parse-uniform-invalid.mlir | 4 +- mlir/test/Dialect/Tensor/bufferize.mlir | 129 +- mlir/test/Dialect/Tensor/one-shot-bufferize.mlir | 24 + mlir/test/IR/enum-attr-invalid.mlir | 2 +- mlir/test/IR/enum-attr-roundtrip.mlir | 12 +- mlir/test/IR/invalid.mlir | 9 +- mlir/test/IR/parser.mlir | 30 +- mlir/test/Target/Cpp/types.mlir | 12 +- mlir/test/lib/Dialect/Test/TestTypeDefs.td | 2 +- .../mlir-tblgen/attr-or-type-format-roundtrip.mlir | 8 +- mlir/test/mlir-tblgen/attr-or-type-format.mlir | 18 +- mlir/test/mlir-tblgen/testdialect-attrdefs.mlir | 4 +- mlir/test/python/ir/attributes.py | 2 +- mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp | 4 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 2 +- .../Analysis/Presburger/PresburgerSpaceTest.cpp | 52 +- mlir/unittests/Dialect/MemRef/InferShapeTest.cpp | 6 +- mlir/unittests/Dialect/SparseTensor/MergerTest.cpp | 456 +---- openmp/libomptarget/include/device.h | 22 +- openmp/libomptarget/include/omptarget.h | 235 ++- openmp/libomptarget/include/omptargetplugin.h | 4 +- openmp/libomptarget/include/rtl.h | 16 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 1833 ++++++++++---------- .../plugins/common/elf_common/elf_common.cpp | 16 +- .../plugins/common/elf_common/elf_common.h | 4 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 328 ++-- .../plugins/generic-elf-64bit/src/rtl.cpp | 224 +-- openmp/libomptarget/src/api.cpp | 240 +-- openmp/libomptarget/src/device.cpp | 163 +- openmp/libomptarget/src/interface.cpp | 491 +++--- openmp/libomptarget/src/interop.cpp | 206 +-- openmp/libomptarget/src/omptarget.cpp | 305 ++-- openmp/libomptarget/src/private.h | 72 +- openmp/libomptarget/src/rtl.cpp | 217 ++- openmp/runtime/src/dllexports | 7 + openmp/runtime/src/kmp.h | 8 + openmp/runtime/src/kmp_csupport.cpp | 57 +- openmp/runtime/src/kmp_dispatch.cpp | 213 +++ 306 files changed, 13937 insertions(+), 12553 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/bugprone/AssignmentInIfConditionCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/bugprone/AssignmentInIfConditionCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in [...] create mode 100644 clang-tools-extra/pseudo/test/cxx/contextual-keywords.cpp create mode 100644 clang-tools-extra/pseudo/test/cxx/recovery-init-list.cpp create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-assignment- [...] create mode 100644 clang/include/clang/Sema/HLSLExternalSemaSource.h create mode 100644 clang/lib/Sema/HLSLExternalSemaSource.cpp create mode 100644 clang/test/AST/HLSL/vector-alias.hlsl create mode 100644 clang/test/Analysis/symbolcast-floatingpoint.cpp create mode 100644 clang/test/SemaHLSL/BuiltIns/vector-errors.hlsl rename lldb/test/API/tools/lldb-server/{attach-wait => }/TestGdbRemoteAttachWait.py (80%) delete mode 100644 lldb/test/API/tools/lldb-server/attach-wait/Makefile delete mode 100644 lldb/test/API/tools/lldb-server/attach-wait/main.cpp delete mode 100644 lldb/test/API/tools/lldb-server/attach-wait/shim.cpp create mode 100644 llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp create mode 100644 llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp create mode 100644 llvm/lib/Target/AMDGPU/GCNVOPDUtils.h create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll create mode 100644 llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir create mode 100644 llvm/test/CodeGen/AMDGPU/minmax.ll create mode 100644 llvm/test/CodeGen/AMDGPU/verify-vopd.mir create mode 100644 llvm/test/CodeGen/AMDGPU/vopc_dpp.mir create mode 100644 llvm/test/CodeGen/AMDGPU/vopd-combine.mir create mode 100644 llvm/test/CodeGen/PowerPC/tls-crash.mir create mode 100644 llvm/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_TSTBR14.s create mode 100644 llvm/test/Transforms/SimplifyCFG/hoist-skip-token.ll create mode 100644 mlir/test/Dialect/LLVMIR/callgraph.mlir -- To stop receiving notification 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2 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (3de82992 -> f82a24a5)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. from 3de82992 3: reset: llvm-dc969061c68e62328607d68215ed8b9ef4a1e4b1: 20331 new f82a24a5 4: update: llvm-0880b9d52620ca3c46456095f6040a2e4de6c871: 20358 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1600 -> 1692 bytes 02-prepare_abe/console.log.xz | Bin 2732 -> 2744 bytes 03-build_abe-binutils/console.log.xz | Bin 29520 -> 29692 bytes 04-build_kernel_llvm/console.log.xz | Bin 63740 -> 62912 bytes 05-build_abe-qemu/console.log.xz | Bin 33520 -> 33620 bytes 06-build_linux/console.log.xz | Bin 33644 -> 22780 bytes 08-check_regression/console.log.xz | Bin 1268 -> 484 bytes 08-check_regression/jira-body.txt | 2 - 08-check_regression/mail-body.txt | 37 -------------- 08-check_regression/mail-subject.txt | 1 - 08-check_regression/results.regressions | 11 ---- 08-check_regression/trigger-bisect | 2 - 09-update_baseline/console.log | 86 +++++++++++++++++++++++++------- jenkins/manifest.sh | 10 ++-- mail/jira-body.txt | 5 -- mail/mail-body.txt | 40 --------------- mail/mail-subject.txt | 1 - reset-baseline | 0 results | 13 +---- 19 files changed, 73 insertions(+), 135 deletions(-) delete mode 100644 08-check_regression/jira-body.txt delete mode 100644 08-check_regression/mail-body.txt delete mode 100644 08-check_regression/mail-subject.txt delete mode 100644 08-check_regression/results.regressions delete mode 100644 08-check_regression/trigger-bisect delete mode 100644 mail/jira-body.txt delete mode 100644 mail/mail-body.txt delete mode 100644 mail/mail-subject.txt delete mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (7922f5ee649 -> 9ef714539cb)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/gcc. from 7922f5ee649 Mips: Fix the ASAN shadow offset hook for the n32 ABI adds e5a9d603178 Speed up LC SSA rewrite adds 1e1fdb729d9 Speed up LC SSA rewrite more adds c1b1c4e58bd testsuite: Fix incorrect -mfloat128-type option new 8bc24394376 target/106219 - proprly mark builtins pure via ix86_add_new [...] new 99831ceb872 Adjust 'libgomp.c-c++-common/requires-3.c' new 5647e2c3853 Enhance 'libgomp.c-c++-common/requires-4.c', 'libgomp.c-c++ [...] new 9ef714539cb Fix Intel MIC 'mkoffload' for OpenMP 'requires' The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/i386/i386-builtins.cc | 2 + gcc/config/i386/intelmic-mkoffload.cc | 56 +++++++--- gcc/testsuite/g++.dg/pr106219.C | 31 ++++++ .../gcc.target/powerpc/ppc-fortran/pr80108-1.f90 | 2 +- gcc/tree-ssa-loop-manip.cc | 119 +++++++++++++-------- libgomp/target.c | 4 + libgomp/testsuite/lib/libgomp.exp | 5 + .../testsuite/libgomp.c-c++-common/requires-1.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-3.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-4.c | 21 +++- .../testsuite/libgomp.c-c++-common/requires-5.c | 22 ++-- .../testsuite/libgomp.c-c++-common/requires-7.c | 2 +- libgomp/testsuite/libgomp.fortran/requires-1.f90 | 2 +- 13 files changed, 196 insertions(+), 74 deletions(-) create mode 100644 gcc/testsuite/g++.dg/pr106219.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (3d5d6bd554 -> 88de583569)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/binutils-gdb. from 3d5d6bd554 RISC-V: Fix disassembling Zfinx with -M numeric adds 1bb1f55d64 gprofng: adjust GPROFNG_VARIANT adds 045f385d9a RISC-V: Added Zfhmin and Zhinxmin. adds 88de583569 gdb: LoongArch: Implement the push_dummy_call gdbarch method No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 97 ++-- .../gas/riscv/zfhmin-d-insn-class-fail-1.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-1.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-2.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-2.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-3.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-3.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-4.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-4.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-5.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-5.l | 2 + gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s | 4 + .../gas/riscv/{fp-zhinx-insns.d => zhinx.d} | 35 +- .../gas/riscv/{fp-zhinx-insns.s => zhinx.s} | 32 +- gdb/loongarch-tdep.c | 596 +++++++++++++++++++++ gdb/loongarch-tdep.h | 2 + gprofng/libcollector/configure | 23 +- gprofng/libcollector/configure.ac | 23 +- include/opcode/riscv.h | 7 +- opcodes/riscv-opc.c | 126 ++--- 20 files changed, 807 insertions(+), 163 deletions(-) create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s rename gas/testsuite/gas/riscv/{fp-zhinx-insns.d => zhinx.d} (82%) rename gas/testsuite/gas/riscv/{fp-zhinx-insns.s => zhinx.s} (85%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

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