Tcwg-commits June 2022

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14714 discussions

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig updated (576e5b39ae4d -> c12386ae247c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 576e5b39ae4d [clang-tidy] Fix #55134 (regression introduced by 5da7c04) adds 483db58f3eb5 compiler-rt: Allow build without __c11_atomic_fetch_nand adds 4d039a7a7189 [Support] Add missing <cstdint> header to Signals.h adds a517f3439671 [Support] Add missing <cstdint> header to Base64.h adds 2e857fe6e390 [ARM] Fix MVE getShuffleCost legalized type check adds b75bf750fdc2 [LoopIdiom] Fix bailout for aliasing in memcpy transform. adds 198626ad43fd [MIPS] Address instruction selection failure for abs.[sd] adds d350783a0520 [LoopIdiom] Merge TBAA of adjacent stores when creating memset adds 3cd9df8443f8 [clang-format] Fix PointerAlignment: Right not working wit [...] adds d0cd5a872f8d [clang-format] Fix SpacesInLineCommentPrefix deleting tokens. adds deb573739df9 [clang-tidy] `bugprone-use-after-move`: Fix handling of mo [...] adds 5b296385298f PR45879: Fix assert when constant evaluating union assignment. adds 4d5dad43b2eb [analyzer] Fix null pointer deref in CastValueChecker adds c12386ae247c [MC][AArch64] Enable '+v8a' when nothing specified for MCS [...] No new revisions were added by this update. Summary of changes: .../clang-tidy/bugprone/UseAfterMoveCheck.cpp | 3 +- clang-tools-extra/docs/ReleaseNotes.rst | 5 + .../checkers/bugprone-use-after-move.cpp | 7 + clang/lib/AST/ExprConstant.cpp | 12 +- clang/lib/Format/BreakableToken.cpp | 19 +- clang/lib/Format/WhitespaceManager.cpp | 1 + .../StaticAnalyzer/Checkers/CastValueChecker.cpp | 8 +- clang/test/Analysis/cast-value-notes.cpp | 59 +++- clang/test/Analysis/cast-value-state-dump.cpp | 4 +- clang/test/SemaCXX/constant-expression-cxx2a.cpp | 26 ++ clang/unittests/Format/FormatTest.cpp | 35 +++ clang/unittests/Format/FormatTestComments.cpp | 5 + compiler-rt/lib/builtins/atomic.c | 3 + llvm/include/llvm/Support/Base64.h | 1 + llvm/include/llvm/Support/Signals.h | 1 + .../AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp | 2 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 3 +- llvm/lib/Target/Mips/MipsISelLowering.cpp | 22 +- llvm/lib/Target/Mips/MipsISelLowering.h | 7 + llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 32 ++ llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 29 +- llvm/test/Analysis/CostModel/ARM/shuffle.ll | 6 + llvm/test/CodeGen/Mips/llvm-ir/nan-fp-attr.ll | 327 +++++++++++++++++++++ llvm/test/MC/AArch64/arm64-branch-encoding.s | 6 + llvm/test/MC/AArch64/arm64-system-encoding.s | 8 + llvm/test/MC/AArch64/basic-a64-instructions.s | 16 +- llvm/test/MC/Disassembler/AArch64/arm64-branch.txt | 4 + .../AArch64/basic-a64-instructions.txt | 16 +- llvm/test/Transforms/LoopIdiom/basic.ll | 43 +++ llvm/test/Transforms/LoopIdiom/memset-tbaa.ll | 47 +++ 30 files changed, 691 insertions(+), 66 deletions(-) create mode 100644 llvm/test/CodeGen/Mips/llvm-ir/nan-fp-attr.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig updated (d61f79dc47 -> 949c11728c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig in repository toolchain/ci/binutils-gdb. from d61f79dc47 Automatic date update in version.in adds 884e81eeb2 Automatic date update in version.in adds 0dae8bed68 Automatic date update in version.in adds fe36d34f25 Automatic date update in version.in adds 949c11728c Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig updated (648e73377 -> 805a1f25d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards 648e73377 0: update: binutils-llvm-linux-qemu: boot new 805a1f25d 0: update: binutils-llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (648e73377) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1556 -> 1572 bytes 02-prepare_abe/console.log.xz | Bin 2728 -> 2728 bytes 03-build_abe-binutils/console.log.xz | Bin 30336 -> 30188 bytes 04-build_kernel_llvm/console.log.xz | Bin 61356 -> 61200 bytes 05-build_abe-qemu/console.log.xz | Bin 32264 -> 32868 bytes 06-build_linux/console.log.xz | Bin 4340 -> 4048 bytes 07-boot_linux/console.log.xz | Bin 6032 -> 6032 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 18 +++++++++--------- 10 files changed, 14 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_O1 updated (e3bba42fb5d -> ef1e4d80dd3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_O1 in repository toolchain/ci/gcc. from e3bba42fb5d Daily bump. adds 5940b4e59f8 libgccjit: Support getting the size of a float [PR105829] adds b370ed0bf93 libstdc++: Make std::hash<basic_string<>> allocator-agnosti [...] adds 1753a712010 PR rtl-optimization/7061: Complex number arguments on x86_6 [...] adds 1e65f2ed990 libstdc++: Fix lifetime bugs for non-TLS eh_globals [PR105880] adds 671970a5621 libstdc++: Make std::lcm and std::gcd detect overflow [PR105844] adds 1459b55d24c libgomp nvptx plugin: Remove '--with-cuda-driver=[...]' etc [...] adds c08ba00487c c++: Adjust module initializer calling emission adds 1eff4872d2e openmp: Call dlopen with "libmemkind.so.0" rather than "lib [...] adds e6d369bbdb4 c++: Add a late-writing step for modules adds cb7fd1ea85f c++: optimize specialization of nested templated classes adds f9b5a8e58df c++: optimize specialization of templated member functions adds 343d83c7a89 c++: improve TYPENAME_TYPE hashing [PR65328] adds ef1e4d80dd3 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 + gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 65 ++++++ gcc/cp/cp-tree.h | 6 +- gcc/cp/decl.cc | 23 +- gcc/cp/decl2.cc | 51 ++--- gcc/cp/module.cc | 245 ++++++++++++--------- gcc/cp/pt.cc | 121 +++++++--- gcc/expr.cc | 18 +- gcc/jit/ChangeLog | 6 + gcc/jit/libgccjit.cc | 4 +- gcc/testsuite/ChangeLog | 17 ++ gcc/testsuite/g++.dg/modules/init-3_a.C | 17 ++ gcc/testsuite/g++.dg/modules/init-3_b.C | 6 + gcc/testsuite/g++.dg/modules/init-3_c.C | 17 ++ gcc/testsuite/gcc.target/i386/pr7061-1.c | 4 + gcc/testsuite/gcc.target/i386/pr7061-2.c | 5 + gcc/testsuite/jit.dg/test-types.c | 3 + libgomp/ChangeLog | 20 ++ libgomp/Makefile.in | 50 ++--- libgomp/allocator.c | 2 +- libgomp/configure | 143 +----------- libgomp/plugin/Makefrag.am | 25 +-- libgomp/plugin/configfrag.ac | 90 +------- libgomp/testsuite/Makefile.in | 5 - libgomp/testsuite/lib/libgomp.exp | 13 -- libgomp/testsuite/libgomp-test-support.exp.in | 3 - libstdc++-v3/ChangeLog | 45 ++++ libstdc++-v3/include/bits/basic_string.h | 102 ++++----- libstdc++-v3/include/experimental/numeric | 46 ++-- libstdc++-v3/include/std/numeric | 75 ++++--- libstdc++-v3/include/std/string | 33 --- libstdc++-v3/libsupc++/eh_globals.cc | 51 +++-- .../testsuite/21_strings/basic_string/hash/hash.cc | 16 ++ .../21_strings/basic_string/hash/hash_char8_t.cc | 12 + libstdc++-v3/testsuite/26_numerics/gcd/105844.cc | 21 ++ libstdc++-v3/testsuite/26_numerics/gcd/gcd_neg.cc | 10 +- libstdc++-v3/testsuite/26_numerics/lcm/105844.cc | 22 ++ libstdc++-v3/testsuite/26_numerics/lcm/lcm_neg.cc | 10 +- 39 files changed, 779 insertions(+), 634 deletions(-) create mode 100644 gcc/testsuite/g++.dg/modules/init-3_a.C create mode 100644 gcc/testsuite/g++.dg/modules/init-3_b.C create mode 100644 gcc/testsuite/g++.dg/modules/init-3_c.C create mode 100644 gcc/testsuite/gcc.target/i386/pr7061-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr7061-2.c create mode 100644 libstdc++-v3/testsuite/26_numerics/gcd/105844.cc create mode 100644 libstdc++-v3/testsuite/26_numerics/lcm/105844.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_O1 updated (f460ede603 -> bc574253cb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_O1 in repository toolchain/ci/binutils-gdb. from f460ede603 Automatic date update in version.in adds 84860e8591 [gdb/testsuite] Fix timeout in gdb.ada/ghost.exp adds 6a72edd8e2 [gdb/testsuite] Fix XPASS with gcc-12 in gdb.base/vla-struct [...] adds 3abc1d8fe0 Document the ARM_CC_FOR_TARGET testsuite variable adds 80c0a3bf1b gdb/testsuite: remove definition of true/false from gdb_comp [...] adds b69a68b93b PowerPC, correct the gdb ioctl values for TCGETS, TCSETS, TC [...] adds cbc30d36ac Fix comparison of unsigned long int to int in record_linux_s [...] adds 2cbde639ae Fix warning-avoidance initialization in xcoffread.c adds bc574253cb Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/linux-record.h | 130 ++++++++++----------- gdb/ppc-linux-tdep.c | 14 ++- gdb/testsuite/README | 30 +++++ gdb/testsuite/gdb.ada/ghost.exp | 6 +- gdb/testsuite/gdb.base/all-bin.exp | 4 + gdb/testsuite/gdb.base/eval-skip.exp | 3 + gdb/testsuite/gdb.base/exprs.exp | 4 + gdb/testsuite/gdb.base/miscexprs.exp | 3 + gdb/testsuite/gdb.base/pointers.exp | 4 + gdb/testsuite/gdb.base/relational.exp | 4 + gdb/testsuite/gdb.base/vla-struct-fields.exp | 22 +++- .../test_ioctl_TCSETSW.c} | 28 +++-- .../test_ioctl_TCSETSW.exp} | 28 ++++- gdb/testsuite/lib/gdb.exp | 5 - gdb/xcoffread.c | 2 +- 16 files changed, 184 insertions(+), 105 deletions(-) copy gdb/testsuite/{gdb.mi/mi-catch-load.c => gdb.reverse/test_ioctl_TCSETSW.c} (61%) copy gdb/testsuite/{gdb.cp/pr12028.exp => gdb.reverse/test_ioctl_TCSETSW.exp} (57%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_O1 updated (98e5e0831 -> c6f26c321)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_O1 in repository toolchain/ci/base-artifacts. discards 98e5e0831 0: update: binutils-gcc: 2 new c6f26c321 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (98e5e0831) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1536 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2720 -> 2768 bytes 04-build_abe-binutils/console.log.xz | Bin 38268 -> 38800 bytes 05-build_abe-bootstrap_O1/console.log.xz | Bin 272032 -> 271452 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 18 +++++++++--------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 15 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig updated (9b1f588549 -> 2663c41cfa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig in repository toolchain/ci/qemu. from 9b1f588549 Merge tag 'pull-la-20220606' of https://gitlab.com/rth7680/q [...] adds 4d84bb6c8b hw/tpm/tpm_tis_common.c: Assert that locty is in range adds e37a0ef460 tpm_crb: mark command buffer as dirty on request completion adds 6d940eff47 Merge tag 'pull-tpm-2022-06-07-1' of https://github.com/stef [...] adds ec6600be0d vfio/common: remove spurious warning on vfio_listener_region_del adds 05911658cb Merge tag 'vfio-updates-20220608.0' of https://gitlab.com/al [...] adds d507bc3b05 target/arm: Declare support for FEAT_RASv1p1 adds 7ac610206a target/arm: Implement FEAT_DoubleFault adds 9323e79f10 Fix 'writeable' typos adds d2008b3355 xlnx_dp: fix the wrong register size adds 759ae1b47e xlnx_dp: Introduce a vblank signal adds 39f40d02f6 xlnx_dp: Fix the interrupt disable logic adds b3f5cc3fda xlnx-zynqmp: fix the irq mapping for the display port and its dma adds d8cca960a9 target/arm: Move stage_1_mmu_idx decl to internals.h adds 8ae0886002 target/arm: Move get_phys_addr to ptw.c adds f2d2f5ceb8 target/arm: Move get_phys_addr_v5 to ptw.c adds 53c038efb7 target/arm: Move get_phys_addr_v6 to ptw.c adds 9a12fb366d target/arm: Move get_phys_addr_pmsav5 to ptw.c adds 7d2e08c960 target/arm: Move get_phys_addr_pmsav7_default to ptw.c adds 1f2e87e5ab target/arm: Move get_phys_addr_pmsav7 to ptw.c adds 730d5c31d8 target/arm: Move get_phys_addr_pmsav8 to ptw.c adds fedbaa0503 target/arm: Move pmsav8_mpu_lookup to ptw.c adds c8e436c9f7 target/arm: Move pmsav7_use_background_region to ptw.c adds 2c1f429df3 target/arm: Move v8m_security_lookup to ptw.c adds 47ff5ba9d0 target/arm: Move m_is_{ppb,system}_region to ptw.c adds 4c74ab157b target/arm: Move get_level1_table_address to ptw.c adds 966f4bb7d8 target/arm: Move combine_cacheattrs and subroutines to ptw.c adds 3283222acd target/arm: Move get_phys_addr_lpae to ptw.c adds 11552bb0d9 target/arm: Move arm_{ldl,ldq}_ptw to ptw.c adds cd6bc4d517 target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_ [...] adds 1c73d84807 target/arm: Move arm_pamax, pamax_map into ptw.c adds f8526edc2f target/arm: Move get_S1prot, get_S2prot to ptw.c adds c5168785d2 target/arm: Move check_s2_mmu_setup to ptw.c adds 2f0ec92e94 target/arm: Move aa32_va_parameters to ptw.c adds 4845d3be12 target/arm: Move ap_to_tw_prot etc to ptw.c adds 0c23d56fc1 target/arm: Move regime_is_user to ptw.c adds 3b318aaeef target/arm: Move regime_ttbr to ptw.c adds 8db1a3a0bb target/arm: Move regime_translation_disabled to ptw.c adds 23971205cf target/arm: Move arm_cpu_get_phys_page_attrs_debug to ptw.c adds 1d26125536 target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx to ptw.c adds 5e79887ba6 target/arm: Pass CPUARMState to arm_ld[lq]_ptw adds f45ce4c35f target/arm: Rename TBFLAG_A64 ZCR_LEN to VL adds 8b599e5c02 linux-user/aarch64: Introduce sve_vq adds 61a8c23a3b target/arm: Remove route_to_el2 check from sve_exception_el adds 397d922c62 target/arm: Remove fp checks from sve_exception_el adds 19668718ad target/arm: Add el_is_in_host adds c6225bebc2 target/arm: Use el_is_in_host for sve_zcr_len_for_el adds aa4451b60e target/arm: Use el_is_in_host for sve_exception_el adds 7d38cb92aa target/arm: Hoist arm_is_el2_enabled check in sve_exception_el adds 87252bdecd target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset adds 9b5f422559 target/arm: Merge aarch64_sve_zcr_get_valid_len into caller adds 886902ece7 target/arm: Use uint32_t instead of bitmap for sve vq's adds 5ef3cc5636 target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el adds d1ce862602 target/arm: Split out load/store primitives to sve_ldst_internal.h adds 0b68112b39 target/arm: Export sve contiguous ldst support functions adds 820e0bb9ce target/arm: Move expand_pred_b to vec_internal.h adds 05dd14bdfa target/arm: Use expand_pred_b in mve_helper.c adds a613cf2d4a target/arm: Move expand_pred_h to vec_internal.h adds 72db2aa353 target/arm: Export bfdotadd from vec_helper.c adds f305bf9436 target/arm: Add isar_feature_aa64_sme adds 414c54d515 target/arm: Add ID_AA64SMFR0_EL1 adds 028f2361d0 Merge tag 'pull-target-arm-20220609' of https://git.linaro.o [...] adds 7851b21a81 hw/ide/piix: Remove redundant "piix3-ide-xen" device class adds 3690241746 hw/ide/piix: Add some documentation to pci_piix3_xen_ide_unplug() adds 6a8a8b62bd include/hw/ide: Unexport pci_piix3_xen_ide_unplug() adds 9cc1bf1ebc Merge tag 'pull-xen-20220609' of https://xenbits.xen.org/git [...] adds efe1592c43 MAINTAINERS: Cover hw/core/uboot_image.h within Generic Load [...] adds de799beba7 target/riscv: add support for zmmul extension v0.1 adds f9a461b2d3 hw/riscv: virt: Generate fw_cfg DT node correctly adds 40244040a7 hw/intc: sifive_plic: Avoid overflowing the addr_config buffer adds af9751316e hw/core/loader: return image sizes as ssize_t adds 8f42415fc1 target/riscv: Wake on VS-level external interrupts adds d1d8541217 target/riscv/debug.c: keep experimental rv128 support working adds 8a085fb2ad target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed adds 25eae0486d target/riscv: rvv: Prune redundant access_type parameter passed adds c7b8a4213b target/riscv: rvv: Rename ambiguous esz adds 41d3d7f76a target/riscv: rvv: Early exit when vstart >= vl adds f1eed927fb target/riscv: rvv: Add tail agnostic for vv instructions adds 752614cab8 target/riscv: rvv: Add tail agnostic for vector load / store [...] adds 5c19fc156e target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions adds 7b1bff41c1 target/riscv: rvv: Add tail agnostic for vector integer shif [...] adds 38581e5c9a target/riscv: rvv: Add tail agnostic for vector integer comp [...] adds 89a32de2d5 target/riscv: rvv: Add tail agnostic for vector integer merg [...] adds 09106eed30 target/riscv: rvv: Add tail agnostic for vector fix-point ar [...] adds 5eacf7d8a0 target/riscv: rvv: Add tail agnostic for vector floating-poi [...] adds df4f52a758 target/riscv: rvv: Add tail agnostic for vector reduction in [...] adds acc6ffd482 target/riscv: rvv: Add tail agnostic for vector mask instructions adds 803963f7cb target/riscv: rvv: Add tail agnostic for vector permutation [...] adds b8312675d6 target/riscv: rvv: Add option 'rvv_ta_all_1s' to enable opti [...] adds 26b2bc5859 target/riscv: Don't expose the CPU properties on names CPUs adds 07314158f6 target/riscv: trans_rvv: Avoid assert for RV32 and e64 adds b3cd3b5a66 Merge tag 'pull-riscv-to-apply-20220610' of github.com:alist [...] adds 7666a81d15 target/arm: Mark exception helpers as noreturn adds fa33eead86 target/arm: Add coproc parameter to syn_fp_access_trap adds 57287a6e95 target/arm: Move exception_target_el out of line adds 55ba15b737 target/arm: Move arm_singlestep_active out of line adds 31c8df53ee target/arm: Move arm_generate_debug_exceptions out of line adds 831c1b1087 target/arm: Use is_a64 in arm_generate_debug_exceptions adds 16f9d5f693 target/arm: Move exception_bkpt_insn to debug_helper.c adds a853e3ae55 target/arm: Move arm_debug_exception_fsr to debug_helper.c adds d3c5d50a5c target/arm: Rename helper_exception_with_syndrome adds 9c9d03f0c5 target/arm: Introduce gen_exception_insn_el_v adds 8c5d24dc7d target/arm: Rename gen_exception_insn to gen_exception_insn_el adds 486d6c9699 target/arm: Introduce gen_exception_insn adds f0d7c2054a target/arm: Create helper_exception_swstep adds 8480e933ed target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_EL adds cc5e672b85 target/arm: Move gen_exception to translate.c adds bca6f24f01 target/arm: Rename gen_exception to gen_exception_el adds 1a13b9a863 target/arm: Introduce gen_exception adds d6d7f818a9 target/arm: Introduce gen_exception_el_v adds eeaf596022 target/arm: Introduce helper_exception_with_syndrome adds 82303761c6 target/arm: Remove default_exception_el adds 04eacf6e79 target/arm: Create raise_exception_debug adds 38e8a13c11 target/arm: Move arm_debug_target_el to debug_helper.c adds 02e1de14bc target/arm: Fix Secure PL1 tests in fp_exception_el adds 284ad5e70c tests/qtest: Reduce npcm7xx_sdhci test image size adds bfe43e3d14 target/arm: Adjust format test in scr_write adds 6bcbb07af6 target/arm: SCR_EL3.RW is RAO/WI without AArch32 EL[12] adds ebf1b4cbb8 gdbstub: Don't use GDB syscalls if no GDB is attached adds 90c072e063 semihosting/config: Merge --semihosting-config option groups adds 2663c41cfa Merge tag 'pull-target-arm-20220610' of https://git.linaro.o [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 1 + accel/hvf/hvf-accel-ops.c | 4 +- accel/kvm/kvm-all.c | 4 +- accel/tcg/user-exec.c | 6 +- docs/interop/vhost-user.rst | 2 +- docs/specs/vmgenid.txt | 4 +- docs/system/arm/emulation.rst | 2 + gdbstub.c | 14 +- hw/acpi/ghes.c | 2 +- hw/arm/armv7m.c | 2 +- hw/arm/boot.c | 8 +- hw/arm/xlnx-zynqmp.c | 4 +- hw/core/generic-loader.c | 2 +- hw/core/loader.c | 81 +- hw/display/xlnx_dp.c | 49 +- hw/i386/pc_piix.c | 3 +- hw/i386/x86.c | 2 +- hw/i386/xen/xen_platform.c | 48 +- hw/ide/piix.c | 42 - hw/intc/arm_gicv3_cpuif.c | 2 +- hw/intc/arm_gicv3_dist.c | 2 +- hw/intc/arm_gicv3_redist.c | 4 +- hw/intc/riscv_aclint.c | 2 +- hw/intc/riscv_aplic.c | 2 +- hw/intc/sifive_plic.c | 19 +- hw/pci/shpc.c | 2 +- hw/riscv/boot.c | 5 +- hw/riscv/virt.c | 28 +- hw/scsi/mfi.h | 2 +- hw/sparc64/sun4u_iommu.c | 2 +- hw/timer/sse-timer.c | 2 +- hw/tpm/tpm_crb.c | 1 + hw/tpm/tpm_tis_common.c | 7 +- hw/vfio/common.c | 10 +- hw/vfio/trace-events | 2 +- include/hw/display/xlnx_dp.h | 12 +- include/hw/ide.h | 3 - include/hw/loader.h | 55 +- linux-user/aarch64/signal.c | 4 +- linux-user/aarch64/target_prctl.h | 18 +- python/qemu/machine/machine.py | 2 +- semihosting/config.c | 1 + target/arm/arch_dump.c | 2 +- target/arm/cpu.c | 5 +- target/arm/cpu.h | 199 +- target/arm/cpu64.c | 120 +- target/arm/debug_helper.c | 220 ++- target/arm/gdbstub.c | 2 +- target/arm/gdbstub64.c | 2 +- target/arm/helper.c | 3095 +++---------------------------- target/arm/helper.h | 8 +- target/arm/hvf/hvf.c | 4 +- target/arm/internals.h | 86 +- target/arm/kvm64.c | 47 +- target/arm/kvm_arm.h | 7 +- target/arm/meson.build | 1 + target/arm/mve_helper.c | 6 +- target/arm/op_helper.c | 52 +- target/arm/ptw.c | 2540 +++++++++++++++++++++++++ target/arm/sve_helper.c | 232 +-- target/arm/sve_ldst_internal.h | 221 +++ target/arm/syndrome.h | 7 +- target/arm/tlb_helper.c | 26 + target/arm/translate-a64.c | 36 +- target/arm/translate-a64.h | 2 +- target/arm/translate-m-nocp.c | 15 +- target/arm/translate-mve.c | 3 +- target/arm/translate-sve.c | 2 +- target/arm/translate-vfp.c | 18 +- target/arm/translate.c | 106 +- target/arm/translate.h | 45 +- target/arm/vec_helper.c | 28 +- target/arm/vec_internal.h | 28 +- target/i386/cpu-sysemu.c | 2 +- target/i386/hvf/vmcs.h | 2 +- target/i386/hvf/vmx.h | 2 +- target/riscv/cpu.c | 68 +- target/riscv/cpu.h | 4 + target/riscv/cpu_helper.c | 4 +- target/riscv/debug.c | 2 + target/riscv/insn_trans/trans_rvm.c.inc | 18 +- target/riscv/insn_trans/trans_rvv.c.inc | 106 +- target/riscv/internals.h | 6 +- target/riscv/translate.c | 4 + target/riscv/vector_helper.c | 1588 +++++++++------- target/s390x/ioinst.c | 2 +- tests/qtest/npcm7xx_sdhci-test.c | 2 +- tests/tcg/x86_64/system/boot.S | 2 +- 88 files changed, 5087 insertions(+), 4357 deletions(-) create mode 100644 target/arm/ptw.c create mode 100644 target/arm/sve_ldst_internal.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (9b1f588549 -> 2663c41cfa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/qemu. from 9b1f588549 Merge tag 'pull-la-20220606' of https://gitlab.com/rth7680/q [...] adds 4d84bb6c8b hw/tpm/tpm_tis_common.c: Assert that locty is in range adds e37a0ef460 tpm_crb: mark command buffer as dirty on request completion adds 6d940eff47 Merge tag 'pull-tpm-2022-06-07-1' of https://github.com/stef [...] adds ec6600be0d vfio/common: remove spurious warning on vfio_listener_region_del adds 05911658cb Merge tag 'vfio-updates-20220608.0' of https://gitlab.com/al [...] adds d507bc3b05 target/arm: Declare support for FEAT_RASv1p1 adds 7ac610206a target/arm: Implement FEAT_DoubleFault adds 9323e79f10 Fix 'writeable' typos adds d2008b3355 xlnx_dp: fix the wrong register size adds 759ae1b47e xlnx_dp: Introduce a vblank signal adds 39f40d02f6 xlnx_dp: Fix the interrupt disable logic adds b3f5cc3fda xlnx-zynqmp: fix the irq mapping for the display port and its dma adds d8cca960a9 target/arm: Move stage_1_mmu_idx decl to internals.h adds 8ae0886002 target/arm: Move get_phys_addr to ptw.c adds f2d2f5ceb8 target/arm: Move get_phys_addr_v5 to ptw.c adds 53c038efb7 target/arm: Move get_phys_addr_v6 to ptw.c adds 9a12fb366d target/arm: Move get_phys_addr_pmsav5 to ptw.c adds 7d2e08c960 target/arm: Move get_phys_addr_pmsav7_default to ptw.c adds 1f2e87e5ab target/arm: Move get_phys_addr_pmsav7 to ptw.c adds 730d5c31d8 target/arm: Move get_phys_addr_pmsav8 to ptw.c adds fedbaa0503 target/arm: Move pmsav8_mpu_lookup to ptw.c adds c8e436c9f7 target/arm: Move pmsav7_use_background_region to ptw.c adds 2c1f429df3 target/arm: Move v8m_security_lookup to ptw.c adds 47ff5ba9d0 target/arm: Move m_is_{ppb,system}_region to ptw.c adds 4c74ab157b target/arm: Move get_level1_table_address to ptw.c adds 966f4bb7d8 target/arm: Move combine_cacheattrs and subroutines to ptw.c adds 3283222acd target/arm: Move get_phys_addr_lpae to ptw.c adds 11552bb0d9 target/arm: Move arm_{ldl,ldq}_ptw to ptw.c adds cd6bc4d517 target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_ [...] adds 1c73d84807 target/arm: Move arm_pamax, pamax_map into ptw.c adds f8526edc2f target/arm: Move get_S1prot, get_S2prot to ptw.c adds c5168785d2 target/arm: Move check_s2_mmu_setup to ptw.c adds 2f0ec92e94 target/arm: Move aa32_va_parameters to ptw.c adds 4845d3be12 target/arm: Move ap_to_tw_prot etc to ptw.c adds 0c23d56fc1 target/arm: Move regime_is_user to ptw.c adds 3b318aaeef target/arm: Move regime_ttbr to ptw.c adds 8db1a3a0bb target/arm: Move regime_translation_disabled to ptw.c adds 23971205cf target/arm: Move arm_cpu_get_phys_page_attrs_debug to ptw.c adds 1d26125536 target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx to ptw.c adds 5e79887ba6 target/arm: Pass CPUARMState to arm_ld[lq]_ptw adds f45ce4c35f target/arm: Rename TBFLAG_A64 ZCR_LEN to VL adds 8b599e5c02 linux-user/aarch64: Introduce sve_vq adds 61a8c23a3b target/arm: Remove route_to_el2 check from sve_exception_el adds 397d922c62 target/arm: Remove fp checks from sve_exception_el adds 19668718ad target/arm: Add el_is_in_host adds c6225bebc2 target/arm: Use el_is_in_host for sve_zcr_len_for_el adds aa4451b60e target/arm: Use el_is_in_host for sve_exception_el adds 7d38cb92aa target/arm: Hoist arm_is_el2_enabled check in sve_exception_el adds 87252bdecd target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset adds 9b5f422559 target/arm: Merge aarch64_sve_zcr_get_valid_len into caller adds 886902ece7 target/arm: Use uint32_t instead of bitmap for sve vq's adds 5ef3cc5636 target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el adds d1ce862602 target/arm: Split out load/store primitives to sve_ldst_internal.h adds 0b68112b39 target/arm: Export sve contiguous ldst support functions adds 820e0bb9ce target/arm: Move expand_pred_b to vec_internal.h adds 05dd14bdfa target/arm: Use expand_pred_b in mve_helper.c adds a613cf2d4a target/arm: Move expand_pred_h to vec_internal.h adds 72db2aa353 target/arm: Export bfdotadd from vec_helper.c adds f305bf9436 target/arm: Add isar_feature_aa64_sme adds 414c54d515 target/arm: Add ID_AA64SMFR0_EL1 adds 028f2361d0 Merge tag 'pull-target-arm-20220609' of https://git.linaro.o [...] adds 7851b21a81 hw/ide/piix: Remove redundant "piix3-ide-xen" device class adds 3690241746 hw/ide/piix: Add some documentation to pci_piix3_xen_ide_unplug() adds 6a8a8b62bd include/hw/ide: Unexport pci_piix3_xen_ide_unplug() adds 9cc1bf1ebc Merge tag 'pull-xen-20220609' of https://xenbits.xen.org/git [...] adds efe1592c43 MAINTAINERS: Cover hw/core/uboot_image.h within Generic Load [...] adds de799beba7 target/riscv: add support for zmmul extension v0.1 adds f9a461b2d3 hw/riscv: virt: Generate fw_cfg DT node correctly adds 40244040a7 hw/intc: sifive_plic: Avoid overflowing the addr_config buffer adds af9751316e hw/core/loader: return image sizes as ssize_t adds 8f42415fc1 target/riscv: Wake on VS-level external interrupts adds d1d8541217 target/riscv/debug.c: keep experimental rv128 support working adds 8a085fb2ad target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed adds 25eae0486d target/riscv: rvv: Prune redundant access_type parameter passed adds c7b8a4213b target/riscv: rvv: Rename ambiguous esz adds 41d3d7f76a target/riscv: rvv: Early exit when vstart >= vl adds f1eed927fb target/riscv: rvv: Add tail agnostic for vv instructions adds 752614cab8 target/riscv: rvv: Add tail agnostic for vector load / store [...] adds 5c19fc156e target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions adds 7b1bff41c1 target/riscv: rvv: Add tail agnostic for vector integer shif [...] adds 38581e5c9a target/riscv: rvv: Add tail agnostic for vector integer comp [...] adds 89a32de2d5 target/riscv: rvv: Add tail agnostic for vector integer merg [...] adds 09106eed30 target/riscv: rvv: Add tail agnostic for vector fix-point ar [...] adds 5eacf7d8a0 target/riscv: rvv: Add tail agnostic for vector floating-poi [...] adds df4f52a758 target/riscv: rvv: Add tail agnostic for vector reduction in [...] adds acc6ffd482 target/riscv: rvv: Add tail agnostic for vector mask instructions adds 803963f7cb target/riscv: rvv: Add tail agnostic for vector permutation [...] adds b8312675d6 target/riscv: rvv: Add option 'rvv_ta_all_1s' to enable opti [...] adds 26b2bc5859 target/riscv: Don't expose the CPU properties on names CPUs adds 07314158f6 target/riscv: trans_rvv: Avoid assert for RV32 and e64 adds b3cd3b5a66 Merge tag 'pull-riscv-to-apply-20220610' of github.com:alist [...] adds 7666a81d15 target/arm: Mark exception helpers as noreturn adds fa33eead86 target/arm: Add coproc parameter to syn_fp_access_trap adds 57287a6e95 target/arm: Move exception_target_el out of line adds 55ba15b737 target/arm: Move arm_singlestep_active out of line adds 31c8df53ee target/arm: Move arm_generate_debug_exceptions out of line adds 831c1b1087 target/arm: Use is_a64 in arm_generate_debug_exceptions adds 16f9d5f693 target/arm: Move exception_bkpt_insn to debug_helper.c adds a853e3ae55 target/arm: Move arm_debug_exception_fsr to debug_helper.c adds d3c5d50a5c target/arm: Rename helper_exception_with_syndrome adds 9c9d03f0c5 target/arm: Introduce gen_exception_insn_el_v adds 8c5d24dc7d target/arm: Rename gen_exception_insn to gen_exception_insn_el adds 486d6c9699 target/arm: Introduce gen_exception_insn adds f0d7c2054a target/arm: Create helper_exception_swstep adds 8480e933ed target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_EL adds cc5e672b85 target/arm: Move gen_exception to translate.c adds bca6f24f01 target/arm: Rename gen_exception to gen_exception_el adds 1a13b9a863 target/arm: Introduce gen_exception adds d6d7f818a9 target/arm: Introduce gen_exception_el_v adds eeaf596022 target/arm: Introduce helper_exception_with_syndrome adds 82303761c6 target/arm: Remove default_exception_el adds 04eacf6e79 target/arm: Create raise_exception_debug adds 38e8a13c11 target/arm: Move arm_debug_target_el to debug_helper.c adds 02e1de14bc target/arm: Fix Secure PL1 tests in fp_exception_el adds 284ad5e70c tests/qtest: Reduce npcm7xx_sdhci test image size adds bfe43e3d14 target/arm: Adjust format test in scr_write adds 6bcbb07af6 target/arm: SCR_EL3.RW is RAO/WI without AArch32 EL[12] adds ebf1b4cbb8 gdbstub: Don't use GDB syscalls if no GDB is attached adds 90c072e063 semihosting/config: Merge --semihosting-config option groups adds 2663c41cfa Merge tag 'pull-target-arm-20220610' of https://git.linaro.o [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 1 + accel/hvf/hvf-accel-ops.c | 4 +- accel/kvm/kvm-all.c | 4 +- accel/tcg/user-exec.c | 6 +- docs/interop/vhost-user.rst | 2 +- docs/specs/vmgenid.txt | 4 +- docs/system/arm/emulation.rst | 2 + gdbstub.c | 14 +- hw/acpi/ghes.c | 2 +- hw/arm/armv7m.c | 2 +- hw/arm/boot.c | 8 +- hw/arm/xlnx-zynqmp.c | 4 +- hw/core/generic-loader.c | 2 +- hw/core/loader.c | 81 +- hw/display/xlnx_dp.c | 49 +- hw/i386/pc_piix.c | 3 +- hw/i386/x86.c | 2 +- hw/i386/xen/xen_platform.c | 48 +- hw/ide/piix.c | 42 - hw/intc/arm_gicv3_cpuif.c | 2 +- hw/intc/arm_gicv3_dist.c | 2 +- hw/intc/arm_gicv3_redist.c | 4 +- hw/intc/riscv_aclint.c | 2 +- hw/intc/riscv_aplic.c | 2 +- hw/intc/sifive_plic.c | 19 +- hw/pci/shpc.c | 2 +- hw/riscv/boot.c | 5 +- hw/riscv/virt.c | 28 +- hw/scsi/mfi.h | 2 +- hw/sparc64/sun4u_iommu.c | 2 +- hw/timer/sse-timer.c | 2 +- hw/tpm/tpm_crb.c | 1 + hw/tpm/tpm_tis_common.c | 7 +- hw/vfio/common.c | 10 +- hw/vfio/trace-events | 2 +- include/hw/display/xlnx_dp.h | 12 +- include/hw/ide.h | 3 - include/hw/loader.h | 55 +- linux-user/aarch64/signal.c | 4 +- linux-user/aarch64/target_prctl.h | 18 +- python/qemu/machine/machine.py | 2 +- semihosting/config.c | 1 + target/arm/arch_dump.c | 2 +- target/arm/cpu.c | 5 +- target/arm/cpu.h | 199 +- target/arm/cpu64.c | 120 +- target/arm/debug_helper.c | 220 ++- target/arm/gdbstub.c | 2 +- target/arm/gdbstub64.c | 2 +- target/arm/helper.c | 3095 +++---------------------------- target/arm/helper.h | 8 +- target/arm/hvf/hvf.c | 4 +- target/arm/internals.h | 86 +- target/arm/kvm64.c | 47 +- target/arm/kvm_arm.h | 7 +- target/arm/meson.build | 1 + target/arm/mve_helper.c | 6 +- target/arm/op_helper.c | 52 +- target/arm/ptw.c | 2540 +++++++++++++++++++++++++ target/arm/sve_helper.c | 232 +-- target/arm/sve_ldst_internal.h | 221 +++ target/arm/syndrome.h | 7 +- target/arm/tlb_helper.c | 26 + target/arm/translate-a64.c | 36 +- target/arm/translate-a64.h | 2 +- target/arm/translate-m-nocp.c | 15 +- target/arm/translate-mve.c | 3 +- target/arm/translate-sve.c | 2 +- target/arm/translate-vfp.c | 18 +- target/arm/translate.c | 106 +- target/arm/translate.h | 45 +- target/arm/vec_helper.c | 28 +- target/arm/vec_internal.h | 28 +- target/i386/cpu-sysemu.c | 2 +- target/i386/hvf/vmcs.h | 2 +- target/i386/hvf/vmx.h | 2 +- target/riscv/cpu.c | 68 +- target/riscv/cpu.h | 4 + target/riscv/cpu_helper.c | 4 +- target/riscv/debug.c | 2 + target/riscv/insn_trans/trans_rvm.c.inc | 18 +- target/riscv/insn_trans/trans_rvv.c.inc | 106 +- target/riscv/internals.h | 6 +- target/riscv/translate.c | 4 + target/riscv/vector_helper.c | 1588 +++++++++------- target/s390x/ioinst.c | 2 +- tests/qtest/npcm7xx_sdhci-test.c | 2 +- tests/tcg/x86_64/system/boot.S | 2 +- 88 files changed, 5087 insertions(+), 4357 deletions(-) create mode 100644 target/arm/ptw.c create mode 100644 target/arm/sve_ldst_internal.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig updated (261440b7372 -> 8ca04b41bb1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig in repository toolchain/ci/gcc. from 261440b7372 Daily bump. adds 1908e200078 Daily bump. adds c45a9752f15 Fix insn does not satisfy its constraints: sse2_lshrv1ti3 adds 64f5d58d815 libstdc++: Only include <ext/atomicity.h> for COW string adds 6666ca1ab44 libstdc++: Fix narrowing conversions for 16-bit size_t [PR105681] adds d47c4f0f1da libstdc++: Mark non-exported function always_inline [PR105671] adds 777a80af43e gcc: xtensa: fix PR target/105879 adds e057d454db4 c++: redeclared hidden friend take 2 [PR105852] adds 669fc7629eb Daily bump. adds 94f9c03b99f Update gcc sv.po adds 37499ac6dca Daily bump. adds 8ca04b41bb1 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 17 + gcc/DATESTAMP | 2 +- gcc/config/i386/sse.md | 6 +- gcc/config/xtensa/xtensa.md | 13 +- gcc/cp/ChangeLog | 10 + gcc/cp/cp-tree.h | 1 + gcc/cp/decl.cc | 16 +- gcc/cp/pt.cc | 29 +- gcc/po/ChangeLog | 4 + gcc/po/sv.po | 1530 ++++---------------- gcc/testsuite/ChangeLog | 7 + gcc/testsuite/g++.dg/modules/tpl-friend-2_a.C | 2 +- gcc/testsuite/g++.dg/template/friend74.C | 8 + libstdc++-v3/ChangeLog | 30 + libstdc++-v3/include/bits/basic_string.h | 1 - libstdc++-v3/include/bits/cow_string.h | 2 + .../resize_policy/hash_prime_size_policy_imp.hpp | 18 +- libstdc++-v3/include/ext/random | 2 + libstdc++-v3/include/std/sstream | 1 + 19 files changed, 446 insertions(+), 1253 deletions(-) create mode 100644 gcc/testsuite/g++.dg/template/friend74.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (70e2ffbcb4f -> ef1e4d80dd3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/gcc. from 70e2ffbcb4f Daily bump. adds 63eab5d5775 Update document for VECTOR_MODES_WITH_PREFIX adds c4320bde42c Recognize vpcmov in combine with -mxop on x86. adds 6dd194e2ce2 PR c++/96442: Improved error recovery in enumerations. adds 76e3d60c16d x86-64: make "length_vex" also account for VEX.B use by reg [...] adds 6bb0776e104 x86: harmonize __builtin_ia32_psadbw*() types adds 03b71406323 openmp: Add support for OpenMP 5.2 linear clause syntax for C/C++ adds cef3f69c2f4 Revert "configure: arrange to use appropriate objcopy" adds c00e1e3aa5a PR middle-end/105853: Call store_constructor directly from [...] adds cd22395457f Fix insn does not satisfy its constraints: sse2_lshrv1ti3 adds 2005b9b888e arm: Improve code generation for BFI and BFC [PR105090] adds 445ba599cb4 Daily bump. adds e4bdeaba6ef Adjust testcase to avoid compile failure under -m32. adds 5e005393d4f Disparages SSE_REGS alternatives sligntly with ?v instead o [...] adds 75df1594ae5 libgccjit: allow common objects in $(EXTRA_GCC_OBJS) and $( [...] adds ef5cc6bbb60 arm: Add star-mc1 cpu adds 5e5deac508e OpenMP: Fortran - fix ancestor's requires reverse_offload check adds d8c25809419 [Committed] Add -mno-avx2 to recent gcc.target/i386/xop-vpcmov3.c adds 90a6c3b6d69 c++: Reimplement static init/fini generation adds e94c6dbfb57 gcc: xtensa: fix PR target/105879 adds b6e1373bd34 PR middle-end/105874: Use EXPAND_MEMORY to fix ada bootstrap. adds 7d87790a871 c++: redeclared hidden friend take 2 [PR105852] adds e8ed26c2ac3 c++: non-templated friends [PR105852] adds 02b4e2de320 Daily bump. adds 2fc6e3d55f6 This patch replaces shift and ior insns with one rotate and [...] adds 269edf4e5e6 Update {skylake,icelake,alderlake}_cost to add a bit prefer [...] adds 17f52a1c725 openmp: Add support for HBW or large capacity or interleave [...] adds 2dc19a1b590 doc: Fix up -Waddress documentation adds 209de00fdb9 OpenMP: Handle ancestor:1 with discover_declare_target adds 97b81fb0363 c++: Better module initializer code adds 702a11ade2e RISC-V: Use a tab rather than space with FSFLAGS adds 4c334e0e4ff c++: Fix up ICE on __builtin_shufflevector constexpr evalua [...] adds 699e9a0f671 openmp: Fix up include of the generic allocator.c adds a05aac0a130 rs6000: Delete FP_ISA3 adds 64584863452 Update gcc sv.po adds 2fcc69d8ce4 xtensa: Implement bswaphi2 insn pattern adds 9777d446e21 xtensa: Make one_cmplsi2 optimizer-friendly adds e44e7face13 xtensa: Optimize '(~x & y)' to '((x & y) ^ y)' adds 29dc90a580b xtensa: Add clrsbsi2 insn pattern adds e3bba42fb5d Daily bump. adds 5940b4e59f8 libgccjit: Support getting the size of a float [PR105829] adds b370ed0bf93 libstdc++: Make std::hash<basic_string<>> allocator-agnosti [...] adds 1753a712010 PR rtl-optimization/7061: Complex number arguments on x86_6 [...] adds 1e65f2ed990 libstdc++: Fix lifetime bugs for non-TLS eh_globals [PR105880] adds 671970a5621 libstdc++: Make std::lcm and std::gcd detect overflow [PR105844] adds 1459b55d24c libgomp nvptx plugin: Remove '--with-cuda-driver=[...]' etc [...] adds c08ba00487c c++: Adjust module initializer calling emission adds 1eff4872d2e openmp: Call dlopen with "libmemkind.so.0" rather than "lib [...] adds e6d369bbdb4 c++: Add a late-writing step for modules adds cb7fd1ea85f c++: optimize specialization of nested templated classes adds f9b5a8e58df c++: optimize specialization of templated member functions adds 343d83c7a89 c++: improve TYPENAME_TYPE hashing [PR65328] adds ef1e4d80dd3 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 185 +++ gcc/DATESTAMP | 2 +- gcc/Makefile.in | 1 - gcc/c/ChangeLog | 10 + gcc/c/c-parser.cc | 111 +- gcc/c/c-typeck.cc | 6 +- gcc/calls.cc | 7 +- gcc/config/arm/arm-cpus.in | 10 + gcc/config/arm/arm-tables.opt | 3 + gcc/config/arm/arm-tune.md | 4 +- gcc/config/arm/arm.cc | 113 +- gcc/config/arm/arm.md | 106 +- gcc/config/arm/constraints.md | 10 +- gcc/config/i386/i386-builtin-types.def | 1 + gcc/config/i386/i386-builtin.def | 2 +- gcc/config/i386/i386-expand.cc | 1 + gcc/config/i386/i386.cc | 49 +- gcc/config/i386/i386.md | 8 +- gcc/config/i386/sse.md | 38 +- gcc/config/i386/x86-tune-costs.h | 26 +- gcc/config/riscv/riscv.md | 4 +- gcc/config/rs6000/rs6000.md | 43 +- gcc/config/xtensa/xtensa.md | 81 +- gcc/configure | 81 -- gcc/configure.ac | 30 - gcc/cp/ChangeLog | 152 ++ gcc/cp/constexpr.cc | 13 +- gcc/cp/cp-tree.h | 8 +- gcc/cp/decl.cc | 51 +- gcc/cp/decl2.cc | 539 +++---- gcc/cp/module.cc | 262 ++-- gcc/cp/parser.cc | 128 +- gcc/cp/pt.cc | 164 ++- gcc/cp/semantics.cc | 20 +- gcc/doc/invoke.texi | 12 +- gcc/exec-tool.in | 8 +- gcc/expr.cc | 35 +- gcc/expr.h | 2 + gcc/fortran/ChangeLog | 11 + gcc/fortran/openmp.cc | 9 +- gcc/fortran/trans-openmp.cc | 1 + gcc/jit/ChangeLog | 11 + gcc/jit/Make-lang.in | 9 +- gcc/jit/libgccjit.cc | 4 +- gcc/machmode.def | 5 +- gcc/omp-offload.cc | 21 +- gcc/po/ChangeLog | 4 + gcc/po/sv.po | 1530 ++++---------------- gcc/testsuite/ChangeLog | 115 ++ gcc/testsuite/c-c++-common/gomp/linear-2.c | 58 + gcc/testsuite/c-c++-common/gomp/linear-3.c | 9 + .../c-c++-common/gomp/reverse-offload-1.c | 93 ++ gcc/testsuite/g++.dg/gomp/linear-3.C | 54 + gcc/testsuite/g++.dg/gomp/linear-4.C | 27 + gcc/testsuite/g++.dg/gomp/linear-5.C | 15 + gcc/testsuite/g++.dg/init/static-cdtor1.C | 17 + gcc/testsuite/g++.dg/modules/init-2_a.C | 2 + gcc/testsuite/g++.dg/modules/init-2_b.C | 2 + gcc/testsuite/g++.dg/modules/init-3_a.C | 17 + gcc/testsuite/g++.dg/modules/init-3_b.C | 6 + gcc/testsuite/g++.dg/modules/init-3_c.C | 17 + gcc/testsuite/g++.dg/modules/tpl-friend-2_a.C | 2 +- gcc/testsuite/g++.dg/opt/pr105874.C | 30 + gcc/testsuite/g++.dg/parse/pr96442.C | 6 + gcc/testsuite/g++.dg/pr105871.C | 12 + gcc/testsuite/g++.dg/template/friend74.C | 8 + gcc/testsuite/g++.target/i386/pr105638.C | 3 +- gcc/testsuite/gcc.dg/pr105853.c | 11 + gcc/testsuite/gcc.dg/pr105856.c | 10 + .../gcc.target/i386/extract-insert-combining.c | 1 + gcc/testsuite/gcc.target/i386/pr105493.c | 51 + gcc/testsuite/gcc.target/i386/pr105513-1.c | 16 + gcc/testsuite/gcc.target/i386/pr105854.c | 33 + gcc/testsuite/gcc.target/i386/pr7061-1.c | 4 + gcc/testsuite/gcc.target/i386/pr7061-2.c | 5 + gcc/testsuite/gcc.target/i386/pr91446.c | 2 +- gcc/testsuite/gcc.target/i386/pr99881.c | 2 +- gcc/testsuite/gcc.target/i386/xop-pcmov3.c | 10 + gcc/testsuite/gcc.target/powerpc/pr93453-1.c | 14 + gcc/testsuite/gcc.target/xtensa/check_zero_byte.c | 9 + gcc/testsuite/gcc.target/xtensa/one_cmpl_abs.c | 9 + .../gfortran.dg/gomp/target-device-ancestor-5.f90 | 69 + gcc/testsuite/jit.dg/test-types.c | 3 + gcc/tree-pretty-print.cc | 55 +- gcc/tree.h | 5 + libgcc/ChangeLog | 5 + libgcc/config/xtensa/lib1funcs.S | 23 + libgcc/config/xtensa/t-xtensa | 2 +- libgomp/ChangeLog | 39 + libgomp/Makefile.in | 50 +- libgomp/allocator.c | 365 ++++- libgomp/config/linux/allocator.c | 36 + libgomp/configure | 143 +- libgomp/plugin/Makefrag.am | 25 +- libgomp/plugin/configfrag.ac | 90 +- libgomp/testsuite/Makefile.in | 5 - libgomp/testsuite/lib/libgomp.exp | 13 - libgomp/testsuite/libgomp-test-support.exp.in | 3 - libstdc++-v3/ChangeLog | 45 + libstdc++-v3/include/bits/basic_string.h | 102 +- libstdc++-v3/include/experimental/numeric | 46 +- libstdc++-v3/include/std/numeric | 75 +- libstdc++-v3/include/std/string | 33 - libstdc++-v3/libsupc++/eh_globals.cc | 51 +- .../testsuite/21_strings/basic_string/hash/hash.cc | 16 + .../21_strings/basic_string/hash/hash_char8_t.cc | 12 + libstdc++-v3/testsuite/26_numerics/gcd/105844.cc | 21 + libstdc++-v3/testsuite/26_numerics/gcd/gcd_neg.cc | 10 +- libstdc++-v3/testsuite/26_numerics/lcm/105844.cc | 22 + libstdc++-v3/testsuite/26_numerics/lcm/lcm_neg.cc | 10 +- 110 files changed, 3489 insertions(+), 2486 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/gomp/linear-2.c create mode 100644 gcc/testsuite/c-c++-common/gomp/linear-3.c create mode 100644 gcc/testsuite/c-c++-common/gomp/reverse-offload-1.c create mode 100644 gcc/testsuite/g++.dg/gomp/linear-3.C create mode 100644 gcc/testsuite/g++.dg/gomp/linear-4.C create mode 100644 gcc/testsuite/g++.dg/gomp/linear-5.C create mode 100644 gcc/testsuite/g++.dg/init/static-cdtor1.C create mode 100644 gcc/testsuite/g++.dg/modules/init-3_a.C create mode 100644 gcc/testsuite/g++.dg/modules/init-3_b.C create mode 100644 gcc/testsuite/g++.dg/modules/init-3_c.C create mode 100644 gcc/testsuite/g++.dg/opt/pr105874.C create mode 100644 gcc/testsuite/g++.dg/parse/pr96442.C create mode 100644 gcc/testsuite/g++.dg/pr105871.C create mode 100644 gcc/testsuite/g++.dg/template/friend74.C create mode 100644 gcc/testsuite/gcc.dg/pr105853.c create mode 100644 gcc/testsuite/gcc.dg/pr105856.c create mode 100644 gcc/testsuite/gcc.target/i386/pr105493.c create mode 100644 gcc/testsuite/gcc.target/i386/pr105513-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr105854.c create mode 100644 gcc/testsuite/gcc.target/i386/pr7061-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr7061-2.c create mode 100644 gcc/testsuite/gcc.target/i386/xop-pcmov3.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr93453-1.c create mode 100644 gcc/testsuite/gcc.target/xtensa/check_zero_byte.c create mode 100644 gcc/testsuite/gcc.target/xtensa/one_cmpl_abs.c create mode 100644 gcc/testsuite/gfortran.dg/gomp/target-device-ancestor-5.f90 create mode 100644 libgomp/config/linux/allocator.c create mode 100644 libstdc++-v3/testsuite/26_numerics/gcd/105844.cc create mode 100644 libstdc++-v3/testsuite/26_numerics/lcm/105844.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits June 2022