Tcwg-commits June 2022

tcwg-commits@lists.linaro.org

4 participants
14714 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig updated (d5defccd3 -> 015524dfc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards d5defccd3 0: update: binutils-gcc-linux-qemu: boot new 015524dfc 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d5defccd3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1552 -> 1568 bytes 02-prepare_abe/console.log.xz | Bin 2740 -> 2748 bytes 03-build_abe-binutils/console.log.xz | Bin 30140 -> 30364 bytes 04-build_abe-stage1/console.log.xz | Bin 68456 -> 68192 bytes 05-build_abe-qemu/console.log.xz | Bin 32208 -> 32832 bytes 06-build_linux/console.log.xz | Bin 3684 -> 3864 bytes 07-boot_linux/console.log.xz | Bin 504 -> 504 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 18 +++++++++--------- 10 files changed, 14 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_gnu_cross_build/release-arm updated (9b1f588549 -> 30796f5567)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/release-arm in repository toolchain/ci/qemu. from 9b1f588549 Merge tag 'pull-la-20220606' of https://gitlab.com/rth7680/q [...] adds 4d84bb6c8b hw/tpm/tpm_tis_common.c: Assert that locty is in range adds e37a0ef460 tpm_crb: mark command buffer as dirty on request completion adds 6d940eff47 Merge tag 'pull-tpm-2022-06-07-1' of https://github.com/stef [...] adds ec6600be0d vfio/common: remove spurious warning on vfio_listener_region_del adds 05911658cb Merge tag 'vfio-updates-20220608.0' of https://gitlab.com/al [...] adds d507bc3b05 target/arm: Declare support for FEAT_RASv1p1 adds 7ac610206a target/arm: Implement FEAT_DoubleFault adds 9323e79f10 Fix 'writeable' typos adds d2008b3355 xlnx_dp: fix the wrong register size adds 759ae1b47e xlnx_dp: Introduce a vblank signal adds 39f40d02f6 xlnx_dp: Fix the interrupt disable logic adds b3f5cc3fda xlnx-zynqmp: fix the irq mapping for the display port and its dma adds d8cca960a9 target/arm: Move stage_1_mmu_idx decl to internals.h adds 8ae0886002 target/arm: Move get_phys_addr to ptw.c adds f2d2f5ceb8 target/arm: Move get_phys_addr_v5 to ptw.c adds 53c038efb7 target/arm: Move get_phys_addr_v6 to ptw.c adds 9a12fb366d target/arm: Move get_phys_addr_pmsav5 to ptw.c adds 7d2e08c960 target/arm: Move get_phys_addr_pmsav7_default to ptw.c adds 1f2e87e5ab target/arm: Move get_phys_addr_pmsav7 to ptw.c adds 730d5c31d8 target/arm: Move get_phys_addr_pmsav8 to ptw.c adds fedbaa0503 target/arm: Move pmsav8_mpu_lookup to ptw.c adds c8e436c9f7 target/arm: Move pmsav7_use_background_region to ptw.c adds 2c1f429df3 target/arm: Move v8m_security_lookup to ptw.c adds 47ff5ba9d0 target/arm: Move m_is_{ppb,system}_region to ptw.c adds 4c74ab157b target/arm: Move get_level1_table_address to ptw.c adds 966f4bb7d8 target/arm: Move combine_cacheattrs and subroutines to ptw.c adds 3283222acd target/arm: Move get_phys_addr_lpae to ptw.c adds 11552bb0d9 target/arm: Move arm_{ldl,ldq}_ptw to ptw.c adds cd6bc4d517 target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_ [...] adds 1c73d84807 target/arm: Move arm_pamax, pamax_map into ptw.c adds f8526edc2f target/arm: Move get_S1prot, get_S2prot to ptw.c adds c5168785d2 target/arm: Move check_s2_mmu_setup to ptw.c adds 2f0ec92e94 target/arm: Move aa32_va_parameters to ptw.c adds 4845d3be12 target/arm: Move ap_to_tw_prot etc to ptw.c adds 0c23d56fc1 target/arm: Move regime_is_user to ptw.c adds 3b318aaeef target/arm: Move regime_ttbr to ptw.c adds 8db1a3a0bb target/arm: Move regime_translation_disabled to ptw.c adds 23971205cf target/arm: Move arm_cpu_get_phys_page_attrs_debug to ptw.c adds 1d26125536 target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx to ptw.c adds 5e79887ba6 target/arm: Pass CPUARMState to arm_ld[lq]_ptw adds f45ce4c35f target/arm: Rename TBFLAG_A64 ZCR_LEN to VL adds 8b599e5c02 linux-user/aarch64: Introduce sve_vq adds 61a8c23a3b target/arm: Remove route_to_el2 check from sve_exception_el adds 397d922c62 target/arm: Remove fp checks from sve_exception_el adds 19668718ad target/arm: Add el_is_in_host adds c6225bebc2 target/arm: Use el_is_in_host for sve_zcr_len_for_el adds aa4451b60e target/arm: Use el_is_in_host for sve_exception_el adds 7d38cb92aa target/arm: Hoist arm_is_el2_enabled check in sve_exception_el adds 87252bdecd target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset adds 9b5f422559 target/arm: Merge aarch64_sve_zcr_get_valid_len into caller adds 886902ece7 target/arm: Use uint32_t instead of bitmap for sve vq's adds 5ef3cc5636 target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el adds d1ce862602 target/arm: Split out load/store primitives to sve_ldst_internal.h adds 0b68112b39 target/arm: Export sve contiguous ldst support functions adds 820e0bb9ce target/arm: Move expand_pred_b to vec_internal.h adds 05dd14bdfa target/arm: Use expand_pred_b in mve_helper.c adds a613cf2d4a target/arm: Move expand_pred_h to vec_internal.h adds 72db2aa353 target/arm: Export bfdotadd from vec_helper.c adds f305bf9436 target/arm: Add isar_feature_aa64_sme adds 414c54d515 target/arm: Add ID_AA64SMFR0_EL1 adds 028f2361d0 Merge tag 'pull-target-arm-20220609' of https://git.linaro.o [...] adds 7851b21a81 hw/ide/piix: Remove redundant "piix3-ide-xen" device class adds 3690241746 hw/ide/piix: Add some documentation to pci_piix3_xen_ide_unplug() adds 6a8a8b62bd include/hw/ide: Unexport pci_piix3_xen_ide_unplug() adds 9cc1bf1ebc Merge tag 'pull-xen-20220609' of https://xenbits.xen.org/git [...] adds efe1592c43 MAINTAINERS: Cover hw/core/uboot_image.h within Generic Load [...] adds de799beba7 target/riscv: add support for zmmul extension v0.1 adds f9a461b2d3 hw/riscv: virt: Generate fw_cfg DT node correctly adds 40244040a7 hw/intc: sifive_plic: Avoid overflowing the addr_config buffer adds af9751316e hw/core/loader: return image sizes as ssize_t adds 8f42415fc1 target/riscv: Wake on VS-level external interrupts adds d1d8541217 target/riscv/debug.c: keep experimental rv128 support working adds 8a085fb2ad target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed adds 25eae0486d target/riscv: rvv: Prune redundant access_type parameter passed adds c7b8a4213b target/riscv: rvv: Rename ambiguous esz adds 41d3d7f76a target/riscv: rvv: Early exit when vstart >= vl adds f1eed927fb target/riscv: rvv: Add tail agnostic for vv instructions adds 752614cab8 target/riscv: rvv: Add tail agnostic for vector load / store [...] adds 5c19fc156e target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions adds 7b1bff41c1 target/riscv: rvv: Add tail agnostic for vector integer shif [...] adds 38581e5c9a target/riscv: rvv: Add tail agnostic for vector integer comp [...] adds 89a32de2d5 target/riscv: rvv: Add tail agnostic for vector integer merg [...] adds 09106eed30 target/riscv: rvv: Add tail agnostic for vector fix-point ar [...] adds 5eacf7d8a0 target/riscv: rvv: Add tail agnostic for vector floating-poi [...] adds df4f52a758 target/riscv: rvv: Add tail agnostic for vector reduction in [...] adds acc6ffd482 target/riscv: rvv: Add tail agnostic for vector mask instructions adds 803963f7cb target/riscv: rvv: Add tail agnostic for vector permutation [...] adds b8312675d6 target/riscv: rvv: Add option 'rvv_ta_all_1s' to enable opti [...] adds 26b2bc5859 target/riscv: Don't expose the CPU properties on names CPUs adds 07314158f6 target/riscv: trans_rvv: Avoid assert for RV32 and e64 adds b3cd3b5a66 Merge tag 'pull-riscv-to-apply-20220610' of github.com:alist [...] adds 7666a81d15 target/arm: Mark exception helpers as noreturn adds fa33eead86 target/arm: Add coproc parameter to syn_fp_access_trap adds 57287a6e95 target/arm: Move exception_target_el out of line adds 55ba15b737 target/arm: Move arm_singlestep_active out of line adds 31c8df53ee target/arm: Move arm_generate_debug_exceptions out of line adds 831c1b1087 target/arm: Use is_a64 in arm_generate_debug_exceptions adds 16f9d5f693 target/arm: Move exception_bkpt_insn to debug_helper.c adds a853e3ae55 target/arm: Move arm_debug_exception_fsr to debug_helper.c adds d3c5d50a5c target/arm: Rename helper_exception_with_syndrome adds 9c9d03f0c5 target/arm: Introduce gen_exception_insn_el_v adds 8c5d24dc7d target/arm: Rename gen_exception_insn to gen_exception_insn_el adds 486d6c9699 target/arm: Introduce gen_exception_insn adds f0d7c2054a target/arm: Create helper_exception_swstep adds 8480e933ed target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_EL adds cc5e672b85 target/arm: Move gen_exception to translate.c adds bca6f24f01 target/arm: Rename gen_exception to gen_exception_el adds 1a13b9a863 target/arm: Introduce gen_exception adds d6d7f818a9 target/arm: Introduce gen_exception_el_v adds eeaf596022 target/arm: Introduce helper_exception_with_syndrome adds 82303761c6 target/arm: Remove default_exception_el adds 04eacf6e79 target/arm: Create raise_exception_debug adds 38e8a13c11 target/arm: Move arm_debug_target_el to debug_helper.c adds 02e1de14bc target/arm: Fix Secure PL1 tests in fp_exception_el adds 284ad5e70c tests/qtest: Reduce npcm7xx_sdhci test image size adds bfe43e3d14 target/arm: Adjust format test in scr_write adds 6bcbb07af6 target/arm: SCR_EL3.RW is RAO/WI without AArch32 EL[12] adds ebf1b4cbb8 gdbstub: Don't use GDB syscalls if no GDB is attached adds 90c072e063 semihosting/config: Merge --semihosting-config option groups adds 2663c41cfa Merge tag 'pull-target-arm-20220610' of https://git.linaro.o [...] adds 23609e47c0 acpi: add interface to build device specific AML adds f974e0b75b acpi: make isa_build_aml() support AcpiDevAmlIf interface adds e7c72a678a acpi: fdc-isa: replace ISADeviceClass::build_aml with AcpiDe [...] adds ef26fc47ba acpi: parallel port: replace ISADeviceClass::build_aml with [...] adds 0d170dc13c acpi: serial-is: replace ISADeviceClass::build_aml with Acpi [...] adds d9cf178cc0 acpi: mc146818rtc: replace ISADeviceClass::build_aml with Ac [...] adds 68f01317b4 acpi: pckbd: replace ISADeviceClass::build_aml with AcpiDevA [...] adds a576158ee9 isa-bus: drop no longer used ISADeviceClass::build_aml adds dc35bfb6e0 tests: acpi: add and whitelist DSDT.ipmismbus expected blob adds ac70b4a3f1 tests: acpi: q35: add test for smbus-ipmi device adds f4e2fb67bc tests: acpi: update expected blob DSDT.ipmismbus adds 4ccf0937a4 tests: acpi: whitelist DSDT.ipmismbus expected blob adds ea01c52291 ipmi: acpi: use relative path to resource source adds 0f5b3fd748 tests: acpi: update expected DSDT.ipmismbus blob adds 4b66ddcc4d acpi: ich9-smb: add support for AcpiDevAmlIf interface adds 5876d9b53f acpi: ipmi: use AcpiDevAmlIf interface to build IPMI device [...] adds 38003951b5 q35: acpi: drop not needed PCMachineClass::do_not_add_smb_acpi adds 6a4b286ced tests: acpi: white-list to be re-factored pc/q35 DSDT adds 92ea7fb3fe acpi: pc: isa bridge: use AcpiDevAmlIf interface to build IS [...] adds 887e8e9d3a acpi: q35: isa bridge: use AcpiDevAmlIf interface to build I [...] adds 8796f60fbf tests: acpi: update expected blobs adds 39728badab tests: acpi: add and white-list DSDT.applesmc expected blob adds cde55744e9 tests: acpi: add applesmc testcase adds 1d7ea91500 acpi: applesmc: use AcpiDevAmlIfClass:build_dev_aml to provi [...] adds ec66dbc753 tests: acpi: update expected blobs adds 7a3048d596 tests: acpi: white-lists expected DSDT.pvpanic-isa blob adds fd7bcffe59 tests: acpi: add pvpanic-isa: testcase adds ff36e90e7c acpi: pvpanic-isa: use AcpiDevAmlIfClass:build_dev_aml to pr [...] adds d09ac1167e tests: acpi: update expected DSDT.pvpanic-isa blob adds a5bf52d21c tests: acpi: white-list DSDT.tis.tpm2/DSDT.tis.tpm12 expected blobs adds 5198d7939c acpi: pc/q35: tpm-tis: fix TPM device scope adds d3ecb22c93 acpi: pc/q35: remove not needed 'if' condition on pci bus adds 168e3aa7ac acpi: tpm-tis: use AcpiDevAmlIfClass:build_dev_aml to provid [...] adds f3115cdd9c tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs adds 92344e76b8 x86: acpi-build: do not include hw/isa/isa.h directly adds 03b39fcf64 hw/cxl: Make the CXL fixed memory window setup a machine parameter. adds 513598050a hw/acpi/cxl: Pass in the CXLState directly rather than MachineState adds dab390ff24 hw/cxl: Push linking of CXL targets into i386/pc rather than [...] adds 96f7da1711 tests/acpi: Allow modification of q35 CXL CEDT table. adds 7bd1900b36 pci/pci_expander_bridge: For CXL HB delay the HB register me [...] adds 3546b0529a tests/acpi: Update q35/CEDT.cxl for new memory addresses. adds 1ebf9001fb hw/cxl: Move the CXLState from MachineState to machine type [...] adds 518f5f6ad6 hw/machine: Drop cxl_supported flag as no longer useful adds 36f18c6989 pci: fix overflow in snprintf string formatting adds f824f52947 hw/cxl: Fix missing write mask for HDM decoder target list r [...] adds 6164a11104 hw/acpi/viot: rename build_pci_range_node() to enumerate_pci [...] adds 1b805ab560 hw/acpi/viot: move the individual PCI host bridge entry gene [...] adds e5f73c8397 hw/acpi/viot: build array of PCI host bridges before generat [...] adds 4c8f2ffff1 tests/acpi: virt: allow VIOT acpi table changes adds 68f14a8729 hw/acpi/viot: sort VIOT ACPI table entries by PCI host bridg [...] adds 5060004c30 tests/acpi: virt: update golden masters for VIOT adds fb38d0c97d hw/virtio/vhost-user: don't use uninitialized variable adds 06cb5c82eb hw/vhost-user-scsi|blk: set `supports_config` flag correctly adds 30796f5567 Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/vir [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 1 + accel/hvf/hvf-accel-ops.c | 4 +- accel/kvm/kvm-all.c | 4 +- accel/tcg/user-exec.c | 6 +- docs/interop/vhost-user.rst | 2 +- docs/specs/vmgenid.txt | 4 +- docs/system/arm/emulation.rst | 2 + docs/system/devices/cxl.rst | 4 +- gdbstub.c | 14 +- hw/acpi/acpi_interface.c | 8 + hw/acpi/cxl.c | 9 +- hw/acpi/ghes.c | 2 +- hw/acpi/ipmi-stub.c | 2 +- hw/acpi/ipmi.c | 53 +- hw/acpi/meson.build | 2 +- hw/acpi/viot.c | 107 +- hw/arm/armv7m.c | 2 +- hw/arm/boot.c | 8 +- hw/arm/xlnx-zynqmp.c | 4 +- hw/block/fdc-isa.c | 16 +- hw/block/vhost-user-blk.c | 1 + hw/char/parallel.c | 14 +- hw/char/serial-isa.c | 14 +- hw/core/generic-loader.c | 2 +- hw/core/loader.c | 81 +- hw/core/machine.c | 28 - hw/cxl/cxl-component-utils.c | 13 +- hw/cxl/cxl-host-stubs.c | 9 +- hw/cxl/cxl-host.c | 100 +- hw/display/xlnx_dp.c | 49 +- hw/i2c/smbus_ich9.c | 15 + hw/i386/acpi-build.c | 179 +- hw/i386/pc.c | 31 +- hw/i386/pc_piix.c | 4 +- hw/i386/pc_q35.c | 1 - hw/i386/x86.c | 2 +- hw/i386/xen/xen_platform.c | 48 +- hw/ide/piix.c | 42 - hw/input/pckbd.c | 14 +- hw/intc/arm_gicv3_cpuif.c | 2 +- hw/intc/arm_gicv3_dist.c | 2 +- hw/intc/arm_gicv3_redist.c | 4 +- hw/intc/riscv_aclint.c | 2 +- hw/intc/riscv_aplic.c | 2 +- hw/intc/sifive_plic.c | 19 +- hw/ipmi/isa_ipmi_bt.c | 4 + hw/ipmi/isa_ipmi_kcs.c | 4 + hw/ipmi/smbus_ipmi.c | 4 + hw/isa/isa-bus.c | 9 +- hw/isa/lpc_ich9.c | 19 + hw/isa/piix3.c | 17 + hw/misc/applesmc.c | 29 + hw/misc/pvpanic-isa.c | 42 + hw/pci-bridge/meson.build | 5 +- hw/pci-bridge/pci_expander_bridge.c | 32 +- hw/pci-bridge/pci_expander_bridge_stubs.c | 14 + hw/pci/pci.c | 18 +- hw/pci/shpc.c | 2 +- hw/riscv/boot.c | 5 +- hw/riscv/virt.c | 28 +- hw/rtc/mc146818rtc.c | 14 +- hw/scsi/mfi.h | 2 +- hw/scsi/vhost-user-scsi.c | 1 - hw/sparc64/sun4u_iommu.c | 2 +- hw/timer/sse-timer.c | 2 +- hw/tpm/tpm_crb.c | 1 + hw/tpm/tpm_tis_common.c | 7 +- hw/tpm/tpm_tis_isa.c | 32 + hw/vfio/common.c | 10 +- hw/vfio/trace-events | 2 +- hw/virtio/vhost-user.c | 8 +- include/hw/acpi/acpi_aml_interface.h | 40 + include/hw/acpi/cxl.h | 5 +- include/hw/acpi/ipmi.h | 9 +- include/hw/boards.h | 3 +- include/hw/cxl/cxl.h | 9 +- include/hw/cxl/cxl_host.h | 23 + include/hw/display/xlnx_dp.h | 12 +- include/hw/i386/pc.h | 3 +- include/hw/ide.h | 3 - include/hw/isa/isa.h | 15 - include/hw/loader.h | 55 +- include/hw/misc/pvpanic.h | 9 - include/hw/pci-bridge/pci_expander_bridge.h | 12 + linux-user/aarch64/signal.c | 4 +- linux-user/aarch64/target_prctl.h | 18 +- python/qemu/machine/machine.py | 2 +- qapi/machine.json | 13 + qemu-options.hx | 73 +- semihosting/config.c | 1 + softmmu/vl.c | 46 - target/arm/arch_dump.c | 2 +- target/arm/cpu.c | 5 +- target/arm/cpu.h | 199 +- target/arm/cpu64.c | 120 +- target/arm/debug_helper.c | 220 +- target/arm/gdbstub.c | 2 +- target/arm/gdbstub64.c | 2 +- target/arm/helper.c | 3095 +++--------------------- target/arm/helper.h | 8 +- target/arm/hvf/hvf.c | 4 +- target/arm/internals.h | 86 +- target/arm/kvm64.c | 47 +- target/arm/kvm_arm.h | 7 +- target/arm/meson.build | 1 + target/arm/mve_helper.c | 6 +- target/arm/op_helper.c | 52 +- target/arm/ptw.c | 2540 +++++++++++++++++++ target/arm/sve_helper.c | 232 +- target/arm/sve_ldst_internal.h | 221 ++ target/arm/syndrome.h | 7 +- target/arm/tlb_helper.c | 26 + target/arm/translate-a64.c | 36 +- target/arm/translate-a64.h | 2 +- target/arm/translate-m-nocp.c | 15 +- target/arm/translate-mve.c | 3 +- target/arm/translate-sve.c | 2 +- target/arm/translate-vfp.c | 18 +- target/arm/translate.c | 106 +- target/arm/translate.h | 45 +- target/arm/vec_helper.c | 28 +- target/arm/vec_internal.h | 28 +- target/i386/cpu-sysemu.c | 2 +- target/i386/hvf/vmcs.h | 2 +- target/i386/hvf/vmx.h | 2 +- target/riscv/cpu.c | 68 +- target/riscv/cpu.h | 4 + target/riscv/cpu_helper.c | 4 +- target/riscv/debug.c | 2 + target/riscv/insn_trans/trans_rvm.c.inc | 18 +- target/riscv/insn_trans/trans_rvv.c.inc | 106 +- target/riscv/internals.h | 6 +- target/riscv/translate.c | 4 + target/riscv/vector_helper.c | 1588 +++++++----- target/s390x/ioinst.c | 2 +- tests/data/acpi/pc/DSDT | Bin 6002 -> 5987 bytes tests/data/acpi/pc/DSDT.acpierst | Bin 5969 -> 5954 bytes tests/data/acpi/pc/DSDT.acpihmat | Bin 7327 -> 7312 bytes tests/data/acpi/pc/DSDT.bridge | Bin 8668 -> 8653 bytes tests/data/acpi/pc/DSDT.cphp | Bin 6466 -> 6451 bytes tests/data/acpi/pc/DSDT.dimmpxm | Bin 7656 -> 7641 bytes tests/data/acpi/pc/DSDT.hpbridge | Bin 5969 -> 5954 bytes tests/data/acpi/pc/DSDT.hpbrroot | Bin 3084 -> 3069 bytes tests/data/acpi/pc/DSDT.ipmikcs | Bin 6074 -> 6059 bytes tests/data/acpi/pc/DSDT.memhp | Bin 7361 -> 7346 bytes tests/data/acpi/pc/DSDT.nohpet | Bin 5860 -> 5845 bytes tests/data/acpi/pc/DSDT.numamem | Bin 6008 -> 5993 bytes tests/data/acpi/pc/DSDT.roothp | Bin 6210 -> 6195 bytes tests/data/acpi/q35/CEDT.cxl | Bin 184 -> 184 bytes tests/data/acpi/q35/DSDT | Bin 8289 -> 8274 bytes tests/data/acpi/q35/DSDT.acpierst | Bin 8306 -> 8291 bytes tests/data/acpi/q35/DSDT.acpihmat | Bin 9614 -> 9599 bytes tests/data/acpi/q35/{DSDT => DSDT.applesmc} | Bin 8289 -> 8320 bytes tests/data/acpi/q35/DSDT.bridge | Bin 11003 -> 10988 bytes tests/data/acpi/q35/DSDT.cphp | Bin 8753 -> 8738 bytes tests/data/acpi/q35/DSDT.cxl | Bin 9615 -> 9600 bytes tests/data/acpi/q35/DSDT.dimmpxm | Bin 9943 -> 9928 bytes tests/data/acpi/q35/DSDT.ipmibt | Bin 8364 -> 8349 bytes tests/data/acpi/q35/{DSDT => DSDT.ipmismbus} | Bin 8289 -> 8363 bytes tests/data/acpi/q35/DSDT.ivrs | Bin 8306 -> 8291 bytes tests/data/acpi/q35/DSDT.memhp | Bin 9648 -> 9633 bytes tests/data/acpi/q35/DSDT.mmio64 | Bin 9419 -> 9404 bytes tests/data/acpi/q35/DSDT.multi-bridge | Bin 8583 -> 8568 bytes tests/data/acpi/q35/DSDT.nohpet | Bin 8147 -> 8132 bytes tests/data/acpi/q35/DSDT.numamem | Bin 8295 -> 8280 bytes tests/data/acpi/q35/{DSDT => DSDT.pvpanic-isa} | Bin 8289 -> 8375 bytes tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8900 -> 8880 bytes tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8921 -> 8906 bytes tests/data/acpi/q35/DSDT.viot | Bin 9398 -> 9383 bytes tests/data/acpi/q35/DSDT.xapic | Bin 35652 -> 35637 bytes tests/data/acpi/q35/VIOT.viot | Bin 112 -> 112 bytes tests/qtest/bios-tables-test.c | 44 +- tests/qtest/cxl-test.c | 4 +- tests/qtest/npcm7xx_sdhci-test.c | 2 +- tests/tcg/x86_64/system/boot.S | 2 +- 175 files changed, 5795 insertions(+), 4830 deletions(-) create mode 100644 hw/pci-bridge/pci_expander_bridge_stubs.c create mode 100644 include/hw/acpi/acpi_aml_interface.h create mode 100644 include/hw/cxl/cxl_host.h create mode 100644 include/hw/pci-bridge/pci_expander_bridge.h create mode 100644 target/arm/ptw.c create mode 100644 target/arm/sve_ldst_internal.h copy tests/data/acpi/q35/{DSDT => DSDT.applesmc} (97%) copy tests/data/acpi/q35/{DSDT => DSDT.ipmismbus} (96%) copy tests/data/acpi/q35/{DSDT => DSDT.pvpanic-isa} (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_build/release-arm updated (364d1397ec -> fb68c8adc4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/release-arm in repository toolchain/ci/gdb. from 364d1397ec Automatic date update in version.in adds 0096540077 Automatic date update in version.in adds 795e17aa6a Automatic date update in version.in adds fb68c8adc4 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_cross_build/release-arm updated (0a1572b8bb -> 9d8ae95604)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/release-arm in repository toolchain/ci/glibc. from 0a1572b8bb powerpc: Fix VSX register number on __strncpy_power9 [BZ #29197] adds 97dd8b3f70 nptl: Fix __libc_cleanup_pop_restore asynchronous restore (B [...] adds 99978cd42c NEWS: Add a bug fix entry for BZ #29225 adds 8468be8433 hppa: Remove _dl_skip_args usage (BZ# 29165) adds 9d8ae95604 nios2: Remove _dl_skip_args usage (BZ# 29187) No new revisions were added by this update. Summary of changes: NEWS | 5 +++ nptl/libc-cleanup.c | 3 +- sysdeps/hppa/dl-machine.h | 36 ++++++++----------- sysdeps/nios2/dl-machine.h | 50 ++++++-------------------- sysdeps/pthread/Makefile | 1 + sysdeps/pthread/tst-cancel30.c | 82 ++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 114 insertions(+), 63 deletions(-) create mode 100644 sysdeps/pthread/tst-cancel30.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_build/release-arm updated (c45a9752f15 -> 8ca04b41bb1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/release-arm in repository toolchain/ci/gcc. from c45a9752f15 Fix insn does not satisfy its constraints: sse2_lshrv1ti3 adds 64f5d58d815 libstdc++: Only include <ext/atomicity.h> for COW string adds 6666ca1ab44 libstdc++: Fix narrowing conversions for 16-bit size_t [PR105681] adds d47c4f0f1da libstdc++: Mark non-exported function always_inline [PR105671] adds 777a80af43e gcc: xtensa: fix PR target/105879 adds e057d454db4 c++: redeclared hidden friend take 2 [PR105852] adds 669fc7629eb Daily bump. adds 94f9c03b99f Update gcc sv.po adds 37499ac6dca Daily bump. adds 8ca04b41bb1 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 17 + gcc/DATESTAMP | 2 +- gcc/config/xtensa/xtensa.md | 13 +- gcc/cp/ChangeLog | 10 + gcc/cp/cp-tree.h | 1 + gcc/cp/decl.cc | 16 +- gcc/cp/pt.cc | 29 +- gcc/po/ChangeLog | 4 + gcc/po/sv.po | 1530 ++++---------------- gcc/testsuite/ChangeLog | 7 + gcc/testsuite/g++.dg/modules/tpl-friend-2_a.C | 2 +- gcc/testsuite/g++.dg/template/friend74.C | 8 + libstdc++-v3/ChangeLog | 30 + libstdc++-v3/include/bits/basic_string.h | 1 - libstdc++-v3/include/bits/cow_string.h | 2 + .../resize_policy/hash_prime_size_policy_imp.hpp | 18 +- libstdc++-v3/include/ext/random | 2 + libstdc++-v3/include/std/sstream | 1 + 18 files changed, 443 insertions(+), 1250 deletions(-) create mode 100644 gcc/testsuite/g++.dg/template/friend74.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_build/release-arm updated (364d1397ec -> fb68c8adc4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/release-arm in repository toolchain/ci/binutils-gdb. from 364d1397ec Automatic date update in version.in adds 0096540077 Automatic date update in version.in adds 795e17aa6a Automatic date update in version.in adds fb68c8adc4 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_build/release-arm updated (8ab3f8aa9 -> 1e100ce6c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/release-arm in repository toolchain/ci/base-artifacts. discards 8ab3f8aa9 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 new 1e100ce6c 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8ab3f8aa9) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_build/release- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1548 -> 1552 bytes 02-prepare_abe/console.log.xz | Bin 2728 -> 2736 bytes 04-build_abe-binutils/console.log.xz | Bin 29856 -> 29852 bytes 05-build_abe-stage1/console.log.xz | Bin 86180 -> 85940 bytes 06-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 07-build_abe-linux/console.log.xz | Bin 9080 -> 8928 bytes 08-build_abe-glibc/console.log.xz | Bin 228224 -> 227956 bytes 09-build_abe-stage2/console.log.xz | Bin 220944 -> 221396 bytes 10-build_abe-gdb/console.log.xz | Bin 36488 -> 36632 bytes 11-build_abe-qemu/console.log.xz | Bin 31988 -> 32152 bytes 12-check_regression/console.log.xz | Bin 416 -> 416 bytes 13-update_baseline/console.log | 22 +++++++++++----------- jenkins/manifest.sh | 28 ++++++++++++++-------------- 13 files changed, 25 insertions(+), 25 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled updated (e94c6dbfb57 -> 17f52a1c725)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled in repository toolchain/ci/gcc. from e94c6dbfb57 gcc: xtensa: fix PR target/105879 adds b6e1373bd34 PR middle-end/105874: Use EXPAND_MEMORY to fix ada bootstrap. adds 7d87790a871 c++: redeclared hidden friend take 2 [PR105852] adds e8ed26c2ac3 c++: non-templated friends [PR105852] adds 02b4e2de320 Daily bump. adds 2fc6e3d55f6 This patch replaces shift and ior insns with one rotate and [...] adds 269edf4e5e6 Update {skylake,icelake,alderlake}_cost to add a bit prefer [...] adds 17f52a1c725 openmp: Add support for HBW or large capacity or interleave [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 34 +++ gcc/DATESTAMP | 2 +- gcc/config/i386/x86-tune-costs.h | 26 +- gcc/config/rs6000/rs6000.md | 12 +- gcc/cp/ChangeLog | 47 ++++ gcc/cp/cp-tree.h | 1 + gcc/cp/decl.cc | 21 +- gcc/cp/pt.cc | 43 ++- gcc/expr.cc | 11 +- gcc/fortran/ChangeLog | 5 + gcc/jit/ChangeLog | 5 + gcc/testsuite/ChangeLog | 35 +++ gcc/testsuite/g++.dg/modules/tpl-friend-2_a.C | 2 +- gcc/testsuite/g++.dg/opt/pr105874.C | 30 +++ gcc/testsuite/g++.dg/template/friend74.C | 8 + gcc/testsuite/g++.target/i386/pr105638.C | 3 +- gcc/testsuite/gcc.target/i386/pr105493.c | 51 ++++ gcc/testsuite/gcc.target/i386/pr91446.c | 2 +- gcc/testsuite/gcc.target/i386/pr99881.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr93453-1.c | 14 + libgomp/allocator.c | 365 +++++++++++++++++++++++++- libgomp/config/linux/allocator.c | 36 +++ 22 files changed, 699 insertions(+), 56 deletions(-) create mode 100644 gcc/testsuite/g++.dg/opt/pr105874.C create mode 100644 gcc/testsuite/g++.dg/template/friend74.C create mode 100644 gcc/testsuite/gcc.target/i386/pr105493.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr93453-1.c create mode 100644 libgomp/config/linux/allocator.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled updated (e231acb15 -> 2f933efc6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled in repository toolchain/ci/base-artifacts. from e231acb15 0: update: binutils-2d9cf99d9a6c701de912d3e95ea3ffa134af4c62: 2 new 2f933efc6 1: reset: gcc-17f52a1c725948befcc3dd3c90d1abad77b6f6fe: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1580 -> 1544 bytes 02-prepare_abe/console.log.xz | Bin 2720 -> 2716 bytes 04-build_abe-binutils/console.log.xz | Bin 38064 -> 37400 bytes 05-build_abe-bootstrap_profiled/console.log.xz | Bin 515416 -> 76136 bytes 06-check_regression/console.log.xz | Bin 416 -> 1200 bytes 06-check_regression/jira-body.txt | 2 ++ 06-check_regression/mail-body.txt | 30 +++++++++++++++++ 06-check_regression/mail-subject.txt | 1 + 06-check_regression/results.regressions | 10 ++++++ 06-check_regression/trigger-bisect | 2 ++ 07-update_baseline/console.log | 43 +++++++++++++------------ 07-update_baseline/results.regressions | 2 ++ jenkins/manifest.sh | 10 +++--- mail/jira-body.txt | 5 +++ mail/mail-body.txt | 33 +++++++++++++++++++ mail/mail-subject.txt | 1 + reset-baseline | 0 results | 12 +++++-- 18 files changed, 124 insertions(+), 27 deletions(-) create mode 100644 06-check_regression/jira-body.txt create mode 100644 06-check_regression/mail-body.txt create mode 100644 06-check_regression/mail-subject.txt create mode 100644 06-check_regression/results.regressions create mode 100644 06-check_regression/trigger-bisect create mode 100644 07-update_baseline/results.regressions create mode 100644 mail/jira-body.txt create mode 100644 mail/mail-body.txt create mode 100644 mail/mail-subject.txt create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_gcc_bootstrap updated (f7bd9f6 -> 73b57d3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap in repository toolchain/ci/interesting-commits. from f7bd9f6 Add regression 17f52a1c725948befcc3dd3c90d1abad77b6f6fe from [...] new 73b57d3 Add regression 17f52a1c725948befcc3dd3c90d1abad77b6f6fe from [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 3 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits June 2022