Tcwg-commits June 2022

tcwg-commits@lists.linaro.org

4 participants
14714 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (077438933cf -> f907cf4c07c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gcc. from 077438933cf xtensa: Optimize bitwise AND operation with some specific f [...] adds f907cf4c07c vect: Move suggested_unroll_factor applying [PR105940] No new revisions were added by this update. Summary of changes: gcc/tree-vect-loop.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (d712f2768a -> 476288fa2b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/binutils-gdb. from d712f2768a BFD_RELOC_MIPS_16 adds 6df97c56ea Debug support for global alias variable adds a7e29f797c Fix fbsd core matching adds c5a72a8d1c [gdb/testsuite] Fix regexp in gdb.ada/mi_var_access.exp adds 476288fa2b Revert "Fix fbsd core matching" No new revisions were added by this update. Summary of changes: gdb/dwarf2/read.c | 63 ++++++++++++++++++++++----------- gdb/testsuite/gdb.ada/mi_var_access.exp | 4 ++- gdb/testsuite/gdb.base/symbol-alias.exp | 63 +++++++++++++++++++++++++++++++-- gdb/testsuite/gdb.base/symbol-alias2.c | 12 +++++++ 4 files changed, 117 insertions(+), 25 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (4fed43a62 -> fe35bf6b6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/base-artifacts. discards 4fed43a62 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 new fe35bf6b6 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4fed43a62) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_check_gcc/mast [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1560 -> 1548 bytes 02-prepare_abe/console.log.xz | Bin 2724 -> 2744 bytes 03-build_abe-binutils/console.log.xz | Bin 30856 -> 30504 bytes 04-build_abe-stage1/console.log.xz | Bin 72292 -> 72184 bytes 06-build_abe-linux/console.log.xz | Bin 8632 -> 8912 bytes 07-build_abe-glibc/console.log.xz | Bin 239036 -> 239160 bytes 08-build_abe-stage2/console.log.xz | Bin 202832 -> 203736 bytes 09-build_abe-gdb/console.log.xz | Bin 38104 -> 37648 bytes 10-build_abe-qemu/console.log.xz | Bin 32320 -> 32204 bytes 11-build_abe-dejagnu/console.log.xz | Bin 3884 -> 3888 bytes 12-build_abe-check_gcc/console.log.xz | Bin 2916 -> 2880 bytes 13-check_regression/console.log.xz | Bin 2608 -> 2556 bytes 13-check_regression/results.compare | 16 +- 13-check_regression/results.compare2 | 50 +- 14-update_baseline/console.log | 224 +- 14-update_baseline/results.compare | 16 +- 14-update_baseline/results.compare2 | 50 +- jenkins/manifest.sh | 26 +- sumfiles/g++.log.xz | Bin 3365844 -> 3401456 bytes sumfiles/g++.sum | 75 +- sumfiles/gcc.log.xz | Bin 2981596 -> 2953732 bytes sumfiles/gcc.sum | 4825 ++++++++++++++++----------------- sumfiles/gfortran.log.xz | Bin 1026140 -> 1023040 bytes sumfiles/gfortran.sum | 4 +- sumfiles/libatomic.log.xz | Bin 2292 -> 2288 bytes sumfiles/libatomic.sum | 2 +- sumfiles/libgomp.log.xz | Bin 199384 -> 199220 bytes sumfiles/libgomp.sum | 2 +- sumfiles/libitm.log.xz | Bin 2660 -> 2656 bytes sumfiles/libitm.sum | 2 +- sumfiles/libstdc++.log.xz | Bin 424384 -> 423544 bytes sumfiles/libstdc++.sum | 8 +- 32 files changed, 2637 insertions(+), 2663 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[gcc] branch master updated (e07a876c076 -> 0247ad3e0f4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from e07a876c076 tree-optimization/105946 - avoid accessing excess args from [...] new 4bf0dcb0492 RISC-V: add consecutive_bits_operand predicate new 0247ad3e0f4 RISC-V: Split slli+sh[123]add.uw opportunities to avoid zext.w The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/riscv/bitmanip.md | 44 ++++++++++++++++++++++++++++++ gcc/config/riscv/predicates.md | 11 ++++++++ gcc/testsuite/gcc.target/riscv/zba-shadd.c | 13 +++++++++ 3 files changed, 68 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shadd.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig updated (9cc1bf1ebc -> debd075366)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig in repository toolchain/ci/qemu. from 9cc1bf1ebc Merge tag 'pull-xen-20220609' of https://xenbits.xen.org/git [...] adds efe1592c43 MAINTAINERS: Cover hw/core/uboot_image.h within Generic Load [...] adds de799beba7 target/riscv: add support for zmmul extension v0.1 adds f9a461b2d3 hw/riscv: virt: Generate fw_cfg DT node correctly adds 40244040a7 hw/intc: sifive_plic: Avoid overflowing the addr_config buffer adds af9751316e hw/core/loader: return image sizes as ssize_t adds 8f42415fc1 target/riscv: Wake on VS-level external interrupts adds d1d8541217 target/riscv/debug.c: keep experimental rv128 support working adds 8a085fb2ad target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed adds 25eae0486d target/riscv: rvv: Prune redundant access_type parameter passed adds c7b8a4213b target/riscv: rvv: Rename ambiguous esz adds 41d3d7f76a target/riscv: rvv: Early exit when vstart >= vl adds f1eed927fb target/riscv: rvv: Add tail agnostic for vv instructions adds 752614cab8 target/riscv: rvv: Add tail agnostic for vector load / store [...] adds 5c19fc156e target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions adds 7b1bff41c1 target/riscv: rvv: Add tail agnostic for vector integer shif [...] adds 38581e5c9a target/riscv: rvv: Add tail agnostic for vector integer comp [...] adds 89a32de2d5 target/riscv: rvv: Add tail agnostic for vector integer merg [...] adds 09106eed30 target/riscv: rvv: Add tail agnostic for vector fix-point ar [...] adds 5eacf7d8a0 target/riscv: rvv: Add tail agnostic for vector floating-poi [...] adds df4f52a758 target/riscv: rvv: Add tail agnostic for vector reduction in [...] adds acc6ffd482 target/riscv: rvv: Add tail agnostic for vector mask instructions adds 803963f7cb target/riscv: rvv: Add tail agnostic for vector permutation [...] adds b8312675d6 target/riscv: rvv: Add option 'rvv_ta_all_1s' to enable opti [...] adds 26b2bc5859 target/riscv: Don't expose the CPU properties on names CPUs adds 07314158f6 target/riscv: trans_rvv: Avoid assert for RV32 and e64 adds b3cd3b5a66 Merge tag 'pull-riscv-to-apply-20220610' of github.com:alist [...] adds 7666a81d15 target/arm: Mark exception helpers as noreturn adds fa33eead86 target/arm: Add coproc parameter to syn_fp_access_trap adds 57287a6e95 target/arm: Move exception_target_el out of line adds 55ba15b737 target/arm: Move arm_singlestep_active out of line adds 31c8df53ee target/arm: Move arm_generate_debug_exceptions out of line adds 831c1b1087 target/arm: Use is_a64 in arm_generate_debug_exceptions adds 16f9d5f693 target/arm: Move exception_bkpt_insn to debug_helper.c adds a853e3ae55 target/arm: Move arm_debug_exception_fsr to debug_helper.c adds d3c5d50a5c target/arm: Rename helper_exception_with_syndrome adds 9c9d03f0c5 target/arm: Introduce gen_exception_insn_el_v adds 8c5d24dc7d target/arm: Rename gen_exception_insn to gen_exception_insn_el adds 486d6c9699 target/arm: Introduce gen_exception_insn adds f0d7c2054a target/arm: Create helper_exception_swstep adds 8480e933ed target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_EL adds cc5e672b85 target/arm: Move gen_exception to translate.c adds bca6f24f01 target/arm: Rename gen_exception to gen_exception_el adds 1a13b9a863 target/arm: Introduce gen_exception adds d6d7f818a9 target/arm: Introduce gen_exception_el_v adds eeaf596022 target/arm: Introduce helper_exception_with_syndrome adds 82303761c6 target/arm: Remove default_exception_el adds 04eacf6e79 target/arm: Create raise_exception_debug adds 38e8a13c11 target/arm: Move arm_debug_target_el to debug_helper.c adds 02e1de14bc target/arm: Fix Secure PL1 tests in fp_exception_el adds 284ad5e70c tests/qtest: Reduce npcm7xx_sdhci test image size adds bfe43e3d14 target/arm: Adjust format test in scr_write adds 6bcbb07af6 target/arm: SCR_EL3.RW is RAO/WI without AArch32 EL[12] adds ebf1b4cbb8 gdbstub: Don't use GDB syscalls if no GDB is attached adds 90c072e063 semihosting/config: Merge --semihosting-config option groups adds 2663c41cfa Merge tag 'pull-target-arm-20220610' of https://git.linaro.o [...] adds 23609e47c0 acpi: add interface to build device specific AML adds f974e0b75b acpi: make isa_build_aml() support AcpiDevAmlIf interface adds e7c72a678a acpi: fdc-isa: replace ISADeviceClass::build_aml with AcpiDe [...] adds ef26fc47ba acpi: parallel port: replace ISADeviceClass::build_aml with [...] adds 0d170dc13c acpi: serial-is: replace ISADeviceClass::build_aml with Acpi [...] adds d9cf178cc0 acpi: mc146818rtc: replace ISADeviceClass::build_aml with Ac [...] adds 68f01317b4 acpi: pckbd: replace ISADeviceClass::build_aml with AcpiDevA [...] adds a576158ee9 isa-bus: drop no longer used ISADeviceClass::build_aml adds dc35bfb6e0 tests: acpi: add and whitelist DSDT.ipmismbus expected blob adds ac70b4a3f1 tests: acpi: q35: add test for smbus-ipmi device adds f4e2fb67bc tests: acpi: update expected blob DSDT.ipmismbus adds 4ccf0937a4 tests: acpi: whitelist DSDT.ipmismbus expected blob adds ea01c52291 ipmi: acpi: use relative path to resource source adds 0f5b3fd748 tests: acpi: update expected DSDT.ipmismbus blob adds 4b66ddcc4d acpi: ich9-smb: add support for AcpiDevAmlIf interface adds 5876d9b53f acpi: ipmi: use AcpiDevAmlIf interface to build IPMI device [...] adds 38003951b5 q35: acpi: drop not needed PCMachineClass::do_not_add_smb_acpi adds 6a4b286ced tests: acpi: white-list to be re-factored pc/q35 DSDT adds 92ea7fb3fe acpi: pc: isa bridge: use AcpiDevAmlIf interface to build IS [...] adds 887e8e9d3a acpi: q35: isa bridge: use AcpiDevAmlIf interface to build I [...] adds 8796f60fbf tests: acpi: update expected blobs adds 39728badab tests: acpi: add and white-list DSDT.applesmc expected blob adds cde55744e9 tests: acpi: add applesmc testcase adds 1d7ea91500 acpi: applesmc: use AcpiDevAmlIfClass:build_dev_aml to provi [...] adds ec66dbc753 tests: acpi: update expected blobs adds 7a3048d596 tests: acpi: white-lists expected DSDT.pvpanic-isa blob adds fd7bcffe59 tests: acpi: add pvpanic-isa: testcase adds ff36e90e7c acpi: pvpanic-isa: use AcpiDevAmlIfClass:build_dev_aml to pr [...] adds d09ac1167e tests: acpi: update expected DSDT.pvpanic-isa blob adds a5bf52d21c tests: acpi: white-list DSDT.tis.tpm2/DSDT.tis.tpm12 expected blobs adds 5198d7939c acpi: pc/q35: tpm-tis: fix TPM device scope adds d3ecb22c93 acpi: pc/q35: remove not needed 'if' condition on pci bus adds 168e3aa7ac acpi: tpm-tis: use AcpiDevAmlIfClass:build_dev_aml to provid [...] adds f3115cdd9c tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs adds 92344e76b8 x86: acpi-build: do not include hw/isa/isa.h directly adds 03b39fcf64 hw/cxl: Make the CXL fixed memory window setup a machine parameter. adds 513598050a hw/acpi/cxl: Pass in the CXLState directly rather than MachineState adds dab390ff24 hw/cxl: Push linking of CXL targets into i386/pc rather than [...] adds 96f7da1711 tests/acpi: Allow modification of q35 CXL CEDT table. adds 7bd1900b36 pci/pci_expander_bridge: For CXL HB delay the HB register me [...] adds 3546b0529a tests/acpi: Update q35/CEDT.cxl for new memory addresses. adds 1ebf9001fb hw/cxl: Move the CXLState from MachineState to machine type [...] adds 518f5f6ad6 hw/machine: Drop cxl_supported flag as no longer useful adds 36f18c6989 pci: fix overflow in snprintf string formatting adds f824f52947 hw/cxl: Fix missing write mask for HDM decoder target list r [...] adds 6164a11104 hw/acpi/viot: rename build_pci_range_node() to enumerate_pci [...] adds 1b805ab560 hw/acpi/viot: move the individual PCI host bridge entry gene [...] adds e5f73c8397 hw/acpi/viot: build array of PCI host bridges before generat [...] adds 4c8f2ffff1 tests/acpi: virt: allow VIOT acpi table changes adds 68f14a8729 hw/acpi/viot: sort VIOT ACPI table entries by PCI host bridg [...] adds 5060004c30 tests/acpi: virt: update golden masters for VIOT adds fb38d0c97d hw/virtio/vhost-user: don't use uninitialized variable adds 06cb5c82eb hw/vhost-user-scsi|blk: set `supports_config` flag correctly adds 30796f5567 Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/vir [...] adds a6bc80f7b1 target/mips: Fix WatchHi.M handling adds 954d1658bd target/mips: Fix SAT_S trans helper adds 7fc235c67f target/mips: Fix df_extract_val() and df_extract_df() dfe lookup adds 4b532b4f2b target/mips: Fix msa checking condition in trans_msa_elm_fn() adds ead0bf0d33 target/mips: Do not treat msa INSERT as NOP when wd is zero adds 857816a42b target/mips: Fix store adress of high 64bit in helper_msa_st_b() adds 1d29f899e7 target/mips: Fix FTRUNC_S and FTRUNC_U trans helper adds a1b092537a target/mips: Fix emulation of nanoMIPS MTHLIP instruction adds 9e4f726d4f target/mips: Fix emulation of nanoMIPS EXTRV_S.H instruction adds 5de4359b4f target/mips: Fix emulation of nanoMIPS BPOSGE32C instruction adds 14668cfaaf target/mips: Fix emulation of nanoMIPS BNEC[32] instruction adds db7596989a target/mips: Fix handling of unaligned memory access for nan [...] adds f1663114df target/mips: Add missing default cases for some nanoMIPS pools adds 8e0e23445a target/mips: Undeprecate nanoMIPS ISA support in QEMU adds 0c285e0128 hw/block/fdc-sysbus: Always mark sysbus floppy controllers a [...] adds 3f0efcac43 hw/acpi/piix4: move xen_enabled() logic from piix4_pm_init() [...] adds 5b07f44102 hw/acpi/piix4: change smm_enabled from int to bool adds 7ace6b4f81 hw/acpi/piix4: convert smm_enabled bool to qdev property adds 2bfd0845f0 hw/acpi/piix4: move PIIX4PMState into separate piix4.h header adds 19eb2a0da2 hw/acpi/piix4: alter piix4_pm_init() to return PIIX4PMState adds d0af99ac12 hw/acpi/piix4: rename piix4_pm_init() to piix4_pm_initfn() adds 29786d42ba hw/acpi/piix4: use qdev gpio to wire up sci_irq adds b49e94424c hw/acpi/piix4: use qdev gpio to wire up smi_irq adds ee7318bc09 hw/i386/pc_piix: create PIIX4_PM device directly instead of [...] adds 5a9715c26f hw/isa/piix4.c: create PIIX4_PM device directly instead of u [...] adds 65417e548a hw/acpi/piix4: remove unused piix4_pm_initfn() function adds 3963e1398e hw/southbridge/piix: Aggregate all PIIX southbridge type names adds 14f94725c9 hw/isa/piix4: Use object_initialize_child() for embedded struct adds 87e010d6d6 hw/isa/piix4: Move pci_map_irq_fn' near pci_set_irq_fn adds c397a2d3e4 hw/isa/piix4: QOM'ify PCI device creation and wiring adds e3d198eed1 hw/isa/piix4: Factor out ISABus retrieval from piix4_create() adds 19e375db22 hw/isa/piix4: QOM'ify PIIX4 PM creation adds e8ebf54936 hw/isa/piix4: Inline and remove piix4_create() adds 5bf26b9393 hw/isa/piix3: Move pci_map_irq_fn near pci_set_irq_fn adds fe3055d292 hw/isa/piix3: QOM'ify PCI device creation and wiring adds 6e8791fb61 hw/isa/piix3: Factor out ISABus retrieval from piix3_create() adds 988fb61321 hw/isa/piix3: Inline and remove piix3_create() adds 94c720f39e hw/i386/microvm-dt: Force explicit failure if retrieving QOM [...] adds 8f3428cc85 hw/i386/microvm-dt: Determine mc146818rtc's IRQ number from [...] adds 5b21b331be hw/rtc/mc146818rtc: QOM'ify io_base offset adds aa2e535c82 hw: Reuse TYPE_I8042 define adds bae17e7483 hw/audio/cs4231a: Const'ify global tables adds fc5f892368 hw/i386/pc: Unexport PC_CPU_MODEL_IDS macro adds cb76321ecc hw/i386/pc: Unexport functions used only internally adds 68d58770d7 hw/i386/pc: Remove orphan declarations adds 3d9641509a hw/net/fsl_etsec/etsec: Remove obsolete and unused etsec_create() adds 7112ffd93a accel/tcg/cpu-exec: Unexport dump_drift_info() adds b01841fa85 accel/tcg: Inline dump_opcount_info() and remove it adds 37da3bcf01 docs/devel: Fix link to developer mailing lists adds 8b7f856e9d Merge tag 'mips-20220611' of https://github.com/philmd/qemu [...] adds 1ed771b21c bsd-user/freebsd/os-syscall.c: lock_iovec adds 883808d848 bsd-user/freebsd/os-syscall.c: unlock_iovec adds db69788703 bsd-user/freebsd/os-syscall.c: Tracing and error boilerplate adds 80da1b0088 bsd-user/bsd-file.h: Add implementations for read, pread, re [...] adds 770d8abae7 bsd-user/bsd-file.h: Meat of the write system calls adds 9554d33076 bsd-user/freebsd/os-syscall.c: Implement exit adds b871cc83d6 Merge tag 'bsd-user-preen-2022q2-pull-request' of ssh://gith [...] adds b1f66fab45 hw/mips/boston: Initialize g_autofree pointers adds c304d11f45 accel/tcg/cpu-exec: Unexport dump_drift_info() adds ea7c452783 accel/tcg: Inline dump_opcount_info() and remove it adds 6e0c185988 docs/devel: Fix link to developer mailing lists adds dcb40541eb Merge tag 'mips-20220611' of https://github.com/philmd/qemu [...] adds b2df786170 test/tcg/arm: Use -mfloat-abi=soft for test-armv6m-undef adds 6012d96379 tests/tcg/i386: Use explicit suffix on fist insns adds 72ec89bfc5 gitlab-ci: Fix the build-cfi-aarch64 and build-cfi-ppc64-s390x jobs adds ab698a4d8b tests/docker: fix the IMAGE for build invocation adds c48a5c4741 tests/tcg: disable xtensa-linux-user again adds 34776d80f3 gitlab: compare CIRRUS_nn vars against 'null' not "" adds b56d1ee951 .gitlab: use less aggressive nproc on our aarch64/32 runners adds debd075366 Merge tag 'pull-testing-next-140622-1' of https://github.com [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/base.yml | 2 +- .gitlab-ci.d/buildtest.yml | 22 +- .../custom-runners/ubuntu-20.04-aarch32.yml | 4 +- .../custom-runners/ubuntu-20.04-aarch64.yml | 24 +- MAINTAINERS | 4 +- accel/tcg/cpu-exec.c | 4 +- accel/tcg/translate-all.c | 5 - bsd-user/bsd-file.h | 163 ++ .../{i386/target_arch_sigtramp.h => bsd-proc.h} | 27 +- bsd-user/freebsd/os-syscall.c | 217 ++- configure | 5 +- docs/about/deprecated.rst | 30 - docs/devel/submitting-a-patch.rst | 6 +- docs/system/devices/cxl.rst | 4 +- gdbstub.c | 14 +- hw/acpi/acpi_interface.c | 8 + hw/acpi/cxl.c | 9 +- hw/acpi/ipmi-stub.c | 2 +- hw/acpi/ipmi.c | 53 +- hw/acpi/meson.build | 2 +- hw/acpi/piix4.c | 77 +- hw/acpi/viot.c | 107 +- hw/arm/armv7m.c | 2 +- hw/arm/boot.c | 8 +- hw/audio/cs4231a.c | 8 +- hw/block/fdc-isa.c | 16 +- hw/block/fdc-sysbus.c | 16 +- hw/block/vhost-user-blk.c | 1 + hw/char/parallel.c | 14 +- hw/char/serial-isa.c | 14 +- hw/core/generic-loader.c | 2 +- hw/core/loader.c | 81 +- hw/core/machine.c | 28 - hw/cxl/cxl-component-utils.c | 13 +- hw/cxl/cxl-host-stubs.c | 9 +- hw/cxl/cxl-host.c | 100 +- hw/i2c/smbus_ich9.c | 15 + hw/i386/acpi-build.c | 180 +-- hw/i386/microvm-dt.c | 9 +- hw/i386/pc.c | 48 +- hw/i386/pc_piix.c | 24 +- hw/i386/pc_q35.c | 1 - hw/i386/x86.c | 2 +- hw/input/pckbd.c | 14 +- hw/intc/sifive_plic.c | 19 +- hw/ipmi/isa_ipmi_bt.c | 4 + hw/ipmi/isa_ipmi_kcs.c | 4 + hw/ipmi/smbus_ipmi.c | 4 + hw/isa/isa-bus.c | 9 +- hw/isa/lpc_ich9.c | 19 + hw/isa/piix3.c | 115 +- hw/isa/piix4.c | 116 +- hw/mips/boston.c | 3 +- hw/mips/jazz.c | 2 +- hw/mips/malta.c | 9 +- hw/misc/applesmc.c | 29 + hw/misc/pvpanic-isa.c | 42 + hw/net/fsl_etsec/etsec.c | 23 - hw/net/fsl_etsec/etsec.h | 7 - hw/pci-bridge/meson.build | 5 +- hw/pci-bridge/pci_expander_bridge.c | 32 +- hw/pci-bridge/pci_expander_bridge_stubs.c | 14 + hw/pci/pci.c | 18 +- hw/riscv/boot.c | 5 +- hw/riscv/virt.c | 28 +- hw/rtc/mc146818rtc.c | 23 +- hw/scsi/vhost-user-scsi.c | 1 - hw/sparc64/sun4u.c | 2 +- hw/tpm/tpm_tis_isa.c | 32 + hw/virtio/vhost-user.c | 8 +- include/exec/cpu-all.h | 3 - include/hw/acpi/acpi_aml_interface.h | 40 + include/hw/acpi/cxl.h | 5 +- include/hw/acpi/ipmi.h | 9 +- include/hw/acpi/piix4.h | 75 + include/hw/block/fdc.h | 3 +- include/hw/boards.h | 3 +- include/hw/cxl/cxl.h | 9 +- include/hw/cxl/cxl_host.h | 23 + include/hw/i386/pc.h | 17 +- include/hw/isa/isa.h | 17 - include/hw/loader.h | 55 +- include/hw/misc/pvpanic.h | 9 - include/hw/pci-bridge/pci_expander_bridge.h | 12 + include/hw/rtc/mc146818rtc.h | 2 +- include/hw/southbridge/piix.h | 12 +- qapi/machine.json | 13 + qemu-options.hx | 73 +- semihosting/config.c | 1 + softmmu/vl.c | 46 - target/arm/cpu.h | 133 +- target/arm/debug_helper.c | 220 ++- target/arm/helper.c | 53 +- target/arm/helper.h | 8 +- target/arm/internals.h | 43 +- target/arm/op_helper.c | 52 +- target/arm/syndrome.h | 7 +- target/arm/translate-a64.c | 34 +- target/arm/translate-m-nocp.c | 15 +- target/arm/translate-mve.c | 3 +- target/arm/translate-vfp.c | 18 +- target/arm/translate.c | 106 +- target/arm/translate.h | 43 +- target/mips/cpu.c | 2 +- target/mips/cpu.h | 3 +- target/mips/tcg/msa_helper.c | 2 +- target/mips/tcg/msa_translate.c | 29 +- target/mips/tcg/nanomips_translate.c.inc | 33 +- target/mips/tcg/sysemu/cp0_helper.c | 3 +- target/mips/tcg/translate.c | 5 +- target/riscv/cpu.c | 68 +- target/riscv/cpu.h | 4 + target/riscv/cpu_helper.c | 4 +- target/riscv/debug.c | 2 + target/riscv/insn_trans/trans_rvm.c.inc | 18 +- target/riscv/insn_trans/trans_rvv.c.inc | 106 +- target/riscv/internals.h | 6 +- target/riscv/translate.c | 4 + target/riscv/vector_helper.c | 1588 ++++++++++++-------- tests/data/acpi/pc/DSDT | Bin 6002 -> 5987 bytes tests/data/acpi/pc/DSDT.acpierst | Bin 5969 -> 5954 bytes tests/data/acpi/pc/DSDT.acpihmat | Bin 7327 -> 7312 bytes tests/data/acpi/pc/DSDT.bridge | Bin 8668 -> 8653 bytes tests/data/acpi/pc/DSDT.cphp | Bin 6466 -> 6451 bytes tests/data/acpi/pc/DSDT.dimmpxm | Bin 7656 -> 7641 bytes tests/data/acpi/pc/DSDT.hpbridge | Bin 5969 -> 5954 bytes tests/data/acpi/pc/DSDT.hpbrroot | Bin 3084 -> 3069 bytes tests/data/acpi/pc/DSDT.ipmikcs | Bin 6074 -> 6059 bytes tests/data/acpi/pc/DSDT.memhp | Bin 7361 -> 7346 bytes tests/data/acpi/pc/DSDT.nohpet | Bin 5860 -> 5845 bytes tests/data/acpi/pc/DSDT.numamem | Bin 6008 -> 5993 bytes tests/data/acpi/pc/DSDT.roothp | Bin 6210 -> 6195 bytes tests/data/acpi/q35/CEDT.cxl | Bin 184 -> 184 bytes tests/data/acpi/q35/DSDT | Bin 8289 -> 8274 bytes tests/data/acpi/q35/DSDT.acpierst | Bin 8306 -> 8291 bytes tests/data/acpi/q35/DSDT.acpihmat | Bin 9614 -> 9599 bytes tests/data/acpi/q35/{DSDT => DSDT.applesmc} | Bin 8289 -> 8320 bytes tests/data/acpi/q35/DSDT.bridge | Bin 11003 -> 10988 bytes tests/data/acpi/q35/DSDT.cphp | Bin 8753 -> 8738 bytes tests/data/acpi/q35/DSDT.cxl | Bin 9615 -> 9600 bytes tests/data/acpi/q35/DSDT.dimmpxm | Bin 9943 -> 9928 bytes tests/data/acpi/q35/DSDT.ipmibt | Bin 8364 -> 8349 bytes tests/data/acpi/q35/{DSDT => DSDT.ipmismbus} | Bin 8289 -> 8363 bytes tests/data/acpi/q35/DSDT.ivrs | Bin 8306 -> 8291 bytes tests/data/acpi/q35/DSDT.memhp | Bin 9648 -> 9633 bytes tests/data/acpi/q35/DSDT.mmio64 | Bin 9419 -> 9404 bytes tests/data/acpi/q35/DSDT.multi-bridge | Bin 8583 -> 8568 bytes tests/data/acpi/q35/DSDT.nohpet | Bin 8147 -> 8132 bytes tests/data/acpi/q35/DSDT.numamem | Bin 8295 -> 8280 bytes tests/data/acpi/q35/{DSDT => DSDT.pvpanic-isa} | Bin 8289 -> 8375 bytes tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8900 -> 8880 bytes tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8921 -> 8906 bytes tests/data/acpi/q35/DSDT.viot | Bin 9398 -> 9383 bytes tests/data/acpi/q35/DSDT.xapic | Bin 35652 -> 35637 bytes tests/data/acpi/q35/VIOT.viot | Bin 112 -> 112 bytes tests/docker/Makefile.include | 2 +- tests/qtest/bios-tables-test.c | 44 +- tests/qtest/cxl-test.c | 4 +- tests/qtest/npcm7xx_sdhci-test.c | 2 +- tests/tcg/arm/Makefile.softmmu-target | 2 +- tests/tcg/i386/test-i386-fp-exceptions.c | 24 +- tests/tcg/i386/test-i386.c | 2 +- 162 files changed, 3117 insertions(+), 1969 deletions(-) copy bsd-user/{i386/target_arch_sigtramp.h => bsd-proc.h} (59%) create mode 100644 hw/pci-bridge/pci_expander_bridge_stubs.c create mode 100644 include/hw/acpi/acpi_aml_interface.h create mode 100644 include/hw/acpi/piix4.h create mode 100644 include/hw/cxl/cxl_host.h create mode 100644 include/hw/pci-bridge/pci_expander_bridge.h copy tests/data/acpi/q35/{DSDT => DSDT.applesmc} (97%) copy tests/data/acpi/q35/{DSDT => DSDT.ipmismbus} (96%) copy tests/data/acpi/q35/{DSDT => DSDT.pvpanic-isa} (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig updated (4d5dad43b2eb -> c12386ae247c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig in repository toolchain/ci/llvm-project. from 4d5dad43b2eb [analyzer] Fix null pointer deref in CastValueChecker adds c12386ae247c [MC][AArch64] Enable '+v8a' when nothing specified for MCS [...] No new revisions were added by this update. Summary of changes: .../Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp | 2 ++ llvm/test/MC/AArch64/arm64-branch-encoding.s | 6 ++++++ llvm/test/MC/AArch64/arm64-system-encoding.s | 8 ++++++++ llvm/test/MC/AArch64/basic-a64-instructions.s | 16 +++++++++++++++- llvm/test/MC/Disassembler/AArch64/arm64-branch.txt | 4 ++++ .../MC/Disassembler/AArch64/basic-a64-instructions.txt | 16 +++++++++++++--- 6 files changed, 48 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig updated (fe36d34f25 -> 614000f9d7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig in repository toolchain/ci/binutils-gdb. from fe36d34f25 Automatic date update in version.in adds 949c11728c Automatic date update in version.in adds d2823f8c27 Automatic date update in version.in adds ebd859d2cc Automatic date update in version.in adds 614000f9d7 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig updated (207317886 -> 4d3b65e5a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 207317886 0: update: binutils-llvm-linux-qemu: boot new 4d3b65e5a 0: update: binutils-llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (207317886) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1560 -> 1580 bytes 02-prepare_abe/console.log.xz | Bin 2728 -> 2732 bytes 03-build_abe-binutils/console.log.xz | Bin 30368 -> 30168 bytes 04-build_kernel_llvm/console.log.xz | Bin 61736 -> 61292 bytes 05-build_abe-qemu/console.log.xz | Bin 32408 -> 32604 bytes 06-build_linux/console.log.xz | Bin 3692 -> 3836 bytes 07-boot_linux/console.log.xz | Bin 504 -> 504 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 2 +- jenkins/manifest.sh | 20 ++++++++++---------- results | 2 +- 11 files changed, 12 insertions(+), 12 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[gcc] branch releases/gcc-12 updated (2d45d5df9ad -> 65d121507de)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-12 in repository gcc. from 2d45d5df9ad Daily bump. new 65d121507de RISC-V: bitmanip: improve constant-loading for (1ULL << 31) [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/riscv/riscv.cc | 9 +++++++++ gcc/config/riscv/riscv.h | 11 ++++------- 2 files changed, 13 insertions(+), 7 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

[gcc] branch master updated (be6676286a0 -> e07a876c076)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from be6676286a0 Restore bootstrap on ARM new 90467f0ad64 middle-end/105965 - add missing v_c_e <{ el }> simplification new e07a876c076 tree-optimization/105946 - avoid accessing excess args from [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/match.pd | 17 +++++++++++++---- gcc/testsuite/gcc.target/i386/pr105965.c | 12 ++++++++++++ gcc/tree-ssa-uninit.cc | 3 +++ 3 files changed, 28 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr105965.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 11 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits June 2022