[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3_LTO updated (7f195a22709 -> 607118dfa47)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3_LTO
in repository toolchain/ci/gcc.
from 7f195a22709 libgo: permit loff_t and off_t to be macros
adds 5a66d7dd2bf Daily bump.
adds 479b6f449ee xtensa: Defer storing integer constants into litpool until reload
adds 9991d84d2a8 PR tree-optimization/105835: Two narrowing patterns for match.pd.
adds ef662120177 varasm: Fix up ICE in narrowing_initializer_constant_valid_ [...]
adds 2c7cfc7b418 ubsan: Add -fsanitize-trap= support
adds 856a9b8fc2b Fortran: check POS and LEN arguments simplifying bit intrin [...]
adds 4390e7bfbc6 Daily bump.
adds 75ab2f0ebd3 xtensa: Apply a few minor fixes
adds 46880cd8be7 xtensa: Fix RTL insn cost estimation about relaxed MOVI ins [...]
adds e058dfc43fa Daily bump.
adds 970b03c0037 RISC-V: Fix a bug that is the CMO builtins are missing parameter
adds 9f55aee9dca Add operators / and * for profile_{count,probability}.
adds c56f7983bed lto-plugin: support LDPT_GET_SYMBOLS_V3
adds 86882d9feb6 vect: Respect slp decision when applying suggested uf [PR105940]
adds 713f2fd9234 middle-end/106027 - fix types in needle folding
adds ab5d82c0292 testsuite: Require init_priority target support in a test.
adds a78e5d307c6 testsuite: Add a missing USER_LABEL_PREFIX to a regex.
adds 2eb3adb43ea arm: more testsutie fallout for mve move-immediate changes
adds 125bf21299e testsuite, Darwin: Allow for two CTOR bodies in array61 test.
adds 1b238124840 testsuite, Darwin: Skip an unsupported test.
adds fe9765c0b97 i386: Disallow sibcall for calling ifunc functions with PIC [...]
adds 607118dfa47 testsuite, asan: Avoid color in asan test output.
No new revisions were added by this update.
Summary of changes:
gcc/ChangeLog | 123 +++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/bb-reorder.cc | 6 +-
gcc/c-family/ChangeLog | 11 ++
gcc/c-family/c-ubsan.cc | 116 ++++++++++++-------
gcc/cfgloop.cc | 2 +-
gcc/cfgloopmanip.cc | 5 +-
gcc/cfgrtl.cc | 4 +-
gcc/cgraph.cc | 5 +-
gcc/common.opt | 15 ++-
gcc/config/i386/i386.cc | 9 ++
gcc/config/riscv/riscv-builtins.cc | 1 +
gcc/config/riscv/riscv-cmo.def | 16 +--
gcc/config/riscv/riscv-ftypes.def | 3 +-
gcc/config/sh/sh.cc | 2 +-
gcc/config/xtensa/constraints.md | 6 +-
gcc/config/xtensa/predicates.md | 5 +-
gcc/config/xtensa/xtensa.cc | 35 +++---
gcc/config/xtensa/xtensa.md | 8 +-
gcc/cp/ChangeLog | 12 ++
gcc/cp/cp-ubsan.cc | 2 +-
gcc/doc/invoke.texi | 35 +++++-
gcc/dojump.cc | 2 +-
gcc/final.cc | 12 +-
gcc/fold-const.cc | 10 +-
gcc/fortran/ChangeLog | 8 ++
gcc/fortran/simplify.cc | 12 ++
gcc/gcc.cc | 5 +-
gcc/ipa-cp.cc | 10 +-
gcc/ipa-inline-analysis.cc | 2 +-
gcc/loop-unroll.cc | 8 +-
gcc/match.pd | 15 +++
gcc/modulo-sched.cc | 20 ++--
gcc/omp-expand.cc | 24 ++--
gcc/opts.cc | 119 +++++++++++++-------
gcc/opts.h | 1 +
gcc/predict.cc | 17 ++-
gcc/profile-count.h | 46 +++++++-
gcc/profile.cc | 5 +-
gcc/sanopt.cc | 4 +-
gcc/stmt.cc | 5 +-
gcc/symtab-thunks.cc | 10 +-
gcc/testsuite/ChangeLog | 57 ++++++++++
gcc/testsuite/c-c++-common/attr-cdtor-1.c | 2 +-
gcc/testsuite/c-c++-common/pr105998.c | 12 ++
gcc/testsuite/c-c++-common/ubsan/align-8.c | 2 +-
gcc/testsuite/c-c++-common/ubsan/div-by-zero-4.c | 2 +-
gcc/testsuite/c-c++-common/ubsan/nonnull-4.c | 2 +-
gcc/testsuite/c-c++-common/ubsan/overflow-add-4.c | 2 +-
gcc/testsuite/c-c++-common/ubsan/pr56956.c | 2 +-
gcc/testsuite/c-c++-common/ubsan/pr68142.c | 2 +-
gcc/testsuite/c-c++-common/ubsan/pr80932.c | 2 +-
gcc/testsuite/g++.dg/init/array61.C | 3 +-
gcc/testsuite/g++.dg/modules/init-2_b.C | 2 +-
gcc/testsuite/g++.dg/modules/pr105169_a.C | 2 +-
gcc/testsuite/g++.dg/modules/pr105169_b.C | 2 +-
gcc/testsuite/gcc.dg/pr105835.c | 18 +++
gcc/testsuite/gcc.dg/pr106027.c | 8 ++
gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c | 6 +-
gcc/testsuite/gcc.target/arm/simd/pr100757-2.c | 9 +-
gcc/testsuite/gcc.target/arm/simd/pr100757-3.c | 9 +-
gcc/testsuite/gcc.target/arm/simd/pr100757-4.c | 10 +-
gcc/testsuite/gcc.target/arm/simd/pr100757.c | 9 +-
gcc/testsuite/gcc.target/i386/pr105960.c | 19 ++++
gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 26 +++--
gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 26 +++--
gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c | 10 +-
gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c | 10 +-
gcc/testsuite/gfortran.dg/check_bits_3.f90 | 16 +++
gcc/testsuite/lib/asan-dg.exp | 2 +
gcc/tree-ssa-loop-manip.cc | 11 +-
gcc/tree-ssa-sink.cc | 3 +-
gcc/tree-switch-conversion.cc | 53 +++++----
gcc/tree-vect-loop.cc | 106 +++++++++++-------
gcc/ubsan.cc | 24 ++--
gcc/varasm.cc | 10 +-
libgomp/ChangeLog | 5 +
libstdc++-v3/ChangeLog | 5 +
lto-plugin/lto-plugin.c | 42 +++++--
79 files changed, 938 insertions(+), 351 deletions(-)
create mode 100644 gcc/testsuite/c-c++-common/pr105998.c
create mode 100644 gcc/testsuite/gcc.dg/pr105835.c
create mode 100644 gcc/testsuite/gcc.dg/pr106027.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr105960.c
create mode 100644 gcc/testsuite/gfortran.dg/check_bits_3.f90
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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3_LTO updated (02e85f7a83 -> 5ffa6ca3e5)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3_LTO
in repository toolchain/ci/binutils-gdb.
from 02e85f7a83 gdb: NEWS: Move LoongArch gdbserver to the correct section
adds 40d4cb8bcc Automatic date update in version.in
adds 21a527dfc8 gdb: Add new 'print nibbles' feature
adds 153b3c1117 gdb/doc: Documentation for the new print command
adds 3f52a09075 gdb/python: Export nibbles to python layer
adds fba1ac87dc Fix the sorting algorithm for reloc entries
adds 8e2da16518 Fix assertion failure in copy_type
adds 9c0ea78342 Automatic date update in version.in
adds 49954a0d85 Automatic date update in version.in
adds 8a24927bc8 PR29261, memory leak in parse_stab_struct_fields
adds 0d02e70b19 PR29262, memory leak in pr_function_type
adds 5ffa6ca3e5 Move finish_print out of value_print_options
No new revisions were added by this update.
Summary of changes:
bfd/elflink.c | 12 ++++-
bfd/version.h | 2 +-
binutils/prdbg.c | 7 +--
binutils/stabs.c | 5 +-
gdb/NEWS | 5 ++
gdb/c-lang.c | 4 ++
gdb/doc/gdb.texinfo | 35 +++++++++++--
gdb/doc/python.texi | 5 ++
gdb/gdbtypes.c | 21 ++++----
gdb/infcmd.c | 15 ++++--
gdb/language.h | 7 +++
gdb/printcmd.c | 2 +-
gdb/python/py-value.c | 7 ++-
gdb/rust-lang.h | 5 ++
gdb/testsuite/gdb.base/options.exp | 1 +
gdb/testsuite/gdb.base/printcmds.exp | 46 +++++++++++++++++
gdb/testsuite/gdb.python/py-format-string.exp | 73 +++++++++++++++++++++++++++
gdb/valprint.c | 49 +++++++++++++++++-
gdb/valprint.h | 9 ++--
ld/testsuite/ld-elf/pr29259.d | 13 +++++
ld/testsuite/ld-elf/pr29259.s | 14 +++++
ld/testsuite/ld-elf/pr29259.t | 4 ++
22 files changed, 303 insertions(+), 38 deletions(-)
create mode 100644 ld/testsuite/ld-elf/pr29259.d
create mode 100644 ld/testsuite/ld-elf/pr29259.s
create mode 100644 ld/testsuite/ld-elf/pr29259.t
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3_LTO updated (07f61f81 -> cdc1a70f)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3_LTO
in repository toolchain/ci/base-artifacts.
discards 07f61f81 0: update: binutils-gcc-linux-glibc-llvm: 1
new cdc1a70f 0: update: binutils-gcc-linux-glibc-llvm: 1
This update added new revisions after undoing existing revisions.
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branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
* -- * -- B -- O -- O -- O (07f61f81)
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N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master [...]
You should already have received notification emails for all of the O
revisions, and so the following emails describe only the N revisions
from the common base, B.
Any revisions marked "omits" are not gone; other references still
refer to them. Any revisions marked "discards" are gone forever.
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repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1680 -> 1620 bytes
02-prepare_abe/console.log.xz | Bin 2756 -> 2736 bytes
03-build_abe-binutils/console.log.xz | Bin 30440 -> 31136 bytes
04-build_abe-stage1/console.log.xz | Bin 92784 -> 93280 bytes
05-clean_sysroot/console.log.xz | Bin 336 -> 336 bytes
06-build_abe-linux/console.log.xz | Bin 8196 -> 9212 bytes
07-build_abe-glibc/console.log.xz | Bin 233828 -> 234240 bytes
08-build_abe-stage2/console.log.xz | Bin 212376 -> 213360 bytes
09-build_llvm-true/console.log.xz | Bin 61168 -> 61176 bytes
10-benchmark/benchmark-build.log | 106 +-
10-benchmark/benchmark.log | 104 +-
10-benchmark/console.log.xz | Bin 3872 -> 3808 bytes
11-check_regression/console.log.xz | Bin 2904 -> 2932 bytes
11-check_regression/csv-results-0/md5sum.csv | 35581 +-
11-check_regression/csv-results-0/perf.csv | 116 +-
11-check_regression/csv-results-0/results.csv | 199319 +++++------
11-check_regression/csv-results-0/size.csv | 308001 ++++++++---------
11-check_regression/csv-results-0/vect.csv | 28 +-
11-check_regression/csv-results-1/md5sum.csv | 14670 +-
11-check_regression/csv-results-1/perf.csv | 116 +-
11-check_regression/csv-results-1/results.csv | 211835 ++++++------
11-check_regression/csv-results-1/size.csv | 310516 +++++++++---------
11-check_regression/csv-results-1/vect.csv | 26 +-
11-check_regression/results-brief.csv | 36 +-
11-check_regression/results-full.csv | 116 +-
11-check_regression/results-internal.csv | 45 +-
11-check_regression/results.log | 3506 +-
12-update_baseline/console.log | 1409 +-
12-update_baseline/csv-results-0/md5sum.csv | 35581 +-
12-update_baseline/csv-results-0/perf.csv | 116 +-
12-update_baseline/csv-results-0/results.csv | 199319 +++++------
12-update_baseline/csv-results-0/size.csv | 308001 ++++++++---------
12-update_baseline/csv-results-0/vect.csv | 28 +-
12-update_baseline/csv-results-1/md5sum.csv | 14670 +-
12-update_baseline/csv-results-1/perf.csv | 116 +-
12-update_baseline/csv-results-1/results.csv | 211835 ++++++------
12-update_baseline/csv-results-1/size.csv | 310516 +++++++++---------
12-update_baseline/csv-results-1/vect.csv | 26 +-
12-update_baseline/results-brief.csv | 36 +-
12-update_baseline/results-full.csv | 116 +-
12-update_baseline/results-internal.csv | 45 +-
12-update_baseline/results.log | 3520 +-
.../top-artifacts/save-temps/400.perlbench.tar.xz | Bin 396056 -> 394432 bytes
.../top-artifacts/save-temps/401.bzip2.tar.xz | Bin 42932 -> 42856 bytes
.../top-artifacts/save-temps/403.gcc.tar.xz | Bin 1187864 -> 1193776 bytes
.../top-artifacts/save-temps/429.mcf.tar.xz | Bin 22448 -> 22472 bytes
.../top-artifacts/save-temps/433.milc.tar.xz | Bin 57512 -> 57376 bytes
.../top-artifacts/save-temps/444.namd.tar.xz | Bin 44804 -> 44424 bytes
.../top-artifacts/save-temps/445.gobmk.tar.xz | Bin 610544 -> 615568 bytes
.../top-artifacts/save-temps/447.dealII.tar.xz | Bin 858704 -> 837188 bytes
.../top-artifacts/save-temps/450.soplex.tar.xz | Bin 199236 -> 206232 bytes
.../top-artifacts/save-temps/453.povray.tar.xz | Bin 446264 -> 450416 bytes
.../top-artifacts/save-temps/458.sjeng.tar.xz | Bin 50536 -> 50588 bytes
.../top-artifacts/save-temps/462.libquantum.tar.xz | Bin 23704 -> 23644 bytes
.../top-artifacts/save-temps/464.h264ref.tar.xz | Bin 174208 -> 174192 bytes
.../top-artifacts/save-temps/470.lbm.tar.xz | Bin 15912 -> 15912 bytes
.../top-artifacts/save-temps/471.omnetpp.tar.xz | Bin 297640 -> 300568 bytes
.../top-artifacts/save-temps/473.astar.tar.xz | Bin 41508 -> 41512 bytes
.../top-artifacts/save-temps/482.sphinx3.tar.xz | Bin 92800 -> 92916 bytes
.../top-artifacts/save-temps/483.xalancbmk.tar.xz | Bin 3196856 -> 3164852 bytes
jenkins/manifest.sh | 18 +-
results | 2 +-
results_id | 2 +-
save-temps/400.perlbench.tar.xz | Bin 396056 -> 394432 bytes
save-temps/401.bzip2.tar.xz | Bin 42932 -> 42856 bytes
save-temps/403.gcc.tar.xz | Bin 1187864 -> 1193776 bytes
save-temps/429.mcf.tar.xz | Bin 22448 -> 22472 bytes
save-temps/433.milc.tar.xz | Bin 57512 -> 57376 bytes
save-temps/444.namd.tar.xz | Bin 44804 -> 44424 bytes
save-temps/445.gobmk.tar.xz | Bin 610544 -> 615568 bytes
save-temps/447.dealII.tar.xz | Bin 858704 -> 837188 bytes
save-temps/450.soplex.tar.xz | Bin 199236 -> 206232 bytes
save-temps/453.povray.tar.xz | Bin 446264 -> 450416 bytes
save-temps/458.sjeng.tar.xz | Bin 50536 -> 50588 bytes
save-temps/462.libquantum.tar.xz | Bin 23704 -> 23644 bytes
save-temps/464.h264ref.tar.xz | Bin 174208 -> 174192 bytes
save-temps/470.lbm.tar.xz | Bin 15912 -> 15912 bytes
save-temps/471.omnetpp.tar.xz | Bin 297640 -> 300568 bytes
save-temps/473.astar.tar.xz | Bin 41508 -> 41512 bytes
save-temps/482.sphinx3.tar.xz | Bin 92800 -> 92916 bytes
save-temps/483.xalancbmk.tar.xz | Bin 3196856 -> 3164852 bytes
81 files changed, 1110171 insertions(+), 1059306 deletions(-)
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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (142db43b626c -> 6f348b146b69)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig
in repository toolchain/ci/llvm-project.
from 142db43b626c [flang][runtime] Allow recovery from BACKSPACE(badUnit)
adds bab0910f77bb [gn build] Add missing BLAKE3 dependency
adds fc5ef57c7df5 [trace][intelpt] Support system-wide tracing [12] - Suppor [...]
adds afd5a4f2dcd6 [libc++] Implement ranges::lexicographical_compare
adds 509223da6114 [clang][deps] Further canonicalize implicit modules option [...]
adds c418d0f1be50 [Driver] Simplify -fno-builtin- handling. NFC
adds 6963fb7dfb56 [flang][runtime] Fix REWIND after non-advancing data transfer
adds b97b082c5a0d Fix failures
adds 78747bd39af8 [clang][WebAssembly] Loosen restriction on `main` symbol mangling
adds 8ef107538106 [flang][runtime] Signal END from character input
adds f6253eb9ba38 [flang][runtime] Fix INQUIRE(POS=n) for non-advancing I/O
adds bcad53e13175 [flang] Add more qualification when creating names for com [...]
adds 1a3ac586670d [flang][runtime] Fix handling of output FORMAT('x' 'y')
adds db6c3ecd2c7a [flang][runtime] Make NCOPIES= argument of REPEAT a signed [...]
adds dcdd5d312f29 [mlir][LLVMIR] Use insertelement if needed when translatin [...]
adds 719e24d39fad [mlir][LLVMIR] Use isScalableVectorType in ShuffleVectorOp::parse
adds cd8978e19ed9 [mlir][LLVMIR] Ask ICmpOp to return vector<Nxi1> when needed
adds 3ba71f1be1fb Reland "[lldb/Fuzzer] Create ninja target for target fuzzer"
adds eb6cd7fe316c [flang] ERROR STOP is not an image control statement
adds 307109266f6c unbreak Modules/cxx20-export-import.cpp with LLVM_APPEND_V [...]
adds 690de85ed8e9 [flang][runtime] Better error message for mis-ASSIGN'ed FORMAT
adds f4ad2039307d [mlir] create PrintOpStatsPass using printAsJSON
adds 6cde6ac03c2c [lldb] Don't overwrite quit and exit builtins in the Pytho [...]
adds cfc7675a4d01 [flang][docs] Document non-supported VMS extensions
adds ef44588202ab [gn build] Port afd5a4f2dcd6
adds 3cd5696a3309 Revert "Reland "Reland "[X86][RFC] Enable `_Float16` type [...]
adds 272bf0fc41e6 [lld-macho] Add support for exporting no symbols
adds 2815bacc9157 [flang] Fix error message
adds f0ab8d90d47c [ASan] Use debuginfo for symbolization.
adds 36e7c9a450db Revert "[lld-macho] Group undefined symbol diagnostics by symbol"
adds 1af4561ee5ed [lldb] Skip ScriptInterpreter/Python/exit.test on Windows
adds 20d5a8613423 [CMake] Fix `FindGRPC.cmake` for setting up gRPC related l [...]
adds 0eec7e2a89ab Reland "[lld-macho] Group undefined symbol diagnostics by [...]
adds 0083a02839c3 [gn build] Slighly nicer `gn args --list` output for is_de [...]
adds 52554f731514 [gn build] Allow use_ubsan=true on mac and unbreak use_asa [...]
adds 99796d06dbe1 Revert "[ASan] Use debuginfo for symbolization."
adds cfbde7149d86 [flang][runtime] Catch more (all?) negative unit number errors
adds f3bc0fccd68a [mlir][spirv] Define spv.ISubBorrowOp
adds 169417531578 [Clang][Modules] Merge availability attributes on imported decls
adds 80aa41d9df3d Pass through even more LIBCXX_* variables to libfuzzer's c [...]
adds 264c09b732ab [TableGen][DirectX] Add tableGen backend to generate map f [...]
adds 401a425d205a [BOLT][NFCI] Remove redundant code
adds bccf27d934b3 [mlir][python] Actually set UseLocalScope printing flag
adds e30c493894c4 [lldb] Support non-pointer implicit this/self in GetValueF [...]
adds e9349ef9e6d8 Fix `script -lpython` to handle control flow in one-line c [...]
adds 70f2befaf7ad [LoongArch] Use register R0 (ZERO) for constant 0
adds 33d14e3cd3b3 [libc][aarch64] Set frame pointer of the new thread to the [...]
adds 3aa6ec619fb3 [ValueTypes] Add types for nxv16bf16 and nxv32bf16.
adds f8fae5b66068 [libc][Obvious] Include arm_acle.h only for aarch64 builds.
adds f3e7e4d786fa [JITLink][AArch64][NFC] Suppress unused variable error.
adds d9ef307e9bb3 [ARM] Add a pipeline test showing missing postinc generation. NFC
adds 9dff14be9ed6 [AMDGPU] Add support for GFX11 hazards
adds c5990d353e14 Revert "[ARM] Add a pipeline test showing missing postinc [...]
adds 24b98520e2e8 Update FileCheck docs after D95849. NFCI
adds 147f74b6ee90 [libc++] Test the size of basic_string
adds 8e16c4db571a Reland "[RISCV] Testcase to show wrong register allocation [...]
adds e9f7263b381e Reland "[SplitKit] Handle early clobber + tied to def correctly"
adds 4a6929f81144 Revert "[libc] Apply no-builtin everywhere, remove unneces [...]
adds 77851cc1cfb9 [AMDGPU] Change use null for dead sdst to be gfx1030+
adds 6f6fa5aa10d3 [AArch64][SME] Add SME cntsb/h/w/d intrinsics
adds 5cfbfa035fc1 [sanitizer_common] Fix SanitizerCommon.ChainedOriginDepotS [...]
adds e984e1cd6137 [clangd] Don't add inlay hints on std::move/forward
adds 7e1a6c4cad54 [InstCombine] Add more tests for freeze of loop phi (NFC)
adds b26afab9d13d [AMDGPU][MC][GFX11] Correct src0 for dpp variants of v_cvt_*_e64
adds 951b9dc42bb3 [AMDGPU] Remove duplicate RUN lines from a test
adds e35096ae961e cmake: configure clang lit to use hmaptool from source directly
adds a4c805600ef2 [libc++] Robust against C++20-hostile iterators
adds 7236d49fd5f9 [SLP]Extend vectorization for scatter vectorize nodes.
adds 949c13649cc7 [LV] Remove widenPHIInstruction dependence on underlying i [...]
adds bf02ed240dfa Prevent crash when TurnSwitchRangeIntoICmp receives defaul [...]
adds cd53e6b48b67 [CostModel][AArch64][NFC] Add cost model tests for fshl/fs [...]
adds 2320a4ae907f [mlir][spirv] Workaround driver bug in math.ctlz conversion again
adds 4a3e46115a7f [RISCV] Extend demanded field transform in InsertVSETVLI t [...]
adds cdf17953ff27 Add braces to silence a gcc 9.4 -Wdangling-else warning [nfc]
adds 1f331224fb17 [strictfp][IPSCCP] Precommit tests for D115737.
adds b62e3a73e170 Replace to_hexString by touhexstr [NFC]
adds b34e3f40e715 [RISCV] Use TAIL_UNDISTURBED_MASK_UNDISTURBED for riscv_sl [...]
adds f4f6adc451a2 [clang] Don't emit IFUNC when targeting Fuchsia
adds 37fa5850f1c0 [RISCV] Move getSEWLMULRatio out of VSETVLIInfo [nfc]
adds 3d259a82da3e [PowerPC] Fix LQ-STQ instructions to use correct offset and base
adds 27c61d033fbf [RISCV] Split DemandedField logic in advance of reuse in d [...]
adds c5312fe3bec2 Revert "[libc++] Test the size of basic_string"
adds 55311801f06d Allow bitwidth difference when checking for isOneOrOneSplat.
adds 912a5172f8d8 [RISCV] Use TAIL_AGNOSTIC in riscv_fma_vl patterns.
adds 7f24e574d434 [MLInliner] Don't inline call sites in unreachable basic blocks
adds 40a55fff0517 [libc][NFC] Make explicit uint16_t casts in fenv
adds 6ed81ec16417 [RISCV] Reorder function definitions to reduce upcoming di [...]
adds 046ebeb60504 [mlir][linalg] Relax convolution vectorization to support [...]
adds a70b39abffb4 [clang] Don't emit type test/assume for virtual classes th [...]
adds f011d32c3a62 [mlir][vector] Fix contraction op lowering with mixed types
adds 652ecb251ec9 [libc] add printf hex conversion
adds 5bcda1d3a937 [libc] fix line buffered empty file writes
adds 17853928a69b [flang] Correct implementation of WAIT with no ID
adds 6716195cd71b [RISCV] Merge TIED_TU and TIED instructions for VWADD_W/VW [...]
adds b67984d35627 [flang] Handle module subprogram with interface in same (s [...]
adds 47bfc365fc84 [docs][OpaquePtr] Add detail to motivations behind opaque [...]
adds 527b8ccde590 [AArch64] Regenerate 3 codegen test files. NFC
adds 445a483b41a8 [AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row
adds c155a944fbf4 [AMDGPU] GFX11 CodeGen support for MIMG instructions
adds 36ec1fcaac8e [AMDGPU] Add GFX11 llvm.amdgcn.ds.add.gs.reg.rtn / llvm.am [...]
adds b91a9f48523d [RISCV] Fix a typo in an intrinsic name
adds 3433f78c407b [libc++][doc] Update formatting status.
adds 76782a65ee86 [SLP]Use original vector if need to shuffle truncated root.
adds 2665fbe71e1d [flang] NINT(-.4999) is 0, not overflow
adds 838a57e1a563 Fix a bug introduced by the move of AddressRanges.h into ADT.
adds 1e6c819d6dbe [libc][obvious] fix address test on windows
adds 77b00098f290 [PS5] Use same debug trap instruction as PS4
adds 89a11ebd8e10 [RISCV] Avoid reducing etype just to initialize lane 0 of [...]
adds 814c9f4e0c4d [NFC] Precommited tests from D73000
adds ff0122dccea8 [PS5] Emit ud2 for ubsan trap
adds 1a3f996972b1 [trace][intelpt] Support system-wide tracing [13] - Add co [...]
adds a19fcc2bec81 [trace][intelpt] Support system-wide tracing [14] - Decode [...]
adds ef9970759b5b [trace][intelpt] Support system-wide tracing [15] - Make t [...]
adds ff15efc1a701 [trace][intelpt] Support system-wide tracing [16] - Create [...]
adds 03cc58ff2a7a [trace][intelpt] Support system-wide tracing [17] - Some i [...]
adds 593fa3ab30b7 [PS5] Set address sanitizer shadow offset
adds 39fb84343ec5 [PS4/PS5][profiling] Go back to the old way of doing a run [...]
adds ed72f40d0be7 Revert "[NFC] Precommited tests from D73000"
adds cb111ef090c5 Reland "[NFC] Precommited tests from D73000"
adds e0e2a1175195 [flang][runtime] Make ASSOCIATED() conform with standard
adds d0e60b6d7ec9 Revert "[PS4/PS5][profiling] Go back to the old way of doi [...]
adds 561a61fb261b [trace][intelpt] Support system-wide tracing [18] - some m [...]
adds 67c240514501 [trace][intelpt] Support system-wide tracing [19] - Some o [...]
adds 6a5355e8a159 [trace][intelpt] Support system-wide tracing [20] - Rename [...]
adds 9f45f23d8602 [trace][intelpt] Support system-wide tracing [21] - Suppor [...]
adds ea37cd52d147 [trace][intelpt] Support system-wide tracing [22] - Some f [...]
adds 7e681ef35e09 [AMDGPU] Add GFX11 codegen for llvm.amdgcn.mov.dpp8
adds 2d43de13df03 [AMDGPU] gfx11 new dot instruction codegen support
adds 8228c7035899 [BOLT][NFCI] Refactor interface for adding basic blocks
adds dae2fafe056c Fix TraceGDBRemotePacketsTest
adds 3f6030255d7a Reland "[PS4/PS5][profiling] Go back to the old way of doi [...]
adds f22db1fabfa1 Fix StopInfoBreakpoint::ShouldNotify when a callback delet [...]
adds eea1531ba4fd [libc++] Remove now-unused experimental/filesystem config file
adds a9dccb0072af [TargetTransformInfo] Added an opt/llc option for cache line size
adds 4c77d0276b83 [Delinearization] Refactoring of fixed-size array delinearization
adds 6ff49af33d09 [lldb] Introduce the concept of a log handler (NFC)
adds decb600b0213 [gn build] Port 6ff49af33d09
adds caa2a829cdf9 [MergeFunctions] Preserve symbols used llvm.used/llvm.comp [...]
adds 46fcdf23640e [TableGen][DirectX] generate DXIL operation table with TableGen.
adds 13e9c1d18e2e Reland "[ASan] Use debuginfo for symbolization."
adds df6087ee3794 Move debug-only code inside LLVM_DEUG to prevent unused va [...]
adds 911841f717eb Revert "[TableGen][DirectX] generate DXIL operation table [...]
adds bbb73ade43a2 [mlir][complex] Add Python bindings for complex ops.
adds d764aa7fc6b9 [RISCV] Add cost model for scalable scatter and gather
adds 2fa2cee6a84b [RISCV] Start merging demanded reasoning - starting with l [...]
adds 72c1effb34aa [libc] Add a status page for math functions.
adds ed5a349b89e9 Make setSanitizerMetadata byval.
adds 36c01876d79d [mlir][sparse] fix asan issue
adds 011e0604ebc9 Add DWARF string debug to clang release notes.
adds e6c7a3a54ffa [SelectionDAG] Don't apply MinRCSize constraint in InstrEm [...]
adds 4191de262f19 [RISCV] Don't emit LUI/ADDI MachineSDNodes from getAddr
adds 6e566bc5523f [clang-tidy] Organize check doc files into subdirectories (NFC)
adds a9ddb7d54e34 [PowerPC] Fixing implicit castings in altivec for -fno-lax [...]
adds ee28837a1fbd [NFCI] Whitespace in SemaDeclAttr.cpp
adds 5afdceb82b92 [RISCV] Add RISCVISD opcode for PseudoLLA.
adds 9d7b01dc9521 [RISCV] Implement RISCVTargetLowering::getTargetConstantFromLoad.
adds 6ac608b3d897 [lldb] Add RotatingLogHandler
adds 663612dfd8f6 [lldb] Remove references to epydoc from the documentation
adds dba2ff500d5b fix x86 sanitizer failure due to use of or
adds ff3989e6ae74 [libc++][ranges] Implement `ranges::sort`.
adds ea690e7019c8 [RISCV] Rename VTy param of RISCVTTIImpl::getArithmeticRed [...]
adds 61fac2c370b9 Incomplete attempt to pull DWARFTypePrinter into its own f [...]
adds 8eefbd2a57cb [gn build] Port 61fac2c370b9
adds 21f557e13a2c [gn build] Port ff3989e6ae74
adds 2a2886160d80 [mlir][sparse] improved testing and codegen for semi-ring [...]
adds af6ec9200b09 [lldb] Cleanup Python API reference files after building the docs
adds fcd058acc95c [SVE][CodeGen] Restructure SVE fixed length tests to use u [...]
adds 0e182469ee76 [sanitizer] Delete empty sanitizer_openbsd.cpp after D89759
adds 2e0c46044a5d [Object][COFF] Improve section name parsing
adds 6b8bd0f72df8 llvm-reduce: Support replacing FP values with 1.0
adds eea11e7369ca llvm-reduce: Add reduction pass to simplify instructions
adds 6f1a7eb9e79c [gn build] Port eea11e7369ca
adds 6181c192837d [AMDGPU][NFC] Remove isConstantAddr
adds bb83f8e70bd1 [OpenMP] Initial parsing and sema for 'parallel masked' construct
adds febe4f650b87 [PowerPC][NFC] Undefine __XL_COMPAT_ALTIVEC__ in builtin lit test
adds 711a71d1ab10 PowerPC] Emit warning for incompatible vector types that a [...]
adds 32bd0c1714b4 llvm-reduce: Try to fix dynamic libraries build
adds 232bd331cbaa [ORC-RT] Make the ORC runtime C API public.
adds 5e16a781bada [RISCV][NFC][test] Correct a wrong test in vreductions-fp-vp.ll
adds 16215eb9790a [LegalizeTypes][RISCV][NFC] Modify assert in PromoteIntRes [...]
adds 287ade415eaf [mlir][doc] Avoid duplication with constraints and defs
adds f2bcf330588b [LegalizeTypes][NFC] Merge promote SPLAT_VECTOR and promot [...]
adds d30c0221cf5a [mlir] Split MLProgram global load and store to Graph variants
adds 02b9ddb2f218 [mlir] Disable warning in test of deprecated feature (NFC)
adds 8eeede973c69 [lld-macho][nfc] Tests for -force_load + regular archive l [...]
adds de7475657156 [lldb] Remove LogHandler::Create functions (NFC)
adds 04a3d5f3a119 Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type [...]
adds 46d45df4516e [MachineBlockPlacementStats] Add check for `-filter-print- [...]
adds b7d09557f6ef Revert "[MachineBlockPlacementStats] Add check for `-filte [...]
adds 1e67385d28a4 [MachineBlockPlacementStats] Added check for "-filter-prin [...]
adds f4b7b66c4c75 [AArch64][test] Add --mattr=-{sve,sve2,sme} to SVE/SVE2/SM [...]
adds 0d2dde20be14 [TableGen][DirectX] generate DXIL operation table with TableGen.
adds c324c938becd [Driver] Pass -X to ld for riscv*-{elf,freebsd,linux}
adds 880ac5189d63 [RISCV][NFC] Add load/store instructions in rv64*-invalid.s
adds 5ea341d7c4f9 [clang] Fix trivially copyable for copy constructor and co [...]
adds 1a20252978c7 Revert "Reland "Reland "Reland "[X86][RFC] Enable `_Float1 [...]
adds 3fd9aebbb75a [LLDB] XFAIL TestLoadUnload fails on Arm/Ubuntu Jammy
adds 5ae4a173ddc7 [InstCombine] Add tests for freeze of recurrence with invo [...]
adds 2d9c891cd949 [OpenCL] Fix atomic_fetch_add/sub half overloads
adds 7ab44b5c2155 [msan] Allow KMSAN to use -fsanitize-memory-param-retval
adds 5ffbac340d6d [AArch64] NFC: Fix BFMLAL[BT] inst def names
adds c26366979b6b [libc][bazel] Remove memcpy dependency in memmove
adds 610139d2d9ce [mlir] replace 'emit_c_wrappers' func->llvm conversion opt [...]
adds daf897d559fc [IR] Check for SignedMin/-1 division in canTrap() (PR56038)
adds 32805e60c9de [clang] Dont print implicit forrange initializer
adds b329156f4f14 [AArch64][LV] AArch64 does not prefer vectorized addressing
adds 84519bc5f75c [LLVM][IR] Fix typo in DerivedTypes.h (NFC)
adds 03a991032571 [AMDGPU] Use explicit -global-isel=0/1 in tests. NFC.
adds b3ebe3beeda6 [mlir][bufferize] Bufferize after TensorCopyInsertion
adds c80c57674e4d [Clang] Allow 'Complex float __attribute__((mode(HC)))'
adds b55d55ecd9b2 [mlir][bufferize][NFC] Remove BufferizationState
adds 13dfe0f0fc26 [lldb] [test] Update baseline test status for FreeBSD
adds 0d16d9bff87b [gn build] (semi-manually) port 232bd331cbaa
adds 0e21f1d56a50 [SelectionDAG] Extend WidenVecOp_INSERT_SUBVECTOR to cover [...]
adds af5e64df728f [InstCombine] add tests for (pow2 >> X) >u C; NFC
adds a5040860412f [InstCombine] add tests for FP casts; NFC
adds 7aac15d5df6c Revert "[clang] Dont print implicit forrange initializer"
adds c6b88cb9184f [InstCombine] Push freeze through recurrence phi
adds 0b9dc7684fb6 [AMDGPU] More GFX11 test coverage
adds 6d5d8b131300 [AMDGPU] gfx11 ldsdir intrinsics and ISel
adds 655ba9c8a1d2 Reland "Reland "Reland "Reland "[X86][RFC] Enable `_Float1 [...]
adds 6441bfb8867c [libc][Obvious] Fix hyperlink and typo in math status page.
adds 20d20156f4ce [AMDGPU] gfx11 VINTERP intrinsics and ISel support
adds 929d5de22c49 [libc++] Simplify __config a bit
adds 6bb40552f235 [LoopVectorize] Add support for invariant stores of ordere [...]
adds 2a683647455f [AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR inst [...]
adds 6c89c5314476 [flang] Fix bug in character casting. Add missing sext/tru [...]
adds 7b73f53790f3 [libc] Rely on __builtin_memcpy_inline for memcpy implementation
adds 1a02c963e338 Revert "Revert "[clang] Dont print implicit forrange initi [...]
adds bfde8619355a [InstCombine] convert mask and shift of power-of-2 to cmp+select
adds 4a3a9a5fa0b2 [clang][deps] Sort submodules when calculating dependencies
adds 755c84c62cda [RISCV] Avoid changing etype for splat of 0 or -1
adds deb7655209a7 [PowerPC] Fix PPCVSXSwapRemoval pass to include MTVSCR and [...]
adds 90f96ec7a52e [NFC][Alignment] Remove assumeAligned from MachineFrameInfo ctor
adds 51b925df941a [mlir][nvgpu] shared memory access optimization pass
adds aef20f59a521 [mlir][sparse] move from by-value to by-reference for data types
adds d089d68a2c74 [mlir][nvgpu] fix missing build dependency for NVGPUTransforms
adds c2bb2e5973ac [gn build] (manually) port 7cca33b40f77c
adds f000de8760c1 [LLDB][ExpressionParser] Fix indices inside format-strings [...]
adds 48f4407c1aaf [mlir][linalg] Extend opdsl to support operations on compl [...]
adds fc6b2281bfd7 [Static Analyzer][CFG] Introducing the source array in the [...]
adds 5fb67e32f8fd [InstCombine] Fold memcmp of constant arrays and variable size
adds fb3477a4dab0 [libc++] Unwrap reverse_iterator<reverse_iterator<Iter>> i [...]
adds ad709a752daa [libc][obvious] fix sign warning in file_writer
adds 92bf652d4074 [Static Analyzer] Small array binding policy
adds 75378d432fda [AMDGPU] NFC. Change comment format on gfx11 interp and ld [...]
adds e1f1407beb84 [RISCV] Delete dead elideCopy code in InsertVSETVLI [nfc]
adds 971e9c80e966 [libc++] Implement std::boyer_moore{, _horspool}_searcher
adds fd5a26e6107e [gn build] Port 971e9c80e966
adds 914b9eec04b5 [Flang] Fixes for XArrayCoorOp
adds 2040b6df0a3f [Symbolize] Parser for log symbolizer markup.
adds 527395bd1005 [gn build] (manually) port 2040b6df0a3f (DebugInfoSymboliz [...]
adds b595cddea7fe [riscv] Extract isMaskRegOp helper [nfc]
adds ba53906ceff1 [clang][dataflow] Add support for comma binary operator
adds e77ac66b8c1c [Static Analyzer] Structured binding to data members
adds 05704e785a83 [docs] Fix typo
adds 0dd243fa8a4e wip
adds 5b77a45c7fb1 [docs] Adding DirectX target usage doc
adds e694b2234430 [mlir][nvgpu] Fix Bazel BUILD file
adds f9e49644f487 Revert "wip"
adds d5745d0015ac [docs] Adding table of object file formats
adds db1978b67431 [libc++] Mark standard-mandated includes as such
adds f12664386261 [AArch64] add tests for masked subtract; NFC
adds e9cced27390b Recommit "[LAA] Initial support for runtime checks with po [...]
adds 4d245f1bc2e2 [RISCV] Move store policy and mask reg ops into demanded h [...]
adds fb8ecca06f6a [RISCV] Remove redundant code checking for exact VTYPE mat [...]
adds 86d5d34c7223 [mlir][sparse] renable f16 tests
adds 3420cd7caf8d [mlir][sparse] Add testing for bf16 and fallback for softw [...]
adds feb8313fbfe0 [bazel] Add missing dependency after 455679413
adds 9d5e6ccd9bba [BOLT] Fix for missing entry offset
adds d5c29b23e1d4 [mlir][sparse] Inline the definition of LLVM_ATTRIBUTE_WEAK
adds cbf6737cc402 [RISCV] Use RVVBitsPerBlock instead of hardcoding multiple [...]
adds 303c4c37ea49 [libc++] Don't force -O2 when building the benchmarks
adds 4cc8f2a017c7 [lldb][tests] Automatically call compute_mydir (NFC)
adds 8da8b6143098 [libc++] Make sure we install libc++abi headers on Apple
adds 7bc00ce5cd41 [clang-repl] Remove memory leak of ASTContext/TargetMachine.
adds 92c6ffa14cde [clang][driver] Ensure we don't accumulate entries in -MJ files
adds 991663399792 [lldb] Fix modernize-use-override warnings (NFC)
adds 91688716ba49 [lldb] Fix modernize-use-equals-default warnings (NFC)
adds 829c84ec5b8b [mlir][nvgpu] fix MSVC warning regarding left shift
adds 2538a411ff2a [test][RPOFuncAttrs] Update norecurse.ll
adds e5e7e5147322 [mlir][sparse][taco] Support complex types.
adds 28b1dcb12280 [BOLT] Allow function fragments to point to one jump table
adds 121c6454141d [libc] add printf pointer conv
adds 8fc3d719eee7 Stop wrapping GCCAsmStmts inside StmtExprs to destruct tem [...]
adds 23d6f31a90a1 Add unit test coverage for cast<T> assertion failures on i [...]
adds f0ca0a324fd5 [CodeGen] Init EmptyExpr before the first use
adds c20381b22603 llvm-dwarf-dump: include type name for AT_containing_type
adds c0320df9f5c0 [DirectX] Add MC Register and Frame stubs
adds 3942f8e4762c [DirectX] Add DXILAsmPrinter
adds 3adc908b2685 [DirectX][MC] Add MC support for DXContainer
adds 7022e6d0f274 [gn build] Port 3adc908b2685
adds 2af61e620eea [DirectX] Add DirectX target object writer
adds 0f6ab346fd36 bzero->memset - Fix Windows bots
adds 0716b3ec09f4 [Bazel] Rename generated *_main.cpp to [tool-name]-driver. [...]
adds dbfb00a9300e [MachineCopyPropagation][RISCV] Add test case showing fail [...]
adds e29133629b3d [MachineCopyPropagation][RISCV] Fix D125335 accidentally c [...]
adds be6af89f85eb [libc] Add TLS image initialization to aarch64 startup code.
adds 745a4caaebb9 [mlir] Fix an msvc warning
adds 99260e95833c [mlir][bufferization] Set emitAccessorPrefix dialect flag
adds d417710c3af2 [libc++][ranges][NFC] Fix a format error on the ranges sta [...]
adds 6e070c3c9101 [NFC] Specifing clang namespace for builtins.
adds 3ea1422362c6 [CodeGen] Add back setOperationAction/setLoadExtAction/set [...]
adds cd64a427efa0 Reland "[CodeGen] Keep track info of lazy-emitted symbols [...]
adds 3c9123af9fdd [X86] isShuffleFoldableLoad - ensure the load has one use.
adds 91e2956232e7 [X86] Use X86 instead of X32 for i686 check prefixes
adds d915b3e485e9 [X86] Regenerate sar_fold.ll to show all instructions
adds 621f58e71619 [Target, CodeGen] Use isImm(), isReg(), etc (NFC)
adds 4533e6aab8bf [AsmParser] Use default member initialization (NFC)
adds 7eb046624f2a Prefer `getCurrentFileOrBufferName` in `FrontendAction::En [...]
adds f42f2b700591 [X86] canonicalizeShuffleWithBinOps - merge unary shuffles [...]
adds 17e68156f644 [NFC][Alignment] Remove dead code
adds 55cb62f34a6f [libc++] Enable -Wweak-vtables
adds 3766992291fd [libc++] Add Implemented Papers section
adds b254d671604c [llvm] Call *set::insert without checking membership first (NFC)
adds ac3f967382ab [X86] canonicalizeShuffleWithBinOps - merge shuffles acros [...]
adds 37185ceac9bc [Object] Make IsLittleEndian check constexpr to silence st [...]
adds eca86cb2edfd [mlir] Start migrating more dialects to prefixed form
adds 4271a1ff3380 [llvm] Call *set::insert without checking membership first (NFC)
adds 437f960062e3 [llvm] Call *set::insert without checking membership first (NFC)
adds f8b5be64ab46 [IPO] Call *set::insert without checking membership first (NFC)
adds 80c12bdb3bbd [clang] Call *set::insert without checking membership first (NFC)
adds af6d2a0b6825 [docs] Re-generate ClangCommandLineReference.rst
adds 545a71c0d66e [RISCV] Pre-promote v1i1/v2i1/v4i1->i1/i2/i4 bitcasts befo [...]
adds 543f13c99b1f [BOLT] Allow function entry to be a cold fragment
adds 3cbe0bc4a1fa [CodeGen] Use default member initialization (NFC)
adds 7c987bb4d9f0 [X86] Use default member initialization (NFC)
adds 1590d39f2e09 [X86] Use default member initialization (NFC)
adds 47b39c51572f [X86] Use default member initialization (NFC)
adds eb15c80c89a5 [IPO] Use default member initialization (NFC)
adds e4406cefa053 [RPOFuncAttrs] Fix norecurse detection
adds b911cbdcb9c4 [X86] Add missing common AVX2 check prefix
adds 21eb1af469c3 [Concepts] Implement overload resolution for destructors (P0848)
adds 119a13199a91 [Driver] Pass -X to ld for riscv64-openbsd
adds 6dd094dd435d [Driver][OpenBSD] Use Arch reference instead of getArch(). NFC
adds 726b2dd04001 [IPO] Use default member initialization (NFC)
adds 07b9937d0c53 [test][GlobalOpt] Precommit test
adds 06dc4028d943 [Support] Use default member initialization (NFC)
adds c399b3a6080c [Vectorize] Use llvm::is_contained (NFC)
adds c5935af0583b [Toolchains] Use llvm::is_contained (NFC)
adds 8df54a6a03a6 [mlir] Update accessors to prefixed form (NFC)
adds 54b45afb599a [libomptarget]Add a trap for external omptarget from LLVM
adds 213d4897078b [test][GlobalOpt] Precommit more tests
adds c5ca7649e3de [libc][Obvious] Fix c++20-designator warnings for tests th [...]
adds 2846c2bb4fa4 [libc] Temporary disable environment tests for PATH variable.
adds 556bcc782101 [ADT] Rename value to val (NFC)
adds 68090a014cf5 [MCParser] Use default member initialization (NFC)
adds a5258e5b2728 Revert "[MCParser] Use default member initialization (NFC)"
adds 3c49576417ba [ADT] Add has_value, value, value_or to llvm::Optional
adds 4a5201f484d8 [NFC][GlobalOpt] Remove unused parameters
adds f61f7be0c76b [VE][NFC] Remove obsoleted function declaration
adds 9fac606af22f [test][GlobalOpt] Regenerate some tests
adds 1e556f459b44 [test][GlobalOpt] Update precommitted test
adds 129b531c9c67 [llvm] Use value_or instead of getValueOr (NFC)
adds 57e43ebc42d4 [Driver][Gnu] Don't passs --dynamic-linker in -r mode
adds 06decd0b4115 [clang] Use value_or instead of getValueOr (NFC)
adds 5dd171dcb55b [clang-tools-extra] Use value_or instead of getValueOr (NFC)
adds 97c87c6f7cff [AST] Fix an unused variable warning
adds 757d9d22cd91 [lld] Use value_or instead of getValueOr (NFC)
adds 41455dd1dcbb [X86] Remove isTargetShuffleSplat and just use SelectionDA [...]
adds 4b7d51f129f0 [InstCombine] add baseline tests for signbit cmp folds; NFC
adds feb4b336acc7 [InstCombine] add/adjust tests for signbit tests; NFC
adds db1be696c406 [DAG] SimplifyDemandedBits - add ISD::VSELECT handling
adds 1ebe5cac46cd [DAG] SimplifyDemandedBits - add DemandedElts handling to [...]
adds 0399473de886 [InstCombine] add fold for (ShiftC >> X) <u C
adds aa88161b378e [lldb] Use value_or instead of getValueOr (NFC)
adds ba3f2667b60c [DAG] Add MaskedVectorIsZero helper
adds c05b99971fa0 [flang][OpenMP][NFC] Refactor code related to OpenMP atomi [...]
adds 0fe13b5f84ab [X86] Add common CHECK prefix to nontemporal-3.ll tests
adds 6f348b146b69 [GlobalOpt] Perform store->dominated load forwarding for s [...]
No new revisions were added by this update.
Summary of changes:
bolt/include/bolt/Core/BinaryBasicBlock.h | 13 +-
bolt/include/bolt/Core/BinaryContext.h | 8 +
bolt/include/bolt/Core/BinaryFunction.h | 82 +-
bolt/lib/Core/BinaryBasicBlock.cpp | 2 +-
bolt/lib/Core/BinaryContext.cpp | 21 +-
bolt/lib/Core/BinaryFunction.cpp | 38 +-
bolt/lib/Passes/BinaryPasses.cpp | 4 +-
bolt/lib/Passes/IndirectCallPromotion.cpp | 4 +-
bolt/lib/Passes/Inliner.cpp | 2 +-
bolt/lib/Passes/Instrumentation.cpp | 3 +-
bolt/lib/Passes/LongJmp.cpp | 2 +-
bolt/lib/Passes/PatchEntries.cpp | 2 +-
bolt/lib/Passes/RetpolineInsertion.cpp | 3 +-
bolt/lib/Passes/TailDuplication.cpp | 2 +-
bolt/lib/Passes/ValidateInternalCalls.cpp | 3 +-
bolt/lib/Rewrite/RewriteInstance.cpp | 3 +-
bolt/test/X86/shared_object_entry.s | 38 +
.../split-func-jump-table-fragment-bidirection.s | 80 +
bolt/unittests/Core/MCPlusBuilder.cpp | 2 +-
clang-tools-extra/clang-tidy/ClangTidy.cpp | 2 +-
clang-tools-extra/clang-tidy/ClangTidyCheck.cpp | 4 +-
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llvm/lib/Analysis/MLInlineAdvisor.cpp | 13 +
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llvm/lib/AsmParser/LLParser.cpp | 14 +-
llvm/lib/CodeGen/CodeGenPrepare.cpp | 14 +-
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llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 +-
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llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 16 +-
llvm/lib/CodeGen/SplitKit.cpp | 31 +-
llvm/lib/CodeGen/ValueTypes.cpp | 4 +
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llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp | 4 +-
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llvm/lib/DebugInfo/DWARF/DWARFTypePrinter.cpp | 608 ++
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llvm/lib/MC/CMakeLists.txt | 3 +
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llvm/lib/Support/VirtualFileSystem.cpp | 8 +-
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llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 64 +-
llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 42 +-
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llvm/lib/Target/AMDGPU/VOP3Instructions.td | 4 +-
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llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp | 6 +-
llvm/lib/Target/AVR/AVRTargetMachine.cpp | 2 +-
llvm/lib/Target/BPF/BPFMIPeephole.cpp | 6 +-
llvm/lib/Target/BPF/BPFTargetMachine.cpp | 2 +-
llvm/lib/Target/BPF/BTFDebug.cpp | 3 +-
llvm/lib/Target/CSKY/CSKYTargetMachine.cpp | 2 +-
llvm/lib/Target/DirectX/CMakeLists.txt | 5 +
llvm/lib/Target/DirectX/DXILOpLowering.cpp | 60 +-
llvm/lib/Target/DirectX/DXILStubs.td | 18 +
llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp | 2 +-
llvm/lib/Target/DirectX/DirectX.td | 1 +
llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp | 57 +
llvm/lib/Target/DirectX/DirectXFrameLowering.h | 35 +
llvm/lib/Target/DirectX/DirectXInstrInfo.cpp | 20 +
llvm/lib/Target/DirectX/DirectXInstrInfo.h | 30 +
llvm/lib/Target/DirectX/DirectXRegisterInfo.cpp | 24 +
llvm/lib/Target/DirectX/DirectXRegisterInfo.h | 28 +
llvm/lib/Target/DirectX/DirectXSubtarget.cpp | 4 +-
llvm/lib/Target/DirectX/DirectXSubtarget.h | 10 +
llvm/lib/Target/DirectX/DirectXTargetMachine.cpp | 25 +-
.../lib/Target/DirectX/MCTargetDesc/CMakeLists.txt | 1 +
.../MCTargetDesc/DirectXContainerObjectWriter.cpp | 28 +
.../MCTargetDesc/DirectXContainerObjectWriter.h | 24 +
.../DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp | 127 +-
.../DirectX/MCTargetDesc/DirectXMCTargetDesc.h | 29 +
llvm/lib/Target/Hexagon/BitTracker.cpp | 3 +-
llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 2 +-
.../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 7 +-
llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 2 +-
llvm/lib/Target/Lanai/LanaiTargetMachine.cpp | 2 +-
.../lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp | 7 +-
llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 12 +-
llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp | 2 +-
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 2 +-
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 27 +-
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 9 -
llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 2 +
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 89 +-
llvm/lib/Target/RISCV/RISCVISelLowering.h | 11 +
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 750 +-
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 8 +-
llvm/lib/Target/RISCV/RISCVInstrInfo.td | 25 +
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 31 +-
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 18 +-
llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp | 4 +-
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 46 +-
llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 2 +-
llvm/lib/Target/VE/VE.h | 1 -
llvm/lib/Target/VE/VECustomDAG.cpp | 2 +-
llvm/lib/Target/VE/VETargetMachine.cpp | 2 +-
.../AsmParser/WebAssemblyAsmTypeCheck.cpp | 4 +-
.../WebAssemblyFixIrreducibleControlFlow.cpp | 4 +-
.../WebAssembly/WebAssemblyLateEHPrepare.cpp | 3 +-
llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 +-
llvm/lib/Target/X86/X86FloatingPoint.cpp | 6 +-
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 29 +-
llvm/lib/Target/X86/X86ISelLowering.cpp | 104 +-
llvm/lib/Target/X86/X86InstrInfo.td | 4 +-
llvm/lib/Target/X86/X86InstrSystem.td | 4 +-
llvm/lib/Target/X86/X86PadShortFunction.cpp | 11 +-
llvm/lib/Target/X86/X86Subtarget.h | 2 +-
llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 2 +-
llvm/lib/Testing/Support/Annotations.cpp | 4 +-
llvm/lib/Transforms/IPO/Attributor.cpp | 2 +-
llvm/lib/Transforms/IPO/CalledValuePropagation.cpp | 4 +-
llvm/lib/Transforms/IPO/ConstantMerge.cpp | 2 +-
llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 7 +-
llvm/lib/Transforms/IPO/GlobalOpt.cpp | 42 +-
llvm/lib/Transforms/IPO/IROutliner.cpp | 9 +-
llvm/lib/Transforms/IPO/Inliner.cpp | 2 +-
llvm/lib/Transforms/IPO/MergeFunctions.cpp | 15 +-
llvm/lib/Transforms/IPO/PartialInlining.cpp | 2 +-
llvm/lib/Transforms/IPO/SampleProfileProbe.cpp | 2 +-
llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp | 4 +-
.../Transforms/InstCombine/InstCombineAndOrXor.cpp | 17 +
.../Transforms/InstCombine/InstCombineCompares.cpp | 27 +-
.../Transforms/InstCombine/InstCombineInternal.h | 1 +
.../InstCombine/InstCombineVectorOps.cpp | 2 +-
.../InstCombine/InstructionCombining.cpp | 70 +
.../Instrumentation/AddressSanitizer.cpp | 10 +-
.../Instrumentation/ControlHeightReduction.cpp | 2 +-
.../Transforms/Instrumentation/InstrProfiling.cpp | 2 +-
llvm/lib/Transforms/Scalar/GVN.cpp | 10 +-
llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 8 +-
llvm/lib/Transforms/Scalar/NewGVN.cpp | 3 +-
llvm/lib/Transforms/Scalar/Scalarizer.cpp | 2 +-
.../lib/Transforms/Scalar/WarnMissedTransforms.cpp | 2 +-
llvm/lib/Transforms/Utils/InlineFunction.cpp | 2 +-
llvm/lib/Transforms/Utils/LoopUtils.cpp | 12 +-
llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 7 +-
llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 72 +-
.../Vectorize/LoopVectorizationLegality.cpp | 5 +-
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 28 +-
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 244 +-
llvm/lib/Transforms/Vectorize/VPlan.cpp | 26 +
llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 2 +-
.../Analysis/CostModel/AArch64/sve-intrinsics.ll | 81 +-
.../Analysis/CostModel/RISCV/rvv-intrinsics.ll | 8 +-
.../Analysis/CostModel/RISCV/scalable-gather.ll | 164 +-
.../Analysis/CostModel/RISCV/scalable-scatter.ll | 164 +-
.../Analysis/LoopAccessAnalysis/forked-pointers.ll | 24 +-
.../Analysis/LoopCacheAnalysis/compute-cost.ll | 160 +
llvm/test/CodeGen/AArch64/add-negative.ll | 7 +-
llvm/test/CodeGen/AArch64/arm64-cse.ll | 42 +-
llvm/test/CodeGen/AArch64/dag-numsignbits.ll | 5 -
llvm/test/CodeGen/AArch64/minmax.ll | 4 +-
llvm/test/CodeGen/AArch64/regress-tblgen-chains.ll | 24 +-
llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll | 46 +
llvm/test/CodeGen/AArch64/sub1.ll | 50 +
.../AArch64/sve-fixed-length-bit-counting.ll | 1207 +--
.../CodeGen/AArch64/sve-fixed-length-bitcast.ll | 239 +-
.../CodeGen/AArch64/sve-fixed-length-concat.ll | 755 +-
.../CodeGen/AArch64/sve-fixed-length-ext-loads.ll | 587 +-
.../AArch64/sve-fixed-length-extract-subvector.ll | 533 +-
.../AArch64/sve-fixed-length-extract-vector-elt.ll | 232 +-
.../AArch64/sve-fixed-length-float-compares.ll | 1031 ---
.../CodeGen/AArch64/sve-fixed-length-fp-arith.ll | 2124 +++--
.../AArch64/sve-fixed-length-fp-compares.ll | 774 ++
.../AArch64/sve-fixed-length-fp-extend-trunc.ll | 609 +-
.../CodeGen/AArch64/sve-fixed-length-fp-fma.ll | 136 +-
.../CodeGen/AArch64/sve-fixed-length-fp-minmax.ll | 1235 +--
.../CodeGen/AArch64/sve-fixed-length-fp-reduce.ll | 1084 ++-
.../AArch64/sve-fixed-length-fp-rounding.ll | 1892 ++--
.../CodeGen/AArch64/sve-fixed-length-fp-select.ll | 775 +-
.../CodeGen/AArch64/sve-fixed-length-fp-to-int.ll | 2061 +++--
.../CodeGen/AArch64/sve-fixed-length-fp-vselect.ll | 400 +-
.../AArch64/sve-fixed-length-insert-vector-elt.ll | 403 +-
.../CodeGen/AArch64/sve-fixed-length-int-arith.ll | 1526 +--
.../AArch64/sve-fixed-length-int-compares.ll | 628 +-
.../CodeGen/AArch64/sve-fixed-length-int-div.ll | 2125 ++---
.../AArch64/sve-fixed-length-int-extends.ll | 975 +-
.../CodeGen/AArch64/sve-fixed-length-int-log.ll | 1162 ++-
.../CodeGen/AArch64/sve-fixed-length-int-minmax.ll | 1670 ++--
.../CodeGen/AArch64/sve-fixed-length-int-mulh.ll | 3636 ++------
.../CodeGen/AArch64/sve-fixed-length-int-reduce.ll | 1834 ++--
.../CodeGen/AArch64/sve-fixed-length-int-rem.ll | 2382 ++---
.../CodeGen/AArch64/sve-fixed-length-int-select.ll | 603 +-
.../CodeGen/AArch64/sve-fixed-length-int-shifts.ll | 1267 +--
.../CodeGen/AArch64/sve-fixed-length-int-to-fp.ll | 2106 +----
.../AArch64/sve-fixed-length-int-vselect.ll | 2462 +----
.../test/CodeGen/AArch64/sve-fixed-length-loads.ll | 222 +-
.../CodeGen/AArch64/sve-fixed-length-log-reduce.ll | 1178 +--
.../CodeGen/AArch64/sve-fixed-length-mask-opt.ll | 307 +-
.../AArch64/sve-fixed-length-masked-gather.ll | 2377 +----
.../AArch64/sve-fixed-length-masked-loads.ll | 945 +-
.../AArch64/sve-fixed-length-masked-scatter.ll | 890 +-
.../AArch64/sve-fixed-length-masked-stores.ll | 141 +-
.../AArch64/sve-fixed-length-permute-rev.ll | 36 +-
llvm/test/CodeGen/AArch64/sve-fixed-length-rev.ll | 677 +-
.../CodeGen/AArch64/sve-fixed-length-sdiv-pow2.ll | 390 +-
.../CodeGen/AArch64/sve-fixed-length-shuffles.ll | 8 +-
.../AArch64/sve-fixed-length-splat-vector.ll | 686 +-
.../CodeGen/AArch64/sve-fixed-length-stores.ll | 206 +-
.../CodeGen/AArch64/sve-fixed-length-subvector.ll | 403 +-
.../AArch64/sve-fixed-length-trunc-stores.ll | 299 +-
.../test/CodeGen/AArch64/sve-fixed-length-trunc.ll | 457 +-
.../AArch64/sve-fixed-length-vector-shuffle.ll | 945 +-
llvm/test/CodeGen/AArch64/sve-insert-vector.ll | 11 +
llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll | 48 +-
.../AMDGPU/GlobalISel/constant-bus-restriction.ll | 4 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll | 48 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll | 36 +-
.../legalize-llvm.amdgcn.image.sample.a16.ll | 1 +
.../AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll | 48 +-
.../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll | 115 +-
.../GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll | 1 +
.../GlobalISel/llvm.amdgcn.image.atomic.dim.ll | 1 +
.../llvm.amdgcn.image.gather4.a16.dim.ll | 1 +
.../GlobalISel/llvm.amdgcn.image.gather4.dim.ll | 1 +
.../GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll | 1 +
.../GlobalISel/llvm.amdgcn.image.getresinfo.ll | 1 +
.../GlobalISel/llvm.amdgcn.image.load.1d.d16.ll | 386 +-
.../AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll | 1 +
.../AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll | 85 +-
.../llvm.amdgcn.image.load.2darraymsaa.a16.ll | 97 +-
.../llvm.amdgcn.image.load.2darraymsaa.ll | 89 +-
.../GlobalISel/llvm.amdgcn.image.load.3d.a16.ll | 97 +-
.../AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll | 87 +-
.../GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll | 134 +
.../GlobalISel/llvm.amdgcn.image.sample.g16.ll | 129 +-
.../GlobalISel/llvm.amdgcn.image.store.2d.ll | 1 +
.../AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll | 139 +
.../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 379 +-
.../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp8.ll | 1 -
.../AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll | 102 +
.../AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll | 102 +
llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll | 36 +-
.../regbankselect-amdgcn.lds.direct.load.mir | 36 +
.../regbankselect-amdgcn.lds.param.load.mir | 36 +
llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll | 28 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll | 36 +-
.../CodeGen/AMDGPU/atomic_optimizations_buffer.ll | 4 +-
.../AMDGPU/atomic_optimizations_global_pointer.ll | 30 +-
.../AMDGPU/atomic_optimizations_local_pointer.ll | 41 +-
.../AMDGPU/atomic_optimizations_raw_buffer.ll | 4 +-
.../AMDGPU/atomic_optimizations_struct_buffer.ll | 4 +-
.../attr-amdgpu-flat-work-group-size-vgpr-limit.ll | 18 +-
llvm/test/CodeGen/AMDGPU/carryout-selection.ll | 57 +-
llvm/test/CodeGen/AMDGPU/frem.ll | 20 +-
llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll | 2 +-
llvm/test/CodeGen/AMDGPU/global-saddr-load.ll | 38 +-
llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll | 145 +
.../AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll | 70 +
.../AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll | 71 +
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll | 102 +
.../CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll | 31 +
.../CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll | 31 +
.../CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll | 60 +
.../CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll | 1 +
.../CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll | 262 +
.../CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll | 1 +
.../CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll | 1 +
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll | 1322 +--
.../AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll | 1 +
.../AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll | 1 +
.../AMDGPU/llvm.amdgcn.image.gather4.dim.ll | 1 +
.../CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll | 1 +
.../AMDGPU/llvm.amdgcn.image.load.a16.d16.ll | 1 +
.../CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.ll | 1 +
.../CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll | 133 +
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll | 54 +-
.../AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll | 206 +-
.../AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll | 212 +
.../AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll | 178 +
.../llvm.amdgcn.image.sample.cd.g16.encode.ll | 121 +
.../AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll | 121 +
.../AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll | 151 +-
.../CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll | 1247 ++-
.../AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll | 222 +-
.../CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll | 116 +-
.../AMDGPU/llvm.amdgcn.image.store.a16.d16.ll | 1 +
.../CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll | 1 +
.../CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll | 139 +
.../CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll | 246 +-
.../CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll | 41 +
.../CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll | 40 +
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll | 21 +-
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll | 102 +
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll | 102 +
llvm/test/CodeGen/AMDGPU/llvm.mulo.ll | 16 +-
llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll | 4 +-
.../AMDGPU/memory-legalizer-flat-nontemporal.ll | 12 +-
.../AMDGPU/memory-legalizer-flat-volatile.ll | 8 +-
.../test/CodeGen/AMDGPU/merge-image-load-gfx11.mir | 490 +
.../CodeGen/AMDGPU/merge-image-sample-gfx11.mir | 1013 ++
llvm/test/CodeGen/AMDGPU/offset-split-global.ll | 22 +-
.../CodeGen/AMDGPU/partial-forwarding-hazards.mir | 399 +
.../CodeGen/AMDGPU/promote-constOffset-to-imm.ll | 18 +-
llvm/test/CodeGen/AMDGPU/saddo.ll | 2 +-
.../stack-pointer-offset-relative-frameindex.ll | 4 +-
.../CodeGen/AMDGPU/trans-forwarding-hazards.mir | 334 +
llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll | 2 +-
llvm/test/CodeGen/AMDGPU/wave32.ll | 20 +-
llvm/test/CodeGen/DirectX/embed-dxil.ll | 34 +-
llvm/test/CodeGen/Hexagon/isel-memory-vNi1.ll | 2 +-
llvm/test/CodeGen/LoongArch/imm.ll | 8 +
llvm/test/CodeGen/PowerPC/LQ-STQ-32bit-offset.ll | 78 +
llvm/test/CodeGen/PowerPC/LQ-STQ.ll | 40 +
.../PowerPC/mtvsrc-mfvscr-PPCVSXSwapRemoval.ll | 37 +
.../CodeGen/PowerPC/ppc64-get-cache-line-size.ll | 6 +-
.../early-clobber-tied-def-subreg-liveness.ll | 118 +
.../early-clobber-tied-def-subreg-liveness.mir | 224 +
llvm/test/CodeGen/RISCV/machine-cp.mir | 34 +
llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll | 3 -
llvm/test/CodeGen/RISCV/rv64zbp.ll | 21 +-
.../CodeGen/RISCV/rvv/constant-folding-crash.ll | 8 +-
llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 84 +-
.../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 3 -
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 3 -
.../RISCV/rvv/fixed-vectors-calling-conv.ll | 3 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 6 +-
.../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 129 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 13 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 42 +-
.../RISCV/rvv/fixed-vectors-fp-interleave.ll | 16 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 48 +-
.../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 40 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 3 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 82 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 78 +-
.../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 27 +-
.../RISCV/rvv/fixed-vectors-int-interleave.ll | 16 +-
.../RISCV/rvv/fixed-vectors-int-shuffles.ll | 58 +-
.../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 2 -
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 43 +-
.../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 4 -
.../RISCV/rvv/fixed-vectors-masked-gather.ll | 1108 +--
.../RISCV/rvv/fixed-vectors-masked-scatter.ll | 1031 +--
.../RISCV/rvv/fixed-vectors-reduction-fp.ll | 15 +-
.../RISCV/rvv/fixed-vectors-reduction-int.ll | 48 +-
.../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 271 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll | 76 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll | 51 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll | 51 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll | 6 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll | 6 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 27 +-
.../CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll | 18 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 12 +-
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll | 24 +-
.../test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll | 24 +-
llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 2 +-
llvm/test/CodeGen/RISCV/rvv/implicit-def-copy.ll | 23 +
llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 4 +-
llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 13 +-
llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll | 122 +-
llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 5 +-
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir | 3 +-
llvm/test/CodeGen/Thumb2/mve-fpclamptosat_vec.ll | 80 +-
llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll | 126 +-
llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll | 176 +-
llvm/test/CodeGen/X86/avx-vperm2x128.ll | 2 +-
llvm/test/CodeGen/X86/avx512-hadd-hsub.ll | 5 +-
llvm/test/CodeGen/X86/combine-shl.ll | 2 +-
llvm/test/CodeGen/X86/cvt16-2.ll | 8 +-
llvm/test/CodeGen/X86/cvt16.ll | 8 +-
llvm/test/CodeGen/X86/extractelement-load.ll | 48 +-
llvm/test/CodeGen/X86/fpclamptosat_vec.ll | 890 +-
llvm/test/CodeGen/X86/half-constrained.ll | 3 +-
llvm/test/CodeGen/X86/half.ll | 355 +-
llvm/test/CodeGen/X86/i64-to-float.ll | 47 +-
llvm/test/CodeGen/X86/is_fpclass.ll | 4 +-
llvm/test/CodeGen/X86/known-bits-vector.ll | 428 +-
llvm/test/CodeGen/X86/known-signbits-vector.ll | 36 +-
llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll | 949 +-
llvm/test/CodeGen/X86/masked_store_trunc_usat.ll | 459 +-
llvm/test/CodeGen/X86/nontemporal-3.ll | 254 +-
llvm/test/CodeGen/X86/pr14161.ll | 3 +-
llvm/test/CodeGen/X86/psubus.ll | 186 +-
llvm/test/CodeGen/X86/sar_fold.ll | 9 +
llvm/test/CodeGen/X86/sar_fold64.ll | 12 +-
llvm/test/CodeGen/X86/sat-add.ll | 35 +-
llvm/test/CodeGen/X86/select-of-fp-constants.ll | 4 +-
.../CodeGen/X86/shuffle-strided-with-offset-128.ll | 20 +-
llvm/test/CodeGen/X86/trap.ll | 1 +
llvm/test/CodeGen/X86/ubsantrap.ll | 1 +
llvm/test/CodeGen/X86/udiv_fix_sat.ll | 70 +-
.../CodeGen/X86/urem-seteq-vec-tautological.ll | 22 +-
llvm/test/CodeGen/X86/vec_setcc-2.ll | 56 +-
.../X86/vector-interleaved-load-i8-stride-4.ll | 48 +-
.../X86/vector-interleaved-load-i8-stride-6.ll | 815 +-
.../X86/vector-interleaved-store-i8-stride-6.ll | 331 +-
llvm/test/CodeGen/X86/vector-partial-undef.ll | 2 +-
llvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll | 9762 +++++++++-----------
llvm/test/CodeGen/X86/vector-shift-ashr-128.ll | 4 +-
llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 2 +-
llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 2 +-
llvm/test/CodeGen/X86/vector-shift-lshr-256.ll | 2 +-
llvm/test/CodeGen/X86/vector-shift-shl-128.ll | 2 +-
llvm/test/CodeGen/X86/vector-shift-shl-256.ll | 2 +-
llvm/test/CodeGen/X86/vector-shuffle-combining.ll | 30 +-
llvm/test/CodeGen/X86/vector-trunc-packus.ll | 2044 ++--
llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 3262 ++++---
llvm/test/CodeGen/X86/vector-trunc-usat.ll | 1576 ++--
llvm/test/CodeGen/X86/vselect-zero.ll | 10 +-
llvm/test/CodeGen/X86/vsplit-and.ll | 2 +-
.../DebugInfo/Generic/containing-type-extension.ll | 2 +-
llvm/test/DebugInfo/Generic/tu-composite.ll | 4 +-
.../X86/containing-type-extension-rust.ll | 2 +-
llvm/test/Instrumentation/AddressSanitizer/ps4.ll | 3 +-
.../Instrumentation/InstrProfiling/profiling.ll | 12 +-
llvm/test/MC/AArch64/SME/addha-u32.s | 2 +-
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llvm/test/MC/AArch64/SME/addspl.s | 2 +-
llvm/test/MC/AArch64/SME/addsvl.s | 2 +-
llvm/test/MC/AArch64/SME/addva-u32.s | 2 +-
llvm/test/MC/AArch64/SME/addva-u64.s | 2 +-
llvm/test/MC/AArch64/SME/bfmopa.s | 2 +-
llvm/test/MC/AArch64/SME/bfmops.s | 2 +-
llvm/test/MC/AArch64/SME/fmopa-fp64.s | 2 +-
llvm/test/MC/AArch64/SME/fmopa.s | 2 +-
llvm/test/MC/AArch64/SME/fmops-fp64.s | 2 +-
llvm/test/MC/AArch64/SME/fmops.s | 2 +-
llvm/test/MC/AArch64/SME/ld1b.s | 2 +-
llvm/test/MC/AArch64/SME/ld1d.s | 2 +-
llvm/test/MC/AArch64/SME/ld1h.s | 2 +-
llvm/test/MC/AArch64/SME/ld1q.s | 2 +-
llvm/test/MC/AArch64/SME/ld1w.s | 2 +-
llvm/test/MC/AArch64/SME/ldr.s | 2 +-
llvm/test/MC/AArch64/SME/mova.s | 2 +-
llvm/test/MC/AArch64/SME/psel.s | 2 +-
llvm/test/MC/AArch64/SME/rdsvl.s | 2 +-
llvm/test/MC/AArch64/SME/revd.s | 2 +-
llvm/test/MC/AArch64/SME/sclamp.s | 2 +-
llvm/test/MC/AArch64/SME/smopa-32.s | 2 +-
llvm/test/MC/AArch64/SME/smopa-64.s | 2 +-
llvm/test/MC/AArch64/SME/smops-32.s | 2 +-
llvm/test/MC/AArch64/SME/smops-64.s | 2 +-
llvm/test/MC/AArch64/SME/smstart.s | 2 +-
llvm/test/MC/AArch64/SME/smstop.s | 2 +-
llvm/test/MC/AArch64/SME/st1b.s | 2 +-
llvm/test/MC/AArch64/SME/st1d.s | 2 +-
llvm/test/MC/AArch64/SME/st1h.s | 2 +-
llvm/test/MC/AArch64/SME/st1q.s | 2 +-
llvm/test/MC/AArch64/SME/st1w.s | 2 +-
llvm/test/MC/AArch64/SME/str.s | 2 +-
llvm/test/MC/AArch64/SME/sumopa-32.s | 2 +-
llvm/test/MC/AArch64/SME/sumopa-64.s | 2 +-
llvm/test/MC/AArch64/SME/sumops-32.s | 2 +-
llvm/test/MC/AArch64/SME/sumops-64.s | 2 +-
llvm/test/MC/AArch64/SME/system-regs-mpam.s | 2 +-
llvm/test/MC/AArch64/SME/system-regs.s | 2 +-
llvm/test/MC/AArch64/SME/uclamp.s | 2 +-
llvm/test/MC/AArch64/SME/umopa-32.s | 2 +-
llvm/test/MC/AArch64/SME/umopa-64.s | 2 +-
llvm/test/MC/AArch64/SME/umops-32.s | 2 +-
llvm/test/MC/AArch64/SME/umops-64.s | 2 +-
llvm/test/MC/AArch64/SME/usmopa-32.s | 2 +-
llvm/test/MC/AArch64/SME/usmopa-64.s | 2 +-
llvm/test/MC/AArch64/SME/usmops-32.s | 2 +-
llvm/test/MC/AArch64/SME/usmops-64.s | 2 +-
llvm/test/MC/AArch64/SME/zero.s | 2 +-
llvm/test/MC/AArch64/SVE/abs.s | 2 +-
llvm/test/MC/AArch64/SVE/add.s | 2 +-
llvm/test/MC/AArch64/SVE/addpl.s | 2 +-
llvm/test/MC/AArch64/SVE/addvl.s | 2 +-
llvm/test/MC/AArch64/SVE/adr.s | 2 +-
llvm/test/MC/AArch64/SVE/and.s | 2 +-
llvm/test/MC/AArch64/SVE/ands.s | 2 +-
llvm/test/MC/AArch64/SVE/andv.s | 2 +-
llvm/test/MC/AArch64/SVE/asr.s | 2 +-
llvm/test/MC/AArch64/SVE/asrd.s | 2 +-
llvm/test/MC/AArch64/SVE/asrr.s | 2 +-
llvm/test/MC/AArch64/SVE/bic.s | 2 +-
llvm/test/MC/AArch64/SVE/bics.s | 2 +-
llvm/test/MC/AArch64/SVE/brka.s | 2 +-
llvm/test/MC/AArch64/SVE/brkas.s | 2 +-
llvm/test/MC/AArch64/SVE/brkb.s | 2 +-
llvm/test/MC/AArch64/SVE/brkbs.s | 2 +-
llvm/test/MC/AArch64/SVE/brkn.s | 2 +-
llvm/test/MC/AArch64/SVE/brkns.s | 2 +-
llvm/test/MC/AArch64/SVE/brkpa.s | 2 +-
llvm/test/MC/AArch64/SVE/brkpas.s | 2 +-
llvm/test/MC/AArch64/SVE/brkpb.s | 2 +-
llvm/test/MC/AArch64/SVE/brkpbs.s | 2 +-
llvm/test/MC/AArch64/SVE/clasta.s | 2 +-
llvm/test/MC/AArch64/SVE/clastb.s | 2 +-
llvm/test/MC/AArch64/SVE/cls.s | 2 +-
llvm/test/MC/AArch64/SVE/clz.s | 2 +-
llvm/test/MC/AArch64/SVE/cmpeq.s | 2 +-
llvm/test/MC/AArch64/SVE/cmpge.s | 2 +-
llvm/test/MC/AArch64/SVE/cmpgt.s | 2 +-
llvm/test/MC/AArch64/SVE/cmphi.s | 2 +-
llvm/test/MC/AArch64/SVE/cmphs.s | 2 +-
llvm/test/MC/AArch64/SVE/cmple.s | 2 +-
llvm/test/MC/AArch64/SVE/cmplo.s | 2 +-
llvm/test/MC/AArch64/SVE/cmpls.s | 2 +-
llvm/test/MC/AArch64/SVE/cmplt.s | 2 +-
llvm/test/MC/AArch64/SVE/cmpne.s | 2 +-
llvm/test/MC/AArch64/SVE/cnot.s | 2 +-
llvm/test/MC/AArch64/SVE/cnt.s | 2 +-
llvm/test/MC/AArch64/SVE/cntb.s | 2 +-
llvm/test/MC/AArch64/SVE/cntd.s | 2 +-
llvm/test/MC/AArch64/SVE/cnth.s | 2 +-
llvm/test/MC/AArch64/SVE/cntp.s | 2 +-
llvm/test/MC/AArch64/SVE/cntw.s | 2 +-
llvm/test/MC/AArch64/SVE/compact.s | 2 +-
llvm/test/MC/AArch64/SVE/cpy.s | 2 +-
llvm/test/MC/AArch64/SVE/ctermeq.s | 2 +-
llvm/test/MC/AArch64/SVE/ctermne.s | 2 +-
llvm/test/MC/AArch64/SVE/decb.s | 2 +-
llvm/test/MC/AArch64/SVE/decd.s | 2 +-
llvm/test/MC/AArch64/SVE/dech.s | 2 +-
llvm/test/MC/AArch64/SVE/decp.s | 2 +-
llvm/test/MC/AArch64/SVE/decw.s | 2 +-
llvm/test/MC/AArch64/SVE/dup.s | 2 +-
llvm/test/MC/AArch64/SVE/dupm.s | 2 +-
llvm/test/MC/AArch64/SVE/eon.s | 2 +-
llvm/test/MC/AArch64/SVE/eor.s | 2 +-
llvm/test/MC/AArch64/SVE/eors.s | 2 +-
llvm/test/MC/AArch64/SVE/eorv.s | 2 +-
llvm/test/MC/AArch64/SVE/ext.s | 2 +-
llvm/test/MC/AArch64/SVE/fabd.s | 2 +-
llvm/test/MC/AArch64/SVE/fabs.s | 2 +-
llvm/test/MC/AArch64/SVE/facge.s | 2 +-
llvm/test/MC/AArch64/SVE/facgt.s | 2 +-
llvm/test/MC/AArch64/SVE/facle.s | 2 +-
llvm/test/MC/AArch64/SVE/faclt.s | 2 +-
llvm/test/MC/AArch64/SVE/fadd.s | 2 +-
llvm/test/MC/AArch64/SVE/fadda.s | 2 +-
llvm/test/MC/AArch64/SVE/faddv.s | 2 +-
llvm/test/MC/AArch64/SVE/fcadd.s | 2 +-
llvm/test/MC/AArch64/SVE/fcmeq.s | 2 +-
llvm/test/MC/AArch64/SVE/fcmge.s | 2 +-
llvm/test/MC/AArch64/SVE/fcmgt.s | 2 +-
llvm/test/MC/AArch64/SVE/fcmla.s | 2 +-
llvm/test/MC/AArch64/SVE/fcmle.s | 2 +-
llvm/test/MC/AArch64/SVE/fcmlt.s | 2 +-
llvm/test/MC/AArch64/SVE/fcmne.s | 2 +-
llvm/test/MC/AArch64/SVE/fcmuo.s | 2 +-
llvm/test/MC/AArch64/SVE/fcpy.s | 2 +-
llvm/test/MC/AArch64/SVE/fcvt.s | 2 +-
llvm/test/MC/AArch64/SVE/fcvtzs.s | 2 +-
llvm/test/MC/AArch64/SVE/fcvtzu.s | 2 +-
llvm/test/MC/AArch64/SVE/fdiv.s | 2 +-
llvm/test/MC/AArch64/SVE/fdivr.s | 2 +-
llvm/test/MC/AArch64/SVE/fdup.s | 2 +-
llvm/test/MC/AArch64/SVE/fexpa.s | 2 +-
llvm/test/MC/AArch64/SVE/fmad.s | 2 +-
llvm/test/MC/AArch64/SVE/fmax.s | 2 +-
llvm/test/MC/AArch64/SVE/fmaxnm.s | 2 +-
llvm/test/MC/AArch64/SVE/fmaxnmv.s | 2 +-
llvm/test/MC/AArch64/SVE/fmaxv.s | 2 +-
llvm/test/MC/AArch64/SVE/fmin.s | 2 +-
llvm/test/MC/AArch64/SVE/fminnm.s | 2 +-
llvm/test/MC/AArch64/SVE/fminnmv.s | 2 +-
llvm/test/MC/AArch64/SVE/fminv.s | 2 +-
llvm/test/MC/AArch64/SVE/fmla.s | 2 +-
llvm/test/MC/AArch64/SVE/fmls.s | 2 +-
llvm/test/MC/AArch64/SVE/fmov.s | 2 +-
llvm/test/MC/AArch64/SVE/fmsb.s | 2 +-
llvm/test/MC/AArch64/SVE/fmul.s | 2 +-
llvm/test/MC/AArch64/SVE/fmulx.s | 2 +-
llvm/test/MC/AArch64/SVE/fneg.s | 2 +-
llvm/test/MC/AArch64/SVE/fnmad.s | 2 +-
llvm/test/MC/AArch64/SVE/fnmla.s | 2 +-
llvm/test/MC/AArch64/SVE/fnmls.s | 2 +-
llvm/test/MC/AArch64/SVE/fnmsb.s | 2 +-
llvm/test/MC/AArch64/SVE/frecpe.s | 2 +-
llvm/test/MC/AArch64/SVE/frecps.s | 2 +-
llvm/test/MC/AArch64/SVE/frecpx.s | 2 +-
llvm/test/MC/AArch64/SVE/frinta.s | 2 +-
llvm/test/MC/AArch64/SVE/frinti.s | 2 +-
llvm/test/MC/AArch64/SVE/frintm.s | 2 +-
llvm/test/MC/AArch64/SVE/frintn.s | 2 +-
llvm/test/MC/AArch64/SVE/frintp.s | 2 +-
llvm/test/MC/AArch64/SVE/frintx.s | 2 +-
llvm/test/MC/AArch64/SVE/frintz.s | 2 +-
llvm/test/MC/AArch64/SVE/frsqrte.s | 2 +-
llvm/test/MC/AArch64/SVE/frsqrts.s | 2 +-
llvm/test/MC/AArch64/SVE/fscale.s | 2 +-
llvm/test/MC/AArch64/SVE/fsqrt.s | 2 +-
llvm/test/MC/AArch64/SVE/fsub.s | 2 +-
llvm/test/MC/AArch64/SVE/fsubr.s | 2 +-
llvm/test/MC/AArch64/SVE/ftmad.s | 2 +-
llvm/test/MC/AArch64/SVE/ftsmul.s | 2 +-
llvm/test/MC/AArch64/SVE/ftssel.s | 2 +-
llvm/test/MC/AArch64/SVE/incb.s | 2 +-
llvm/test/MC/AArch64/SVE/incd.s | 2 +-
llvm/test/MC/AArch64/SVE/inch.s | 2 +-
llvm/test/MC/AArch64/SVE/incp.s | 2 +-
llvm/test/MC/AArch64/SVE/incw.s | 2 +-
llvm/test/MC/AArch64/SVE/index.s | 2 +-
llvm/test/MC/AArch64/SVE/insr.s | 2 +-
llvm/test/MC/AArch64/SVE/lasta.s | 2 +-
llvm/test/MC/AArch64/SVE/lastb.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1b-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1b.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1d-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1d.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1h-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1h.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rb.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rd.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rh.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rqb.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rqd.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rqh.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rqw.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rsb.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rsh.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rsw.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1rw.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1sb-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1sb.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1sh-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1sh.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1sw-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1sw.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1w-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/ld1w.s | 2 +-
llvm/test/MC/AArch64/SVE/ld2b.s | 2 +-
llvm/test/MC/AArch64/SVE/ld2d.s | 2 +-
llvm/test/MC/AArch64/SVE/ld2h.s | 2 +-
llvm/test/MC/AArch64/SVE/ld2w.s | 2 +-
llvm/test/MC/AArch64/SVE/ld3b.s | 2 +-
llvm/test/MC/AArch64/SVE/ld3d.s | 2 +-
llvm/test/MC/AArch64/SVE/ld3h.s | 2 +-
llvm/test/MC/AArch64/SVE/ld3w.s | 2 +-
llvm/test/MC/AArch64/SVE/ld4b.s | 2 +-
llvm/test/MC/AArch64/SVE/ld4d.s | 2 +-
llvm/test/MC/AArch64/SVE/ld4h.s | 2 +-
llvm/test/MC/AArch64/SVE/ld4w.s | 2 +-
llvm/test/MC/AArch64/SVE/ldff1b.s | 2 +-
llvm/test/MC/AArch64/SVE/ldff1d.s | 2 +-
llvm/test/MC/AArch64/SVE/ldff1h.s | 2 +-
llvm/test/MC/AArch64/SVE/ldff1sb.s | 2 +-
llvm/test/MC/AArch64/SVE/ldff1sh.s | 2 +-
llvm/test/MC/AArch64/SVE/ldff1sw.s | 2 +-
llvm/test/MC/AArch64/SVE/ldff1w.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnf1b.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnf1d.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnf1h.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnf1sb.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnf1sh.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnf1sw.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnf1w.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnt1b.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnt1d.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnt1h.s | 2 +-
llvm/test/MC/AArch64/SVE/ldnt1w.s | 2 +-
llvm/test/MC/AArch64/SVE/ldr.s | 2 +-
llvm/test/MC/AArch64/SVE/lsl.s | 2 +-
llvm/test/MC/AArch64/SVE/lslr.s | 2 +-
llvm/test/MC/AArch64/SVE/lsr.s | 2 +-
llvm/test/MC/AArch64/SVE/lsrr.s | 2 +-
llvm/test/MC/AArch64/SVE/mad.s | 2 +-
llvm/test/MC/AArch64/SVE/matrix-multiply-fp32.s | 2 +-
llvm/test/MC/AArch64/SVE/matrix-multiply-fp64.s | 2 +-
llvm/test/MC/AArch64/SVE/matrix-multiply-int8.s | 2 +-
llvm/test/MC/AArch64/SVE/mla.s | 2 +-
llvm/test/MC/AArch64/SVE/mls.s | 2 +-
llvm/test/MC/AArch64/SVE/mov.s | 2 +-
llvm/test/MC/AArch64/SVE/movprfx.s | 2 +-
llvm/test/MC/AArch64/SVE/movs.s | 2 +-
llvm/test/MC/AArch64/SVE/msb.s | 2 +-
llvm/test/MC/AArch64/SVE/mul.s | 2 +-
llvm/test/MC/AArch64/SVE/nand.s | 2 +-
llvm/test/MC/AArch64/SVE/nands.s | 2 +-
llvm/test/MC/AArch64/SVE/neg.s | 2 +-
llvm/test/MC/AArch64/SVE/nor.s | 2 +-
llvm/test/MC/AArch64/SVE/nors.s | 2 +-
llvm/test/MC/AArch64/SVE/not.s | 2 +-
llvm/test/MC/AArch64/SVE/nots.s | 2 +-
llvm/test/MC/AArch64/SVE/orn.s | 2 +-
llvm/test/MC/AArch64/SVE/orns.s | 2 +-
llvm/test/MC/AArch64/SVE/orr.s | 2 +-
llvm/test/MC/AArch64/SVE/orrs.s | 2 +-
llvm/test/MC/AArch64/SVE/orv.s | 2 +-
llvm/test/MC/AArch64/SVE/pfalse.s | 2 +-
llvm/test/MC/AArch64/SVE/pfirst.s | 2 +-
llvm/test/MC/AArch64/SVE/pnext.s | 2 +-
llvm/test/MC/AArch64/SVE/prfb-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/prfb.s | 2 +-
llvm/test/MC/AArch64/SVE/prfd-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/prfd.s | 2 +-
llvm/test/MC/AArch64/SVE/prfh-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/prfh.s | 2 +-
llvm/test/MC/AArch64/SVE/prfw-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/prfw.s | 2 +-
llvm/test/MC/AArch64/SVE/ptest.s | 2 +-
llvm/test/MC/AArch64/SVE/ptrue.s | 2 +-
llvm/test/MC/AArch64/SVE/ptrues.s | 2 +-
llvm/test/MC/AArch64/SVE/punpkhi.s | 2 +-
llvm/test/MC/AArch64/SVE/punpklo.s | 2 +-
llvm/test/MC/AArch64/SVE/rbit.s | 2 +-
llvm/test/MC/AArch64/SVE/rdffr.s | 2 +-
llvm/test/MC/AArch64/SVE/rdffrs.s | 2 +-
llvm/test/MC/AArch64/SVE/rdvl.s | 2 +-
llvm/test/MC/AArch64/SVE/rev.s | 2 +-
llvm/test/MC/AArch64/SVE/revb.s | 2 +-
llvm/test/MC/AArch64/SVE/revh.s | 2 +-
llvm/test/MC/AArch64/SVE/revw.s | 2 +-
llvm/test/MC/AArch64/SVE/sabd.s | 2 +-
llvm/test/MC/AArch64/SVE/saddv.s | 2 +-
llvm/test/MC/AArch64/SVE/scvtf.s | 2 +-
llvm/test/MC/AArch64/SVE/sdiv.s | 2 +-
llvm/test/MC/AArch64/SVE/sdivr.s | 2 +-
llvm/test/MC/AArch64/SVE/sdot.s | 2 +-
llvm/test/MC/AArch64/SVE/sel.s | 2 +-
llvm/test/MC/AArch64/SVE/setffr.s | 2 +-
llvm/test/MC/AArch64/SVE/smax.s | 2 +-
llvm/test/MC/AArch64/SVE/smaxv.s | 2 +-
llvm/test/MC/AArch64/SVE/smin.s | 2 +-
llvm/test/MC/AArch64/SVE/sminv.s | 2 +-
llvm/test/MC/AArch64/SVE/smulh.s | 2 +-
llvm/test/MC/AArch64/SVE/splice.s | 2 +-
llvm/test/MC/AArch64/SVE/sqadd.s | 2 +-
llvm/test/MC/AArch64/SVE/sqdecb.s | 2 +-
llvm/test/MC/AArch64/SVE/sqdecd.s | 2 +-
llvm/test/MC/AArch64/SVE/sqdech.s | 2 +-
llvm/test/MC/AArch64/SVE/sqdecp.s | 2 +-
llvm/test/MC/AArch64/SVE/sqdecw.s | 2 +-
llvm/test/MC/AArch64/SVE/sqincb.s | 2 +-
llvm/test/MC/AArch64/SVE/sqincd.s | 2 +-
llvm/test/MC/AArch64/SVE/sqinch.s | 2 +-
llvm/test/MC/AArch64/SVE/sqincp.s | 2 +-
llvm/test/MC/AArch64/SVE/sqincw.s | 2 +-
llvm/test/MC/AArch64/SVE/sqsub.s | 2 +-
llvm/test/MC/AArch64/SVE/st1b-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/st1b.s | 2 +-
llvm/test/MC/AArch64/SVE/st1d-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/st1d.s | 2 +-
llvm/test/MC/AArch64/SVE/st1h-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/st1h.s | 2 +-
llvm/test/MC/AArch64/SVE/st1w-sve-only.s | 2 +-
llvm/test/MC/AArch64/SVE/st1w.s | 2 +-
llvm/test/MC/AArch64/SVE/st2b.s | 2 +-
llvm/test/MC/AArch64/SVE/st2d.s | 2 +-
llvm/test/MC/AArch64/SVE/st2h.s | 2 +-
llvm/test/MC/AArch64/SVE/st2w.s | 2 +-
llvm/test/MC/AArch64/SVE/st3b.s | 2 +-
llvm/test/MC/AArch64/SVE/st3d.s | 2 +-
llvm/test/MC/AArch64/SVE/st3h.s | 2 +-
llvm/test/MC/AArch64/SVE/st3w.s | 2 +-
llvm/test/MC/AArch64/SVE/st4b.s | 2 +-
llvm/test/MC/AArch64/SVE/st4d.s | 2 +-
llvm/test/MC/AArch64/SVE/st4h.s | 2 +-
llvm/test/MC/AArch64/SVE/st4w.s | 2 +-
llvm/test/MC/AArch64/SVE/stnt1b.s | 2 +-
llvm/test/MC/AArch64/SVE/stnt1d.s | 2 +-
llvm/test/MC/AArch64/SVE/stnt1h.s | 2 +-
llvm/test/MC/AArch64/SVE/stnt1w.s | 2 +-
llvm/test/MC/AArch64/SVE/str.s | 2 +-
llvm/test/MC/AArch64/SVE/sub.s | 2 +-
llvm/test/MC/AArch64/SVE/subr.s | 2 +-
llvm/test/MC/AArch64/SVE/sunpkhi.s | 2 +-
llvm/test/MC/AArch64/SVE/sunpklo.s | 2 +-
llvm/test/MC/AArch64/SVE/sxtb.s | 2 +-
llvm/test/MC/AArch64/SVE/sxth.s | 2 +-
llvm/test/MC/AArch64/SVE/sxtw.s | 2 +-
llvm/test/MC/AArch64/SVE/system-regs.s | 2 +-
llvm/test/MC/AArch64/SVE/tbl.s | 2 +-
llvm/test/MC/AArch64/SVE/trn1.s | 2 +-
llvm/test/MC/AArch64/SVE/trn2.s | 2 +-
llvm/test/MC/AArch64/SVE/uabd.s | 2 +-
llvm/test/MC/AArch64/SVE/uaddv.s | 2 +-
llvm/test/MC/AArch64/SVE/ucvtf.s | 2 +-
llvm/test/MC/AArch64/SVE/udiv.s | 2 +-
llvm/test/MC/AArch64/SVE/udivr.s | 2 +-
llvm/test/MC/AArch64/SVE/udot.s | 2 +-
llvm/test/MC/AArch64/SVE/umax.s | 2 +-
llvm/test/MC/AArch64/SVE/umaxv.s | 2 +-
llvm/test/MC/AArch64/SVE/umin.s | 2 +-
llvm/test/MC/AArch64/SVE/uminv.s | 2 +-
llvm/test/MC/AArch64/SVE/umulh.s | 2 +-
llvm/test/MC/AArch64/SVE/uqadd.s | 2 +-
llvm/test/MC/AArch64/SVE/uqdecb.s | 2 +-
llvm/test/MC/AArch64/SVE/uqdecd.s | 2 +-
llvm/test/MC/AArch64/SVE/uqdech.s | 2 +-
llvm/test/MC/AArch64/SVE/uqdecp.s | 2 +-
llvm/test/MC/AArch64/SVE/uqdecw.s | 2 +-
llvm/test/MC/AArch64/SVE/uqincb.s | 2 +-
llvm/test/MC/AArch64/SVE/uqincd.s | 2 +-
llvm/test/MC/AArch64/SVE/uqinch.s | 2 +-
llvm/test/MC/AArch64/SVE/uqincp.s | 2 +-
llvm/test/MC/AArch64/SVE/uqincw.s | 2 +-
llvm/test/MC/AArch64/SVE/uqsub.s | 2 +-
llvm/test/MC/AArch64/SVE/uunpkhi.s | 2 +-
llvm/test/MC/AArch64/SVE/uunpklo.s | 2 +-
llvm/test/MC/AArch64/SVE/uxtb.s | 2 +-
llvm/test/MC/AArch64/SVE/uxth.s | 2 +-
llvm/test/MC/AArch64/SVE/uxtw.s | 2 +-
llvm/test/MC/AArch64/SVE/uzp1.s | 2 +-
llvm/test/MC/AArch64/SVE/uzp2.s | 2 +-
llvm/test/MC/AArch64/SVE/whilele.s | 2 +-
llvm/test/MC/AArch64/SVE/whilelo.s | 2 +-
llvm/test/MC/AArch64/SVE/whilels.s | 2 +-
llvm/test/MC/AArch64/SVE/whilelt.s | 2 +-
llvm/test/MC/AArch64/SVE/wrffr.s | 2 +-
llvm/test/MC/AArch64/SVE/zip1.s | 2 +-
llvm/test/MC/AArch64/SVE/zip2.s | 2 +-
llvm/test/MC/AArch64/SVE2/adclb.s | 2 +-
llvm/test/MC/AArch64/SVE2/adclt.s | 2 +-
llvm/test/MC/AArch64/SVE2/addhnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/addhnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/addp.s | 2 +-
llvm/test/MC/AArch64/SVE2/aesd.s | 2 +-
llvm/test/MC/AArch64/SVE2/aese.s | 2 +-
llvm/test/MC/AArch64/SVE2/aesimc.s | 2 +-
llvm/test/MC/AArch64/SVE2/aesmc.s | 2 +-
llvm/test/MC/AArch64/SVE2/bcax.s | 2 +-
llvm/test/MC/AArch64/SVE2/bdep.s | 2 +-
llvm/test/MC/AArch64/SVE2/bext.s | 2 +-
llvm/test/MC/AArch64/SVE2/bgrp.s | 2 +-
llvm/test/MC/AArch64/SVE2/bsl.s | 2 +-
llvm/test/MC/AArch64/SVE2/bsl1n.s | 2 +-
llvm/test/MC/AArch64/SVE2/bsl2n.s | 2 +-
llvm/test/MC/AArch64/SVE2/cadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/cdot.s | 2 +-
llvm/test/MC/AArch64/SVE2/cmla.s | 2 +-
llvm/test/MC/AArch64/SVE2/eor3.s | 2 +-
llvm/test/MC/AArch64/SVE2/eorbt.s | 2 +-
llvm/test/MC/AArch64/SVE2/eortb.s | 2 +-
llvm/test/MC/AArch64/SVE2/ext.s | 2 +-
llvm/test/MC/AArch64/SVE2/faddp.s | 2 +-
llvm/test/MC/AArch64/SVE2/fcvtlt.s | 2 +-
llvm/test/MC/AArch64/SVE2/fcvtnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/fcvtx.s | 2 +-
llvm/test/MC/AArch64/SVE2/fcvtxnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/flogb.s | 2 +-
llvm/test/MC/AArch64/SVE2/fmaxnmp.s | 2 +-
llvm/test/MC/AArch64/SVE2/fmaxp.s | 2 +-
llvm/test/MC/AArch64/SVE2/fminnmp.s | 2 +-
llvm/test/MC/AArch64/SVE2/fminp.s | 2 +-
llvm/test/MC/AArch64/SVE2/fmlalb.s | 2 +-
llvm/test/MC/AArch64/SVE2/fmlalt.s | 2 +-
llvm/test/MC/AArch64/SVE2/fmlslb.s | 2 +-
llvm/test/MC/AArch64/SVE2/fmlslt.s | 2 +-
llvm/test/MC/AArch64/SVE2/histcnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/histseg.s | 2 +-
llvm/test/MC/AArch64/SVE2/ldnt1b.s | 2 +-
llvm/test/MC/AArch64/SVE2/ldnt1d.s | 2 +-
llvm/test/MC/AArch64/SVE2/ldnt1h.s | 2 +-
llvm/test/MC/AArch64/SVE2/ldnt1sb.s | 2 +-
llvm/test/MC/AArch64/SVE2/ldnt1sh.s | 2 +-
llvm/test/MC/AArch64/SVE2/ldnt1sw.s | 2 +-
llvm/test/MC/AArch64/SVE2/ldnt1w.s | 2 +-
llvm/test/MC/AArch64/SVE2/match.s | 2 +-
llvm/test/MC/AArch64/SVE2/mla.s | 2 +-
llvm/test/MC/AArch64/SVE2/mls.s | 2 +-
llvm/test/MC/AArch64/SVE2/mul.s | 2 +-
llvm/test/MC/AArch64/SVE2/nbsl.s | 2 +-
llvm/test/MC/AArch64/SVE2/nmatch.s | 2 +-
llvm/test/MC/AArch64/SVE2/pmul.s | 2 +-
llvm/test/MC/AArch64/SVE2/pmullb-128.s | 2 +-
llvm/test/MC/AArch64/SVE2/pmullb.s | 2 +-
llvm/test/MC/AArch64/SVE2/pmullt-128.s | 2 +-
llvm/test/MC/AArch64/SVE2/pmullt.s | 2 +-
llvm/test/MC/AArch64/SVE2/raddhnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/raddhnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/rax1.s | 2 +-
llvm/test/MC/AArch64/SVE2/rshrnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/rshrnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/rsubhnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/rsubhnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/saba.s | 2 +-
llvm/test/MC/AArch64/SVE2/sabalb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sabalt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sabdlb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sabdlt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sadalp.s | 2 +-
llvm/test/MC/AArch64/SVE2/saddlb.s | 2 +-
llvm/test/MC/AArch64/SVE2/saddlbt.s | 2 +-
llvm/test/MC/AArch64/SVE2/saddlt.s | 2 +-
llvm/test/MC/AArch64/SVE2/saddwb.s | 2 +-
llvm/test/MC/AArch64/SVE2/saddwt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sbclb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sbclt.s | 2 +-
llvm/test/MC/AArch64/SVE2/shadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/shrnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/shrnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/shsub.s | 2 +-
llvm/test/MC/AArch64/SVE2/shsubr.s | 2 +-
llvm/test/MC/AArch64/SVE2/sli.s | 2 +-
llvm/test/MC/AArch64/SVE2/sm4e.s | 2 +-
llvm/test/MC/AArch64/SVE2/sm4ekey.s | 2 +-
llvm/test/MC/AArch64/SVE2/smaxp.s | 2 +-
llvm/test/MC/AArch64/SVE2/sminp.s | 2 +-
llvm/test/MC/AArch64/SVE2/smlalb.s | 2 +-
llvm/test/MC/AArch64/SVE2/smlalt.s | 2 +-
llvm/test/MC/AArch64/SVE2/smlslb.s | 2 +-
llvm/test/MC/AArch64/SVE2/smlslt.s | 2 +-
llvm/test/MC/AArch64/SVE2/smulh.s | 2 +-
llvm/test/MC/AArch64/SVE2/smullb.s | 2 +-
llvm/test/MC/AArch64/SVE2/smullt.s | 2 +-
llvm/test/MC/AArch64/SVE2/splice.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqabs.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqcadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmlalb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmlalbt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmlalt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmlslb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmlslbt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmlslt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmulh.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmullb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqdmullt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqneg.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrdcmlah.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrdmlah.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrdmlsh.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrdmulh.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrshl.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrshlr.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrshrnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrshrnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrshrunb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqrshrunt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqshl.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqshlr.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqshlu.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqshrnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqshrnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqshrunb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqshrunt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqsub.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqsubr.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqxtnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqxtnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqxtunb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sqxtunt.s | 2 +-
llvm/test/MC/AArch64/SVE2/srhadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/sri.s | 2 +-
llvm/test/MC/AArch64/SVE2/srshl.s | 2 +-
llvm/test/MC/AArch64/SVE2/srshlr.s | 2 +-
llvm/test/MC/AArch64/SVE2/srshr.s | 2 +-
llvm/test/MC/AArch64/SVE2/srsra.s | 2 +-
llvm/test/MC/AArch64/SVE2/sshllb.s | 2 +-
llvm/test/MC/AArch64/SVE2/sshllt.s | 2 +-
llvm/test/MC/AArch64/SVE2/ssra.s | 2 +-
llvm/test/MC/AArch64/SVE2/ssublb.s | 2 +-
llvm/test/MC/AArch64/SVE2/ssublbt.s | 2 +-
llvm/test/MC/AArch64/SVE2/ssublt.s | 2 +-
llvm/test/MC/AArch64/SVE2/ssubltb.s | 2 +-
llvm/test/MC/AArch64/SVE2/ssubwb.s | 2 +-
llvm/test/MC/AArch64/SVE2/ssubwt.s | 2 +-
llvm/test/MC/AArch64/SVE2/stnt1b.s | 2 +-
llvm/test/MC/AArch64/SVE2/stnt1d.s | 2 +-
llvm/test/MC/AArch64/SVE2/stnt1h.s | 2 +-
llvm/test/MC/AArch64/SVE2/stnt1w.s | 2 +-
llvm/test/MC/AArch64/SVE2/subhnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/subhnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/suqadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/tbl.s | 2 +-
llvm/test/MC/AArch64/SVE2/tbx.s | 2 +-
llvm/test/MC/AArch64/SVE2/uaba.s | 2 +-
llvm/test/MC/AArch64/SVE2/uabalb.s | 2 +-
llvm/test/MC/AArch64/SVE2/uabalt.s | 2 +-
llvm/test/MC/AArch64/SVE2/uabdlb.s | 2 +-
llvm/test/MC/AArch64/SVE2/uabdlt.s | 2 +-
llvm/test/MC/AArch64/SVE2/uadalp.s | 2 +-
llvm/test/MC/AArch64/SVE2/uaddlb.s | 2 +-
llvm/test/MC/AArch64/SVE2/uaddlt.s | 2 +-
llvm/test/MC/AArch64/SVE2/uaddwb.s | 2 +-
llvm/test/MC/AArch64/SVE2/uaddwt.s | 2 +-
llvm/test/MC/AArch64/SVE2/uhadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/uhsub.s | 2 +-
llvm/test/MC/AArch64/SVE2/uhsubr.s | 2 +-
llvm/test/MC/AArch64/SVE2/umaxp.s | 2 +-
llvm/test/MC/AArch64/SVE2/uminp.s | 2 +-
llvm/test/MC/AArch64/SVE2/umlalb.s | 2 +-
llvm/test/MC/AArch64/SVE2/umlalt.s | 2 +-
llvm/test/MC/AArch64/SVE2/umlslb.s | 2 +-
llvm/test/MC/AArch64/SVE2/umlslt.s | 2 +-
llvm/test/MC/AArch64/SVE2/umulh.s | 2 +-
llvm/test/MC/AArch64/SVE2/umullb.s | 2 +-
llvm/test/MC/AArch64/SVE2/umullt.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqrshl.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqrshlr.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqrshrnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqrshrnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqshl.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqshlr.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqshrnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqshrnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqsub.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqsubr.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqxtnb.s | 2 +-
llvm/test/MC/AArch64/SVE2/uqxtnt.s | 2 +-
llvm/test/MC/AArch64/SVE2/urecpe.s | 2 +-
llvm/test/MC/AArch64/SVE2/urhadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/urshl.s | 2 +-
llvm/test/MC/AArch64/SVE2/urshlr.s | 2 +-
llvm/test/MC/AArch64/SVE2/urshr.s | 2 +-
llvm/test/MC/AArch64/SVE2/ursqrte.s | 2 +-
llvm/test/MC/AArch64/SVE2/ursra.s | 2 +-
llvm/test/MC/AArch64/SVE2/ushllb.s | 2 +-
llvm/test/MC/AArch64/SVE2/ushllt.s | 2 +-
llvm/test/MC/AArch64/SVE2/usqadd.s | 2 +-
llvm/test/MC/AArch64/SVE2/usra.s | 2 +-
llvm/test/MC/AArch64/SVE2/usublb.s | 2 +-
llvm/test/MC/AArch64/SVE2/usublt.s | 2 +-
llvm/test/MC/AArch64/SVE2/usubwb.s | 2 +-
llvm/test/MC/AArch64/SVE2/usubwt.s | 2 +-
llvm/test/MC/AArch64/SVE2/whilege.s | 2 +-
llvm/test/MC/AArch64/SVE2/whilegt.s | 2 +-
llvm/test/MC/AArch64/SVE2/whilehi.s | 2 +-
llvm/test/MC/AArch64/SVE2/whilehs.s | 2 +-
llvm/test/MC/AArch64/SVE2/whilerw.s | 2 +-
llvm/test/MC/AArch64/SVE2/whilewr.s | 2 +-
llvm/test/MC/AArch64/SVE2/xar.s | 2 +-
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s | 865 ++
llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s | 271 +
llvm/test/MC/AMDGPU/gfx11_err.s | 12 +
.../Disassembler/AMDGPU/gfx11_asm_vop3_dpp16.txt | 757 ++
.../MC/Disassembler/AMDGPU/gfx11_asm_vop3_dpp8.txt | 244 +
llvm/test/MC/RISCV/rv64zdinx-invalid.s | 8 +-
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create mode 100644 lldb/source/Plugins/Trace/intel-pt/TraceIntelPTMultiCpuDecoder.cpp
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create mode 100644 lldb/test/API/commands/trace/intelpt-multi-core-trace/cores/51. [...]
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create mode 100644 llvm/docs/DirectXUsage.rst
create mode 100644 llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
create mode 100644 llvm/include/llvm/DebugInfo/Symbolize/Markup.h
create mode 100644 llvm/include/llvm/MC/MCDXContainerStreamer.h
create mode 100644 llvm/include/llvm/MC/MCDXContainerWriter.h
create mode 100644 llvm/include/llvm/MC/MCSectionDXContainer.h
create mode 100644 llvm/lib/DebugInfo/DWARF/DWARFTypePrinter.cpp
create mode 100644 llvm/lib/DebugInfo/Symbolize/Markup.cpp
create mode 100644 llvm/lib/MC/MCDXContainerStreamer.cpp
create mode 100644 llvm/lib/MC/MCDXContainerWriter.cpp
create mode 100644 llvm/lib/MC/MCSectionDXContainer.cpp
create mode 100644 llvm/lib/Target/DirectX/DXILStubs.td
create mode 100644 llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp
create mode 100644 llvm/lib/Target/DirectX/DirectXFrameLowering.h
create mode 100644 llvm/lib/Target/DirectX/DirectXInstrInfo.cpp
create mode 100644 llvm/lib/Target/DirectX/DirectXInstrInfo.h
create mode 100644 llvm/lib/Target/DirectX/DirectXRegisterInfo.cpp
create mode 100644 llvm/lib/Target/DirectX/DirectXRegisterInfo.h
create mode 100644 llvm/lib/Target/DirectX/MCTargetDesc/DirectXContainerObjectWriter.cpp
create mode 100644 llvm/lib/Target/DirectX/MCTargetDesc/DirectXContainerObjectWriter.h
create mode 100644 llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.h
create mode 100644 llvm/test/Analysis/LoopCacheAnalysis/compute-cost.ll
create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll
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create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
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create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.di [...]
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create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll
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create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll
create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll
create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.encode.ll
create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll
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create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
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create mode 100644 llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx11.mir
create mode 100644 llvm/test/CodeGen/AMDGPU/partial-forwarding-hazards.mir
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create mode 100644 llvm/test/CodeGen/PowerPC/LQ-STQ-32bit-offset.ll
create mode 100644 llvm/test/CodeGen/PowerPC/LQ-STQ.ll
create mode 100644 llvm/test/CodeGen/PowerPC/mtvsrc-mfvscr-PPCVSXSwapRemoval.ll
create mode 100644 llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
create mode 100644 llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.mir
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create mode 100644 llvm/test/MC/Disassembler/AMDGPU/gfx11_asm_vop3_dpp8.txt
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create mode 100644 llvm/test/Transforms/InstCombine/memchr-7.ll
create mode 100644 llvm/test/Transforms/InstCombine/memcmp-5.ll
create mode 100644 llvm/test/Transforms/InstCombine/memcmp-6.ll
create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vector [...]
create mode 100644 llvm/test/Transforms/MergeFunc/merge-used.ll
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create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
create mode 100644 llvm/test/tools/llvm-reduce/remove-operands-fp.ll
create mode 100644 llvm/test/tools/llvm-reduce/simplify-instructions.ll
create mode 100644 llvm/tools/llvm-reduce/deltas/SimplifyInstructions.cpp
create mode 100644 llvm/tools/llvm-reduce/deltas/SimplifyInstructions.h
create mode 100644 llvm/unittests/DebugInfo/Symbolizer/CMakeLists.txt
create mode 100644 llvm/unittests/DebugInfo/Symbolizer/MarkupTest.cpp
create mode 100644 llvm/utils/gn/secondary/llvm/unittests/DebugInfo/Symbolizer/BUILD.gn
create mode 100644 mlir/include/mlir/Dialect/LLVMIR/Transforms/RequestCWrappers.h
create mode 100644 mlir/include/mlir/Dialect/NVGPU/IR/CMakeLists.txt
create mode 100644 mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
create mode 100644 mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
delete mode 100644 mlir/include/mlir/Dialect/NVGPU/NVGPU.td
delete mode 100644 mlir/include/mlir/Dialect/NVGPU/NVGPUDialect.h
create mode 100644 mlir/include/mlir/Dialect/NVGPU/Passes.h
create mode 100644 mlir/include/mlir/Dialect/NVGPU/Passes.td
create mode 100644 mlir/include/mlir/Dialect/NVGPU/Transforms/Transforms.h
create mode 100644 mlir/lib/Dialect/LLVMIR/Transforms/RequestCWrappers.cpp
create mode 100644 mlir/lib/Dialect/NVGPU/Transforms/CMakeLists.txt
create mode 100644 mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp
create mode 100644 mlir/lib/Dialect/NVGPU/Transforms/PassDetail.h
create mode 100644 mlir/python/mlir/dialects/ComplexOps.td
create mode 100644 mlir/python/mlir/dialects/complex.py
create mode 100644 mlir/test/Conversion/FuncToLLVM/emit-c-wrappers-for-external-ca [...]
create mode 100644 mlir/test/Conversion/FuncToLLVM/emit-c-wrappers-for-external-fu [...]
delete mode 100644 mlir/test/Conversion/StandardToLLVM/emit-c-wrappers-for-externa [...]
delete mode 100644 mlir/test/Conversion/StandardToLLVM/emit-c-wrappers-for-externa [...]
create mode 100644 mlir/test/Dialect/LLVMIR/request-c-wrappers.mlir
create mode 100644 mlir/test/Dialect/NVGPU/optimize-shared-memory.mlir
create mode 100644 mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_bf16.mlir
create mode 100644 mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_bf16.mlir
create mode 100644 mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_triangula [...]
create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/test_tensor_complex.py
create mode 100644 mlir/test/python/dialects/complex_dialect.py
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (732debd8 -> a0ec0083)
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05-build_abe-qemu/console.log.xz | Bin 32528 -> 33364 bytes
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create mode 100644 08-check_regression/jira-body.txt
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create mode 100644 08-check_regression/trigger-bisect
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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap updated (607118dfa47 -> d6ba3211354)
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