Tcwg-commits May 2022

tcwg-commits@lists.linaro.org

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14621 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap updated (8255b49ed8a -> de574408585)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap in repository toolchain/ci/gcc. from 8255b49ed8a libgomp.texi: Add more to-be-implemented OpenMP 5.2 features adds e2f014fcefc fold-const: Fix up -fsanitize=null in C++ [PR105729] adds e7c482b0807 tree-optimization/105726 - adjust array bound heuristic adds 0ccba4ed857 openmp: Add support for enter clause on declare target adds f571596f8cd ipa: Check cst type when propagating controled uses info adds 37c988bc1b2 Avoid shift in get_ref_base_and_extent adds 8af26650179 Fortran: Fix OpenMP clause name in error message new de574408585 libstdc++: Mark non-exported function always_inline [PR105671] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/c-family/c-pragma.h | 3 ++- gcc/c/c-parser.cc | 23 ++++++++++++++--- gcc/c/c-typeck.cc | 21 +++++++++------- gcc/cp/parser.cc | 21 +++++++++++++--- gcc/cp/semantics.cc | 26 ++++++++++--------- gcc/fold-const.cc | 10 ++++++++ gcc/fortran/openmp.cc | 2 +- gcc/gimple-ssa-warn-restrict.cc | 22 +++++++++------- gcc/ipa-prop.cc | 10 +++----- gcc/testsuite/c-c++-common/gomp/clauses-3.c | 4 ++- gcc/testsuite/c-c++-common/gomp/declare-target-1.c | 2 +- gcc/testsuite/c-c++-common/gomp/declare-target-2.c | 5 ++++ gcc/testsuite/c-c++-common/gomp/declare-target-3.c | 3 +++ gcc/testsuite/g++.dg/gomp/attrs-9.C | 4 +-- gcc/testsuite/g++.dg/gomp/declare-target-1.C | 5 ++++ gcc/testsuite/g++.dg/ubsan/pr105729.C | 29 ++++++++++++++++++++++ gcc/testsuite/g++.dg/warn/Warray-bounds-27.C | 16 ++++++++++++ gcc/testsuite/gcc.dg/ipa/pr105639.c | 16 ++++++++++++ gcc/testsuite/gfortran.dg/gomp/requires-4.f90 | 2 +- gcc/testsuite/gfortran.dg/gomp/requires-8.f90 | 2 +- gcc/tree-core.h | 6 ++--- gcc/tree-dfa.cc | 5 ++-- gcc/tree-nested.cc | 4 +-- gcc/tree-pretty-print.cc | 7 ++++-- gcc/tree.cc | 4 +-- gcc/tree.h | 4 +++ libgomp/testsuite/libgomp.c-c++-common/target-40.c | 2 +- libgomp/testsuite/libgomp.c/target-41.c | 2 +- libstdc++-v3/include/std/sstream | 1 + 29 files changed, 196 insertions(+), 65 deletions(-) create mode 100644 gcc/testsuite/g++.dg/ubsan/pr105729.C create mode 100644 gcc/testsuite/g++.dg/warn/Warray-bounds-27.C create mode 100644 gcc/testsuite/gcc.dg/ipa/pr105639.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap updated (aa9b5dbc0f -> 509e623091)

by git＠git.linaro.org

2 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap updated (731d54a4 -> bf40506c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap in repository toolchain/ci/base-artifacts. discards 731d54a4 2: update: binutils-gcc: 1 new bf40506c 2: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (731d54a4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1564 -> 1536 bytes 02-prepare_abe/console.log.xz | Bin 2724 -> 2720 bytes 04-build_abe-binutils/console.log.xz | Bin 51808 -> 51880 bytes 05-build_abe-bootstrap/console.log.xz | Bin 168256 -> 167660 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 64 +++++++++++++++++----------------- jenkins/manifest.sh | 12 +++---- 7 files changed, 38 insertions(+), 38 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 6 months

[newlib] branch master updated (9af21ada2 -> 2dbdf66b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository newlib. from 9af21ada2 fhandler_proc.cc(format_proc_cpuinfo): add Linux 5.18 cpuinfo flags new 2dbdf66b9 Modify tzset_r.c to handle errors The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: newlib/libc/time/tzset_r.c | 68 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 48 insertions(+), 20 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap updated (c62643579df -> 8af26650179)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap in repository toolchain/ci/gcc. from c62643579df Close gcc-9 branch adds 29ae455901a Pre-reload splitter to transform and;cmp into not;test on x86. adds 8fb94fc6097 Canonicalize X&-Y as X*Y in match.pd when Y is [0,1]. adds 8255b49ed8a libgomp.texi: Add more to-be-implemented OpenMP 5.2 features adds e2f014fcefc fold-const: Fix up -fsanitize=null in C++ [PR105729] adds e7c482b0807 tree-optimization/105726 - adjust array bound heuristic adds 0ccba4ed857 openmp: Add support for enter clause on declare target adds f571596f8cd ipa: Check cst type when propagating controled uses info adds 37c988bc1b2 Avoid shift in get_ref_base_and_extent adds 8af26650179 Fortran: Fix OpenMP clause name in error message No new revisions were added by this update. Summary of changes: gcc/c-family/c-pragma.h | 3 +- gcc/c/c-parser.cc | 23 +++++- gcc/c/c-typeck.cc | 21 +++--- gcc/config/i386/i386.md | 21 ++++++ gcc/cp/parser.cc | 21 +++++- gcc/cp/semantics.cc | 26 ++++--- gcc/fold-const.cc | 10 +++ gcc/fortran/openmp.cc | 2 +- gcc/gimple-ssa-warn-restrict.cc | 22 +++--- gcc/ipa-prop.cc | 10 +-- gcc/match.pd | 86 +++++++++++----------- gcc/testsuite/c-c++-common/gomp/clauses-3.c | 4 +- gcc/testsuite/c-c++-common/gomp/declare-target-1.c | 2 +- gcc/testsuite/c-c++-common/gomp/declare-target-2.c | 5 ++ gcc/testsuite/c-c++-common/gomp/declare-target-3.c | 3 + gcc/testsuite/g++.dg/gomp/attrs-9.C | 4 +- gcc/testsuite/g++.dg/gomp/declare-target-1.C | 5 ++ gcc/testsuite/g++.dg/ubsan/pr105729.C | 29 ++++++++ gcc/testsuite/g++.dg/warn/Warray-bounds-27.C | 16 ++++ gcc/testsuite/gcc.dg/ipa/pr105639.c | 16 ++++ gcc/testsuite/gcc.dg/pr98865.c | 14 ++++ gcc/testsuite/gcc.target/i386/pr91400-1.c | 4 +- gcc/testsuite/gcc.target/i386/pr91400-2.c | 4 +- gcc/testsuite/gcc.target/i386/testnot-1.c | 24 ++++++ gcc/testsuite/gcc.target/i386/testnot-2.c | 24 ++++++ gcc/testsuite/gfortran.dg/gomp/requires-4.f90 | 2 +- gcc/testsuite/gfortran.dg/gomp/requires-8.f90 | 2 +- gcc/tree-core.h | 6 +- gcc/tree-dfa.cc | 5 +- gcc/tree-nested.cc | 4 +- gcc/tree-pretty-print.cc | 7 +- gcc/tree.cc | 4 +- gcc/tree.h | 4 + libgomp/libgomp.texi | 17 ++++- libgomp/testsuite/libgomp.c-c++-common/target-40.c | 2 +- libgomp/testsuite/libgomp.c/target-41.c | 2 +- 36 files changed, 339 insertions(+), 115 deletions(-) create mode 100644 gcc/testsuite/g++.dg/ubsan/pr105729.C create mode 100644 gcc/testsuite/g++.dg/warn/Warray-bounds-27.C create mode 100644 gcc/testsuite/gcc.dg/ipa/pr105639.c create mode 100644 gcc/testsuite/gcc.dg/pr98865.c create mode 100644 gcc/testsuite/gcc.target/i386/testnot-1.c create mode 100644 gcc/testsuite/gcc.target/i386/testnot-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap updated (aa9b5dbc0f -> 509e623091)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap in repository toolchain/ci/binutils-gdb. from aa9b5dbc0f gprofng: fix build with --disable-shared adds 0e3c1eebb2 Remove use of bfd_uint64_t and similar adds 65d13793d9 Remove much of BFD_HOST configury adds 6015985895 Replace bfd_hostptr_t with uintptr_t adds 202be274a4 opcodes/i386: remove trailing whitespace from insns with zer [...] new 509e623091 Fix crash with "maint print arc" The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/Makefile.in | 5 - bfd/aix386-core.c | 6 +- bfd/bfd-in.h | 50 +-- bfd/bfd-in2.h | 62 +-- bfd/coff-bfd.c | 2 +- bfd/coff-rs6000.c | 10 +- bfd/coff-x86_64.c | 2 +- bfd/coffcode.h | 4 +- bfd/coffgen.c | 57 +-- bfd/configure | 47 +-- bfd/configure.ac | 36 +- bfd/configure.com | 60 +-- bfd/cpu-ia64-opc.c | 22 +- bfd/dwarf2.c | 83 ++-- bfd/elf32-score.c | 16 +- bfd/elf64-ia64-vms.c | 8 +- bfd/elflink.c | 19 +- bfd/elfxx-ia64.c | 6 +- bfd/hppabsd-core.c | 6 +- bfd/hpux-core.c | 6 +- bfd/irix-core.c | 6 +- bfd/libbfd.c | 65 +-- bfd/mach-o.c | 2 +- bfd/mach-o.h | 8 +- bfd/netbsd-core.c | 6 +- bfd/osf-core.c | 6 +- bfd/peicode.h | 2 +- bfd/ptrace-core.c | 6 +- bfd/sco5-core.c | 6 +- bfd/targets.c | 12 +- bfd/trad-core.c | 6 +- bfd/vms-alpha.c | 2 +- binutils/nm.c | 49 +-- binutils/od-macho.c | 50 +-- binutils/prdbg.c | 39 +- binutils/readelf.c | 21 +- gas/config/tc-arm.c | 28 +- gas/config/tc-csky.c | 10 +- gas/config/tc-sparc.c | 35 +- gas/config/tc-tilegx.c | 20 +- gas/config/tc-tilepro.c | 20 +- gas/config/tc-z80.c | 8 +- gas/config/te-vms.c | 2 +- gas/config/te-vms.h | 2 +- gas/symbols.c | 8 +- gas/testsuite/gas/i386/387.d | 10 +- gas/testsuite/gas/i386/adx-intel.d | 4 +- gas/testsuite/gas/i386/adx.d | 4 +- gas/testsuite/gas/i386/align-branch-4a.d | 2 +- gas/testsuite/gas/i386/align-branch-4b.d | 2 +- gas/testsuite/gas/i386/align-branch-6.d | 2 +- gas/testsuite/gas/i386/amd.d | 12 +- gas/testsuite/gas/i386/arch-10.d | 16 +- gas/testsuite/gas/i386/arch-13.d | 20 +- gas/testsuite/gas/i386/arch-14.d | 10 +- gas/testsuite/gas/i386/arch-4.d | 4 +- gas/testsuite/gas/i386/arch-9.d | 2 +- gas/testsuite/gas/i386/avx-16bit.d | 4 +- gas/testsuite/gas/i386/avx-gather-intel.d | 2 +- gas/testsuite/gas/i386/avx-gather.d | 2 +- gas/testsuite/gas/i386/avx-intel.d | 4 +- gas/testsuite/gas/i386/avx-wig.d | 4 +- gas/testsuite/gas/i386/avx.d | 4 +- gas/testsuite/gas/i386/avx512f-nondef.d | 4 +- gas/testsuite/gas/i386/bmi-intel.d | 2 +- gas/testsuite/gas/i386/bmi.d | 2 +- gas/testsuite/gas/i386/bmi2-intel.d | 2 +- gas/testsuite/gas/i386/bmi2.d | 2 +- gas/testsuite/gas/i386/cet-intel.d | 28 +- gas/testsuite/gas/i386/cet.d | 28 +- gas/testsuite/gas/i386/clzero.d | 2 +- gas/testsuite/gas/i386/disassem.d | 442 ++++++++++----------- gas/testsuite/gas/i386/fence-as-lock-add-no.d | 6 +- gas/testsuite/gas/i386/fpu-bad.d | 2 +- gas/testsuite/gas/i386/iamcu-4.d | 2 +- gas/testsuite/gas/i386/iamcu-5.d | 2 +- gas/testsuite/gas/i386/ifunc.d | 4 +- gas/testsuite/gas/i386/ilp32/mixed-mode-reloc64.d | 12 +- gas/testsuite/gas/i386/ilp32/svme64.d | 52 +-- gas/testsuite/gas/i386/ilp32/x86-64-branch.d | 4 +- gas/testsuite/gas/i386/ilp32/x86-64-cbw-intel.d | 24 +- gas/testsuite/gas/i386/ilp32/x86-64-cbw.d | 24 +- .../gas/i386/ilp32/x86-64-opcode-inval-intel.d | 22 +- gas/testsuite/gas/i386/ilp32/x86-64-opcode-inval.d | 22 +- gas/testsuite/gas/i386/ilp32/x86-64-vmx.d | 8 +- gas/testsuite/gas/i386/ilp32/x86-64-xsave-intel.d | 4 +- gas/testsuite/gas/i386/ilp32/x86-64-xsave.d | 4 +- gas/testsuite/gas/i386/ilp32/x86-64.d | 4 +- gas/testsuite/gas/i386/intel-got32.d | 2 +- gas/testsuite/gas/i386/intel-got64.d | 2 +- gas/testsuite/gas/i386/intel-intel.d | 106 ++--- gas/testsuite/gas/i386/intel.d | 106 ++--- gas/testsuite/gas/i386/intelpic.d | 2 +- gas/testsuite/gas/i386/invlpgb.d | 10 +- gas/testsuite/gas/i386/invlpgb64.d | 10 +- gas/testsuite/gas/i386/invpcid-intel.d | 2 +- gas/testsuite/gas/i386/invpcid.d | 2 +- gas/testsuite/gas/i386/jump16.d | 12 +- gas/testsuite/gas/i386/katmai.d | 2 +- gas/testsuite/gas/i386/lfence-byte.d | 24 +- gas/testsuite/gas/i386/lfence-indbr-a.d | 4 +- gas/testsuite/gas/i386/lfence-indbr-b.d | 4 +- gas/testsuite/gas/i386/lfence-load.d | 102 ++--- gas/testsuite/gas/i386/lfence-ret-a.d | 12 +- gas/testsuite/gas/i386/lfence-ret-b.d | 12 +- gas/testsuite/gas/i386/lfence-ret-c.d | 12 +- gas/testsuite/gas/i386/lfence-ret-d.d | 12 +- gas/testsuite/gas/i386/mixed-mode-reloc32.d | 12 +- gas/testsuite/gas/i386/mixed-mode-reloc64.d | 12 +- gas/testsuite/gas/i386/mpx-16bit.d | 6 +- gas/testsuite/gas/i386/mpx-add-bnd-prefix.d | 10 +- gas/testsuite/gas/i386/mpx.d | 6 +- gas/testsuite/gas/i386/noextreg.d | 2 +- gas/testsuite/gas/i386/nops-8.d | 4 +- gas/testsuite/gas/i386/noreg64-data16.d | 8 +- gas/testsuite/gas/i386/noreg64-rex64.d | 8 +- gas/testsuite/gas/i386/noreg64.d | 8 +- gas/testsuite/gas/i386/opcode-intel.d | 100 ++--- gas/testsuite/gas/i386/opcode-suffix.d | 98 ++--- gas/testsuite/gas/i386/opcode.d | 98 ++--- gas/testsuite/gas/i386/ospke.d | 4 +- gas/testsuite/gas/i386/padlock.d | 36 +- gas/testsuite/gas/i386/pconfig-intel.d | 2 +- gas/testsuite/gas/i386/pconfig.d | 2 +- gas/testsuite/gas/i386/prefix.d | 44 +- gas/testsuite/gas/i386/relax-3.d | 10 +- gas/testsuite/gas/i386/relax-4.d | 10 +- gas/testsuite/gas/i386/relax-5.d | 2 +- gas/testsuite/gas/i386/rtm-intel.d | 6 +- gas/testsuite/gas/i386/rtm.d | 6 +- gas/testsuite/gas/i386/se1.d | 6 +- gas/testsuite/gas/i386/secidx.d | 2 +- gas/testsuite/gas/i386/secrel.d | 2 +- gas/testsuite/gas/i386/serialize.d | 2 +- gas/testsuite/gas/i386/size-5a.d | 2 +- gas/testsuite/gas/i386/smap.d | 4 +- gas/testsuite/gas/i386/smx.d | 2 +- gas/testsuite/gas/i386/snp.d | 12 +- gas/testsuite/gas/i386/snp64.d | 48 +-- gas/testsuite/gas/i386/sse-noavx.d | 6 +- gas/testsuite/gas/i386/sse2-16bit.d | 8 +- gas/testsuite/gas/i386/sse2.d | 8 +- gas/testsuite/gas/i386/sse3-intel.d | 18 +- gas/testsuite/gas/i386/suffix-intel.d | 32 +- gas/testsuite/gas/i386/suffix.d | 28 +- gas/testsuite/gas/i386/svme.d | 52 +-- gas/testsuite/gas/i386/svme64.d | 52 +-- gas/testsuite/gas/i386/tbm-intel.d | 2 +- gas/testsuite/gas/i386/tdx.d | 2 +- gas/testsuite/gas/i386/tlbsync.d | 2 +- gas/testsuite/gas/i386/tlsd.d | 4 +- gas/testsuite/gas/i386/tlsnopic.d | 4 +- gas/testsuite/gas/i386/tlspic.d | 4 +- gas/testsuite/gas/i386/tsxldtrk.d | 4 +- gas/testsuite/gas/i386/unique.d | 12 +- gas/testsuite/gas/i386/vmfunc.d | 2 +- gas/testsuite/gas/i386/vmx.d | 16 +- gas/testsuite/gas/i386/wbnoinvd-intel.d | 2 +- gas/testsuite/gas/i386/wbnoinvd.d | 2 +- gas/testsuite/gas/i386/wrap32-text.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1a.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1b.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1c.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1d.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1e.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1f.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1g.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1h.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-1i.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-4a.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-4b.d | 2 +- gas/testsuite/gas/i386/x86-64-align-branch-6.d | 2 +- gas/testsuite/gas/i386/x86-64-amx-bad.d | 4 +- gas/testsuite/gas/i386/x86-64-amx-intel.d | 4 +- gas/testsuite/gas/i386/x86-64-amx.d | 4 +- gas/testsuite/gas/i386/x86-64-arch-2.d | 16 +- gas/testsuite/gas/i386/x86-64-arch-3.d | 16 +- gas/testsuite/gas/i386/x86-64-arch-4.d | 16 +- gas/testsuite/gas/i386/x86-64-avx-gather-intel.d | 2 +- gas/testsuite/gas/i386/x86-64-avx-gather.d | 2 +- gas/testsuite/gas/i386/x86-64-avx-intel.d | 4 +- gas/testsuite/gas/i386/x86-64-avx-wig.d | 4 +- gas/testsuite/gas/i386/x86-64-avx.d | 4 +- gas/testsuite/gas/i386/x86-64-avx512f-nondef.d | 2 +- gas/testsuite/gas/i386/x86-64-bmi-intel.d | 2 +- gas/testsuite/gas/i386/x86-64-bmi.d | 2 +- gas/testsuite/gas/i386/x86-64-bmi2-intel.d | 2 +- gas/testsuite/gas/i386/x86-64-bmi2.d | 2 +- gas/testsuite/gas/i386/x86-64-branch-2.d | 2 +- gas/testsuite/gas/i386/x86-64-branch.d | 4 +- gas/testsuite/gas/i386/x86-64-cbw-intel.d | 24 +- gas/testsuite/gas/i386/x86-64-cbw.d | 24 +- gas/testsuite/gas/i386/x86-64-cet-intel.d | 16 +- gas/testsuite/gas/i386/x86-64-cet.d | 16 +- gas/testsuite/gas/i386/x86-64-clzero.d | 2 +- gas/testsuite/gas/i386/x86-64-disassem.d | 442 ++++++++++----------- .../gas/i386/x86-64-fence-as-lock-add-no.d | 6 +- gas/testsuite/gas/i386/x86-64-ifunc.d | 4 +- gas/testsuite/gas/i386/x86-64-intel64.d | 6 +- gas/testsuite/gas/i386/x86-64-invpcid-intel.d | 2 +- gas/testsuite/gas/i386/x86-64-invpcid.d | 2 +- gas/testsuite/gas/i386/x86-64-lfence-byte.d | 24 +- gas/testsuite/gas/i386/x86-64-lfence-indbr-a.d | 4 +- gas/testsuite/gas/i386/x86-64-lfence-indbr-b.d | 4 +- gas/testsuite/gas/i386/x86-64-lfence-load.d | 100 ++--- gas/testsuite/gas/i386/x86-64-lfence-ret-a.d | 18 +- gas/testsuite/gas/i386/x86-64-lfence-ret-b.d | 18 +- gas/testsuite/gas/i386/x86-64-lfence-ret-c.d | 18 +- gas/testsuite/gas/i386/x86-64-lfence-ret-d.d | 18 +- gas/testsuite/gas/i386/x86-64-lfence-ret-e.d | 18 +- gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d | 10 +- gas/testsuite/gas/i386/x86-64-mpx.d | 6 +- gas/testsuite/gas/i386/x86-64-opcode-inval-intel.d | 22 +- gas/testsuite/gas/i386/x86-64-opcode-inval.d | 22 +- gas/testsuite/gas/i386/x86-64-opcode.d | 38 +- gas/testsuite/gas/i386/x86-64-ospke.d | 4 +- gas/testsuite/gas/i386/x86-64-pconfig-intel.d | 2 +- gas/testsuite/gas/i386/x86-64-pconfig.d | 2 +- gas/testsuite/gas/i386/x86-64-property-1.d | 2 +- gas/testsuite/gas/i386/x86-64-relax-2.d | 10 +- gas/testsuite/gas/i386/x86-64-relax-3.d | 10 +- gas/testsuite/gas/i386/x86-64-relax-4.d | 2 +- gas/testsuite/gas/i386/x86-64-rtm-intel.d | 6 +- gas/testsuite/gas/i386/x86-64-rtm.d | 6 +- gas/testsuite/gas/i386/x86-64-se1.d | 6 +- gas/testsuite/gas/i386/x86-64-serialize.d | 2 +- gas/testsuite/gas/i386/x86-64-smap.d | 4 +- gas/testsuite/gas/i386/x86-64-sse-noavx.d | 6 +- gas/testsuite/gas/i386/x86-64-sse3-intel.d | 24 +- gas/testsuite/gas/i386/x86-64-suffix-intel.d | 34 +- gas/testsuite/gas/i386/x86-64-suffix.d | 30 +- gas/testsuite/gas/i386/x86-64-sysenter-amd.d | 12 +- gas/testsuite/gas/i386/x86-64-sysenter-intel.d | 12 +- gas/testsuite/gas/i386/x86-64-tbm-intel.d | 2 +- gas/testsuite/gas/i386/x86-64-tdx.d | 8 +- gas/testsuite/gas/i386/x86-64-tsxldtrk.d | 4 +- gas/testsuite/gas/i386/x86-64-uintr.d | 8 +- gas/testsuite/gas/i386/x86-64-unique.d | 12 +- gas/testsuite/gas/i386/x86-64-vmfunc.d | 2 +- gas/testsuite/gas/i386/x86-64-vmx.d | 8 +- gas/testsuite/gas/i386/x86-64-wbnoinvd-intel.d | 2 +- gas/testsuite/gas/i386/x86-64-wbnoinvd.d | 2 +- gas/testsuite/gas/i386/x86-64-xsave-intel.d | 4 +- gas/testsuite/gas/i386/x86-64-xsave.d | 4 +- gas/testsuite/gas/i386/x86_64-intel.d | 12 +- gas/testsuite/gas/i386/x86_64.d | 12 +- gas/testsuite/gas/i386/xsave-intel.d | 4 +- gas/testsuite/gas/i386/xsave.d | 4 +- gas/write.c | 4 +- gdb/arc-tdep.c | 10 +- gdb/findcmd.c | 2 +- gdb/testsuite/gdb.base/step-over-exit.exp | 2 +- gdb/testsuite/gdb.base/step-over-syscall.exp | 2 +- gdb/tilegx-tdep.c | 2 +- gprof/gmon_io.c | 44 +- include/coff/internal.h | 12 +- include/elf/nfp.h | 2 +- include/opcode/csky.h | 62 +-- include/opcode/ia64.h | 2 +- ld/testsuite/ld-i386/align-branch-1.d | 2 +- ld/testsuite/ld-i386/code16.d | 2 +- ld/testsuite/ld-i386/ibt-plt-1.d | 12 +- ld/testsuite/ld-i386/ibt-plt-2a.d | 12 +- ld/testsuite/ld-i386/ibt-plt-2c.d | 12 +- ld/testsuite/ld-i386/ibt-plt-3a.d | 12 +- ld/testsuite/ld-i386/ibt-plt-3c.d | 12 +- ld/testsuite/ld-i386/pr20244-2a.d | 4 +- ld/testsuite/ld-i386/pr20244-4a.d | 4 +- ld/testsuite/ld-i386/pr23930.d | 2 +- ld/testsuite/ld-i386/pr26018.d | 2 +- ld/testsuite/ld-i386/pr26263.d | 2 +- ld/testsuite/ld-i386/pr27193.dd | 2 +- ld/testsuite/ld-i386/protected2.d | 4 +- ld/testsuite/ld-i386/protected3.d | 2 +- ld/testsuite/ld-i386/protected7.d | 2 +- ld/testsuite/ld-i386/tlspie3b.d | 6 +- ld/testsuite/ld-i386/tlspie3c.d | 6 +- ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-21-i386.d | 4 +- ld/testsuite/ld-ifunc/ifunc-21-x86-64.d | 4 +- ld/testsuite/ld-ifunc/ifunc-22-i386.d | 4 +- ld/testsuite/ld-ifunc/ifunc-22-x86-64.d | 4 +- ld/testsuite/ld-x86-64/align-branch-1.d | 2 +- ld/testsuite/ld-x86-64/bnd-ifunc-1-now.d | 4 +- ld/testsuite/ld-x86-64/code16.d | 2 +- ld/testsuite/ld-x86-64/hidden2.d | 2 +- ld/testsuite/ld-x86-64/ibt-plt-1-x32.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-1.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-2a-x32.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-2a.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-2c-x32.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-2c.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-3a-x32.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-3a.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-3c-x32.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-3c.d | 8 +- ld/testsuite/ld-x86-64/pe-x86-64-1.od | 6 +- ld/testsuite/ld-x86-64/pe-x86-64-2.od | 6 +- ld/testsuite/ld-x86-64/pe-x86-64-3.od | 6 +- ld/testsuite/ld-x86-64/pe-x86-64-4.od | 6 +- ld/testsuite/ld-x86-64/pe-x86-64-5.od | 8 +- ld/testsuite/ld-x86-64/pe-x86-64-6.od | 14 +- ld/testsuite/ld-x86-64/plt-main-ibt-x32.dd | 2 +- ld/testsuite/ld-x86-64/plt-main-ibt.dd | 2 +- ld/testsuite/ld-x86-64/pr18160.d | 2 +- ld/testsuite/ld-x86-64/pr20253-1b.d | 4 +- ld/testsuite/ld-x86-64/pr20253-1d.d | 4 +- ld/testsuite/ld-x86-64/pr20253-1f.d | 4 +- ld/testsuite/ld-x86-64/pr20253-1h.d | 4 +- ld/testsuite/ld-x86-64/pr20253-1j.d | 4 +- ld/testsuite/ld-x86-64/pr20253-1l.d | 4 +- ld/testsuite/ld-x86-64/pr23930-x32.d | 2 +- ld/testsuite/ld-x86-64/pr23930.d | 2 +- ld/testsuite/ld-x86-64/pr26018.d | 2 +- ld/testsuite/ld-x86-64/pr26263.d | 2 +- ld/testsuite/ld-x86-64/pr27016a.d | 2 +- ld/testsuite/ld-x86-64/pr27016b.d | 2 +- ld/testsuite/ld-x86-64/protected2.d | 4 +- ld/testsuite/ld-x86-64/protected3.d | 2 +- ld/testsuite/ld-x86-64/protected8.d | 2 +- ld/testsuite/ld-x86-64/tlsdesc.pd | 2 +- ld/testsuite/ld-x86-64/tlspie2b.d | 4 +- ld/testsuite/ld-x86-64/tlspie2c.d | 4 +- opcodes/csky-dis.c | 2 +- opcodes/csky-opc.h | 4 +- opcodes/i386-dis.c | 27 +- opcodes/ia64-dis.c | 2 +- 330 files changed, 2216 insertions(+), 2549 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap updated (49f4bf19 -> 2b31fd1e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap in repository toolchain/ci/base-artifacts. discards 49f4bf19 0: update: binutils-gcc: 2 new 2b31fd1e 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (49f4bf19) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1552 -> 1516 bytes 02-prepare_abe/console.log.xz | Bin 2724 -> 2724 bytes 04-build_abe-binutils/console.log.xz | Bin 37896 -> 37988 bytes 05-build_abe-bootstrap/console.log.xz | Bin 271488 -> 268340 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 36 ---------------------------------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 6 insertions(+), 42 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 6 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (3757b0d08b -> 2417cbd591)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/qemu. from 3757b0d08b Merge tag 'pull-request-2022-05-18' of https://gitlab.com/th [...] adds d6cd3ae0eb target/riscv: Fix VS mode hypervisor CSR access adds 02b511985e target/riscv: rvv: Fix early exit condition for whole regist [...] adds 77046729f9 hw/intc: Pass correct hartid while updating mtimecmp adds 6047dcc245 target/riscv: Move Zhinx* extensions on ISA string adds a4a9a4432e target/riscv: Add short-isa-string option adds 4bcfc391ac hw/riscv: Make CPU config error handling generous (virt/spike) adds 91a3387dc4 hw/riscv: Make CPU config error handling generous (sifive_e/ [...] adds 61cdf4593e target/riscv: Fix coding style on "G" expansion adds 1d398ab9dc target/riscv: Disable "G" by default adds 9f6b7da5d2 target/riscv: Change "G" expansion adds 1086504c6f target/riscv: FP extension requirements adds bc57381669 target/riscv: Move/refactor ISA extension checks adds 8f1b608798 hw/vfio/pci-quirks: Resolve redundant property getters adds 96c7fff703 hw/riscv/sifive_u: Resolve redundant property accessors adds bb06941f95 target/riscv: check 'I' and 'E' after checking 'G' in riscv_ [...] adds 075eeda931 target/riscv: Fix typo of mimpid cpu option adds c1fbcecb3a target/riscv: Fix csr number based privilege checking adds 24826da0ee target/riscv: Fix hstatus.GVA bit setting for traps taken fr [...] adds 62cf02451e target/riscv: Set [m|s]tval for both illegal and virtual ins [...] adds d644e5e44f hw/riscv: virt: Fix interrupt parent for dynamic platform devices adds 5160bacc06 target/riscv: add zicsr/zifencei to isa_string adds d616889ece hw/core: Sync uboot_image.h from U-Boot v2022.01 adds 8fe63fe8e5 hw/core: loader: Set is_linux to true for VxWorks uImage adds 0cac736e73 Merge tag 'pull-riscv-to-apply-20220525' of github.com:alist [...] adds 3569664ee9 qga: add guest-get-diskstats command for Linux guests adds 323f3a8f22 trivial: qga: Log version on start adds 2e7b218958 tests: Bump Fedora image version for cross-compilation adds b9a002609f qga-win32: Add support for NVME bus type adds ffae6d9585 Merge tag 'qga-win32-pull-2022-05-25' of github.com:kostyanf [...] adds 60f1c8017a linux-user: Clean up arg_start/arg_end confusion adds c3a28d7122 linux-user/syscall.c: fix build without RLIMIT_RTTIME adds 2f6f4290e0 linux-user/elfload: Remove pointless non-const CPUArchState cast adds a0939b8916 linux-user: Have do_syscall() use CPUArchState* instead of void* adds 0effdc29b5 linux-user: Remove pointless CPU{ARCH}State casts adds 9a12adc704 linux-user/s390x: Fix unwinding from signal handlers adds 1a75b14038 tests/tcg/s390x: Test unwinding from signal handlers adds 565a84c1e6 linux-user/host/s390: Treat EX and EXRL as writes adds 6882d65161 Merge tag 'linux-user-for-7.1-pull-request' of https://gitla [...] adds 29320530cf docs: Correct the default thread-pool-size adds 7929f75f34 Merge tag 'block-pull-request' of https://gitlab.com/stefanh [...] adds 3d393bb7d3 docs: add minibmc section in aspeed document adds fa699e80a8 hw/arm/aspeed: Add fby35 machine type adds 264a360ae0 docs: aspeed: Add fby35 board adds 188052a133 hw: m25p80: allow write_enable latch get/set adds 699db71520 aspeed: Introduce a get_irq AspeedSoCClass method adds ab5e86053d hw: aspeed: Add missing UART's adds c5e1bdb9e2 hw: aspeed: Add uarts_num SoC attribute adds 94d10f4210 hw: aspeed: Ensure AST1030 respects uart-default adds 470253b6d0 hw: aspeed: Introduce common UART init function adds 6827ff20b2 hw: aspeed: Init all UART's with serial devices adds 7b1d21a8ba hw/gpio Add GPIO read/write trace event. adds 17075ef244 hw/gpio: Add ASPEED GPIO model for AST1030 adds 247c00294a hw/gpio support GPIO index mode for write operation. adds 554c294514 hw/gpio: replace HWADDR_PRIx with PRIx64 adds 52bcd99780 hw/arm/aspeed: Add i2c devices for AST2600 EVB adds 6291d2588f Merge tag 'pull-aspeed-20220525' of https://github.com/legoa [...] adds 3a7a27cffb target/i386: Remove LBREn bit check when access Arch LBR MSRs adds f8d426a685 hostmem: default the amount of prealloc-threads to smp-cpus adds 3c7b72ddca thread-pool: optimize scheduling of completion bottom half adds 900fa208f5 thread-pool: replace semaphore with condition variable adds 232e925547 thread-pool: remove stopping variable adds c06ebc0f1b contrib/elf2dmp: add ELF dump header checking adds ab9f0f7d44 hw/audio/ac97: Coding style fixes to avoid checkpatch errors adds dafea9e286 hw/audio/ac97: Remove unimplemented reset functions adds dba2b2941c hw/audio/ac97: Remove unneeded local variables adds 267b5e7e37 target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-c [...] adds 758c925ee0 ide_ioport_read: Return lower octet of data register instead [...] adds 7110fe56c1 i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES adds 869840d26c i386: Hyper-V Enlightened MSR bitmap feature adds 9411e8b6fa i386: Hyper-V XMM fast hypercall input feature adds aa6bb5fad5 i386: Hyper-V Support extended GVA ranges for TLB flush hypercalls adds 3aae0854b2 i386: Hyper-V Direct TLB flush hypercall adds 9ad6634ec9 i386: docs: Convert hyperv.txt to rST adds 58b53669e8 Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu [...] adds daa55f3ecf qapi: crypto-akcipher: Introduce akcipher types to qapi adds db5ca5fbfa crypto: Introduce akcipher crypto class adds 99d423f10c crypto: add ASN.1 DER decoder adds 4c5e512ee0 crypto: Implement RSA algorithm by hogweed adds e09d1c2747 crypto: Implement RSA algorithm by gcrypt adds 689309c4ac test/crypto: Add test suite for crypto akcipher adds f0cfb761bc tests/crypto: Add test suite for RSA keys adds 2417cbd591 Merge tag 'ak-pull-request' of https://gitlab.com/berrange/q [...] No new revisions were added by this update. Summary of changes: backends/hostmem.c | 2 +- contrib/elf2dmp/qemu_elf.c | 53 ++ crypto/akcipher-gcrypt.c.inc | 595 +++++++++++++ crypto/akcipher-nettle.c.inc | 451 ++++++++++ crypto/akcipher.c | 108 +++ crypto/akcipherpriv.h | 55 ++ crypto/der.c | 189 ++++ crypto/der.h | 81 ++ crypto/meson.build | 6 + crypto/rsakey-builtin.c.inc | 200 +++++ crypto/rsakey-nettle.c.inc | 158 ++++ target/i386/tcg/bpt_helper.c => crypto/rsakey.c | 41 +- crypto/rsakey.h | 92 ++ docs/hyperv.txt | 270 ------ docs/system/arm/aspeed.rst | 62 ++ docs/system/i386/hyperv.rst | 288 ++++++ docs/system/target-i386.rst | 1 + docs/tools/virtiofsd.rst | 2 +- hw/arm/aspeed.c | 74 +- hw/arm/aspeed_ast10x0.c | 48 +- hw/arm/aspeed_ast2600.c | 32 +- hw/arm/aspeed_soc.c | 46 +- hw/audio/ac97.c | 758 ++++++++-------- hw/block/m25p80.c | 1 + hw/core/loader.c | 15 + hw/core/uboot_image.h | 213 +++-- hw/gpio/aspeed_gpio.c | 257 +++++- hw/gpio/trace-events | 4 + hw/ide/core.c | 6 +- hw/ide/macio.c | 4 +- hw/intc/riscv_aclint.c | 3 +- hw/riscv/opentitan.c | 2 +- hw/riscv/sifive_e.c | 2 +- hw/riscv/sifive_u.c | 28 +- hw/riscv/spike.c | 2 +- hw/riscv/virt.c | 27 +- hw/vfio/pci-quirks.c | 34 +- include/crypto/akcipher.h | 158 ++++ include/hw/arm/aspeed_soc.h | 13 + include/hw/gpio/aspeed_gpio.h | 16 +- linux-user/elfload.c | 12 +- linux-user/include/host/s390/host-signal.h | 7 + linux-user/linuxload.c | 12 +- linux-user/main.c | 4 +- linux-user/qemu.h | 12 +- linux-user/s390x/signal.c | 5 + linux-user/strace.c | 202 ++--- linux-user/strace.h | 4 +- linux-user/syscall.c | 83 +- linux-user/uname.c | 4 +- linux-user/uname.h | 2 +- linux-user/user-internals.h | 18 +- meson.build | 11 + qapi/crypto.json | 64 ++ qga/commands-posix.c | 123 +++ qga/commands-win32.c | 11 + qga/main.c | 2 + qga/qapi-schema.json | 86 ++ semihosting/arm-compat-semi.c | 4 +- target/i386/cpu.c | 16 + target/i386/cpu.h | 5 +- target/i386/kvm/hyperv-proto.h | 9 +- target/i386/kvm/kvm.c | 76 +- target/riscv/cpu.c | 91 +- target/riscv/cpu.h | 12 +- target/riscv/cpu_helper.c | 4 +- target/riscv/csr.c | 26 +- target/riscv/insn_trans/trans_rvv.c.inc | 58 +- target/riscv/translate.c | 17 +- tests/bench/benchmark-crypto-akcipher.c | 137 +++ tests/bench/meson.build | 1 + tests/bench/test_akcipher_keys.inc | 537 +++++++++++ tests/docker/dockerfiles/fedora-win32-cross.docker | 2 +- tests/docker/dockerfiles/fedora-win64-cross.docker | 2 +- tests/qtest/aspeed_gpio-test.c | 40 +- tests/qtest/aspeed_smc-test.c | 43 + tests/qtest/libqtest.c | 24 + tests/qtest/libqtest.h | 22 + tests/tcg/s390x/signals-s390x.c | 69 +- tests/unit/meson.build | 2 + tests/unit/test-crypto-akcipher.c | 990 +++++++++++++++++++++ tests/unit/test-crypto-der.c | 290 ++++++ util/thread-pool.c | 74 +- 83 files changed, 6383 insertions(+), 1227 deletions(-) create mode 100644 crypto/akcipher-gcrypt.c.inc create mode 100644 crypto/akcipher-nettle.c.inc create mode 100644 crypto/akcipher.c create mode 100644 crypto/akcipherpriv.h create mode 100644 crypto/der.c create mode 100644 crypto/der.h create mode 100644 crypto/rsakey-builtin.c.inc create mode 100644 crypto/rsakey-nettle.c.inc copy target/i386/tcg/bpt_helper.c => crypto/rsakey.c (53%) create mode 100644 crypto/rsakey.h delete mode 100644 docs/hyperv.txt create mode 100644 docs/system/i386/hyperv.rst create mode 100644 include/crypto/akcipher.h create mode 100644 tests/bench/benchmark-crypto-akcipher.c create mode 100644 tests/bench/test_akcipher_keys.inc create mode 100644 tests/unit/test-crypto-akcipher.c create mode 100644 tests/unit/test-crypto-der.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 6 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (9ab22ea8d626 -> 09b10c9363b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/linux. from 9ab22ea8d626 Merge v5.15.41 adds d9bae32c6a32 usb: gadget: fix race when gadget driver register via ioctl adds 5655455a06b8 io_uring: arm poll for non-nowait files adds fc2bee93e31b floppy: use a statically allocated error counter adds 879e811a41f8 kernel/resource: Introduce request_mem_region_muxed() adds 5166f933da0e i2c: piix4: Replace hardcoded memory map size with a #define adds bdf9bed734c3 i2c: piix4: Move port I/O region request/release code into [...] adds 9a8119ddc3c5 i2c: piix4: Move SMBus controller base address detect into [...] adds 08bc26f28bcb i2c: piix4: Move SMBus port selection into function adds 4b965566ca26 i2c: piix4: Add EFCH MMIO support to region request and release adds c4194b266bf7 i2c: piix4: Add EFCH MMIO support to SMBus base address detect adds d46b4ff3bb0b i2c: piix4: Add EFCH MMIO support for SMBus port select adds 5996d3601e77 i2c: piix4: Enable EFCH MMIO for Family 17h+ adds 8ed3e7523df3 Watchdog: sp5100_tco: Move timer initialization into function adds 3bb1b58c53b0 Watchdog: sp5100_tco: Refactor MMIO base address initialization adds b4c0f1600df4 Watchdog: sp5100_tco: Add initialization using EFCH MMIO adds 486bcceeed04 Watchdog: sp5100_tco: Enable Family 17h+ CPUs adds a12252908221 mm/kfence: reset PG_slab and memcg_data before freeing __k [...] adds 11e6a90ffd62 Revert "drm/i915/opregion: check port number bounds for SW [...] adds 25ddeb6be3d9 rtc: fix use-after-free on device removal adds fe9f2f3a68fc rtc: pcf2127: fix bug when reading alarm registers adds 3ec283635457 um: Cleanup syscall_handler_t definition/cast, fix warning adds 021138310983 Input: add bounds checking to input_set_capability() adds a6ae0d0b7b6b Input: stmfts - fix reference leak in stmfts_input_open adds 3fbccc4082c1 nvme-pci: add quirks for Samsung X5 SSDs adds 8b2ea9a3a159 gfs2: Disable page faults during lockless buffered reads adds 0a482fc4290b rtc: sun6i: Fix time overflow handling adds 625ff6f49789 crypto: stm32 - fix reference leak in stm32_crc_remove adds 4e640d4a9d14 crypto: x86/chacha20 - Avoid spurious jumps to other functions adds 3e3f28529a52 ALSA: hda/realtek: Enable headset mic on Lenovo P360 adds 2d5f611add95 s390/traps: improve panic message for translation-specific [...] adds 4e32c4c7016e s390/pci: improve zpci_dev reference counting adds 87c54a0b6475 vhost_vdpa: don't setup irq offloading when irq_num < 0 adds b6f7efb9221b tools/virtio: compile with -pthread adds d44ff3b100b9 nvmet: use a private workqueue instead of the system workqueue adds 9690e989d263 nvme-multipath: fix hang when disk goes live over reconnect adds 258a7a7fb568 rtc: mc146818-lib: Fix the AltCentury for AMD platforms adds 9a865748658b fs: fix an infinite loop in iomap_fiemap adds 98e0a2e96a78 MIPS: lantiq: check the return value of kzalloc() adds 1848108927ce drbd: remove usage of list iterator variable after loop adds 6d32c58b267a platform/chrome: cros_ec_debugfs: detach log reader wq from devm adds 2a8b2f6a91d1 ARM: 9191/1: arm/stacktrace, kasan: Silence KASAN warnings [...] adds d05cc5395e36 nilfs2: fix lockdep warnings in page operations for btree nodes adds e156805ae285 nilfs2: fix lockdep warnings during disk space reclamation adds 74f64e7d18bb ALSA: usb-audio: Restore Rane SL-1 quirk adds 48550a90e408 ALSA: wavefront: Proper check of get_user() error adds f380aba42199 ALSA: hda/realtek: Add quirk for TongFang devices with pop noise adds e085354dde25 perf: Fix sys_perf_event_open() race against self adds 0f71433eb705 selinux: fix bad cleanup on error in hashtab_duplicate() adds 42d8a6dc45fc Fix double fget() in vhost_net_set_backend() adds f5012bad435d PCI/PM: Avoid putting Elo i2 PCIe Ports in D3cold adds 9f8f09d92ab6 Revert "can: m_can: pci: use custom bit timings for Elkhart Lake" adds a3c0ba7870b9 KVM: x86/mmu: Update number of zapped pages even if page l [...] adds e9ea44dc030d arm64: paravirt: Use RCU read locks to guard stolen_time adds c42f9a5a3aae arm64: mte: Ensure the cleared tags are visible before set [...] adds 8a06f25f5941 crypto: qcom-rng - fix infinite loop on requests not multi [...] adds 24501d51c6b4 libceph: fix potential use-after-free on linger ping and resends adds 9d3ec4e5bf03 drm/amd: Don't reset dGPUs if the system is going to s2idle adds aaf0f01d074d drm/i915/dmc: Add MMIO range restrictions adds deec86168170 drm/dp/mst: fix a possible memory leak in fetch_monitor_name() adds 6a4c06e265ea dma-buf: fix use of DMA_BUF_SET_NAME_{A,B} in userspace adds 250f71a57559 dma-buf: ensure unique directory name for dmabuf stats adds b29774c208a3 ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi adds f234feed77d2 pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl adds 75e9562bb4bf ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group adds 794f7da40d65 ARM: dts: aspeed: Add ADC for AST2600 and enable for Raini [...] adds ed978be2afb5 ARM: dts: aspeed: Add secure boot controller node adds 53bac31c8d8a ARM: dts: aspeed: Add video engine to g6 adds 84b6e3d58955 pinctrl: mediatek: mt8365: fix IES control pins adds 636184fd1bd4 ALSA: hda - fix unused Realtek function when PM is not enabled adds 999ee216c65e net: ipa: record proper RX transaction count adds ad7491e92b71 net: macb: Increment rx bd head after allocating skb and buffer adds 36d8cca5b46f xfrm: rework default policy structure adds 952c24649638 xfrm: fix "disable_policy" flag use when arriving from dif [...] adds c22ee3a0674c net/sched: act_pedit: sanitize shift argument before usage adds 5f4197a020c0 netfilter: flowtable: fix excessive hw offload attempts af [...] adds 7613dcaceee2 netfilter: nft_flow_offload: skip dst neigh lookup for ppp [...] adds f96b2e067212 net: fix dev_fill_forward_path with pppoe + bridge adds b329889974ae netfilter: nft_flow_offload: fix offload with pppoe + vlan adds eb0ebbd4b0d4 Revert "PCI: aardvark: Rewrite IRQ code to chained IRQ handler" adds 2c560e90086f net: systemport: Fix an error handling path in bcm_sysport [...] adds 4ad09fdef55b net: vmxnet3: fix possible use-after-free bugs in vmxnet3_ [...] adds e35387a91318 net: vmxnet3: fix possible NULL pointer dereference in vmx [...] adds 12fd5b112117 ice: fix crash when writing timestamp on RX rings adds 737fbf0c3263 ice: fix possible under reporting of ethtool Tx and Rx statistics adds a2fd0fb3baaf ice: move ice_container_type onto ice_ring_container adds 2b037a3bedf8 ice: Fix interrupt moderation settings getting cleared adds 212ca7bb55d3 clk: at91: generated: consider range when calculating best rate adds 1b0c87de277e net/qla3xxx: Fix a test in ql_reset_work() adds 2372405955f9 NFC: nci: fix sleep in atomic context bugs caused by nci_s [...] adds 9cec84ed7ca7 net/mlx5: DR, Fix missing flow_source when creating multi- [...] adds 404877831816 net/mlx5e: Properly block LRO when XDP is enabled adds ad54e63b832d net: af_key: add check for pfkey_broadcast in function pfk [...] adds b88e30dcdf64 ARM: 9196/1: spectre-bhb: enable for Cortex-A15 adds 37bb8ea1542b ARM: 9197/1: spectre-bhb: fix loop8 sequence for Thumb2 adds 6e66d31618a9 mptcp: change the parameter of __mptcp_make_csum adds f67eeb03fea6 mptcp: reuse __mptcp_make_csum in validate_data_csum adds bf6800a39494 mptcp: fix checksum byte order adds e723f67cf0c7 igb: skip phy status check where unavailable adds b8835ba8c029 netfilter: flowtable: fix TCP flow teardown adds c1e170b11276 netfilter: flowtable: pass flowtable to nf_flow_table_iterate() adds 88b937673b35 netfilter: flowtable: move dst_check to packet path adds 11ad6bab26c8 net: bridge: Clear offload_fwd_mark when passing frame up [...] adds d0116a3f25e2 riscv: dts: sifive: fu540-c000: align dma node name with dtschema adds e80793223252 scsi: ufs: core: Fix referencing invalid rsp field adds 86eac8d76101 perf build: Fix check for btf__load_from_kernel_by_id() in libbpf adds e7c6ac3cc2b9 gpio: gpio-vf610: do not touch other bits when set the target bit adds d883b2e9afb1 gpio: mvebu/pwm: Refuse requests with inverted polarity adds dff5463bc750 perf regs x86: Fix arch__intr_reg_mask() for the hybrid platform adds 0b56244bda16 perf bench numa: Address compiler error on s390 adds d711a211844a scsi: scsi_dh_alua: Properly handle the ALUA transitioning state adds e2c54b945864 scsi: qla2xxx: Fix missed DMA unmap for aborted commands adds 4bcc2ab96fce mac80211: fix rx reordering with non explicit / psmp ack policy adds 020fb19eae9c nl80211: validate S1G channel width adds 9e87c228be71 selftests: add ping test with ping_group_range tuned adds 92dc6278dec9 Revert "fbdev: Make fb_release() return -ENODEV if fbdev w [...] adds 4f631f9f9d08 fbdev: Prevent possible use-after-free in fb_release() adds 7140149849d2 net: fix wrong network header length adds dc5c5b74075f nl80211: fix locking in nl80211_set_tx_bitrate_mask() adds b076fa169465 ethernet: tulip: fix missing pci_disable_device() on error [...] adds fd721da2df7a net: stmmac: fix missing pci_disable_device() on error in [...] adds d955f45d1a56 net: atlantic: fix "frag[0] not initialized" adds 2d1b336ffb77 net: atlantic: reduce scope of is_rsc_complete adds 948ddbdc5663 net: atlantic: add check for MAX_SKB_FRAGS adds 47840af397be net: atlantic: verify hw_head_ lies within TX buffer ring adds 149a25b82ca9 arm64: Enable repeat tlbi workaround on KRYO4XX gold CPUs adds 331c57431f7a Input: ili210x - fix reset timing adds a2797b550755 dt-bindings: pinctrl: aspeed-g6: remove FWQSPID group adds 649178c0493e mt76: mt7921e: fix possible probe failure after reboot adds 69c5d307dce1 lockdown: also lock down previous kgdb use adds e7647ddf0ac5 i2c: mt7621: fix missing clk_disable_unprepare() on error [...] adds 94bf8bfb009f afs: Fix afs_getattr() to refetch file status if callback [...] adds c5871dddc145 Linux 5.15.42 adds 42e6cfc44c5c Merge v5.15.42 adds d12cd0bf5d26 mptcp: Do TCP fallback on early DSS checksum failure adds 0e5bb338bf47 Linux 5.15.43 adds 09b10c9363b7 Merge v5.15.43 No new revisions were added by this update. Summary of changes: Documentation/arm64/silicon-errata.rst | 3 + .../bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 2 +- Makefile | 2 +- arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 15 + arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 15 + arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi | 9 +- arch/arm/boot/dts/aspeed-g6.dtsi | 35 +++ arch/arm/kernel/entry-armv.S | 2 +- arch/arm/kernel/stacktrace.c | 10 +- arch/arm/mm/proc-v7-bugs.c | 1 + arch/arm64/kernel/cpu_errata.c | 2 + arch/arm64/kernel/mte.c | 3 + arch/arm64/kernel/paravirt.c | 29 +- arch/mips/lantiq/falcon/sysctrl.c | 2 + arch/mips/lantiq/xway/gptu.c | 2 + arch/mips/lantiq/xway/sysctrl.c | 46 ++- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 2 +- arch/s390/kernel/traps.c | 6 +- arch/s390/pci/pci.c | 1 + arch/s390/pci/pci_bus.h | 3 +- arch/s390/pci/pci_clp.c | 9 +- arch/s390/pci/pci_event.c | 7 +- arch/x86/crypto/chacha-avx512vl-x86_64.S | 4 +- arch/x86/kvm/mmu/mmu.c | 10 +- arch/x86/um/shared/sysdep/syscalls_64.h | 5 +- drivers/block/drbd/drbd_main.c | 7 +- drivers/block/floppy.c | 18 +- drivers/clk/at91/clk-generated.c | 4 + drivers/crypto/qcom-rng.c | 1 + drivers/crypto/stm32/stm32-crc32.c | 4 +- drivers/dma-buf/dma-buf.c | 8 + drivers/gpio/gpio-mvebu.c | 3 + drivers/gpio/gpio-vf610.c | 8 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 14 + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +- drivers/gpu/drm/drm_dp_mst_topology.c | 1 + drivers/gpu/drm/i915/display/intel_dmc.c | 44 +++ drivers/gpu/drm/i915/display/intel_opregion.c | 15 - drivers/gpu/drm/i915/i915_reg.h | 16 + drivers/i2c/busses/i2c-mt7621.c | 10 +- drivers/i2c/busses/i2c-piix4.c | 213 ++++++++++--- drivers/input/input.c | 19 ++ drivers/input/touchscreen/ili210x.c | 4 +- drivers/input/touchscreen/stmfts.c | 8 +- drivers/net/can/m_can/m_can_pci.c | 48 +-- drivers/net/ethernet/aquantia/atlantic/aq_ring.c | 20 +- .../ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c | 7 + drivers/net/ethernet/broadcom/bcmsysport.c | 6 +- drivers/net/ethernet/cadence/macb_main.c | 2 +- drivers/net/ethernet/dec/tulip/tulip_core.c | 5 +- drivers/net/ethernet/intel/ice/ice_base.c | 2 + drivers/net/ethernet/intel/ice/ice_ethtool.c | 38 +-- drivers/net/ethernet/intel/ice/ice_lib.c | 16 +- drivers/net/ethernet/intel/ice/ice_main.c | 7 +- drivers/net/ethernet/intel/ice/ice_ptp.c | 19 +- drivers/net/ethernet/intel/ice/ice_txrx.h | 17 +- drivers/net/ethernet/intel/igb/igb_main.c | 3 +- drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 7 + .../mellanox/mlx5/core/steering/dr_action.c | 6 +- .../ethernet/mellanox/mlx5/core/steering/dr_fw.c | 4 +- .../mellanox/mlx5/core/steering/dr_types.h | 3 +- .../ethernet/mellanox/mlx5/core/steering/fs_dr.c | 4 +- .../ethernet/mellanox/mlx5/core/steering/mlx5dr.h | 3 +- drivers/net/ethernet/qlogic/qla3xxx.c | 3 +- drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 4 +- drivers/net/ipa/gsi.c | 6 +- drivers/net/ppp/pppoe.c | 1 + drivers/net/vmxnet3/vmxnet3_drv.c | 6 + drivers/net/wireless/mediatek/mt76/mt7921/dma.c | 115 ------- drivers/net/wireless/mediatek/mt76/mt7921/mcu.c | 20 +- drivers/net/wireless/mediatek/mt76/mt7921/pci.c | 121 ++++++++ drivers/nvme/host/core.c | 1 + drivers/nvme/host/multipath.c | 25 +- drivers/nvme/host/nvme.h | 4 + drivers/nvme/host/pci.c | 5 +- drivers/nvme/target/admin-cmd.c | 2 +- drivers/nvme/target/configfs.c | 2 +- drivers/nvme/target/core.c | 24 +- drivers/nvme/target/fc.c | 8 +- drivers/nvme/target/fcloop.c | 16 +- drivers/nvme/target/io-cmd-file.c | 6 +- drivers/nvme/target/loop.c | 4 +- drivers/nvme/target/nvmet.h | 1 + drivers/nvme/target/passthru.c | 2 +- drivers/nvme/target/rdma.c | 12 +- drivers/nvme/target/tcp.c | 10 +- drivers/pci/controller/pci-aardvark.c | 48 ++- drivers/pci/pci.c | 10 + drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 14 +- drivers/pinctrl/mediatek/pinctrl-mt8365.c | 2 +- drivers/platform/chrome/cros_ec_debugfs.c | 12 +- drivers/rtc/class.c | 9 + drivers/rtc/rtc-mc146818-lib.c | 16 +- drivers/rtc/rtc-pcf2127.c | 3 +- drivers/rtc/rtc-sun6i.c | 14 +- drivers/scsi/device_handler/scsi_dh_alua.c | 3 +- drivers/scsi/qla2xxx/qla_target.c | 3 + drivers/scsi/ufs/ufshpb.c | 19 +- drivers/usb/gadget/legacy/raw_gadget.c | 2 + drivers/vhost/net.c | 15 +- drivers/vhost/vdpa.c | 5 +- drivers/video/fbdev/core/fbmem.c | 5 +- drivers/video/fbdev/core/fbsysfs.c | 4 + drivers/watchdog/sp5100_tco.c | 334 ++++++++++++++------- drivers/watchdog/sp5100_tco.h | 7 + fs/afs/inode.c | 14 +- fs/gfs2/file.c | 4 +- fs/io_uring.c | 7 - fs/ioctl.c | 2 +- fs/nilfs2/btnode.c | 23 +- fs/nilfs2/btnode.h | 1 + fs/nilfs2/btree.c | 27 +- fs/nilfs2/dat.c | 4 +- fs/nilfs2/gcinode.c | 7 +- fs/nilfs2/inode.c | 159 +++++++++- fs/nilfs2/mdt.c | 43 ++- fs/nilfs2/mdt.h | 6 +- fs/nilfs2/nilfs.h | 16 +- fs/nilfs2/page.c | 7 +- fs/nilfs2/segment.c | 9 +- fs/nilfs2/super.c | 5 +- include/linux/ceph/osd_client.h | 3 + include/linux/ioport.h | 2 + include/linux/mc146818rtc.h | 2 + include/linux/netdevice.h | 2 +- include/linux/security.h | 2 + include/net/ip.h | 1 + include/net/netns/xfrm.h | 6 +- include/net/xfrm.h | 58 ++-- include/uapi/linux/dma-buf.h | 4 +- kernel/debug/debug_core.c | 24 ++ kernel/debug/kdb/kdb_main.c | 62 +++- kernel/events/core.c | 14 + mm/kfence/core.c | 11 + net/bridge/br_input.c | 7 + net/ceph/osd_client.c | 302 ++++++++----------- net/core/dev.c | 2 +- net/core/skbuff.c | 4 +- net/ipv4/route.c | 23 +- net/key/af_key.c | 6 +- net/mac80211/rx.c | 3 +- net/mptcp/options.c | 40 ++- net/mptcp/protocol.h | 4 +- net/mptcp/subflow.c | 36 ++- net/netfilter/nf_flow_table_core.c | 80 ++--- net/netfilter/nf_flow_table_ip.c | 19 ++ net/netfilter/nft_flow_offload.c | 28 +- net/nfc/nci/data.c | 2 +- net/nfc/nci/hci.c | 4 +- net/sched/act_pedit.c | 4 + net/wireless/nl80211.c | 18 +- net/xfrm/xfrm_policy.c | 10 +- net/xfrm/xfrm_user.c | 43 ++- security/security.c | 2 + security/selinux/ss/hashtab.c | 3 +- sound/isa/wavefront/wavefront_synth.c | 3 +- sound/pci/hda/patch_realtek.c | 17 +- sound/usb/quirks-table.h | 9 + tools/build/Makefile.feature | 1 + tools/build/feature/Makefile | 4 + ...c => test-libbpf-btf__load_from_kernel_by_id.c} | 2 +- tools/perf/Makefile.config | 7 + tools/perf/arch/x86/util/perf_regs.c | 12 + tools/perf/bench/numa.c | 2 +- tools/perf/util/bpf-event.c | 4 +- tools/testing/selftests/net/fcnal-test.sh | 12 + tools/virtio/Makefile | 3 +- 168 files changed, 1943 insertions(+), 1064 deletions(-) copy tools/build/feature/{test-libbpf.c => test-libbpf-btf__load_from_kernel_by_id [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 6 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (6f4dc5dae605 -> a94d454390c6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project. from 6f4dc5dae605 Add support of the next Ubuntu (Ubuntu 22.10 - Kinetic Kudu) adds 818cc9b285e8 [AMDGPU][MC][GFX940] Disable v_mac_f32_dpp adds 0eccc92fa0fd Revert "[clang][driver] Dynamically select gcc-toolset/dev [...] adds 72832efc941a [SPIR-V] Allow setting SPIR-V version via target triple. adds 45226d04f016 [InstCombine] Reuse icmp of and/or folds for logical and/or adds bea86a2d3f23 [SLP][NFC]Add a test for extracting scalar from undef resu [...] adds 6793c63e8851 [InstCombine] add tests for icmp of zext i1; NFC adds 1ebad988b110 [InstCombine] fold icmp of zext bool based on limited range adds 3e0be5610ff0 [MSVC, ARM64] Add __writex18 intrinsics adds 2ac5ebedeac4 [SLP]Do not emit extract elements for insertelements users [...] adds a3a85fe59f48 [mlir] Add RSqrt tp ComplexOps.td. adds 9293539064ae [TableGen] Remove an untrue statement from the docs adds f3eeefe4490e [mlir] Add Expm1 tp ComplexOps.td. adds b050686c4b30 [NFC][flang] Change the OpenMP atomic read/write test cases adds ec55f0bd5833 [mlir][bufferization][NFC] Improve assembly format of Allo [...] adds bb82f746129f Revert "Revert "[AArch64] Set maximum VF with shouldMaximi [...] adds 131249cd1fb4 [InstCombine] Add tests for recursive and/or of icmp folds (NFC) adds f45c1e436e47 [InstCombine] Change operand order in recursive and/or of [...] adds 89e663c4f83a [clang-tidy] Improve add_new_check.py to recognize more checks adds 02d3499a46cc NFC: Silence two warnings for unused bufferization symbols [...] adds a1dcfb75ea8c [clang] Module global init mangling adds 210c4e7fc887 [mlir][bufferization] Fix Python bindings adds c30a8c808376 [lldb] Fix should_skip_simulator_test decorator adds 598c5ddba6b0 [mlir][bufferize] Support fully dynamic layout maps in Buf [...] adds 334f63e7c39f [mlir][NvGpuToNVVM] Fix missing i4 support for nvgpu.mma.sync adds 82c85bf38e9d [mlir][bufferize][NFC] Update One-Shot Bufferize pass docu [...] adds 7085cb6011d4 [mlir][NvGpuToNVVM] Fix byte size calculation in async cop [...] adds 224a8653c98e [llvm-nm][docs] Document -W and -U adds 46c1f77e160a Add [opt] suffix to optimized stack frame in lldb-vscode adds 0fe220a33179 Show error message for optimized variables adds bc2fe4a0d675 [RISCV] Add basic fault-first load coverage for VSETVLI insertion adds dbd1ba28a3a4 [PS5] Disable a test, same as PS4 adds 2f2ca30d0aba Fix an unused variable warning in no-asserts build mode adds 0da230ff4439 [lldb] Improve formatting of dlopen error messages (NFC) adds 4f1e64b54f59 [MSVC, ARM64] Add __readx18 intrinsics adds 760298adc264 [lldb] Specify aguments of `image list` adds 75eb0576debd [AArch64] Add test case for pr55644. NFC adds 569d8945f311 [DAGCombiner][AArch64] Don't fold (smulo x, 2) -> (saddo x [...] adds e8c20d995bed [IR] add and use pattern match specialization for sqrt int [...] adds 806e8a1c8e54 [Sanitizer][Darwin] Add SANITIZER_DRIVERKIT platform macro adds bedd3ee88152 [mlir][tosa] Change tosa.depthwise_conv2d's ending reshape [...] adds f0a61c2ce2af Remove `friend` classes from TypeCategoryMap adds eebc1fb772c5 [libc++] Granularize parts of <type_traits> adds b177a90ce7b5 [libc++] Always enable the ranges concepts adds 570390580567 [libc++] Assume that push_macro and pop_macro are available adds 19e21d91bc17 [libc++] Add auto to the list of required extensions in C++03 adds 40f7fca3d91f [libc++] Add ranges::max_element to the synopsis and ADL-p [...] adds 7ffc99bedcd2 [gn build] Port eebc1fb772c5 adds 1962389979be [Sanitizer][Darwin] Add explanation for Apple platform macros adds 319a722f6fca [SLP][NFC]Improve compile time, NFC. adds 84acdd32ca91 [SVEInstrFormats] Ensure scatter instructions are named co [...] adds 86617256864e [AArch64] Add tests with free shuffles for indexed fma variants. adds e7afa23366f5 [mlir] Use 'native' instead of 'llvm_has_native_target' in [...] adds 6cb3fdc278b9 [libc++] Remove duplicate tests for callable concepts adds 217531f12b4b [PS5] Make driver's PIC behavior match PS4 adds 12bae5f3e2d2 Remove duplicate fields in RAGreedy adds 97c3ef5c8a28 [SelectOpti][2/5] Select-to-branch base transformation adds cead4eceb01b [symbolizer] Parse DW_TAG_variable DIs to show line info f [...] adds 40b9a2616e45 emitStringLiteralDef: Return earlier here. NFC. adds a1d490319a9e Fix lldb-vscode frame test failure adds c8e087082927 [TableGen] emitStringLiteralDef: Pad trailing '\0' at the [...] adds 8725dc5e2f73 [libc][docs] Use same formatting for headers in source_layout adds 21c060c497fd github: Switch release PR repository to llvm/llvm-project- [...] adds 24239e246c78 Add new hidden option -print-on-crash that prints out IR t [...] adds 4f89ff3fc71b [test][clang] Move -O3 in command line adds 63d69a21b7a7 Apply clang-tidy fixes for performance-unnecessary-value-p [...] adds f38765a813e6 Apply clang-tidy fixes for modernize-use-override in Spars [...] adds 994a1841eb30 Apply clang-tidy fixes for modernize-use-bool-literals in [...] adds e5d8fb690e35 [BasicBlockUtils] Add corner case test for loop metadata. adds 4f93d5cc1d47 [BasicBlockUtils] Do not move loop metadata if outer loop header. adds 74f984197700 [lld][WebAssembly] Allow use of statically allocated TLS region. adds e141e719e166 [flang] Fix character length calculation for Unicode component adds b8feeba0b407 [RISCV] Make old JIT ExecutionEngine tests unsupported adds 9f33dd733ff5 [flang] Allow global scope names that clash with intrinsic [...] adds 037732289798 [flang] Ignore BIND(C) binding name conflicts of inner procedures adds c0ec1036d653 [lld-macho][nfc] Run clang-format on lld/MachO/*.{h,cpp} adds 8b42bc5662ca [SelectOpti][3/5] Base Heuristics adds d7ebb7461151 [SelectOpti][4/5] Loop Heuristics adds ae9489025f1a [NFC][Metadata] Define move constructor and move assignmen [...] adds 602682225ad6 bugfix in InfiniteLoopCheck to not print warnings for unev [...] adds 63ecb7dcc80d bugfix in InfiniteLoopCheck to not print warnings for unev [...] adds ca81abcfd752 updated canResolveToExpr to accept both statements and exp [...] adds 6c12ae8163c7 Exposes interface to free up caching data structure in DWA [...] adds 244494a201f8 [Hexagon] Fix test on OpenBSD adds a111fb960108 [SelectOpti][5/5] Optimize select-to-branch transformation adds 1786e70bd85d Revert "[SelectOpti][5/5] Optimize select-to-branch transf [...] adds 7f680b260ffe [flang] Allow more forward references to ENTRY names adds 7604c59bd233 [OpenMP][IRBuilder] `omp task` support adds 62a9b36fcf72 [MachineSink] replace MachineLoop with MachineCycle adds 496156ac57da [X86][AMX] Multiple configure for AMX register. adds 1868f3c17db9 [gn build] Port 496156ac57da adds cb8681a2b3ad [RISCV] Fix RVV stack frame alignment bugs adds 08c9fb844710 [RISCV] Ensure the entire stack is aligned to the RVV stac [...] adds be84f91f87a7 [LegalizeTypes][VP] Fix OpNo in WidenVecOp_VP_SCATTER adds 81c648a3d909 [LoopUnroll] Freeze tripcount rather than condition adds bb8e02325ffc llvm-reduce: improve basic-blocks removal pass adds 973c7e0654b2 [InstCombine] Use different icmp pattern in test (NFC) adds c0e06c7448a2 [InstCombine] Handle logical and/or in recursive and/or of [...] adds c3a24882903d [libc++] type_traits: use __is_core_convertible in __invokable_r. adds 7f7ef0ed617e [LegalizeTypes][NFC] Fix node name in assertion message adds b07880454ba3 [libc++] Replace modulus operations in std::seed_seq::gene [...] adds 1d1a191edcfa [libc++] Implement ranges::reverse adds 3245e2edd50c [gn build] Port 1d1a191edcfa adds e1fcf998dc95 [InstCombine] Add splat vector test for asymmetric masked [...] adds 5abaabed22d7 [InstCombine] Use m_APInt() in asymmetric masked icmp fold adds 4aa32e1b17da [InstCombine] Add tests for masked icmps with bitwise+logi [...] adds a7c079aaa227 [InstCombine] Support logical and in masked icmp fold adds b166aa833e44 [RISCV][NFC] Change interface of RVVIntrinsic::getSuffixStr adds f50be3d21808 [TableGen] Remove code beads adds 64186e9b351a [X86] Add test showing failure to expand <2 x float> fpow [...] adds 3b1de7ab6097 [X86][AMX] Reduce the compiling time for non-amx code. adds 1968f765c359 [Test] Add LICM test for PR55672 showing problem with free [...] adds 143ca151061d Fix comment in test. NFC adds d61ded1034bb [OpenCL] Make -cl-ext a driver option. adds 96323c9f4c10 [X86] scalar_widen_div.ll - remove non-generated CHECKs adds 8d2918750684 Minutes for security group sync-ups have moved to Discourse. adds be4eaf10eef7 [Clang][CodeGen] Fix the cmse-clear-return.c test. adds 1e2b746390e3 Revert "[TableGen] Remove code beads" adds 8b5d9cbbfedc [x86][DAG] Unroll vectorized FREMs that will become libcalls adds f9c806ae5c53 [SLP][NFC]Make isFirstInsertElement a weak strict ordering [...] adds f37101983fc9 [OpenMP] Add `-Xoffload-linker` to forward input to the de [...] adds 0360b9f1599b [pseudo] (trivial) bracket-matching adds e7ddb4f6b4e0 [InstCombine] Add tests for freeze of load with metadata (NFC) adds b2a13d3e2ddb [InstCombine] Use IRBuilder in freeze pushing transform (PR55619) adds a9a6e200125e [libc++] Rename the generic-singlethreaded CI job to gener [...] adds 3eab6c591141 [InstCombine] Add test for GEP difference with bitcasts (NFC) adds e6e0eb3bc89d [InstCombine] Strip bitcasts in GEP diff fold adds 1586e1dc9576 [AMDGPU][MC][GFX11] Support base+soffset+offset SMEM loads. adds 6c80267d0ff4 [CostModel][X86] getScalarizationOverhead - improve extrac [...] adds 89aaa2d03327 [mlir][vector] Add new lowering mode to vector.contractionOp adds e0fe9785d352 [TypePromotion] Avoid unnecessary trunc zext pairs adds ebe2e4f5b773 [libcxx] Add sort.bench.cpp to libcxx/benchmarks/CMakeLists.txt adds 11455e475889 [DAG] Unroll vectorized FPOW instructions before widening [...] adds 6fc0bc5b0fa7 Fix behavior of is_fp_class on empty class set adds deb62f5ad649 [flang][runtime] Clean up asynchronous I/O APIs adds 57d239e4ad11 [mlir] Breakdown diagnostic string literals adds 96bbe1bd61c6 [mlir] Rename mlir::SmallVector -> llvm::SmallVector adds dc8a9a03ecdb [libc++][NFC] Move definitions around in string.cpp to red [...] adds 632518404942 [libc++][NFC] Whitespace refactoring of string.cpp for con [...] adds 154f93ca90e0 [gn build] (semi-automatically) port 0360b9f1599b adds a1a14e817eeb [Clang] Avoid misleading 'conflicting types' diagnostic wi [...] adds 574f9dfee86a [flang] Extension: Accept Hollerith actual arguments as if [...] adds 1b976f2cb22f [gn build] Reformat all build files adds cddeb78e8d5b [RISCV] Add test cases showing failure to remove mask on r [...] adds 415b9f595d4d Recommit "[RISCV] Use selectShiftMaskXLen ComplexPattern f [...] adds 28432b0f6556 [PS5] Verify defaults to -fno-stack-size-section adds d90e866a191f [flang][runtime] INQUIRE(UNIT=666,NUMBER=n) must set n=666 adds 11dd508bd43d NFC. Clang-formatting. adds efebb27b745a Revert "[PS5] Verify defaults to -fno-stack-size-section" adds ee8524087c78 [libclang] add supporting for indexing/visiting C++ concepts adds 5df6669d45bc [AMDGPU] Enforce alignment of image vaddr on gfx90a adds 4a3e2aff5f84 Reland "[PS5] Verify defaults to -fno-stack-size-section" adds 175833ed6f62 [clangd] Handle '--' in QueryDriverDatabase adds c8644ea88ea2 [compiler-rt][lsan] Update CanBeAHeapPointer for AArch64 adds 8527f9e4437f [flang][runtime] Handle BACKSPACE after reading past EOF adds 9ba937112fa6 [OpenMP] Add parsing/sema support for omp_all_memory reser [...] adds 3723868d9e07 [OpenMP] Fix file arguments for embedding bitcode in the l [...] adds b159108bc5eb Sema: adjust assertion to account for deduced types adds f6038cdca031 [compiler-rt][scudo] Simplify TBI checks adds 26c4cf23915a [AMDGPU] Disable newly added gfx90a global isel image tests. NFC. adds 1e1f60c605a9 [flang] Alternate entry points with unused arguments adds 03095bd97b81 [flang] Fix crash in semantics after PDT instantiation adds 67be40df6eef Recommit "[SelectOpti][5/5] Optimize select-to-branch tran [...] adds 676eaa2ca967 [compiler-rt][scudo] Add missing preprocessor token adds 6edbdf80cac1 Revert "[compiler-rt][scudo] Add missing preprocessor toke [...] adds 05527b68a0be [InstCombine] fold more shuffles with FP<->Int cast operands adds 9df0568b0733 [SLP] Fix crash caused by reorderBottomToTop(). adds c428620913ba [flang] Catch calls to assumed-length character functions adds 8246b2e15656 [Sanitizers][Darwin] Replace SANITIZER_MAC with SANITIZER_ [...] adds 6eb9e0f5ebb9 [clang][dataflow] Make limit on fixpoint-algorithm iterati [...] adds cd2a8df89165 [flang] Don't prematurely resolve subprogram names adds 1b34f1e99656 [clang][test] mark tests added in ee8524087c78 as unsuppor [...] adds bd92bca53517 [flang] Fix purity testing for generic calls adds 48a8a3eb2f56 [flang] Accept defined assignment with CLASS(*) RHS adds dcf9ba82d99c [flang] Fix false error for multiple defined I/O subroutines adds 2f93bbb9cd7c [clang][dataflow] Relax `Environment` comparison operation. adds d52a6e75b0c4 [flang] Process subprogram BIND(C,NAME=...) locally adds 0a79113b9e06 [flang] Replace crash and improve a semantics TODO message adds cdd54cbdd937 [flang][runtime] Catch decimal integer input overflow adds 0bf3c38b0be3 Fix build failure revealed by c35ca3a1c78f693b749ad1174235 [...] adds 29f167abcf7d [Flang][OpenMP] Fixes for unstructured OpenMP code adds 6f215ca680fd [SelectionDAG] Add support to widen ISD::STEP_VECTOR operations. adds a95ecb20bca8 [RISCV] Hoist VSETVLI out of idiomatic fixed length vector loops adds fb948572e033 [riscv] Use getFirstInstrTerminator [nfc] adds d2ee2c9c8d34 [RISCV] Add an operand kind to the opcode/imm returned fro [...] adds 5799f843a220 [mlir][sparse] add new complex ops to reduction recognition adds 948d931323a1 [RISCV] Ensure the forwarded AVL register is alive adds 239094cdee8e [OpenMP] Add codegen for 'omp_all_memory' reserved locator. adds 2a5d5078d5da [libc] Add the pthread_mutex_t type. adds 46c0ec9df46f [InstCombine] Fold memrchr calls with sequences of identic [...] adds a9e354c83b9e [mlir][sparse] complex lowering adds 9426df95b1b2 [LLVM][IR] Fix assert in ConstantExpr::getPtrToInt so all [...] adds b2b0322a8114 [DFSan] Add option to specify individual library files, an [...] adds 9ff4f2dfea63 [clang-tidy] Fix #55134 (regression introduced by 5da7c04) adds f179f403c857 [lldb] Disable modules in Apple-lldb-base adds 436eaf8d32fa [lldb] Improve TestAppleSimulatorOSType.py error message adds b976fac6eec4 [BOLT][NFC] Remove unused BF::computeLocalUDChain method d [...] adds 5d8247d4c7c4 [BOLT][NFC] Use for_each to simplify printLoopInfo adds 69f87b6c292b [BOLT][NFC] Customize endline character for printInstruction(s) adds f7581a3969c4 [BOLT][NFC] Use ListSeparator in BinaryFunction print methods adds bebf7bdf9aad [clang-format][NFC] Insert/remove braces in clang/lib/Format/ adds 793bb7049db0 [InstCombine] add test for trunc-shl-trunc ; NFC adds 269e3f7369d2 [InstCombine] [NFC] Move transforms for truncated shifts i [...] adds a1ffba8d5286 [C++20] [Coroutines] Conform the updates for CWG issue 2585 adds 80c4910f3d4c Revert "[MachineSink] replace MachineLoop with MachineCycle" adds b06049bc3b79 [libc++][NFC] Add more tests to `move_{iterator,sentinel}`. adds e59f648d698e Move GCC-compatible pod-packing change to v15/old behavior [...] adds fd937366579e [RISCV] Replace untested code with assert adds 360411957b6f [flang][MSVC] Fix building with `/permissive-` flag adds 66db5312bd66 [RISCV] Fix vnsrl/vnsra isel patterns that are dropping VL. adds 232bf8189ef7 [OpenMP] atomic compare fail : Parser & AST support adds ca27f3e3b26e [Clang][OpenMP] Support for omp nothing adds 9698a445c664 Fix warning by handling OMPC_fail in switch statement. adds 643df8fa8ef5 [libc++] Make sure that all headers can be included with m [...] adds 8a6698b52382 [ValueTracking] Loads with !dereferenceable metadata canno [...] adds b3c5c22c1378 [mlir] Add `complex.atan2` operation. adds 29a5a7c6d47a [RISCV] Add pre-emit pass to make more instructions compressible adds 7af89a379cce [libc++] Implement ranges::fill{, _n} adds 1ba42dd04b8d [VPlan] Use MapVector for LiveOuts for deterministic iteration. adds b81171ce19d1 [gn build] Port 29a5a7c6d47a adds 9ffb5944a699 [gn build] Port 7af89a379cce adds f75bc5bfc8f8 [analyzer] Fix symbol simplification assertion failure adds 0d7f8d42fd17 [OpenCL] Remove argument names from async copy builtins adds 089036444eb5 [XCORE][CodeGen][NFC] Revert: Use ArrayRef in TargetLoweri [...] adds 8919447c71ab [mlir] Fix warning `missing base in copy ctor` adds cd2292ef8245 [pseudo] A basic implementation of compiling cxx grammar a [...] adds c6e45ea0743b [VPlan] Exit earlier when trying to widen with scalar VFs. adds f1df6515e3fe [pseudo] Add missing dependency, fix shared library build. adds 87936c7b131e [LoopVectorize] Fix assertion failure in fixReduction when [...] adds 730dc4e9bce8 [Clang] Added options for integrated backend. adds 18cb3b35066e [ARM] Fix vcvtb/t.f16 input liveness adds c85688a22ba7 [gn build] (manually) port some of cd2292ef8245 adds 512d06b04513 [mlir][openmp] Add check for types of operands in omp.atom [...] adds 1ad9b2662273 [MLIR][Linalg] Adjust documentation (NFC) adds f3c1d281767a [clang-tidy] Extend SimplifyBooleanExpr demorgan support. adds 09ef6da8dcd8 [clang-tidy] Update docs for SimplifyDeMorganRelaxed adds f96aa834d7d7 Test C DR conformance (part three of many) adds d5ebba2aa683 [x86] add test with volatile load; NFC adds fae6bd7563ca [lld-macho] Support -non_global_symbols_strip_list, -non_ [...] adds 58b76492c1fe [tests] precommit tests for D126040 adds b3c856d10cee [MLIR][NFC] Fix the Conversion/MemRefToSPIRV/alloc.mlir test. adds 788463e72af8 [pseudo-gen] Add -o flag, make --grammar required adds c673d67bc76b [AST] Dont invalidate a ref-type var decl if it has no ini [...] adds a17fc7fd8650 Fix unused-variable warning, NFC. adds d8afac7a2b73 [libc++] Use Python subprocess instead of libc++'s own utilities adds d8dda57ae779 [PS5] Default to -fno-rtti adds 6e12711081d7 [VP][fix] Don't discard masks in reductions adds 8383351d4517 [libc++] Remove conditional include adds 3c057ac2c284 [MLIR][Presburger] Add getDomainSet, getRangeSet to Intege [...] adds 6346a026af79 [PhaseOrdering] Add test for unprofitable loop load PRE ba [...] adds fb857ded70e1 [MLIR][Presburger] Add inverse to IntegerRelation adds e40c4dd66218 [llvm-rc] Avoid which(1) dependency in windres-prefix.test adds 046f90173567 [TableGen] Undeprecate 'field' when used with the CodeEmit [...] adds a4a438f05a5c [riscv] Add coverage for fixed length vector loops using LMUL adds 5a2dbe49bedc [libc++][test] Verify std::ranges::rbegin, crbegin, rend, [...] adds 413fbb045d71 [mlir][scf] Retain existing attributes in scf.for transforms adds e0ea1fc6f8aa [mlir][spirv] Fix capability check for 64-bit element types adds dd336b6891f1 [RISCV] Restructure comment and add clarifying assert to g [...] adds 2a3b6f2cba92 [RISCV] Hoist VSETVLI vlmax, vtype out of scalable loops adds 6f4644d194da [clang] Don't parse MS attributes in `ParseExportDeclaration()`. adds 9da89651a8d5 [llvm-objcopy][ObjectYAML][mips] Add MIPS specific ELF sec [...] adds 06fee478d217 [X86] Add isSimple check to the load combine in combineExt [...] adds 172149e98c2a [RISCV] Preserve fast math flags in lowerVPOp. adds 18e6b8234a0d Allow pointer types for atomicrmw xchg adds 2a28467e5389 AMDGPU/GISel: Factor out AMDGPURegisterBankInfo::buildRead [...] adds 0c8fdd72309e [mlir] Fix Tensor_InsertSliceOp description adds 4391625255c6 [lldb] Fix an unused function warning adds a648724921b3 Reland "[llvm-pdbutil] Add options to only dump symbol rec [...] adds afc90101a5b0 Revert "AMDGPU/GISel: Factor out AMDGPURegisterBankInfo::b [...] adds affa1b1cc52d AMDGPU/GISel: Factor out AMDGPURegisterBankInfo::buildRead [...] adds 8a1984c25e2c [Clang][Docs] Document `-Xoffload-linker` flag adds ba3f85390bde [OpenMP] Add diagnostic for unterminated 'omp [begin] decl [...] adds 69da3b6aead2 Revert "[OpenMP] atomic compare fail : Parser & AST support" adds 9368bf9023ee Removing this as part of the revert done in 69da3b6aead2e7 [...] adds be2cb824d0d4 [riscv] Remove mutation of prior vsetvli from insertion dataflow adds d3187dd5f0f0 [SLP] add minimum test for miscompile (PR55688); NFC adds 0ee1c0388ca3 [mlir][bufferize] Remove hoisting functionality from One-S [...] adds 23bb550eeba4 DWARFVerifier: Change vector of IntervalMap to vector of u [...] adds 504736cedff3 [clang][extract-api] Don't emit symbols prefixed with an u [...] adds 4baae166ce33 [pseudo] Fix pseudo-gen usage when cross-compiling adds 1f06398e96d4 Reapply "[RISCV] Enable strict assertions in InsertVSETVLI [...] adds 997b072e10d2 C++ DR2394: Const-default-constructible for members. adds bbad981dab49 [flang] Address regression (calls to assumed-length charac [...] adds 7f5439945b1f [compiler-rt][test] Fix flake in symbolize_stack test adds c4bc416418a2 [LLVM] Add rcp.approx.ftz.f32 intrinsic adds 1a51ab766f47 [AMDGPU] gfx11 export instructions adds ef1ea5ac0133 [AMDGPU] gfx11 vinterp instructions MC support adds c088fbe7decc [mlir][PDLL] Allow numeric result indexing for unregistered op adds 79e09af1d6e1 [clang] Fix the begin location of concepts specialization [...] adds 8e757c6b500d Fix conversion error to Expected adds 835e09c4c3ee [AMDGPU] gfx11 FLAT Instructions adds 5c9f3ec4ad5d [LLDB][NativePDB] Check for missing type info to avoid crash. adds ab249fd87d30 [mlir][bufferization][NFC] Remove dead code adds b7c8c4d8cf07 [Clang] Introduce `--offload-link` option to perform offlo [...] adds 256a52d9aac8 Round up zero-sized symbols to 1 byte in `.debug_aranges`. adds e51a6b7374ca [BOLT][DWARF] Convert dwarf5-df-* tests to assembly tests adds bed9efed71b9 [MCDisassembler] Disambiguate Size parameter in tryAddingS [...] adds 67e2e6e66d0a [gn build] Set llvm_have_mallinfo2 to true by default adds 33b598a808b9 [clang][dataflow] Relax assert on existence of `this` poin [...] adds 5520c5839016 [clang][dataflow] Fix incorrect CXXThisExpr pointee for lambdas adds 10f41a214767 [SLP]Fix PR55688: Miscompile due to incorrect nuw/nsw handling. adds ec51971eae02 [memprof] Keep and display symbol names in the RawMemProfReader. adds 801ac2ebf19c [bazel] Bump to 15.0.0git adds 65ab6b495a6a [bazel] Unset REVISION as if LLVM_APPEND_VC_REV=OFF, for now. adds 3bf5c2c8ec30 [SLP]Do not try to generate ScatterVectorize if it will be [...] adds 534b19fbaa5a [gn build] Manually port bed9efed71 adds 6b99dc29c6ef [flang] Fix crash from a blank BIND(C,NAME="") on subprogram adds 3d546191ad9d [gn build] Fix D126415 to only set `llvm_have_mallinfo2 = [...] adds c8e7c0e5dc1e [NFC][llvm-ml] Rename rip-relative-addressing.asm to rip_r [...] adds bef4da4a6aef Skip testing of watchpoint hit-count/ignore-count on multi [...] adds 338e76f8ee38 Lower complex.expm1 to standard dialect. adds a14057d4bddb [mlir][sparse] Add more complex operations. adds 949c39efb103 [flang] Update intrinsic module source files adds ddd692e9d572 [flang] Allow forward reference to ENTRY from generic interface adds 085acede578f [RISCV][NFC] Remove solved TODO for combining constant shifts adds 8aa6b05deb2a [LegalizeTypes][VP] Add widen and split support for VP_TRUNCATE adds 65fd1e91b0f8 [llvm-ml] Add support for the .S extension adds b271488e8b13 [RISCV] Replace ISD::FP_EXTEND and ISD::FP_ROUND with RVV VL op. adds 41aab93afc23 [InstCombine] bitcast(logic(bitcast(X), bitcast(Y))) -> bi [...] adds 1486a9c9fe82 [InstCombine] [NFC] refector foldXorOfICmps adds 80ab16d0ed75 [NFC][LoopCacheAnalysis] Update test cases to make sure th [...] adds 52698a33d031 [mlir][bufferization] Clean up imports and code comments adds ebc77f012fb8 [mlir:LSP] Link the test dialect into mlir-lsp-server adds b2cc40fd67f6 [mlir:Printer][NFC] Add utility methods for printing escap [...] adds 6f3f8b669b61 [GuardWidening] Update test with update_test_checks.py adds 0a838ad51707 [GuardWidening] Add test showing incorrect behavior with n [...] adds fb67d683db46 [iwyu] Handle regressions in libLLVM header include adds c2eccc67ce07 [GuardWidening] Remove nuw/nsw flags for hoisted instructions adds 1e9114984490 Replace the custom linked list in LeaderTableEntry with Ti [...] adds a1ec3c5a8885 [scudo] Link against libatomic on all MIPS targets adds 9ee15bba4744 [MC] Lower case the first letter of EmitCOFF* EmitWin* Emi [...] adds 8ee35c5558aa Update three tests to realpath paths that we compare to dy [...] adds c274b6e5830e Defer source path remap tilde expansion until source file use adds 56ac85a20fb9 Revert "Defer source path remap tilde expansion until sour [...] adds 390c0ac28db3 [LV] Fix indentation in tryToCreateWidenRecipe (NFC). adds e45087fd53d5 [RISCV] Fix state persistence bugs (PR55548) adds f96aa493f045 [SimpleLoopUnswitch] Always skip trivial select and set co [...] adds 569d6630204d [libc++] Implement ranges::equal adds 51f63589aec0 [gn build] Port 569d6630204d adds 2c9983f53051 [RISCV][NFC] Add braces to 'else' to match braced 'if' adds 75631438e333 [AArch64] Costmodel tests for llvm.vscale intrinsics. NFC adds 38eb4fe74b38 [llvm][DWARF] Move test using X86 triple into X86 tests adds a9a012086a91 [AArch64] Add additional tests for sinking free shuffles f [...] adds b45e04685894 [X86] Add non-uniform vector tests for 'one bit diff' comp [...] adds 73c3dff1b3e4 [mlir] Use-after-free checker for the Transform dialect adds ad1d60c3befd [FileCheck] Catch missspelled directives. adds d79275238f9f [MachineSink] replace MachineLoop with MachineCycle adds 8894c05b0d35 [FileCheck] GetCheckTypeAbbreviation() to handle the missp [...] adds 7b617eef8018 [DAG] Cleanup "and/or of cmp with single bit diff" fold to [...] adds 85750de685f5 Use the canonical type when matching a generic selection a [...] adds b0ccf38b0187 [AMDGPU][GFX9] Support base+soffset+offset SMEM loads. adds ca3d962548b9 [analyzer] Return from reAssume if State is posteriorly ov [...] adds b5b2aec1ff51 [analyzer] Add UnarySymExpr adds 88abc50398eb [analyzer][solver] Handle UnarySymExpr in RangeConstraintSolver adds cd5783d3e82b [analyzer][solver] Handle UnarySymExpr in SMTConv adds 681c50c62e93 Improve the strict prototype diagnostic behavior adds 605651135b4c Fix failing test case with strict prototype changes adds d4d28f2ace76 [clang-format] Fix QualifierAlignment with global namespac [...] adds f366acdbf694 [DAG] Generalize (sra (trunc (sra x, c1)), c2) -> (trunc ( [...] adds 851bfc07c86e [libc++abi] Use from-scratch testing configs for libc++abi [...] adds ea6171c108c4 [InstCombine] add tests for icmp with udiv operand; NFC adds 3952c905ef08 [InstCombine] fold icmp equality with udiv and large constant adds 1bae02b77335 [Cuda] Use fallback method to mangle externalized decls if [...] adds 4c549a0b593e [flang][NFC] Make semantics test dosemantics03.f90 warning [...] adds 9139d484d46a [SLP]Fix crash on reordering of ScatterVectorize nodes. adds f8c8bda965dd [libc++] Remove temporary workaround for existing CMake caches adds 6f434776da0b [bazel] Introduce "VE" CodeGen in LLVM. adds 6b8c6f15fdd8 [clang][PR55406] CFG for coroutine adds 8f70d16c9ab2 [clang-format] Handle attributes in enum declaration. adds 634c8ef69a83 [PS5] Allow dllimport/dllexport same as PS4 adds 610eb39c685c [PowerPC][Future] Add an ISA Future to go with mcpu=future. adds 14258d6fb5f3 [SLP] Move canVectorizeLoads implementation to simplify th [...] adds 0e3dc1a52ffe [libc++] Implement ranges::{all, any, none}_of adds ec0ef6809af5 [gn build] Port 0e3dc1a52ffe adds 3087afb421bf [OpenCL][Doc] Misc improvements related to SPIR-V support. adds aee6b8efd09c [ADT] Explicitly delete copy/move constructors and operato [...] adds 9c66ed9b7317 [SCEV] Add test with loop guarded by assume with an AND co [...] adds 8b0d76347439 [DFAJumpThreading] Relax analysis to handle unpredictable [...] adds 120d52b0ef8b [SLP]Fix PR55653: emit undefs where required, not poison. adds 7b809c30b926 [SLP]Improve compile time, NFC. adds afe49934a68a [RISCV] Allow compatible VTYPE in AVL Reg Forward cases adds c8eb83f2d007 [ControlHeightReduction] Use logical and adds 3d2b5b7b8785 [libunwind] Factor out sigreturn check condition. NFC adds 0be0a53df65c [libunwind] Use process_vm_readv to avoid potential segfaults adds a831ce528fc0 Revert "[runtimes] Detect changes to Tests.cmake" adds d58cc0839ee5 [RISCV] reorganize getFrameIndexReference to reduce code d [...] adds 939a43461ba3 Revert "Replace the custom linked list in LeaderTableEntry [...] adds 0a5cfbf7b2e8 [OpenMP] Use the align clause value from 'omp allocate' fo [...] adds 917dc0749b77 [ARM] Recognize t2LoopEnd for software pipelining adds 6af5f5697c85 [SCEV] Collect conditions from assumes same way as for branches. adds f15c60218d5c [UpdateTestChecks] Auto-generate stub bodies for unused prefixes adds ce54b22657f0 [Clang][CoverageMapping] Fix switch counter codegen compil [...] adds 8a467284d560 Defer source path remap tilde expansion until source file use adds bd67468645c0 Check that a FileSpec has a Directory component before using adds ad73ce318ef9 [Target] use getSubtarget<> instead of static_cast<>(getSu [...] adds ea6d0c4b2a1e One further tweak for realpathing filepath to match dyld adds 7c13ae6490b1 Give option to use isCopyInstr to determine which MI is tr [...] adds 6273b5cbcdd3 Roll back use of #warning for header deprecations adds 6ddc4cd1c23f Fix break introduced by D124306 adds 3bba72e65326 [libc++] Time tests during CI adds 48ca3a5ebb15 [OpenMP] Extend omp teams to permit nested omp atomic adds 84b9985f5f63 [lldb] Fix broken bad-address-breakpoint test adds 75acec818e3a [lldb] Fix enums-layout test on Windows adds 92bbcfaa9740 [libunwind] Tidy-up the testing configuration for libunwind adds 628b2bfad828 [DirectX] Update test for dxil-dis. adds b58a420ff4f9 [Tooling/DependencyScanning] Rename refactorings towards t [...] adds b4c83a13f664 [Tooling/DependencyScanning & Preprocessor] Refactor depen [...] adds 75ac914b148d [gn build] Port b58a420ff4f9 adds e9ac99b6090c [RISCV] Simplfy creation of IndexVT in lowerMaskedGather/l [...] adds 460781feef56 [LegalizeTypes] Fix bug in expensive checks verification adds 60682a0b85d5 [InstCombine] add tests for icmp with sdiv operand; NFC adds ed5be1523fe1 [InstCombine] reduce code duplication in icmp+div folds; NFC adds 49f8b0513763 [InstCombine] fold icmp equality with sdiv and SMIN adds 899af021f48f [InstCombine] add tests for mul with sign-splat operand; NFC adds c4c750058f3e [InstCombine] fold mul of signbit directly to X < 0 ? Y : 0 adds 35b0955aa59d [ValueTracking] Added support to deduce PHI Nodes values b [...] adds 966427b8471d [lld][WebAssemlby] Check for command line flags with missi [...] adds 5221875a957d [clang-format] Fix an invalid code generation in RemoveBracesLLVM adds 198815e18dad [lld][WebAssembly] Avoid importing/exporting hidden symbol [...] adds eb1b1f2411bf [libc++][NFC] Fix whitespace adds 5bf44aa434ff [clang-format][NFC] Refactor UnwrappedLineParser::parseBlock() adds cc871cf6b50f [Polly][Test] Fix race condition while printing dot files. adds da3b8200e599 Apply clang-tidy fixes for performance-unnecessary-value-p [...] adds c067a9dee5c1 Apply clang-tidy fixes for llvm-else-after-return in OpenM [...] adds 0f64945352f7 [DOC] Refactor Functions section in LangRef adds d1c5da34a7ea [DOC] Improve LangRef description of declare adds 056dec5dc821 [Driver][test] Change -target i386-unknown-linux-gnu to -- [...] adds 87628f5804e2 [lld][WebAssembly] Require double dash for modern linker flags adds e267df8ce8d8 Use cmake Python3_EXECUTABLE variable instead of hardcoding adds 134d7f9a4b97 Store a by name list of signals with their actions in the [...] adds 98ff205fd86e [lld][WebAssembly] Update test after 87628f5804e2 adds c09cd64e5c6d [BOLT] Fix AND evaluation bug in shrink wrapping adds 8a3b6ba7569e [RISCV] Add a subtarget feature to enable unaligned scalar [...] adds 36096c2b383e [NFC][JumpThreading] Remove InsertFreezeWhenUnfoldingSelec [...] adds 4d8d2580c53e [Propeller] Promote functions with propeller profiles to . [...] adds d1440ccaa5bc [flang] expand the this_image test coverage adds 5451c4b4fb54 [lldb/fuzzer] Moving target fuzzer into separate subdirectory adds edcd06ba8b41 [test/ClangScanDeps] Add a target triple for `macro-expans [...] adds 2046e11ac493 [mlir][sparse] Improving ExecutionEngine/SparseTensorUtils.h adds 05c17bc4bb63 [mlir][sparse] Moving some functions around adds cef377d75df4 [RISCV] Simplify code after D125905 adds 3aa249329f38 Revert "[Propeller] Promote functions with propeller profi [...] adds 52992f136b3b Add !nosanitize to FixedMetadataKinds adds 5aefdafccf33 [mlir][Linalg] Relax vectorization condition to allow tran [...] adds 535604e1773d [X86][AMX] Update test case with automation tool. adds b709f074d2e4 [InstCombine] [NFC] precommit tests for bitcast-extelt adds 08cc05851872 Reland "[Propeller] Promote functions with propeller profi [...] adds 827fa2c41961 [gn build] Port 08cc05851872 adds 9b8ca3c1f18c [libc] Add global stdout and stderr objects. adds 121689a62e5b [SelectionDAG][NFC] Simplify integer promotion in setcc/vp.setcc adds 842e48bd6577 [demangler][RISCV] Fix for long double adds e251fb4cdeb7 [libunwind][CMake] Fix name of LIBUNWIND_SUPPORTS_NODEFAUL [...] adds a84026821bf6 [RISCV] Add test for experimental.vector.reverse adds 0252357b3e1e [mlir][LLVM] Add support for Calling Convention in LLVMFuncOp adds bdd0093f4d57 [GlobalISel] Add G_IS_FPCLASS adds d6708b741936 [mlir-vscode] Add support for highlighting pdll and tableg [...] adds 7a2d6dea73b5 [analyzer][NFC] Inline ExprEngine::evalComplement adds ee8987d585e7 [analyzer][NFC] Inline ExprEngine::evalMinus adds f6eab4376432 [analyzer][NFC] Inline loc::ConcreteInt::evalBinOp adds 81066603a8b9 [analyzer][NFC] Remove unused nonloc::ConcreteInt::evalBinOp adds 813acb12972e [analyzer][NFC] Remove unused SVal::hasConjuredSymbol adds 3a666dd37a06 [analyzer][NFC] Use MemRegion::getRegion()'s return value [...] adds 3a7a465def4a [analyzer][docs] Fix typo in checker name adds 11e3ad299fee [libc++] Implement ranges::is_sorted{, _until} adds cde101d0225f [gn build] Port 11e3ad299fee adds aaaf9cede774 [X86][AMX] Replace LDTILECFG with PLDTILECFGV on auto-config. adds 3606da5fbad0 [libc++] Enable ranges_robust_against* and niebloid tests [...] adds e37b287998a7 [analyzer][NFC] Use idiomatic classof instead of isKind adds d8def22f7be1 [analyzer][NFC] Remove unused friend SVal declarations adds 7727d2abece6 [analyzer][NFC] Remove unused default SVal constructors adds 6ab69efe61f2 [analyzer][NFC] Rename GREngine->CoreEngine, GRExprEngine- [...] adds f13050eca356 [analyzer][NFCi] Annotate major nonnull returning functions adds 3988bd13988a [llvm][clang][bolt][NFC] Use llvm::less_first() when applicable adds a73b50ad0649 Revert "[llvm][clang][bolt][NFC] Use llvm::less_first() wh [...] adds 4290ef54e18a [Support] Reduce allocations in parallelForEach with move adds 786c687810a5 [AArch64] Add support for FMA intrinsics to shouldSinkOperands. adds dc9fb65c4ffe [mlir][Tablegen-LSP] Add support for a compilation database adds 682ca00e218d [mlir][Tablegen-LSP] Add support for include file link and hover adds 8d021670c31d [mlir][Tablegen-LSP] Add support for a tracking definition [...] adds c78c00dc16bb [LLD][ELF] Drop the string null terminator from the hash i [...] adds c913c5598b02 [llvm-ar][test] add special case of replace converting a r [...] adds 7df25978ef78 [Doc][OpenCL] Misc wording improvements for SPIR-V adds f168a65943f9 [MLIR][Presburger] Add intersectDomain/Range to IntegerRelation adds 3e450d9cbbc0 [RISCV][NFC] Unify compatibility checks under one function adds 889c7c8e9260 [flang] Support correct continuations for compiler directives adds a94d454390c6 [LLD][test] Update `zlib` tests for LLD commit c78c00dc16 No new revisions were added by this update. Summary of changes: bolt/include/bolt/Core/BinaryContext.h | 8 +- bolt/include/bolt/Core/BinaryFunction.h | 3 - bolt/include/bolt/Core/MCPlusBuilder.h | 22 +- bolt/include/bolt/Passes/StackPointerTracking.h | 4 +- bolt/lib/Core/BinaryContext.cpp | 11 +- bolt/lib/Core/BinaryFunction.cpp | 66 +- bolt/lib/Passes/AllocCombiner.cpp | 6 +- bolt/lib/Passes/ShrinkWrapping.cpp | 4 +- bolt/lib/Passes/StackAllocationAnalysis.cpp | 2 +- bolt/lib/Passes/ValidateInternalCalls.cpp | 4 +- bolt/lib/Target/X86/X86MCPlusBuilder.cpp | 17 +- bolt/test/X86/Inputs/dwarf4-df-dualcu-helper.ll | 81 - bolt/test/X86/Inputs/dwarf4-df-dualcu-helper.s | 298 ++++ .../X86/Inputs/dwarf4-df-dualcu-loclist-helper.ll | 61 - .../X86/Inputs/dwarf4-df-dualcu-loclist-helper.s | 322 ++++ .../X86/Inputs/dwarf4-df-dualcu-loclist-main.ll | 99 -- .../X86/Inputs/dwarf4-df-dualcu-loclist-main.s | 546 ++++++ bolt/test/X86/Inputs/dwarf4-df-dualcu-main.ll | 129 -- bolt/test/X86/Inputs/dwarf4-df-dualcu-main.s | 420 +++++ bolt/test/X86/Inputs/dwarf5-df-dualcu-helper.ll | 81 - bolt/test/X86/Inputs/dwarf5-df-dualcu-helper.s | 348 ++++ .../X86/Inputs/dwarf5-df-dualcu-loclist-helper.ll | 61 - .../X86/Inputs/dwarf5-df-dualcu-loclist-helper.s | 351 ++++ .../X86/Inputs/dwarf5-df-dualcu-loclist-main.ll | 99 -- .../X86/Inputs/dwarf5-df-dualcu-loclist-main.s | 578 ++++++ bolt/test/X86/Inputs/dwarf5-df-dualcu-main.ll | 129 -- bolt/test/X86/Inputs/dwarf5-df-dualcu-main.s | 476 +++++ bolt/test/X86/Inputs/dwarf5-df-mono-helper.ll | 81 - bolt/test/X86/Inputs/dwarf5-df-mono-helper.s | 281 +++ bolt/test/X86/Inputs/dwarf5-df-mono-main.ll | 129 -- bolt/test/X86/Inputs/dwarf5-df-mono-main.s | 476 +++++ bolt/test/X86/Inputs/dwarf5-locaddrx.s | 473 +++++ bolt/test/X86/dwarf4-df-dualcu-loclist.test | 8 +- bolt/test/X86/dwarf4-df-dualcu.test | 8 +- bolt/test/X86/dwarf5-df-dualcu-loclist.test | 8 +- bolt/test/X86/dwarf5-df-dualcu.test | 9 +- bolt/test/X86/dwarf5-df-mono-dualcu.test | 6 +- bolt/test/X86/dwarf5-locaddrx.test | 128 +- bolt/test/X86/shrinkwrapping-and-rsp.s | 55 + .../clang-tidy/NoLintDirectiveHandler.cpp | 2 +- clang-tools-extra/clang-tidy/add_new_check.py | 107 +- .../clang-tidy/bugprone/InfiniteLoopCheck.cpp | 3 + .../readability/SimplifyBooleanExprCheck.cpp | 12 +- .../readability/SimplifyBooleanExprCheck.h | 1 + clang-tools-extra/clangd/QueryDriverDatabase.cpp | 16 +- clang-tools-extra/docs/ReleaseNotes.rst | 4 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 22 +- .../checks/readability-simplify-boolean-expr.rst | 21 + clang-tools-extra/pseudo/CMakeLists.txt | 2 + clang-tools-extra/pseudo/benchmarks/Benchmark.cpp | 15 +- clang-tools-extra/pseudo/benchmarks/CMakeLists.txt | 1 + clang-tools-extra/pseudo/fuzzer/CMakeLists.txt | 1 + clang-tools-extra/pseudo/gen/CMakeLists.txt | 10 + clang-tools-extra/pseudo/gen/Main.cpp | 102 ++ clang-tools-extra/pseudo/include/CMakeLists.txt | 39 + .../pseudo/include/clang-pseudo/Bracket.h | 41 + .../pseudo/include/clang-pseudo/Token.h | 11 +- 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lldb/tools/lldb-vscode/JSONUtils.cpp | 18 +- lldb/unittests/Signals/UnixSignalsTest.cpp | 23 + llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 5 +- llvm/cmake/modules/TensorFlowCompile.cmake | 2 +- llvm/docs/CommandGuide/llvm-nm.rst | 4 +- llvm/docs/GettingInvolved.rst | 2 +- llvm/docs/GlobalISel/GenericOpcode.rst | 10 + llvm/docs/LangRef.rst | 51 +- llvm/docs/SPIRVUsage.rst | 77 + llvm/docs/TableGen/ProgRef.rst | 6 +- llvm/docs/UserGuides.rst | 4 + llvm/include/llvm-c/DisassemblerTypes.h | 16 +- llvm/include/llvm/ADT/APFloat.h | 3 +- llvm/include/llvm/ADT/GenericCycleImpl.h | 50 + llvm/include/llvm/ADT/GenericCycleInfo.h | 15 + llvm/include/llvm/ADT/IntervalMap.h | 11 + llvm/include/llvm/ADT/Triple.h | 12 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 11 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 5 +- llvm/include/llvm/BinaryFormat/ELF.h | 9 + llvm/include/llvm/BinaryFormat/Wasm.h | 1 + .../llvm/CodeGen/BasicBlockSectionsProfileReader.h | 109 ++ llvm/include/llvm/CodeGen/MachineCycleAnalysis.h | 25 + llvm/include/llvm/CodeGen/MachinePassRegistry.def | 1 - llvm/include/llvm/CodeGen/MachineSSAContext.h | 2 + llvm/include/llvm/CodeGen/Passes.h | 8 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 3 + llvm/include/llvm/CodeGen/TargetLowering.h | 3 +- .../llvm/DebugInfo/CodeView/CVSymbolVisitor.h | 8 + llvm/include/llvm/DebugInfo/DIContext.h | 4 + llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 6 + llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 1 + llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h | 7 + llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h | 14 + llvm/include/llvm/DebugInfo/PDB/Native/InputFile.h | 4 +- .../llvm/DebugInfo/PDB/Native/LinePrinter.h | 6 +- llvm/include/llvm/DebugInfo/PDB/PDBContext.h | 2 + llvm/include/llvm/Demangle/ItaniumDemangle.h | 2 +- llvm/include/llvm/FileCheck/FileCheck.h | 1 + llvm/include/llvm/Frontend/OpenMP/OMP.td | 1 + llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 10 + llvm/include/llvm/FuzzMutate/FuzzerCLI.h | 1 - llvm/include/llvm/IR/FixedMetadataKinds.def | 1 + llvm/include/llvm/IR/IntrinsicsNVVM.td | 2 + llvm/include/llvm/IR/Metadata.h | 15 +- llvm/include/llvm/IR/PatternMatch.h | 5 + llvm/include/llvm/InitializePasses.h | 1 + .../llvm/MC/MCDisassembler/MCDisassembler.h | 7 +- .../llvm/MC/MCDisassembler/MCExternalSymbolizer.h | 3 +- llvm/include/llvm/MC/MCDisassembler/MCSymbolizer.h | 3 +- llvm/include/llvm/MC/MCStreamer.h | 54 +- llvm/include/llvm/MC/MCWinCOFFStreamer.h | 16 +- .../include/llvm/Passes/StandardInstrumentations.h | 20 + .../llvm/ProfileData/Coverage/CoverageMapping.h | 4 +- llvm/include/llvm/ProfileData/MemProf.h | 9 + llvm/include/llvm/ProfileData/RawMemProfReader.h | 18 +- llvm/include/llvm/Support/BinaryStreamArray.h | 2 + llvm/include/llvm/Support/TargetOpcodes.def | 3 + llvm/include/llvm/Target/GenericOpcodes.td | 7 + llvm/include/llvm/Transforms/Scalar.h | 6 +- .../include/llvm/Transforms/Scalar/JumpThreading.h | 3 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 6 +- llvm/lib/Analysis/InstructionSimplify.cpp | 4 +- llvm/lib/Analysis/ModelUnderTrainingRunner.cpp | 1 - llvm/lib/Analysis/ScalarEvolution.cpp | 28 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 5 +- llvm/lib/Analysis/ValueTracking.cpp | 23 +- llvm/lib/AsmParser/LLParser.cpp | 14 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 32 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 10 +- llvm/lib/CodeGen/AsmPrinter/WinCFGuard.cpp | 6 +- llvm/lib/CodeGen/AsmPrinter/WinException.cpp | 24 +- llvm/lib/CodeGen/AtomicExpandPass.cpp | 9 +- llvm/lib/CodeGen/BasicBlockSections.cpp | 169 +- .../CodeGen/BasicBlockSectionsProfileReader.cpp | 144 ++ llvm/lib/CodeGen/CMakeLists.txt | 1 + llvm/lib/CodeGen/CodeGenPrepare.cpp | 21 +- llvm/lib/CodeGen/ExpandVectorPredication.cpp | 23 +- llvm/lib/CodeGen/GlobalISel/Utils.cpp | 1 - llvm/lib/CodeGen/MachineCopyPropagation.cpp | 256 ++- llvm/lib/CodeGen/MachineCycleAnalysis.cpp | 110 +- llvm/lib/CodeGen/MachineSink.cpp | 190 +- llvm/lib/CodeGen/MachineVerifier.cpp | 38 + llvm/lib/CodeGen/RegAllocGreedy.cpp | 12 +- llvm/lib/CodeGen/RegAllocGreedy.h | 2 - llvm/lib/CodeGen/SelectOptimize.cpp | 955 +++++++++- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 42 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 12 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 71 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 7 +- llvm/lib/CodeGen/TypePromotion.cpp | 28 +- llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp | 72 + llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 113 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 4 + llvm/lib/DebugInfo/DWARF/DWARFDie.cpp | 60 + llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp | 100 ++ llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 10 +- llvm/lib/DebugInfo/PDB/Native/InputFile.cpp | 2 +- llvm/lib/DebugInfo/PDB/PDBContext.cpp | 7 + llvm/lib/DebugInfo/Symbolize/DIPrinter.cpp | 4 + .../DebugInfo/Symbolize/SymbolizableObjectFile.cpp | 8 + llvm/lib/FileCheck/FileCheck.cpp | 28 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 166 ++ llvm/lib/IR/Constants.cpp | 4 +- llvm/lib/IR/Verifier.cpp | 3 +- llvm/lib/MC/MCAsmStreamer.cpp | 132 +- llvm/lib/MC/MCCodeView.cpp | 4 +- llvm/lib/MC/MCDisassembler/MCDisassembler.cpp | 7 +- .../lib/MC/MCDisassembler/MCExternalSymbolizer.cpp | 16 +- llvm/lib/MC/MCNullStreamer.cpp | 4 +- llvm/lib/MC/MCParser/AsmParser.cpp | 8 +- llvm/lib/MC/MCParser/COFFAsmParser.cpp | 32 +- llvm/lib/MC/MCParser/COFFMasmParser.cpp | 8 +- llvm/lib/MC/MCParser/MasmParser.cpp | 8 +- llvm/lib/MC/MCStreamer.cpp | 58 +- llvm/lib/MC/MCWinCOFFStreamer.cpp | 16 +- llvm/lib/ObjCopy/ELF/ELFObject.cpp | 9 + llvm/lib/ObjCopy/ELF/ELFObject.h | 5 + llvm/lib/Object/RecordStreamer.h | 4 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 11 + llvm/lib/Passes/PassBuilder.cpp | 11 + llvm/lib/Passes/PassBuilderPipelines.cpp | 4 +- llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Passes/StandardInstrumentations.cpp | 54 + llvm/lib/ProfileData/Coverage/CoverageMapping.cpp | 12 +- llvm/lib/ProfileData/RawMemProfReader.cpp | 44 +- llvm/lib/Support/BinaryStreamWriter.cpp | 1 - llvm/lib/Support/Parallel.cpp | 6 +- llvm/lib/Support/Triple.cpp | 24 +- llvm/lib/TableGen/Record.cpp | 1 - llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 10 +- llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp | 2 +- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 34 +- .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 2 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 6 +- llvm/lib/Target/AArch64/AArch64SchedA64FX.td | 8 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 10 + .../Target/AArch64/AArch64TargetTransformInfo.cpp | 6 + .../Target/AArch64/AArch64TargetTransformInfo.h | 2 + .../AArch64/Disassembler/AArch64Disassembler.cpp | 12 +- .../Disassembler/AArch64ExternalSymbolizer.cpp | 6 +- .../Disassembler/AArch64ExternalSymbolizer.h | 3 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 3 +- .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 1 - .../MCTargetDesc/AArch64WinCOFFStreamer.cpp | 16 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 12 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 24 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 262 ++- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 3 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 83 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 38 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 6 +- llvm/lib/Target/AMDGPU/EXPInstructions.td | 62 +- llvm/lib/Target/AMDGPU/FLATInstructions.td | 245 ++- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 13 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 2 + llvm/lib/Target/AMDGPU/MIMGInstructions.td | 2 + llvm/lib/Target/AMDGPU/SIDefines.h | 18 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/SIInstrFormats.td | 24 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 77 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 13 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 9 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 1 + llvm/lib/Target/AMDGPU/SMInstructions.td | 80 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 30 +- llvm/lib/Target/AMDGPU/VIInstrFormats.td | 2 +- llvm/lib/Target/AMDGPU/VINTERPInstructions.td | 135 ++ llvm/lib/Target/AMDGPU/VOP3Instructions.td | 4 +- llvm/lib/Target/AMDGPU/VOPInstructions.td | 1 + .../Target/ARC/Disassembler/ARCDisassembler.cpp | 2 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 4 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 98 +- llvm/lib/Target/ARM/ARMBlockPlacement.cpp | 2 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 2 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 2 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 5 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 5 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 +- llvm/lib/Target/ARM/ARMInstrFormats.td | 26 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 96 +- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 4 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 2 +- .../Target/ARM/Disassembler/ARMDisassembler.cpp | 3 +- .../Target/ARM/MVETPAndVPTOptimisationsPass.cpp | 14 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 3 +- llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | 3 +- llvm/lib/Target/ARM/Thumb2SizeReduction.cpp | 2 +- llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp | 2 +- .../DirectX/DXILWriter/DXILBitcodeWriter.cpp | 41 +- .../Hexagon/Disassembler/HexagonDisassembler.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 7 +- llvm/lib/Target/Hexagon/HexagonPatternsHVX.td | 2 +- .../Target/Hexagon/HexagonTargetTransformInfo.h | 7 +- .../Lanai/Disassembler/LanaiDisassembler.cpp | 2 +- llvm/lib/Target/M68k/M68kCollapseMOVEMPass.cpp | 2 +- llvm/lib/Target/M68k/M68kExpandPseudo.cpp | 2 +- llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp | 2 +- llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp | 2 +- llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/Mips/MipsBranchExpansion.cpp | 2 +- llvm/lib/Target/Mips/MipsCallLowering.cpp | 3 +- llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 2 +- llvm/lib/Target/Mips/MipsExpandPseudo.cpp | 2 +- llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp | 2 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 3 +- llvm/lib/Target/Mips/MipsMachineFunction.cpp | 2 +- llvm/lib/Target/Mips/MipsOptimizePICCall.cpp | 2 +- llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp | 3 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 5 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 2 +- llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 2 +- llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 2 +- llvm/lib/Target/NVPTX/NVPTXIntrinsics.td | 2 + llvm/lib/Target/PowerPC/PPC.td | 6 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 9 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 1 + llvm/lib/Target/PowerPC/PPCScheduleP10.td | 2 +- llvm/lib/Target/PowerPC/PPCScheduleP9.td | 2 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 + llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 23 +- llvm/lib/Target/RISCV/CMakeLists.txt | 1 + .../Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | 10 + .../Target/RISCV/MCTargetDesc/RISCVELFStreamer.h | 2 + llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp | 25 + llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.h | 10 + .../RISCV/MCTargetDesc/RISCVTargetStreamer.cpp | 1 + .../RISCV/MCTargetDesc/RISCVTargetStreamer.h | 1 + llvm/lib/Target/RISCV/RISCV.h | 3 + llvm/lib/Target/RISCV/RISCV.td | 5 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 332 ++-- llvm/lib/Target/RISCV/RISCVFrameLowering.h | 5 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 19 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 44 +- llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 246 ++- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 19 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 111 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 2 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 8 +- llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h | 5 + llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp | 382 ++++ llvm/lib/Target/RISCV/RISCVSubtarget.h | 2 + llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 6 +- .../Sparc/Disassembler/SparcDisassembler.cpp | 2 +- .../SystemZ/Disassembler/SystemZDisassembler.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp | 3 +- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 10 +- llvm/lib/Target/X86/CMakeLists.txt | 1 + .../Target/X86/Disassembler/X86Disassembler.cpp | 18 +- .../Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp | 20 +- llvm/lib/Target/X86/X86.h | 4 + llvm/lib/Target/X86/X86AsmPrinter.cpp | 10 +- llvm/lib/Target/X86/X86CallingConv.cpp | 2 +- llvm/lib/Target/X86/X86ExpandPseudo.cpp | 2 +- llvm/lib/Target/X86/X86FastPreTileConfig.cpp | 709 ++++++++ llvm/lib/Target/X86/X86FastTileConfig.cpp | 294 +--- llvm/lib/Target/X86/X86ISelLowering.cpp | 8 +- llvm/lib/Target/X86/X86InstrAMX.td | 19 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 2 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 14 +- llvm/lib/Target/X86/X86PreTileConfig.cpp | 2 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 9 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 54 +- llvm/lib/Target/X86/X86TileConfig.cpp | 4 +- llvm/lib/Target/XCore/XCoreISelLowering.cpp | 50 +- llvm/lib/Transforms/Coroutines/CoroCleanup.cpp | 2 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 1 - llvm/lib/Transforms/IPO/HotColdSplitting.cpp | 3 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 4 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 3 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 230 ++- .../Transforms/InstCombine/InstCombineCasts.cpp | 79 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 168 +- .../Transforms/InstCombine/InstCombineInternal.h | 4 +- .../InstCombine/InstCombineMulDivRem.cpp | 29 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 19 +- .../InstCombine/InstCombineVectorOps.cpp | 5 +- .../InstCombine/InstructionCombining.cpp | 4 +- .../Instrumentation/AddressSanitizer.cpp | 5 +- .../Instrumentation/ControlHeightReduction.cpp | 3 +- .../Instrumentation/HWAddressSanitizer.cpp | 2 +- .../Transforms/Instrumentation/MemorySanitizer.cpp | 10 +- .../Instrumentation/SanitizerCoverage.cpp | 3 +- llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 130 +- llvm/lib/Transforms/Scalar/GuardWidening.cpp | 3 + llvm/lib/Transforms/Scalar/JumpThreading.cpp | 18 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 5 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 6 +- llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp | 1 - llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 28 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 5 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 19 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 57 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 653 +++++-- llvm/lib/Transforms/Vectorize/VPlan.h | 5 +- llvm/runtimes/CMakeLists.txt | 22 +- llvm/test/Analysis/CostModel/AArch64/sve-vscale.ll | 23 + llvm/test/Analysis/CostModel/X86/arith-fp.ll | 16 +- llvm/test/Analysis/CostModel/X86/fptoi_sat.ll | 72 +- llvm/test/Analysis/CostModel/X86/fptosi.ll | 20 +- llvm/test/Analysis/CostModel/X86/fptoui.ll | 30 +- .../CostModel/X86/gather-i16-with-i8-index.ll | 18 +- .../CostModel/X86/gather-i32-with-i8-index.ll | 2 +- .../CostModel/X86/gather-i64-with-i8-index.ll | 2 +- .../CostModel/X86/gather-i8-with-i8-index.ll | 18 +- .../CostModel/X86/interleaved-load-f32-stride-2.ll | 6 +- .../CostModel/X86/interleaved-load-f32-stride-3.ll | 10 +- .../CostModel/X86/interleaved-load-f32-stride-4.ll | 10 +- .../CostModel/X86/interleaved-load-f32-stride-5.ll | 8 +- .../CostModel/X86/interleaved-load-f32-stride-6.ll | 8 +- .../CostModel/X86/interleaved-load-f32-stride-7.ll | 8 +- .../CostModel/X86/interleaved-load-f32-stride-8.ll | 8 +- .../CostModel/X86/interleaved-load-f64-stride-2.ll | 8 +- .../CostModel/X86/interleaved-load-f64-stride-3.ll | 8 +- .../CostModel/X86/interleaved-load-f64-stride-4.ll | 8 +- .../CostModel/X86/interleaved-load-f64-stride-5.ll | 6 +- .../CostModel/X86/interleaved-load-f64-stride-6.ll | 6 +- .../CostModel/X86/interleaved-load-f64-stride-7.ll | 6 +- .../CostModel/X86/interleaved-load-f64-stride-8.ll | 6 +- .../CostModel/X86/interleaved-load-i16-stride-2.ll | 8 +- .../CostModel/X86/interleaved-load-i16-stride-3.ll | 10 +- .../CostModel/X86/interleaved-load-i16-stride-4.ll | 10 +- .../CostModel/X86/interleaved-load-i16-stride-5.ll | 22 +- .../CostModel/X86/interleaved-load-i16-stride-6.ll | 12 +- .../CostModel/X86/interleaved-load-i16-stride-7.ll | 22 +- .../CostModel/X86/interleaved-load-i16-stride-8.ll | 22 +- .../interleaved-load-i32-stride-2-indices-0u.ll | 6 +- .../CostModel/X86/interleaved-load-i32-stride-2.ll | 6 +- .../interleaved-load-i32-stride-3-indices-01u.ll | 8 +- .../interleaved-load-i32-stride-3-indices-0uu.ll | 6 +- .../CostModel/X86/interleaved-load-i32-stride-3.ll | 10 +- .../interleaved-load-i32-stride-4-indices-012u.ll | 10 +- .../interleaved-load-i32-stride-4-indices-01uu.ll | 10 +- .../CostModel/X86/interleaved-load-i32-stride-4.ll | 10 +- .../CostModel/X86/interleaved-load-i32-stride-5.ll | 8 +- .../CostModel/X86/interleaved-load-i32-stride-6.ll | 8 +- .../CostModel/X86/interleaved-load-i32-stride-7.ll | 8 +- .../CostModel/X86/interleaved-load-i32-stride-8.ll | 8 +- .../CostModel/X86/interleaved-load-i64-stride-2.ll | 8 +- .../CostModel/X86/interleaved-load-i64-stride-3.ll | 8 +- .../CostModel/X86/interleaved-load-i64-stride-4.ll | 8 +- .../CostModel/X86/interleaved-load-i64-stride-5.ll | 6 +- .../CostModel/X86/interleaved-load-i64-stride-6.ll | 6 +- .../CostModel/X86/interleaved-load-i64-stride-7.ll | 6 +- .../CostModel/X86/interleaved-load-i64-stride-8.ll | 6 +- .../CostModel/X86/interleaved-load-i8-stride-2.ll | 6 +- .../CostModel/X86/interleaved-load-i8-stride-3.ll | 8 +- .../CostModel/X86/interleaved-load-i8-stride-4.ll | 8 +- .../CostModel/X86/interleaved-load-i8-stride-5.ll | 18 +- .../CostModel/X86/interleaved-load-i8-stride-6.ll | 10 +- .../CostModel/X86/interleaved-load-i8-stride-7.ll | 18 +- .../CostModel/X86/interleaved-load-i8-stride-8.ll | 18 +- .../X86/interleaved-store-f32-stride-2.ll | 6 +- .../X86/interleaved-store-f32-stride-3.ll | 6 +- .../X86/interleaved-store-f32-stride-4.ll | 6 +- .../X86/interleaved-store-f32-stride-5.ll | 8 +- .../X86/interleaved-store-f32-stride-6.ll | 4 +- .../X86/interleaved-store-f32-stride-7.ll | 8 +- .../X86/interleaved-store-f32-stride-8.ll | 8 +- .../X86/interleaved-store-f64-stride-2.ll | 8 +- .../X86/interleaved-store-f64-stride-3.ll | 6 +- .../X86/interleaved-store-f64-stride-4.ll | 6 +- .../X86/interleaved-store-f64-stride-5.ll | 8 +- .../X86/interleaved-store-f64-stride-6.ll | 4 +- .../X86/interleaved-store-f64-stride-7.ll | 8 +- .../X86/interleaved-store-f64-stride-8.ll | 8 +- .../X86/interleaved-store-i16-stride-2.ll | 6 +- .../X86/interleaved-store-i16-stride-3.ll | 6 +- .../X86/interleaved-store-i16-stride-4.ll | 6 +- .../X86/interleaved-store-i16-stride-5.ll | 14 +- .../X86/interleaved-store-i16-stride-6.ll | 6 +- .../X86/interleaved-store-i16-stride-7.ll | 14 +- .../X86/interleaved-store-i16-stride-8.ll | 14 +- .../X86/interleaved-store-i32-stride-2.ll | 6 +- .../X86/interleaved-store-i32-stride-3.ll | 6 +- .../X86/interleaved-store-i32-stride-4.ll | 6 +- .../X86/interleaved-store-i32-stride-5.ll | 8 +- .../X86/interleaved-store-i32-stride-6.ll | 4 +- .../X86/interleaved-store-i32-stride-7.ll | 8 +- .../X86/interleaved-store-i32-stride-8.ll | 8 +- .../X86/interleaved-store-i64-stride-2.ll | 8 +- .../X86/interleaved-store-i64-stride-3.ll | 6 +- .../X86/interleaved-store-i64-stride-4.ll | 6 +- .../X86/interleaved-store-i64-stride-5.ll | 8 +- .../X86/interleaved-store-i64-stride-6.ll | 4 +- .../X86/interleaved-store-i64-stride-7.ll | 8 +- .../X86/interleaved-store-i64-stride-8.ll | 8 +- .../CostModel/X86/interleaved-store-i8-stride-2.ll | 4 +- .../CostModel/X86/interleaved-store-i8-stride-3.ll | 4 +- .../CostModel/X86/interleaved-store-i8-stride-4.ll | 4 +- .../CostModel/X86/interleaved-store-i8-stride-5.ll | 8 +- .../CostModel/X86/interleaved-store-i8-stride-6.ll | 4 +- .../CostModel/X86/interleaved-store-i8-stride-7.ll | 8 +- .../CostModel/X86/interleaved-store-i8-stride-8.ll | 8 +- .../X86/masked-gather-i32-with-i8-index.ll | 2 +- .../X86/masked-gather-i64-with-i8-index.ll | 2 +- .../CostModel/X86/masked-interleaved-load-i16.ll | 12 +- .../CostModel/X86/masked-interleaved-store-i16.ll | 22 +- .../X86/masked-intrinsic-cost-inseltpoison.ll | 380 ++-- .../CostModel/X86/masked-intrinsic-cost.ll | 380 ++-- .../X86/masked-scatter-i32-with-i8-index.ll | 14 +- .../X86/masked-scatter-i64-with-i8-index.ll | 18 +- .../Analysis/CostModel/X86/masked-store-i16.ll | 8 +- .../test/Analysis/CostModel/X86/masked-store-i8.ll | 4 +- llvm/test/Analysis/CostModel/X86/reduce-fadd.ll | 36 +- llvm/test/Analysis/CostModel/X86/reduce-fmul.ll | 36 +- .../CostModel/X86/scatter-i16-with-i8-index.ll | 26 +- .../CostModel/X86/scatter-i32-with-i8-index.ll | 18 +- .../CostModel/X86/scatter-i64-with-i8-index.ll | 18 +- .../CostModel/X86/scatter-i8-with-i8-index.ll | 26 +- .../CostModel/X86/shuffle-replication-i16.ll | 88 +- .../CostModel/X86/shuffle-replication-i32.ll | 42 +- .../CostModel/X86/shuffle-replication-i64.ll | 42 +- .../CostModel/X86/shuffle-replication-i8.ll | 88 +- llvm/test/Analysis/CostModel/X86/sitofp.ll | 12 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 1386 +++++++-------- .../LoopCacheAnalysis/PowerPC/LoopnestFixedSize.ll | 12 +- .../LoopCacheAnalysis/PowerPC/loads-store.ll | 4 +- .../Analysis/LoopCacheAnalysis/PowerPC/matmul.ll | 4 +- .../LoopCacheAnalysis/PowerPC/matvecmul.ll | 8 +- .../LoopCacheAnalysis/PowerPC/multi-store.ll | 6 +- .../LoopCacheAnalysis/PowerPC/single-store.ll | 4 +- .../Analysis/LoopCacheAnalysis/PowerPC/stencil.ll | 2 +- llvm/test/Analysis/MemorySSA/phi-translation.ll | 2 +- llvm/test/Analysis/RegionInfo/infinite_loop_4.ll | 2 +- .../max-backedge-taken-count-guard-info.ll | 37 + .../ValueTracking/known-power-of-two-urem.ll | 6 +- ...id-atomicrmw-xchg-must-be-integer-or-fp-type.ll | 7 - llvm/test/Bitcode/compatibility.ll | 6 + .../GlobalISel/legalizer-info-validation.mir | 3 + llvm/test/CodeGen/AArch64/O3-pipeline.ll | 2 + llvm/test/CodeGen/AArch64/copyprop.ll | 40 + llvm/test/CodeGen/AArch64/copyprop.mir | 13 +- llvm/test/CodeGen/AArch64/loop-sink-limit.mir | 4 +- llvm/test/CodeGen/AArch64/pr55644.ll | 19 + llvm/test/CodeGen/AArch64/sve-stepvector.ll | 26 + .../AMDGPU/GlobalISel/image-waterfall-loop-O0.ll | 190 +- .../GlobalISel/llvm.amdgcn.image.atomic.dim.ll | 1264 ++++++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 32 +- .../llvm.amdgcn.raw.buffer.atomic.add.ll | 68 +- .../llvm.amdgcn.raw.buffer.atomic.cmpswap.ll | 78 +- .../llvm.amdgcn.raw.buffer.atomic.fadd.ll | 136 +- .../llvm.amdgcn.raw.buffer.load.format.f16.ll | 68 +- .../llvm.amdgcn.raw.buffer.load.format.ll | 34 +- .../GlobalISel/llvm.amdgcn.raw.buffer.load.ll | 186 +- .../llvm.amdgcn.raw.buffer.store.format.f16.ll | 124 +- .../llvm.amdgcn.raw.buffer.store.format.f32.ll | 62 +- .../GlobalISel/llvm.amdgcn.raw.buffer.store.ll | 163 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll | 68 +- .../GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll | 34 +- .../llvm.amdgcn.raw.tbuffer.store.f16.ll | 196 ++- .../GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll | 196 ++- .../GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll | 158 +- .../AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll | 1836 +++++++++++--------- .../llvm.amdgcn.struct.buffer.atomic.add.ll | 72 +- .../llvm.amdgcn.struct.buffer.atomic.cmpswap.ll | 82 +- .../llvm.amdgcn.struct.buffer.atomic.fadd.ll | 140 +- .../llvm.amdgcn.struct.buffer.load.format.f16.ll | 112 +- .../llvm.amdgcn.struct.buffer.load.format.ll | 53 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 37 +- .../llvm.amdgcn.struct.buffer.store.format.f16.ll | 72 +- .../llvm.amdgcn.struct.buffer.store.format.f32.ll | 36 +- .../GlobalISel/llvm.amdgcn.struct.buffer.store.ll | 37 +- .../llvm.amdgcn.struct.tbuffer.load.f16.ll | 120 +- .../GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll | 58 +- .../regbankselect-amdgcn-s-buffer-load.mir | 46 +- .../regbankselect-amdgcn.image.load.1d.ll | 164 +- .../regbankselect-amdgcn.image.sample.1d.ll | 254 ++- .../regbankselect-amdgcn.mfma.gfx90a.mir | 154 +- .../regbankselect-amdgcn.mfma.gfx940.mir | 244 +-- .../regbankselect-amdgcn.raw.buffer.load.ll | 59 +- .../regbankselect-amdgcn.s.buffer.load.ll | 804 ++++----- .../regbankselect-amdgcn.s.buffer.load.mir | 78 +- .../regbankselect-amdgcn.struct.buffer.load.ll | 59 +- .../regbankselect-amdgcn.struct.buffer.store.ll | 59 +- .../GlobalISel/regbankselect-amdgcn.update.dpp.mir | 36 +- .../GlobalISel/regbankselect-waterfall-agpr.mir | 48 +- .../CodeGen/AMDGPU/alloc-aligned-tuples-gfx90a.mir | 2 +- .../CodeGen/AMDGPU/divergence-driven-bfe-isel.ll | 4 +- llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll | 9 + llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll | 11 + llvm/test/CodeGen/AMDGPU/hoist-cond.ll | 2 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 36 +- llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 4 + .../CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll | 25 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll | 29 +- .../AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll | 19 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll | 2 +- llvm/test/CodeGen/AMDGPU/local-atomics64.ll | 13 + llvm/test/CodeGen/AMDGPU/mode-register.mir | 2 +- llvm/test/CodeGen/AMDGPU/smrd.ll | 12 +- .../CodeGen/AMDGPU/verify-image-vaddr-align.mir | 27 + llvm/test/CodeGen/ARM/O3-pipeline.ll | 1 + llvm/test/CodeGen/ARM/aes-erratum-fix.ll | 88 +- llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll | 2 +- llvm/test/CodeGen/AVR/atomics/fence.ll | 2 +- .../CodeGen/BPF/CORE/offset-reloc-middle-chain.ll | 24 +- llvm/test/CodeGen/Generic/expand-vp.ll | 96 +- llvm/test/CodeGen/Hexagon/sdata-stack-guard.ll | 4 +- llvm/test/CodeGen/PowerPC/O3-pipeline.ll | 1 + llvm/test/CodeGen/RISCV/O0-pipeline.ll | 1 + llvm/test/CodeGen/RISCV/O3-pipeline.ll | 2 + llvm/test/CodeGen/RISCV/make-compressible-rv64.mir | 341 ++++ llvm/test/CodeGen/RISCV/make-compressible.mir | 1133 ++++++++++++ .../CodeGen/RISCV/pass-fast-math-flags-sdnode.ll | 9 - llvm/test/CodeGen/RISCV/rotl-rotr.ll | 631 ++++++- .../test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll | 2 - .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 2 + .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 3 + llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 417 ++--- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 46 +- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 2 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vector-trunc-vp.ll | 324 +++- .../RISCV/rvv/fixed-vectors-emergency-slot.mir | 4 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 19 +- .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 24 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll | 25 +- .../RISCV/rvv/pass-fast-math-flags-sdnode.ll | 24 + .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll | 8 + llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 4 + .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll | 4 + llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 4 + llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 42 +- llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir | 64 +- llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 855 +++++++-- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 3 - llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll | 50 +- llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll | 178 +- .../rvv/wrong-stack-offset-for-rvv-object.mir | 37 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv32.mir | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv64.mir | 10 +- llvm/test/CodeGen/RISCV/unaligned-load-store.ll | 164 +- llvm/test/CodeGen/Thumb2/mve-div-expand.ll | 24 +- llvm/test/CodeGen/Thumb2/mve-fmath.ll | 192 +- llvm/test/CodeGen/Thumb2/mve-masked-store.ll | 12 +- llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 21 +- llvm/test/CodeGen/Thumb2/mve-vcvt16.ll | 8 +- llvm/test/CodeGen/Thumb2/swp-fixedii-le.mir | 186 ++ llvm/test/CodeGen/WebAssembly/libcalls.ll | 3 +- llvm/test/CodeGen/X86/AMX/amx-across-func.ll | 280 +++ llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll | 151 +- llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll | 140 +- llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir | 310 ++++ llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir | 130 ++ llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi4.mir | 144 ++ llvm/test/CodeGen/X86/AMX/amx-fastconfig-spill.mir | 154 ++ llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir | 207 +++ llvm/test/CodeGen/X86/AMX/amx-fastpreconfig.mir | 61 + llvm/test/CodeGen/X86/AMX/amx-tile-intrinsics.ll | 1 + llvm/test/CodeGen/X86/AMX/amx-zero-config.ll | 81 +- llvm/test/CodeGen/X86/O0-pipeline.ll | 2 +- llvm/test/CodeGen/X86/atomic64.ll | 16 + llvm/test/CodeGen/X86/basic-block-sections-cold.ll | 6 +- llvm/test/CodeGen/X86/basic-block-sections-list.ll | 18 +- .../CodeGen/X86/basic-block-sections-listbb.ll | 8 +- .../X86/basic-block-sections-source-drift.ll | 4 +- llvm/test/CodeGen/X86/dwarf-aranges-zero-size.ll | 23 + llvm/test/CodeGen/X86/extractelement-load.ll | 35 + llvm/test/CodeGen/X86/frem-libcall.ll | 24 +- llvm/test/CodeGen/X86/is_fpclass.ll | 31 + llvm/test/CodeGen/X86/opt-pipeline.ll | 1 + llvm/test/CodeGen/X86/pow-libcall.ll | 38 + llvm/test/CodeGen/X86/pr38795.ll | 93 +- llvm/test/CodeGen/X86/scalar_widen_div.ll | 13 - llvm/test/CodeGen/X86/select-optimize.ll | 546 ++++++ llvm/test/CodeGen/X86/setcc-logic.ll | 33 + llvm/test/CodeGen/X86/switch-phi-const.ll | 4 +- llvm/test/CodeGen/X86/x86-shrink-wrapping.ll | 36 +- llvm/test/DebugInfo/MSP430/dwarf-basics-v5.ll | 2 +- llvm/test/DebugInfo/NVPTX/debug-info.ll | 2 +- .../Symbolize/ELF/data-command-symtab.yaml | 3 + llvm/test/DebugInfo/X86/dwarf-aranges.ll | 2 +- llvm/test/ExecutionEngine/lit.local.cfg | 2 +- llvm/test/FileCheck/missspelled-directive.txt | 28 + llvm/test/MC/AMDGPU/data.s | 2 +- llvm/test/MC/AMDGPU/exp-err.s | 22 +- llvm/test/MC/AMDGPU/exp-gfx10.s | 4 + llvm/test/MC/AMDGPU/exp-gfx11.s | 19 + llvm/test/MC/AMDGPU/exp-pregfx11.s | 59 + llvm/test/MC/AMDGPU/exp.s | 56 +- llvm/test/MC/AMDGPU/flat-gfx11-mnemonic.s | 196 +++ llvm/test/MC/AMDGPU/gfx11-flat-errs.s | 852 +++++++++ llvm/test/MC/AMDGPU/gfx11_asm_smem.s | 3 + llvm/test/MC/AMDGPU/gfx11_err.s | 9 + llvm/test/MC/AMDGPU/gfx11_flat.s | 1551 +++++++++++++++++ llvm/test/MC/AMDGPU/gfx940_err.s | 15 +- llvm/test/MC/AMDGPU/gfx9_asm_smem.s | 39 + llvm/test/MC/AMDGPU/smem.s | 4 +- llvm/test/MC/AMDGPU/vinterp.s | 277 +++ llvm/test/MC/AsmParser/directive_file-g.s | 2 +- llvm/test/MC/Disassembler/AMDGPU/exp_gfx11.txt | 13 + llvm/test/MC/Disassembler/AMDGPU/flat-gfx11.txt | 536 ++++++ .../test/MC/Disassembler/AMDGPU/gfx11_dasm_all.txt | 4 +- llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt | 10 + llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt | 41 + llvm/test/MC/Disassembler/AMDGPU/vinterp.txt | 247 +++ llvm/test/MC/PowerPC/ppc64-reloc-directive-pcrel.s | 16 +- llvm/test/MC/RISCV/twice.ll | 17 + llvm/test/MC/WebAssembly/unnamed-data.ll | 2 +- llvm/test/MachineVerifier/test_g_is_fpclass.mir | 40 + llvm/test/Other/print-on-crash.ll | 30 + .../AArch64/sink-free-instructions.ll | 247 ++- .../dfa-jump-threading-analysis.ll | 65 + llvm/test/Transforms/DFAJumpThreading/negative.ll | 49 + .../GuardWidening/range-check-merging.ll | 193 +- llvm/test/Transforms/Inline/inline-strictfp.ll | 14 +- llvm/test/Transforms/InstCombine/and-or-icmps.ll | 822 +++++++++ llvm/test/Transforms/InstCombine/and2.ll | 8 +- .../Transforms/InstCombine/bitcast-inseltpoison.ll | 11 +- llvm/test/Transforms/InstCombine/bitcast.ll | 105 +- llvm/test/Transforms/InstCombine/freeze.ll | 32 +- llvm/test/Transforms/InstCombine/getelementptr.ll | 7 +- .../Transforms/InstCombine/icmp-div-constant.ll | 179 ++ llvm/test/Transforms/InstCombine/icmp-logical.ll | 14 + llvm/test/Transforms/InstCombine/icmp-range.ll | 137 +- llvm/test/Transforms/InstCombine/memrchr-4.ll | 53 +- .../test/Transforms/InstCombine/mul-masked-bits.ll | 57 + llvm/test/Transforms/InstCombine/mul.ll | 47 + llvm/test/Transforms/InstCombine/sub-gep.ll | 13 + .../Transforms/InstCombine/trunc-shift-trunc.ll | 13 + llvm/test/Transforms/InstCombine/vec_shuffle.ll | 13 +- .../JumpThreading/select-unfold-freeze.ll | 244 --- llvm/test/Transforms/LICM/pr55672.ll | 105 ++ .../Transforms/LoopSimplify/update_latch_md2.ll | 34 + .../LoopUnroll/runtime-loop-at-most-two-exits.ll | 10 +- .../runtime-loop-multiexit-dom-verify.ll | 38 +- .../LoopUnroll/runtime-loop-multiple-exits.ll | 702 ++++---- .../LoopUnroll/runtime-multiexit-heuristic.ll | 86 +- ...vectorization-factor-for-unprofitable-memops.ll | 11 +- .../AArch64/loop-vectorization-factors.ll | 6 +- .../LoopVectorize/AArch64/reduction-small-size.ll | 16 +- .../AArch64/scalable-reductions-tf.ll | 40 + .../LoopVectorize/AArch64/scalable-reductions.ll | 2 - .../AArch64/scalable-vectorization-cost-tuning.ll | 2 +- .../AArch64/scalable-vectorization.ll | 16 +- .../Transforms/LoopVectorize/AArch64/sve-fneg.ll | 101 ++ .../LoopVectorize/AArch64/sve-illegal-type.ll | 8 +- .../LoopVectorize/RISCV/riscv-vector-reverse.ll | 94 + .../LoopVectorize/X86/gather-vs-interleave.ll | 2 +- llvm/test/Transforms/MergeFunc/alias.ll | 2 +- llvm/test/Transforms/PGOProfile/PR41279.ll | 4 +- llvm/test/Transforms/PGOProfile/chr.ll | 70 +- llvm/test/Transforms/PGOProfile/memop_clone.ll | 2 +- .../PGOProfile/memop_size_from_strlen.ll | 2 +- .../X86/vector-reduction-known-first-value.ll | 117 ++ .../PhaseOrdering/X86/vector-reductions-logical.ll | 34 +- .../Transforms/SLPVectorizer/AArch64/horizontal.ll | 22 +- .../Transforms/SLPVectorizer/AArch64/loadorder.ll | 8 +- .../SLPVectorizer/AArch64/reorder-fmuladd-crash.ll | 4 +- .../AArch64/transpose-inseltpoison.ll | 2 +- .../Transforms/SLPVectorizer/AArch64/transpose.ll | 2 +- .../Transforms/SLPVectorizer/AArch64/tsc-s116.ll | 18 +- .../Transforms/SLPVectorizer/SystemZ/pr34619.ll | 2 +- .../X86/buildvector-same-lane-insert.ll | 19 +- .../SLPVectorizer/X86/buildvector-shuffle.ll | 3 +- .../SLPVectorizer/X86/cmp-as-alternate-ops.ll | 16 +- .../Transforms/SLPVectorizer/X86/crash_7zip.ll | 14 +- .../Transforms/SLPVectorizer/X86/crash_bullet3.ll | 10 +- .../Transforms/SLPVectorizer/X86/crash_cmpop.ll | 2 +- .../SLPVectorizer/X86/crash_exceed_scheduling.ll | 2 +- .../Transforms/SLPVectorizer/X86/crash_lencod.ll | 9 +- .../X86/crash_scheduling-inseltpoison.ll | 13 +- .../SLPVectorizer/X86/crash_scheduling.ll | 13 +- .../SLPVectorizer/X86/extract-scalar-from-undef.ll | 67 + .../SLPVectorizer/X86/horizontal-list.ll | 19 +- .../SLPVectorizer/X86/horizontal-minmax.ll | 29 +- .../Transforms/SLPVectorizer/X86/horizontal.ll | 44 +- .../Transforms/SLPVectorizer/X86/insert-shuffle.ll | 20 +- .../SLPVectorizer/X86/jumbled-load-multiuse.ll | 7 +- .../SLPVectorizer/X86/jumbled-load-used-in-phi.ll | 2 +- .../Transforms/SLPVectorizer/X86/jumbled-load.ll | 17 +- .../SLPVectorizer/X86/jumbled_store_crash.ll | 15 +- .../SLPVectorizer/X86/load-merge-inseltpoison.ll | 5 +- .../Transforms/SLPVectorizer/X86/load-merge.ll | 5 +- .../test/Transforms/SLPVectorizer/X86/lookahead.ll | 32 +- .../Transforms/SLPVectorizer/X86/ordering-bug.ll | 7 +- llvm/test/Transforms/SLPVectorizer/X86/partail.ll | 4 +- llvm/test/Transforms/SLPVectorizer/X86/phi.ll | 60 +- .../SLPVectorizer/X86/pr42022-inseltpoison.ll | 14 +- llvm/test/Transforms/SLPVectorizer/X86/pr42022.ll | 14 +- llvm/test/Transforms/SLPVectorizer/X86/pr47623.ll | 7 +- .../SLPVectorizer/X86/pr47629-inseltpoison.ll | 138 +- llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll | 138 +- .../SLPVectorizer/X86/reduction-same-vals.ll | 16 +- .../SLPVectorizer/X86/remark_extract_broadcast.ll | 10 +- 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mode 100644 openmp/libomptarget/test/offloading/target-teams-atomic.c create mode 100644 openmp/runtime/test/teams/teams-atomic.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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