Tcwg-commits April 2022

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O3 updated (6cc26f3037a -> 7d31c678d68)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O3 in repository toolchain/ci/gcc. from 6cc26f3037a testsuite: add additional option to force DSE execution [PR103662] adds 71999fde2a4 libstdc++: Add pretty printer for std::initializer_list adds 46cd445fc07 contrib: filter out a new Clang warning adds 362e2a9c629 Retain existing range knowledge when prefilling statements. adds 235f88dbc34 docs: Fix 'modff' reference in extend.texi adds 1ba397e9f93 c++: __builtin_shufflevector with value-dep expr [PR105353] adds a5cee0480c1 libstdc++: Add deduction guides for std::packaged_task [PR105375] adds 2fbdcf5e58c libstdc++: Implement constexpr std::unique_ptr for C++23 (P2273R3) adds 68fd1c9f22a contrib: filter out a new Clang warning adds b2202431910 fortran: Fix up gfc_trans_oacc_construct [PR104717] adds a5dc2641add gimple-fold: fix further missing stmt locations [PR104308] adds 6ad3ca0077e analyzer: fix ICEs on complex constants [PR105365,105366] adds 98de0da6035 Daily bump. adds 288e4c64f6b c++: partial ordering with dependent NTTP type [PR105289] adds c83b9c54d9d c++: ICE with requires-expr and -Wsequence-point [PR105304] adds 65735d21ac4 c++: generic lambda fn parm pack [PR104624] adds 57a957cb71c libgomp: Fix up two non-GOMP_USE_ALIGNED_WORK_SHARES relate [...] adds 22c24ba48a2 testsuite: Improve unlimited_polymorphic_3.f03 [PR103662] adds 5face32b7f4 i386: Fix up ICE with -mveclibabi={acml,svml} [PR105367] adds 1b45ae16fff testsuite: Fix up g++.target/i386/vec-tmpl1.C testcase [PR65211] adds d4836ac9acd reassoc: Don't call fold_convert if !fold_convertible_p [PR105374] adds 7d31c678d68 ifcvt: Improve noce_try_store_flag_mask [PR105314] No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 10 ++ contrib/filter-clang-warnings.py | 6 +- gcc/ChangeLog | 69 ++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 11 ++ gcc/analyzer/svalue.cc | 30 +++-- gcc/c-family/c-common.cc | 2 +- gcc/config/i386/i386.cc | 6 +- gcc/cp/ChangeLog | 7 ++ gcc/cp/pt.cc | 11 +- gcc/cp/typeck.cc | 4 +- gcc/doc/extend.texi | 2 +- gcc/fortran/ChangeLog | 7 ++ gcc/fortran/trans-openmp.cc | 2 + gcc/gimple-fold.cc | 3 + gcc/gimple-range.cc | 4 + gcc/ifcvt.cc | 6 +- gcc/testsuite/ChangeLog | 51 +++++++++ .../g++.dg/cpp1y/lambda-generic-variadic22.C | 15 +++ gcc/testsuite/g++.dg/cpp2a/concepts-requires30.C | 10 ++ gcc/testsuite/g++.dg/ext/builtin-shufflevector-3.C | 23 ++++ gcc/testsuite/g++.dg/pr105276.C | 18 +++ .../g++.dg/template/partial-specialization11.C | 11 ++ .../g++.dg/template/partial-specialization12.C | 12 ++ gcc/testsuite/g++.target/i386/vec-tmpl1.C | 1 + gcc/testsuite/gcc.dg/analyzer/pr104308.c | 13 ++- gcc/testsuite/gcc.dg/analyzer/pr105365.c | 17 +++ gcc/testsuite/gcc.dg/analyzer/pr105366.c | 19 ++++ gcc/testsuite/gcc.target/i386/pr105367.c | 12 ++ gcc/testsuite/gcc.target/riscv/pr105314.c | 12 ++ gcc/testsuite/gfortran.dg/goacc/pr104717.f90 | 22 ++++ .../goacc/privatization-1-compute-loop.f90 | 7 +- .../gfortran.dg/unlimited_polymorphic_3.f03 | 6 +- gcc/testsuite/lib/target-supports.exp | 2 + gcc/tree-ssa-reassoc.cc | 6 +- libgomp/ChangeLog | 6 + libgomp/loop.c | 7 +- libgomp/loop_ull.c | 7 +- libgomp/sections.c | 7 +- .../libgomp.oacc-fortran/privatized-ref-2.f90 | 7 ++ libgomp/work.c | 4 +- libstdc++-v3/ChangeLog | 34 ++++++ libstdc++-v3/include/bits/ptr_traits.h | 5 +- libstdc++-v3/include/bits/unique_ptr.h | 124 +++++++++++++++++---- libstdc++-v3/include/std/future | 11 ++ libstdc++-v3/include/std/version | 4 + libstdc++-v3/python/libstdcxx/v6/printers.py | 24 +++- .../20_util/unique_ptr/assign/constexpr.cc | 48 ++++++++ .../20_util/unique_ptr/comparison/constexpr.cc | 73 ++++++++++++ .../20_util/unique_ptr/cons/constexpr_c++20.cc | 85 ++++++++++++++ .../20_util/unique_ptr/creation/constexpr.cc | 34 ++++++ .../20_util/unique_ptr/modifiers/constexpr.cc | 68 +++++++++++ .../unique_ptr/specialized_algorithms/constexpr.cc | 46 ++++++++ .../30_threads/packaged_task/cons/deduction.cc | 85 ++++++++++++++ .../testsuite/libstdc++-prettyprinters/cxx11.cc | 6 + 55 files changed, 1062 insertions(+), 62 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1y/lambda-generic-variadic22.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-requires30.C create mode 100644 gcc/testsuite/g++.dg/ext/builtin-shufflevector-3.C create mode 100644 gcc/testsuite/g++.dg/pr105276.C create mode 100644 gcc/testsuite/g++.dg/template/partial-specialization11.C create mode 100644 gcc/testsuite/g++.dg/template/partial-specialization12.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr105365.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr105366.c create mode 100644 gcc/testsuite/gcc.target/i386/pr105367.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr105314.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/pr104717.f90 create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/assign/constexpr.cc create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/comparison/constexpr.cc create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/cons/constexpr_c++20.cc create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/creation/constexpr.cc create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/modifiers/constexpr.cc create mode 100644 libstdc++-v3/testsuite/20_util/unique_ptr/specialized_algorithm [...] create mode 100644 libstdc++-v3/testsuite/30_threads/packaged_task/cons/deduction.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O3 updated (5f59e7e0c7 -> 3f0423f913)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O3 in repository toolchain/ci/binutils-gdb. from 5f59e7e0c7 gdb/fortran: Support for assumed rank zero adds 0d38576a34 Emit a note warning the user that creating an executable sta [...] adds 2cf349be0e Do not put linkage names into .gdb_index adds df2a5f8de7 Automatic date update in version.in adds 3f0423f913 gdbsupport/pathstuff.h: #include <array> explicitly for std: [...] No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 8 ++++++++ bfd/elflink.c | 8 ++++++-- bfd/version.h | 2 +- binutils/ChangeLog | 6 ++++++ binutils/testsuite/lib/binutils-common.exp | 1 + gdb/dwarf2/index-write.c | 8 ++++++++ gdbsupport/pathstuff.h | 1 + ld/ChangeLog | 6 ++++++ ld/testsuite/ld-elf/pr29072.b.warn | 1 + 9 files changed, 38 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O3 updated (d32f6530f -> a011d9f21)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O3 in repository toolchain/ci/base-artifacts. discards d32f6530f 0: update: binutils-gcc: 2 new a011d9f21 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d32f6530f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1540 -> 1552 bytes 02-prepare_abe/console.log.xz | Bin 2744 -> 2796 bytes 04-build_abe-binutils/console.log.xz | Bin 51944 -> 52744 bytes 05-build_abe-bootstrap_O3/console.log.xz | Bin 458080 -> 458468 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 36 +++++++++++++++++++++++++++++++ jenkins/manifest.sh | 12 +++++------ 7 files changed, 42 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3 updated (a050033582ac -> 35e60f5de180)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3 in repository toolchain/ci/llvm-project. from a050033582ac [test] Don't rely on default of detect_stack_use_after_return adds 7ee30a0e24a1 [NFC][LAA] Match-up type sizes for possible extensions, ba [...] adds dd6350d93788 Revert "[test] Don't rely on default of detect_stack_use_a [...] adds 9b8a04313f0e [test] Don't rely on default of detect_stack_use_after_return adds a48300aee570 [clang][OpenMP][DebugInfo] Debug support for TLS variables [...] adds f3ebf828dc54 [mlir] Generate Dialect constructors in .cpp instead of .h adds eda6f907d258 [mlir][NFC] Shift a bunch of dialect includes from the .h [...] adds 5996306c24ba [C++20][Modules][Driver][HU 3/N] Handle foo.h with -fmodul [...] adds 940a3f6b3d1d [mlir][bufferize][NFC] Clean up test cases adds 48b8edac1c18 [mlir][bufferize][NFC] Remove old references to Comprehens [...] adds d43c083ab692 [SCEV] Use getConstant to construct SCEV for ConstantInt (NFC). adds b2a885a290be [SCCP] Add initial tests for freeze. adds e0f7db779eb5 [SimpleLoopUnswitch] Use SLU version of memoryssa-threshol [...] adds 76b57f49a23e [IndVarSimplify] Replace legacy loop-unswitch with SimpleL [...] adds de8a65f787cc [NFC] Sync code for upstreaming. adds 9dc9b21488ee [C++20][Modules][Driver][HU 4/N] Add fdirectives-only mode [...] adds 38822b98fa3b Revert "[clang] Adding Platform/Architecture Specific Reso [...] adds 8634aa250397 [BOLT][CMAKE] Simplify Clang/LLD identification adds 7a98d8351b27 [libc++] Fixes concepts overload resolution. adds 3530c35c6609 [OpenMP] Use CUDA's non-RDC mode when LTO has whole progra [...] adds 5114db933dbf [analyzer] Clean checker options from bool to DefaultBool (NFC) adds 6c8612fe6f2b [Bazel] Make mlir:BufferizationDialect depend on mlir:Arit [...] adds bbbc49f780e0 [Bazel] Add more mlir dependencies after D124298 adds 4681f6111e65 [hwasan][test] Change -hwasan to -passes=hwasan adds 807e418413a0 [Concepts] Fix overload resolution bug with constrained ca [...] adds d59cf901cbae [mlir][sparse] Expose SpareTensor passes as enums instead [...] adds f6af446b6625 Revert "[Concepts] Fix overload resolution bug with constr [...] adds a0636b5855f5 Revert "Revert "[Concepts] Fix overload resolution bug wit [...] adds cfc2c5905ec1 Revert "Revert "Revert "[Concepts] Fix overload resolution [...] adds d1b73f3412b3 Reverting accidental git-revert commits. adds 2d80889b2a9e Reverting accidental git-revert commits. adds afa20aff6ef0 Reverting accidental git-revert commits. adds 4620032ee304 Revert "[mlir][sparse] Expose SpareTensor passes as enums [...] adds c0022b4bb12d [InlineCost] Set LastCallToStaticBonus in ML inlining models. adds 3254f46884d3 [lld/mac] For catalyst outputs, tolerate implicitly linkin [...] adds fc655a0a96df [OCaml][DebugInfo] Add bindings for parameter and auto var [...] adds ae76eb32a598 [NFC][Clang][Pragma] Remove unused variables adds 7a21a0525a69 [RISCV] Add sched to pseudo function call instructions adds 3566bbe62f2e [analyzer] Add option for AddrSpace in core.NullDereference check adds 2fc67af487aa [InstCombine] Add test for fold fcmp-of-copysign. nfc adds b3df14b6c987 [runtimes] [CMake] Unify variable names adds 49aeeafda3b5 llvm-reduce: Don't delete triple/datalayout adds 3f0f20366622 run-clang-tidy: Fix infinite loop on windows adds 6243b90ead7a [flang] Do not create arith.extui with same from/to type adds ac5f7be6a868 Move test/.gitattributes to clang-tools-extra/test adds c261f78d05de [clang-format] Refactor determineStarAmpUsage NFC adds d13f5023891c [libcxx] random_device, use arc4random() on FreeBSD, NetBS [...] adds 5805cfb90127 [InstCombine] Complete folding of fneg-of-fabs adds a5c52ff0d472 [OpenMP][IRBuilder] Handle unexcuted EXPECT_FALSE adds e33867a43410 Fix an issue in comment. NFC adds 34312f1f0c4f [mlir][LLVM] Support opaque pointers in data layout entries adds fca52e82185a [flang] fix LBOUND lowering with KIND and no DIM arguments adds c2a849019343 [mlir][Bazel] Add missing dependencies. adds cd81ecba2cbb [MemorySSA] Generate check lines for test. adds 8ac447adc882 [Test] Add test for PR55072 adds 9a7339c997a0 [runtimes] [CMake] Rename a cmake variable missed in b3df1 [...] adds 0a5db8912c50 [MemorySSA] Use -simple-loop-unswitch instead of -loop-uns [...] adds 4c807f2f579f [mlir][vector] insert `alloca`s outside of loops adds 0cd5cd19af0e [Serialization] write expr dependence bits as a single integer adds ab17873ee696 [Test] Simplify test for PR55072 adds 04f78947e4b9 [InstCombine] Add tests for X + Y - 1 u< X (NFC) adds 042dc3c46d73 [libc++] add zip_view and views::zip for C++23 adds 12a27169535a [mlir][LLVM] Support opaque pointers in `llvm.mlir.addressof` adds ea8cbd5c58da [gn build] Port 042dc3c46d73 adds b00fd352777d [LangRef] Limit readnone,read/writeonly to memory visible [...] adds 606a000d1a13 [LoopInstSimplify] Ignore users in unreachable blocks. PR55072 adds e38b1f7d09a4 [InstCombine] Add additional tests for X + Y + C u< X (NFC) adds 2bec8d6d59a1 [InstCombine] Fold X + Y + C u< X adds 010acc52a83a [lld/mac] Revert libcompiler_rt.dylib version check change adds ee509258947c [InstCombine] Fold (X != 0) & (Y u>= X) adds 7ddf39bc1d75 [X86][AVX] Add shuffle test case for Issue #55066 adds 2fee8dd621bb [SimpleLoopUnswitch] Run LICM for nested unswitching tests. adds 97a32d3e43fe [flang][driver] Add support for generating executables adds c712bf3ce41f [X86][AMX] Add test case for D124378. adds d1762fc454c0 [AMDGPU] Use d16 flag for image.sample instructions adds e8945110d238 [InstCombine] Remove redundant unsigned underflow fold (NFCI) adds 00f0c805ff7c [Frontend] shrink in-memory PCH buffers to fit adds fda4305e5378 [DebugInfo][InstrRef] Add a size operand to DBG_PHI adds 36ba89b5b342 Revert "[sanitizer] Use canonical syscalls everywhere" adds 13815e8cbf8d Revert "[DebugInfo][InstrRef] Add a size operand to DBG_PHI" adds 6b257af82261 [libc++] Fix C++03 with the unstable ABI enabled adds 6a6cc5542b61 [SimpleLoopUnswitch] Enable freezing of conditions by default. adds 5ad07ac400da [Libomptarget] Use entry name for global info adds 5db925023169 Reapply D124184, [DebugInfo][InstrRef] Add a size operand [...] adds 37b4782e3e53 [clang][dataflow] Fix `Environment::join`'s handling of fl [...] adds c6afbdb5d2a0 Revert "[AMDGPU] Use d16 flag for image.sample instructions" adds 1c65c734c93f Clear temporary file in test, buildbot appears to be reusi [...] adds 07513605b223 CODE_OWNERS: update information for builtins adds 9f631cf7c650 [AMDGPU] Regenerate lit test pattern (NFC). adds 16d87efc2ab5 [AMDGPU] Lit test pre-commit changes (NFC) adds e8305c0b8f49 [X86] combineX86ShuffleChain - don't fold to truncate(conc [...] adds ffe03ff75c26 [RISCV] Fix incorrect policy implement for unmasked vslide [...] adds 149d3e436532 [flang] Disambiguate F(X)=Y case where F is a function ret [...] adds 72904a990c4d [flang] Avoid global name conflict when BIND(C,NAME=) is used adds c47bcf9af6fc [demangler][NFC] OperatorInfo table unit test adds 6f73bd781305 [test] Remove legacy PM pipeline test adds 9727c77d58ac [NFC] Rename Instrinsic to Intrinsic adds 4051cac256d9 [libc++][NFC] Use brace-init instead of parens to workarou [...] adds 39e23bb059d1 [LegacyPM] Remove HWAsanSanitizerLegacyPass adds bf0d61369027 [libcxx] Disable long double -> int128 test with msan adds 1159984802e7 [CostModel] Add fptoi_sat costmodel tests. NFC adds 40f1af476010 [RISCV] Add isCommutable to ADD/ADDW/MUL/AND/OR/XOR/MIN/MAX/CLMUL adds ef7439bdf923 [Basic] SourceManager docs: macro expansion SLocs aren't a [...] adds 950c95cfdd75 [coroutines] Get an IntegerType from the value instead of [...] adds 6bcdde2334bd [flang][runtime] Fix KIND=16 real/complex component I/O adds 408bb9a375ac Add a regression test to guard the 0 hot-caller threshold [...] adds e59e580116b0 [BOLT] Refactor DataAggregator::printLBRHeatMap. adds 87468e85fcdc compile commands header to source heuristic lower-cases fi [...] adds 4e5dee2f30dd [mlir][ods] Add tablegen field for concise printing of Bit [...] adds a266a2100012 [mlir][ods] Extend the EnumAttr tablegen class to support [...] adds c4caa90b1523 [mlir][tblgen] Generate builders with inferred return type [...] adds b8f5cf9d2c56 [flang] Accept "INFINITY" as real input adds 6035649d4c76 [Serialization] Remove dead TYPE_FUNCTION_PROTO abbreviation. NFC adds 88b9e46fb54c [SLP] Steer for the best chance in tryToVectorize() when r [...] adds d3efa577f549 [lit] Keep stdout/stderr when using GoogleTest format adds f65e76d16df7 [flang] Add semantic checks for intrinsic function REDUCE() adds 5c90ecae2db1 [PS5] Driver test for analyzer defaults adds 2c272a4e8f9d [flang][runtime] Fix total MAXLOC/MINLOC for non-integer data adds c98d9502fc6b [libunwind] Fix build warnings in Unwind-EHABI.cpp. NFC. adds 7164c5f051a9 [libunwind] [CMake] Remove leftover no-op cmake variable s [...] adds d35f7f254f6a [mlir] Allow data flow analysis of non-control flow branch [...] adds 0386213352ec [clang][NFC] Inclusive language: remove use of Whitelist i [...] adds 7714e0317520 RegAllocGreedy: Allow last chance recolor to retry overlap [...] adds b3e8e43789d2 [compiler-rt][NFC] Inclusive language: remove use of sanit [...] adds 6631907ad20f [InstCombine] use isKnownNonNegative to reduce code duplic [...] adds 6c8cb219f5d4 [InstCombine] add tests for icmp with extended operands; NFC adds 993054c1c960 Change NVPTX/f16x2-instructions.ll to use unix EOL. NFC adds 76d1f5eaa87b [NVPTX] Support float <-> 2 x half bitcasts adds 09e75d3f0996 [libcxx][NFC] Inclusive language: remove use of sanity check adds 0c99575df4a9 [libc++] Avoid lifetime UB in __thread_local_data() adds 8fbf9acc8c67 Add missing comparison operators to SmallVector adds 987cd7c3ed75 Revert "Reapply D124184, [DebugInfo][InstrRef] Add a size [...] adds e6f44a3cd273 Add PointerType analysis for DirectX backend adds 1f31795cb389 [NFC] Cleanup code to get back in synch for upstreaming. adds 827ff1e576f7 [LLDB][NativePDB] Fix incorrect file index of inlinees int [...] adds 494d86d45be0 [RISCV] Pre-commit test for D122769. NFC adds e07c092b8529 [lldb] Update online help text (consistency, typo) adds 2d014b72ccb5 [test][clangd] Use StringRef instead of std::string adds 31456ff19197 [gn build] Kind of port e6f44a3cd273 (DirectXTests) adds db92019ab97b [libunwind] Update the test configuration files to support [...] adds 8e4cd7295cb5 [CMake] Update cache file for Win to ARM Linux cross toolc [...] adds e83543f8c2ef Don't replace Undef with null value for Constants Differen [...] adds 3143840f216c NFC. Add missing DXILPointerTyID case adds 5cbf516cb79f Refactor protected virtual functions from SymbolFile into [...] adds b1fa5ac3ba34 [mlgo] Factor out TensorSpec adds b0d119b58364 [gn build] Port b1fa5ac3ba34 adds 059f39d2f445 [trace][intel pt] Support events adds 998014830549 [RISCV][SelectionDAG] Support VP_ADD/VP_MUL/VP_SUB mask op [...] adds 35e60f5de180 [NFC][trace] simplify the instruction dumper No new revisions were added by this update. Summary of changes: bolt/CMakeLists.txt | 41 +- bolt/lib/Profile/DataAggregator.cpp | 22 +- .../clang-tidy/tool/run-clang-tidy.py | 9 +- .../clangd/unittests/TUSchedulerTests.cpp | 8 +- {test => clang-tools-extra/test}/.gitattributes | 0 clang/cmake/caches/CrossWinToARMLinux.cmake | 4 - clang/docs/ReleaseNotes.rst | 5 + clang/docs/analyzer/checkers.rst | 15 +- clang/include/clang/AST/Decl.h | 3 + clang/include/clang/Basic/SourceManager.h | 34 +- clang/include/clang/Basic/riscv_vector.td | 3 +- clang/include/clang/Driver/Options.td | 8 + clang/include/clang/Sema/Sema.h | 6 +- clang/include/clang/Serialization/ASTWriter.h | 5 - .../clang/StaticAnalyzer/Checkers/Checkers.td | 7 + clang/include/clang/StaticAnalyzer/Core/Checker.h | 12 - clang/lib/AST/ASTImporter.cpp | 6 +- .../Analysis/FlowSensitive/DataflowEnvironment.cpp | 59 +- clang/lib/Analysis/RetainSummaryManager.cpp | 2 +- clang/lib/Basic/SourceManager.cpp | 22 +- clang/lib/CodeGen/CGBuiltin.cpp | 2 +- clang/lib/CodeGen/CGDecl.cpp | 8 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 6 +- clang/lib/Driver/Driver.cpp | 15 +- clang/lib/Driver/ToolChains/Clang.cpp | 6 + clang/lib/Driver/ToolChains/Gnu.cpp | 35 + clang/lib/Format/TokenAnnotator.cpp | 60 +- clang/lib/Frontend/PrecompiledPreamble.cpp | 16 +- clang/lib/Headers/CMakeLists.txt | 422 +-- clang/lib/Lex/Pragma.cpp | 4 - clang/lib/Sema/SemaDecl.cpp | 2 +- clang/lib/Sema/SemaOverload.cpp | 92 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 22 +- clang/lib/Serialization/ASTReaderStmt.cpp | 24 +- clang/lib/Serialization/ASTWriter.cpp | 24 - clang/lib/Serialization/ASTWriterDecl.cpp | 25 +- clang/lib/Serialization/ASTWriterStmt.cpp | 6 +- .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 12 +- .../Checkers/CallAndMessageChecker.cpp | 2 +- .../Checkers/CheckSecuritySyntaxOnly.cpp | 28 +- clang/lib/StaticAnalyzer/Checkers/CloneChecker.cpp | 2 +- .../StaticAnalyzer/Checkers/DereferenceChecker.cpp | 49 +- .../Checkers/DynamicTypePropagation.cpp | 2 +- .../Checkers/IvarInvalidationChecker.cpp | 4 +- .../Checkers/LocalizationChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 6 +- .../lib/StaticAnalyzer/Checkers/NSErrorChecker.cpp | 2 +- .../StaticAnalyzer/Checkers/NullabilityChecker.cpp | 6 +- .../StaticAnalyzer/Checkers/PthreadLockChecker.cpp | 2 +- .../StaticAnalyzer/Checkers/SmartPtrModeling.cpp | 2 +- .../Checkers/StackAddrEscapeChecker.cpp | 2 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/ValistChecker.cpp | 2 +- .../Tooling/InterpolatingCompilationDatabase.cpp | 2 +- clang/test/Analysis/analyzer-config.c | 1 + clang/test/Analysis/cast-value-notes.cpp | 84 +- .../temp.decls/temp.fct/temp.func.order/p6.cpp | 49 + .../RISCV/rvv-intrinsics-overloaded/vslidedown.c | 106 +- .../RISCV/rvv-intrinsics-overloaded/vslideup.c | 106 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslidedown.c | 118 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vslideup.c | 118 +- clang/test/CodeGen/builtins-nvptx-mma.py | 2 +- clang/test/CodeGenCUDA/fp-contract.cu | 2 +- clang/test/Driver/cxx20-fdirectives-only.cpp | 20 + clang/test/Driver/cxx20-header-units-02.cpp | 7 + clang/test/Driver/linker-wrapper.c | 4 +- clang/test/Driver/ps4-analyzer-defaults.cpp | 33 - clang/test/Driver/ps4-ps5-analyzer-defaults.cpp | 39 + clang/test/Index/pch-with-module.m | 1 + clang/test/OpenMP/debug_threadprivate_copyin.c | 59 + clang/test/Profile/c-avoid-direct-call.c | 2 +- clang/test/Profile/c-indirect-call.c | 2 +- clang/test/Profile/cxx-indirect-call.cpp | 2 +- .../clang-linker-wrapper/ClangLinkerWrapper.cpp | 25 +- .../TypeErasedDataflowAnalysisTest.cpp | 159 ++ clang/unittests/Format/FormatTest.cpp | 9 + clang/unittests/Format/TokenAnnotatorTest.cpp | 96 + .../unittests/Tooling/CompilationDatabaseTest.cpp | 8 + compiler-rt/CMakeLists.txt | 2 +- compiler-rt/CODE_OWNERS.TXT | 4 +- compiler-rt/cmake/config-ix.cmake | 4 +- .../lib/sanitizer_common/sanitizer_linux.cpp | 86 +- .../lib/sanitizer_common/sanitizer_platform.h | 12 + compiler-rt/lib/tsan/go/test.c | 2 +- compiler-rt/lib/tsan/rtl-old/CMakeLists.txt | 8 +- compiler-rt/lib/tsan/rtl-old/tsan_flags.cpp | 2 +- compiler-rt/lib/tsan/rtl/CMakeLists.txt | 8 +- compiler-rt/lib/tsan/rtl/tsan_flags.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_rtl.cpp | 2 +- compiler-rt/test/asan/TestCases/heavy_uar_test.cpp | 4 +- flang/include/flang/Lower/Support/Utils.h | 1 + .../flang/Optimizer/Builder/Runtime/Character.h | 1 + flang/include/flang/Optimizer/Dialect/FIROps.h | 1 - flang/include/flang/Optimizer/Dialect/FIROps.td | 11 +- flang/include/flang/Runtime/stop.h | 2 +- flang/lib/Decimal/decimal-to-binary.cpp | 8 +- flang/lib/Evaluate/intrinsics.cpp | 96 +- flang/lib/Lower/ConvertExpr.cpp | 2 +- flang/lib/Lower/IntrinsicCall.cpp | 9 +- flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp | 95 +- flang/lib/Optimizer/Dialect/FIROps.cpp | 576 ++-- flang/lib/Parser/parse-tree.cpp | 27 +- flang/lib/Semantics/program-tree.cpp | 22 +- flang/lib/Semantics/program-tree.h | 8 + flang/lib/Semantics/resolve-names.cpp | 49 +- flang/lib/Semantics/rewrite-parse-tree.cpp | 26 +- flang/runtime/CMakeLists.txt | 2 + flang/runtime/FortranMain/CMakeLists.txt | 3 + flang/runtime/FortranMain/Fortran_main.c | 21 + flang/runtime/extrema.cpp | 2 +- flang/runtime/type-code.cpp | 8 - flang/test/CMakeLists.txt | 3 + flang/test/Driver/driver-help-hidden.f90 | 2 + flang/test/Driver/linker-flags.f90 | 31 + flang/test/Lower/Intrinsics/ichar.f90 | 10 + flang/test/Lower/Intrinsics/lbound.f90 | 40 + flang/test/Semantics/bind-c01.f90 | 8 +- flang/test/Semantics/reduce01.f90 | 75 + flang/tools/flang-driver/CMakeLists.txt | 8 + libcxx/CMakeLists.txt | 6 +- libcxx/cmake/Modules/HandleLibcxxFlags.cmake | 30 +- libcxx/cmake/config-ix.cmake | 16 +- libcxx/docs/ReleaseNotes.rst | 5 + libcxx/docs/Status/ZipProjects.csv | 8 +- libcxx/include/CMakeLists.txt | 1 + libcxx/include/__bit_reference | 2 +- libcxx/include/__config | 3 +- libcxx/include/__format/format_arg.h | 8 +- libcxx/include/__ranges/zip_view.h | 511 ++++ libcxx/include/module.modulemap | 1 + libcxx/include/ranges | 12 + libcxx/src/thread.cpp | 9 +- libcxx/test/libcxx/private_headers.verify.cpp | 1 + .../thread/thread.threads/create_late.pass.cpp | 29 + .../stringbuf/stringbuf.virtuals/overflow.pass.cpp | 2 +- .../stringbuf.virtuals/pbackfail.pass.cpp | 2 +- .../std/numerics/bit/bit.cast/bit_cast.pass.cpp | 5 +- .../range.adaptors/range.lazy.split/base.pass.cpp | 8 +- .../range.transform/ctor.default.pass.cpp | 8 +- .../ranges/range.adaptors/range.zip/begin.pass.cpp | 109 + .../range.zip/borrowing.compile.pass.cpp | 40 + .../ranges/range.adaptors/range.zip/cpo.pass.cpp | 77 + .../range.adaptors/range.zip/ctad.compile.pass.cpp | 40 + .../range.adaptors/range.zip/ctor.default.pass.cpp | 68 + .../range.adaptors/range.zip/ctor.views.pass.cpp | 100 + .../ranges/range.adaptors/range.zip/end.pass.cpp | 396 +++ .../range.adaptors/range.zip/general.pass.cpp | 55 + .../range.zip/iterator/arithmetic.pass.cpp | 143 + .../range.zip/iterator/compare.pass.cpp | 250 ++ .../range.zip/iterator/ctor.default.pass.cpp | 74 + .../range.zip/iterator/ctor.other.pass.cpp | 63 + .../range.zip/iterator/decrement.pass.cpp | 95 + .../range.zip/iterator/deref.pass.cpp | 80 + .../range.zip/iterator/increment.pass.cpp | 135 + .../range.zip/iterator/iter_move.pass.cpp | 77 + .../range.zip/iterator/iter_swap.pass.cpp | 88 + .../iterator/member_types.compile.pass.cpp | 185 ++ .../range.zip/iterator/singular.pass.cpp | 83 + .../range.zip/iterator/subscript.pass.cpp | 61 + .../range.zip/range.concept.compile.pass.cpp | 332 +++ .../range.zip/sentinel/ctor.default.pass.cpp | 51 + .../range.zip/sentinel/ctor.other.pass.cpp | 76 + .../range.adaptors/range.zip/sentinel/eq.pass.cpp | 156 ++ .../range.zip/sentinel/minus.pass.cpp | 235 ++ .../ranges/range.adaptors/range.zip/size.pass.cpp | 100 + .../std/ranges/range.adaptors/range.zip/types.h | 459 +++ libcxxabi/CMakeLists.txt | 4 +- libcxxabi/cmake/Modules/HandleLibcxxabiFlags.cmake | 26 +- libcxxabi/cmake/config-ix.cmake | 14 +- libcxxabi/src/CMakeLists.txt | 2 +- libcxxabi/src/demangle/ItaniumDemangle.h | 188 +- libunwind/CMakeLists.txt | 15 +- libunwind/cmake/Modules/HandleLibunwindFlags.cmake | 30 +- libunwind/cmake/config-ix.cmake | 16 +- libunwind/src/CMakeLists.txt | 8 +- libunwind/src/Unwind-EHABI.cpp | 3 + .../test/configs/llvm-libunwind-shared.cfg.in | 10 +- .../test/configs/llvm-libunwind-static.cfg.in | 13 +- lld/MachO/Driver.cpp | 6 +- lld/MachO/Driver.h | 3 +- lld/MachO/DriverUtils.cpp | 12 +- lld/MachO/InputFiles.cpp | 30 +- lld/MachO/InputFiles.h | 6 +- .../MacOnly-Indirect.tbd | 22 + .../Frameworks/MacOnly.framework/MacOnly.tbd | 9 + lld/test/MachO/zippered.yaml | 6 + lldb/include/lldb/Symbol/SymbolFile.h | 121 +- lldb/include/lldb/Target/TraceCursor.h | 33 +- lldb/include/lldb/Target/TraceInstructionDumper.h | 39 + lldb/include/lldb/lldb-enumerations.h | 9 + lldb/source/Commands/CommandObjectThread.cpp | 4 + lldb/source/Commands/Options.td | 21 +- .../SymbolFile/Breakpad/SymbolFileBreakpad.h | 6 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 6 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 4 +- .../SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDebugMap.h | 4 +- .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 12 +- .../SymbolFile/NativePDB/SymbolFileNativePDB.h | 6 +- .../Plugins/SymbolFile/PDB/SymbolFilePDB.cpp | 2 +- lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.h | 4 +- .../Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp | 4 +- .../Plugins/SymbolFile/Symtab/SymbolFileSymtab.h | 4 +- .../Plugins/Trace/intel-pt/DecodedThread.cpp | 82 +- lldb/source/Plugins/Trace/intel-pt/DecodedThread.h | 98 +- .../Plugins/Trace/intel-pt/LibiptDecoder.cpp | 127 +- .../Plugins/Trace/intel-pt/ThreadDecoder.cpp | 2 +- .../Plugins/Trace/intel-pt/TraceCursorIntelPT.cpp | 4 + .../Plugins/Trace/intel-pt/TraceCursorIntelPT.h | 2 + .../source/Plugins/Trace/intel-pt/TraceIntelPT.cpp | 22 +- lldb/source/Symbol/SymbolFile.cpp | 105 +- lldb/source/Target/TraceCursor.cpp | 18 + lldb/source/Target/TraceInstructionDumper.cpp | 242 +- lldb/test/API/commands/trace/TestTraceDumpInfo.py | 9 +- lldb/test/API/commands/trace/TestTraceEvents.py | 82 + lldb/test/API/commands/trace/TestTraceLoad.py | 9 +- llvm/bindings/ocaml/debuginfo/debuginfo_ocaml.c | 95 + llvm/bindings/ocaml/debuginfo/llvm_debuginfo.ml | 52 + llvm/bindings/ocaml/debuginfo/llvm_debuginfo.mli | 57 + llvm/docs/LangRef.rst | 37 +- llvm/include/llvm/ADT/SmallVector.h | 3 + llvm/include/llvm/Analysis/TensorSpec.h | 130 + llvm/include/llvm/Analysis/Utils/TFUtils.h | 110 +- llvm/include/llvm/Analysis/VectorUtils.h | 8 +- llvm/include/llvm/CodeGen/MachineInstr.h | 2 +- llvm/include/llvm/CodeGen/ReplaceWithVeclib.h | 2 +- llvm/include/llvm/Demangle/ItaniumDemangle.h | 188 +- llvm/include/llvm/IR/InstVisitor.h | 2 +- llvm/include/llvm/IR/IntrinsicsARM.td | 2 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 20 +- llvm/include/llvm/IR/LLVMContext.h | 5 + llvm/include/llvm/IR/Metadata.h | 5 +- llvm/include/llvm/IR/Type.h | 15 +- llvm/include/llvm/InitializePasses.h | 1 - .../Instrumentation/HWAddressSanitizer.h | 5 - .../Transforms/Scalar/ScalarizeMaskedMemIntrin.h | 2 +- llvm/include/llvm/Transforms/Utils/Local.h | 2 +- llvm/lib/Analysis/CMakeLists.txt | 1 + llvm/lib/Analysis/CallGraphSCCPass.cpp | 2 +- llvm/lib/Analysis/ConstantFolding.cpp | 2 +- llvm/lib/Analysis/IVDescriptors.cpp | 2 +- llvm/lib/Analysis/InlineCost.cpp | 4 + llvm/lib/Analysis/LoopAccessAnalysis.cpp | 12 +- llvm/lib/Analysis/ScalarEvolution.cpp | 4 +- llvm/lib/Analysis/TFUtils.cpp | 114 - llvm/lib/Analysis/TensorSpec.cpp | 144 + llvm/lib/Analysis/VectorUtils.cpp | 10 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 2 + llvm/lib/CodeGen/RegAllocGreedy.cpp | 28 +- llvm/lib/CodeGen/ReplaceWithVeclib.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 11 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +- llvm/lib/CodeGen/SjLjEHPrepare.cpp | 2 +- llvm/lib/IR/AsmWriter.cpp | 5 + llvm/lib/IR/Constants.cpp | 8 +- llvm/lib/IR/Core.cpp | 2 + llvm/lib/IR/LLVMContext.cpp | 4 + llvm/lib/IR/LLVMContextImpl.h | 3 + llvm/lib/IR/Metadata.cpp | 30 + llvm/lib/Passes/PassBuilderPipelines.cpp | 12 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 2 +- llvm/lib/Target/AArch64/AArch64StackTagging.cpp | 2 +- llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp | 4 +- llvm/lib/Target/DirectX/CMakeLists.txt | 2 + llvm/lib/Target/DirectX/DXILPointerType.cpp | 66 + llvm/lib/Target/DirectX/DXILPointerType.h | 52 + .../DirectX/DXILWriter/DXILBitcodeWriter.cpp | 1 + llvm/lib/Target/DirectX/PointerTypeAnalysis.cpp | 119 + llvm/lib/Target/DirectX/PointerTypeAnalysis.h | 43 + .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 1 + llvm/lib/Target/Mips/MipsISelLowering.h | 2 +- llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 2 + llvm/lib/Target/NVPTX/NVPTXIntrinsics.td | 2 +- llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp | 2 +- llvm/lib/Target/PowerPC/README_P9.txt | 4 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 58 +- llvm/lib/Target/RISCV/RISCVInstrInfoM.td | 8 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 29 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 8 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 14 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 6 +- llvm/lib/Target/X86/X86LowerAMXType.cpp | 4 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 7 +- llvm/lib/Transforms/IPO/GlobalOpt.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 12 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 21 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 6 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 18 + .../Transforms/InstCombine/InstCombineSelect.cpp | 103 +- .../Instrumentation/HWAddressSanitizer.cpp | 85 - .../Transforms/Instrumentation/Instrumentation.cpp | 1 - llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopInstSimplify.cpp | 4 + .../Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp | 2 +- llvm/lib/Transforms/Scalar/Scalarizer.cpp | 4 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 2 +- .../lib/Transforms/Scalar/SpeculativeExecution.cpp | 4 +- llvm/lib/Transforms/Utils/Local.cpp | 4 +- .../Transforms/Utils/PromoteMemoryToRegister.cpp | 2 +- .../Transforms/Utils/RelLookupTableConverter.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 2 +- llvm/lib/Transforms/Utils/StripGCRelocates.cpp | 2 +- .../Vectorize/LoopVectorizationLegality.cpp | 2 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 6 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 85 +- llvm/test/Analysis/CostModel/AArch64/fptoi_sat.ll | 498 ++++ llvm/test/Analysis/CostModel/ARM/fptoi_sat.ll | 654 +++++ llvm/test/Analysis/CostModel/X86/fptoi_sat.ll | 1286 +++++++++ .../MemorySSA/update-remove-dead-blocks.ll | 24 +- llvm/test/Bindings/OCaml/debuginfo.ml | 47 + .../CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir | 32 +- llvm/test/CodeGen/AMDGPU/opt-pipeline.ll | 1041 ------- ...-fail-unsatisfiable-overlapping-tuple-hints.mir | 84 + llvm/test/CodeGen/Hexagon/hvx-byte-store-double.ll | 2 +- llvm/test/CodeGen/NVPTX/f16x2-instructions.ll | 2927 ++++++++++---------- .../CodeGen/RISCV/fixed-vectors-vadd-vp-mask.ll | 77 + .../CodeGen/RISCV/fixed-vectors-vmul-vp-mask.ll | 77 + .../CodeGen/RISCV/fixed-vectors-vsub-vp-mask.ll | 77 + llvm/test/CodeGen/RISCV/machine-cse.ll | 78 + llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 8 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 80 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 24 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 48 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 32 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 12 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 22 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 58 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 25 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 17 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 2 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 51 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 18 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 14 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 12 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 34 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 104 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/masked-tama.ll | 13 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll | 17 +- llvm/test/CodeGen/RISCV/rvv/vector-splice.ll | 222 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 55 + llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 420 ++- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 420 ++- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 420 ++- llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 420 ++- llvm/test/CodeGen/RISCV/vadd-vp-mask.ll | 66 + llvm/test/CodeGen/RISCV/vmul-vp-mask.ll | 66 + llvm/test/CodeGen/RISCV/vsub-vp-mask.ll | 66 + llvm/test/CodeGen/X86/AMX/amx-combine.ll | 93 + llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 54 + .../X86/vector-shuffle-combining-avx512bwvl.ll | 44 + llvm/test/DebugInfo/WebAssembly/dbg-declare.ll | 2 +- llvm/test/DebugInfo/X86/undef-type-md.ll | 36 + .../unordered_atomic_mem_intrins.ll | 2 +- .../HWAddressSanitizer/X86/alloca-array.ll | 2 +- .../HWAddressSanitizer/X86/alloca-with-calls.ll | 2 +- .../HWAddressSanitizer/X86/alloca.ll | 4 +- .../HWAddressSanitizer/X86/atomic.ll | 2 +- .../HWAddressSanitizer/X86/basic.ll | 4 +- .../HWAddressSanitizer/X86/globals.ll | 2 +- .../HWAddressSanitizer/X86/kernel.ll | 10 +- .../HWAddressSanitizer/X86/with-calls.ll | 4 +- .../Instrumentation/MemorySanitizer/msan_basic.ll | 2 +- ...thinlto-prelink-samplepgo-inline-threshold.prof | 16 + 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mlir/lib/Dialect/MemRef/IR/MemRefDialect.cpp | 1 + mlir/lib/Dialect/SCF/SCF.cpp | 2 + .../SCF/Transforms/BufferizableOpInterfaceImpl.cpp | 1 + .../SparseTensor/Transforms/SparseTensorPasses.cpp | 3 + mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp | 1 + mlir/lib/Dialect/Tensor/IR/TensorDialect.cpp | 2 + mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 2 + .../Transforms/BufferizableOpInterfaceImpl.cpp | 1 + .../lib/Dialect/Tensor/Transforms/SplitPadding.cpp | 1 + mlir/lib/Dialect/Tosa/IR/TosaOps.cpp | 1 + mlir/lib/Dialect/Transform/IR/TransformDialect.cpp | 2 + .../VectorMultiDimReductionTransforms.cpp | 1 + .../Transforms/VectorTransferOpTransforms.cpp | 1 + .../VectorTransferSplitRewritePatterns.cpp | 13 +- .../Dialect/X86Vector/Transforms/AVXTranspose.cpp | 1 + mlir/lib/Parser/AsmParserImpl.h | 10 + mlir/lib/Parser/Lexer.cpp | 3 + mlir/lib/Parser/TokenKinds.def | 1 + mlir/lib/TableGen/Attribute.cpp | 4 + mlir/lib/Target/Cpp/TranslateToCpp.cpp | 1 + mlir/test/Analysis/test-data-flow.mlir | 24 + .../Dialect/Arithmetic/one-shot-bufferize.mlir | 61 + mlir/test/Dialect/LLVMIR/global.mlir | 20 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 2 +- mlir/test/Dialect/LLVMIR/layout.mlir | 8 +- ...e-analysis-2fill-extract-matmul-all-perms.mlir} | 2 +- ...dule-bufferize.mlir => one-shot-bufferize.mlir} | 276 +- mlir/test/Dialect/Tensor/one-shot-bufferize.mlir | 197 ++ .../Vector/vector-transfer-full-partial-split.mlir | 20 + mlir/test/IR/attribute.mlir | 36 + mlir/test/lib/Analysis/CMakeLists.txt | 1 + mlir/test/lib/Analysis/TestDataFlow.cpp | 127 + .../Dialect/Linalg/TestLinalgElementwiseFusion.cpp | 1 + .../Dialect/Linalg/TestLinalgFusionTransforms.cpp | 1 + mlir/test/lib/Dialect/Linalg/TestPadFusion.cpp | 1 + mlir/test/lib/Dialect/Test/TestDialect.cpp | 1 + mlir/test/lib/Dialect/Test/TestDialect.h | 2 + mlir/test/lib/Dialect/Test/TestOps.td | 51 + mlir/test/mlir-tblgen/op-decl-and-defs.td | 17 + mlir/tools/mlir-opt/mlir-opt.cpp | 2 + mlir/tools/mlir-tblgen/DialectGen.cpp | 52 +- mlir/tools/mlir-tblgen/EnumsGen.cpp | 47 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 53 +- mlir/unittests/TableGen/EnumsGenTest.cpp | 30 +- mlir/unittests/TableGen/enums.td | 11 + openmp/libomptarget/include/SourceInfo.h | 10 +- openmp/libomptarget/src/omptarget.cpp | 2 +- openmp/libomptarget/test/offloading/info.c | 2 +- runtimes/CMakeLists.txt | 12 +- utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 9 + .../llvm-project-overlay/mlir/test/BUILD.bazel | 2 + 526 files changed, 17787 insertions(+), 7076 deletions(-) rename {test => clang-tools-extra/test}/.gitattributes (100%) create mode 100644 clang/test/CXX/temp/temp.decls/temp.fct/temp.func.order/p6.cpp create mode 100644 clang/test/Driver/cxx20-fdirectives-only.cpp delete mode 100644 clang/test/Driver/ps4-analyzer-defaults.cpp create mode 100644 clang/test/Driver/ps4-ps5-analyzer-defaults.cpp create mode 100644 clang/test/OpenMP/debug_threadprivate_copyin.c create mode 100644 flang/runtime/FortranMain/CMakeLists.txt create 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2 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3 updated (30c94a208 -> 431a04894)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3 in repository toolchain/ci/base-artifacts. discards 30c94a208 6: update: llvm-a050033582acb60d5c39da06ed8a87db1874ee6a: 1 new 431a04894 6: update: llvm-35e60f5de180aea55ed478298f4b40f04dcc57d1: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (30c94a208) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. 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2 years, 7 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (a74782936d -> a1755db71e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/qemu. from a74782936d Merge tag 'pull-migration-20220421a' of https://gitlab.com/d [...] adds 9c4888c995 hw/ssi: Add Ibex SPI device model adds 9972479fac riscv: opentitan: Connect opentitan SPI Host adds a46d410c5c target/riscv: Define simpler privileged spec version numbering adds 3a4af26d7a target/riscv: Add the privileged spec version 1.12.0 adds a4b2fa4331 target/riscv: Introduce privilege version field in the CSR ops. adds 3e6a417c8a target/riscv: Add support for mconfigptr adds 29a9ec9bd8 target/riscv: Add *envcfg* CSRs support adds 7100fe6c24 target/riscv: Enable privileged spec version 1.12 adds 8b5c807bc0 target/riscv: cpu: Fixup indentation adds 33fe584f70 target/riscv: Allow software access to MIP SEIP adds 95799e36c1 target/riscv: Add initial support for the Sdtrig extension adds c341e886d9 target/riscv: optimize condition assign for scale < 0 adds f32d82f6c3 target/riscv: optimize helper for vmv<nr>r.v adds 0e2c377023 target/riscv: misa to ISA string conversion fix adds a775398be2 target/riscv: Add isa extenstion strings to the device tree adds f06193c40b target/riscv: fix start byte for vmv<nf>r.v when vstart != 0 adds ac684717c3 target/riscv: Use cpu_loop_exit_restore directly from mmu faults adds 8f013700eb hw/riscv: virt: Exit if the user provided -bios in combinati [...] adds 6248a8fe4d target/riscv/pmp: fix NAPOT range computation overflow adds d6db2c0fab hw/riscv: virt: fix DT property mmu-type when CPU mmu option [...] adds 231a90c085 hw/intc: Add .impl.[min|max]_access_size declaration in RISC [...] adds d42df0ea5d hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RI [...] adds e2f01f3c2e hw/intc: Make RISC-V ACLINT mtime MMIO register writable adds 8124f819d0 hw/intc: riscv_aclint: Add reset function of ACLINT devices adds b5f6379d13 target/riscv: debug: Implement debug related TCGCPUOps adds 1acdb3b013 target/riscv: cpu: Add a config option for native debug adds b6092544fc target/riscv: csr: Hook debug CSR read/write adds 38b4e781a4 target/riscv: machine: Add debug state description adds c9711bd778 target/riscv: cpu: Enable native debug feature adds 013577de8f hw/core: tcg-cpu-ops.h: Update comments of debug_check_watchpoint() adds faee5441a0 hw/riscv: boot: Support 64bit fdt address. adds 10cd282ee4 Merge tag 'pull-riscv-to-apply-20220422-1' of github.com:ali [...] adds 86a518bba4 dump: Use ERRP_GUARD() adds 046bc4160b dump: Remove the sh_info variable adds 862a395858 dump: Introduce shdr_num to decrease complexity adds 344107e07b dump: Remove the section if when calculating the memory offset adds e71d353360 dump: Add more offset variables adds 05bbaa5040 dump: Introduce dump_is_64bit() helper function adds bc7d558017 dump: Consolidate phdr note writes adds 5ff2e5a3e1 dump: Cleanup dump_begin write functions adds c68124738b dump: Consolidate elf note function adds a64b4e179a include/qemu: rename Windows context definitions to expose bitness adds fb21efe99a dump/win_dump: add helper macros for Windows dump header access adds c4fe30921f include/qemu: add 32-bit Windows dump structures adds f5daa8293b dump/win_dump: add 32-bit guest Windows support adds f7f40b8198 Merge tag 'dump-pull-request' of gitlab.com:marcandre.lureau [...] adds 2a19903697 hw/intc/arm_gicv3_its: Add missing blank line adds 89ac9d0cba hw/intc/arm_gicv3: Sanity-check num-cpu property adds 671927a116 hw/intc/arm_gicv3: Insist that redist region capacity matche [...] adds 50a3a309e1 hw/intc/arm_gicv3: Report correct PIDR0 values for ID registers adds 9acd2d3373 target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2 adds c3c9a09073 hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?" adds 50d84584d3 hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4 adds 9de53de60c hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI adds 0cdf7a5dc8 hw/intc/arm_gicv3_its: Implement VMAPP adds 93f4fdcd4d hw/intc/arm_gicv3_its: Distinguish success and error cases o [...] adds f0175135e7 hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid" adds c411db7bf7 hw/intc/arm_gicv3_its: Factor out CTE lookup sequence adds 2d692e2b31 hw/intc/arm_gicv3_its: Split out process_its_cmd() physical [...] adds 469cf23bf8 hw/intc/arm_gicv3_its: Handle virtual interrupts in process_ [...] adds 7c087bd330 hw/intc/arm_gicv3: Keep pointers to every connected ITS adds 3851af4585 hw/intc/arm_gicv3_its: Implement VMOVP adds f76ba95a03 hw/intc/arm_gicv3_its: Implement VSYNC adds a686e85d2b hw/intc/arm_gicv3_its: Implement INV command properly adds d4014320a4 hw/intc/arm_gicv3_its: Implement INV for virtual interrupts adds 3c64a42c0b hw/intc/arm_gicv3_its: Implement VMOVI adds c6dd2f9950 hw/intc/arm_gicv3_its: Implement VINVALL adds ae3b3ba15c hw/intc/arm_gicv3: Implement GICv4's new redistributor frame adds 641be69745 hw/intc/arm_gicv3: Implement new GICv4 redistributor registers adds 10337638bb hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3 [...] adds c3f21b065a hw/intc/arm_gicv3_cpuif: Support vLPIs adds 189d1d9d57 hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq u [...] adds e97be73c97 hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one [...] adds 99ba56d25b hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all [...] adds 6631480c9a hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writes adds b76eb5f4db hw/intc/arm_gicv3_redist: Factor out "update bit in pending [...] adds d7d39749e6 hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi() adds 932f0480d0 hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending() adds ab6ef25179 hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov [...] adds c6f797d519 hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi() adds e031346d98 hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall() adds 1b19ccfa38 hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi() adds e2d5e189aa hw/intc/arm_gicv3: Update ID and feature registers for GICv4 adds 445d5825da hw/intc/arm_gicv3: Allow 'revision' property to be set to 4 adds 5a389a9aec hw/arm/virt: Use VIRT_GIC_VERSION_* enum values in create_gic() adds f31985a77a hw/arm/virt: Abstract out calculation of redistributor regio [...] adds 7cf3f8d243 hw/arm/virt: Support TCG GICv4 adds c42fb26b13 target/arm: Update ISAR fields for ARMv8.8 adds f527d66183 target/arm: Update SCR_EL3 bits to ARMv8.8 adds ad1e60184c target/arm: Update SCTLR bits to ARMv9.2 adds a3bc906f8e target/arm: Change DisasContext.aarch64 to bool adds 5322155240 target/arm: Change CPUArchState.aarch64 to bool adds 4f4c2a4ba2 target/arm: Extend store_cpu_offset to take field size adds 2ab370873f target/arm: Change DisasContext.thumb to bool adds 063bbd8061 target/arm: Change CPUArchState.thumb to bool adds a4c88675d6 target/arm: Remove fpexc32_access adds 667a4e6235 target/arm: Split out set_btype_raw adds e01aa38d48 target/arm: Split out gen_rebuild_hflags adds fe12080c5f target/arm: Simplify GEN_SHIFT in translate.c adds 099d1c2088 target/arm: Simplify gen_sar adds c89a9d139b target/arm: Simplify aa32 DISAS_WFI adds 01d90db599 target/arm: Use tcg_constant in translate-m-nocp.c adds d9b47e97e7 target/arm: Use tcg_constant in translate-neon.c adds aa5b0b29b1 target/arm: Use smin/smax for do_sat_addsub_32 adds 230c90ceb4 target/arm: Use tcg_constant in translate-vfp.c adds 2c2c65c01e target/arm: Use tcg_constant_i32 in translate.h adds c3ca7d56c4 hw/arm/smmuv3: Pass the actual perm to returned IOMMUTLBEntr [...] adds 754f756cc4 Merge tag 'pull-target-arm-20220422-1' of https://git.linaro [...] adds 747421e949 Implements Backend Program conventions for vhost-user-scsi adds 096b778f14 contrib/vhost-user-blk: add missing GOptionEntry NULL terminator adds d45c83328f virtiofsd: Add docs/helper for killpriv_v2/no_killpriv_v2 option adds c49abc8406 Merge tag 'block-pull-request' of https://gitlab.com/stefanh [...] adds 80dd5aff1b block: add 'force' parameter to 'blockdev-change-medium' command adds 093a13acbf iotests: replace calls to log(qemu_io(...)) with qemu_io_log() adds a190524967 iotests/163: Fix broken qemu-io invocation adds e9039c0451 iotests: Don't check qemu_io() output for specific error strings adds aaa0c0ef82 iotests/040: Don't check image pattern on zero-length image adds 4897629173 iotests/040: Fix TestCommitWithFilters test adds b2d68a8e56 iotests: create generic qemu_tool() function adds 6dede6a493 iotests: rebase qemu_io() on top of qemu_tool() adds 7acb2ddfec iotests/migration-permissions: use assertRaises() for qemu_i [...] adds db1646a639 iotests/image-fleecing: switch to qemu_io() adds 23d44dcb7c iotests: remove qemu_io_pipe_and_status() adds 72cfb937b8 iotests: remove qemu_io_silent() and qemu_io_silent_check(). adds 40bfeae134 iotests: make qemu_io_log() check return codes by default adds 348a0740af iotests/108: Fix when missing user_allow_other adds a1755db71e Merge tag 'pull-block-2022-04-25' of https://gitlab.com/hrei [...] No new revisions were added by this update. Summary of changes: block/qapi-sysemu.c | 3 +- contrib/elf2dmp/main.c | 6 +- contrib/vhost-user-blk/vhost-user-blk.c | 3 +- contrib/vhost-user-scsi/vhost-user-scsi.c | 79 ++- docs/system/arm/virt.rst | 5 +- docs/tools/virtiofsd.rst | 5 + dump/dump.c | 372 +++++----- dump/win_dump.c | 305 +++++--- hmp-commands.hx | 13 +- hw/arm/smmuv3.c | 2 +- hw/arm/virt.c | 102 ++- hw/intc/arm_gicv3_common.c | 54 +- hw/intc/arm_gicv3_cpuif.c | 195 +++++- hw/intc/arm_gicv3_dist.c | 7 +- hw/intc/arm_gicv3_its.c | 776 ++++++++++++++++++--- hw/intc/arm_gicv3_its_kvm.c | 2 + hw/intc/arm_gicv3_kvm.c | 5 + hw/intc/arm_gicv3_redist.c | 480 ++++++++++--- hw/intc/gicv3_internal.h | 213 +++++- hw/intc/riscv_aclint.c | 144 +++- hw/intc/trace-events | 18 +- hw/riscv/boot.c | 12 +- hw/riscv/opentitan.c | 36 +- hw/riscv/virt.c | 24 +- hw/ssi/ibex_spi_host.c | 612 ++++++++++++++++ hw/ssi/meson.build | 1 + hw/ssi/trace-events | 7 + include/hw/arm/virt.h | 19 +- include/hw/core/tcg-cpu-ops.h | 1 + include/hw/intc/arm_gicv3_common.h | 13 + include/hw/intc/arm_gicv3_its_common.h | 19 + include/hw/intc/riscv_aclint.h | 1 + include/hw/riscv/boot.h | 4 +- include/hw/riscv/opentitan.h | 30 +- include/hw/ssi/ibex_spi_host.h | 94 +++ include/qemu/win_dump_defs.h | 115 ++- include/sysemu/dump.h | 9 +- linux-user/arm/cpu_loop.c | 2 +- monitor/hmp-cmds.c | 4 +- qapi/block.json | 6 + target/arm/cpu.c | 16 +- target/arm/cpu.h | 59 +- target/arm/helper-a64.c | 4 +- target/arm/helper.c | 19 +- target/arm/hvf/hvf.c | 2 +- target/arm/m_helper.c | 6 +- target/arm/op_helper.c | 13 - target/arm/translate-a32.h | 13 +- target/arm/translate-a64.c | 50 +- target/arm/translate-m-nocp.c | 12 +- target/arm/translate-neon.c | 21 +- target/arm/translate-sve.c | 9 +- target/arm/translate-vfp.c | 76 +- target/arm/translate.c | 101 +-- target/arm/translate.h | 17 +- target/riscv/cpu.c | 120 +++- target/riscv/cpu.h | 40 +- target/riscv/cpu_bits.h | 40 ++ target/riscv/cpu_helper.c | 10 +- target/riscv/csr.c | 282 +++++++- target/riscv/debug.c | 441 ++++++++++++ target/riscv/debug.h | 114 +++ target/riscv/helper.h | 5 +- target/riscv/insn_trans/trans_rvv.c.inc | 25 +- target/riscv/machine.c | 55 ++ target/riscv/meson.build | 1 + target/riscv/pmp.c | 14 +- target/riscv/vector_helper.c | 31 +- tests/qemu-iotests/030 | 85 ++- tests/qemu-iotests/040 | 53 +- tests/qemu-iotests/056 | 2 +- tests/qemu-iotests/108 | 2 +- tests/qemu-iotests/149 | 6 +- tests/qemu-iotests/163 | 5 +- tests/qemu-iotests/205 | 4 +- tests/qemu-iotests/216 | 12 +- tests/qemu-iotests/218 | 5 +- tests/qemu-iotests/224 | 4 +- tests/qemu-iotests/242 | 6 +- tests/qemu-iotests/245 | 17 +- tests/qemu-iotests/255 | 4 +- tests/qemu-iotests/258 | 11 +- tests/qemu-iotests/298 | 17 +- tests/qemu-iotests/303 | 4 +- tests/qemu-iotests/310 | 22 +- tests/qemu-iotests/iotests.py | 69 +- tests/qemu-iotests/tests/image-fleecing | 30 +- tests/qemu-iotests/tests/migration-permissions | 28 +- tests/qemu-iotests/tests/mirror-ready-cancel-error | 2 +- tests/qemu-iotests/tests/nbd-reconnect-on-open | 2 +- tests/qemu-iotests/tests/stream-error-on-reset | 4 +- tools/virtiofsd/helper.c | 3 + ui/cocoa.m | 1 + 93 files changed, 4587 insertions(+), 1205 deletions(-) create mode 100644 hw/ssi/ibex_spi_host.c create mode 100644 include/hw/ssi/ibex_spi_host.h create mode 100644 target/riscv/debug.c create mode 100644 target/riscv/debug.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (cd9fd3f7e -> e47bce362)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards cd9fd3f7e 0: update: llvm-3f5287125a6f6d3c2c52bb78aaaa3b95f7dee587: boot new e47bce362 0: update: qemu-a1755db71e34df016ffc10aa0727360aae2c6036: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cd9fd3f7e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1548 -> 1604 bytes 02-prepare_abe/console.log.xz | Bin 2748 -> 2776 bytes 03-build_abe-binutils/console.log.xz | Bin 29268 -> 30284 bytes 04-build_llvm/console.log.xz | Bin 61968 -> 63444 bytes 05-build_abe-qemu/console.log.xz | Bin 33292 -> 32744 bytes 06-build_linux/console.log.xz | Bin 5236 -> 5400 bytes 07-boot_linux/console.log.xz | Bin 504 -> 504 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 8 ++++---- 10 files changed, 9 insertions(+), 9 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (65735d21ac4 -> 7d31c678d68)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/gcc. from 65735d21ac4 c++: generic lambda fn parm pack [PR104624] adds 57a957cb71c libgomp: Fix up two non-GOMP_USE_ALIGNED_WORK_SHARES relate [...] adds 22c24ba48a2 testsuite: Improve unlimited_polymorphic_3.f03 [PR103662] adds 5face32b7f4 i386: Fix up ICE with -mveclibabi={acml,svml} [PR105367] adds 1b45ae16fff testsuite: Fix up g++.target/i386/vec-tmpl1.C testcase [PR65211] adds d4836ac9acd reassoc: Don't call fold_convert if !fold_convertible_p [PR105374] adds 7d31c678d68 ifcvt: Improve noce_try_store_flag_mask [PR105314] No new revisions were added by this update. Summary of changes: gcc/config/i386/i386.cc | 6 ++++-- gcc/ifcvt.cc | 6 +++--- gcc/testsuite/g++.target/i386/vec-tmpl1.C | 1 + gcc/testsuite/gcc.target/i386/pr105367.c | 12 ++++++++++++ gcc/testsuite/gcc.target/riscv/pr105314.c | 12 ++++++++++++ gcc/testsuite/gfortran.dg/unlimited_polymorphic_3.f03 | 6 +++--- gcc/testsuite/lib/target-supports.exp | 2 ++ gcc/tree-ssa-reassoc.cc | 6 +++++- libgomp/loop.c | 7 +++++-- libgomp/loop_ull.c | 7 +++++-- libgomp/sections.c | 7 +++++-- libgomp/work.c | 4 +++- 12 files changed, 60 insertions(+), 16 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr105367.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr105314.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (9e77a6f96 -> 5045072f0)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/base-artifacts. discards 9e77a6f96 0: update: binutils-gcc: 1 new 5045072f0 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9e77a6f96) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-arm (50 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1532 -> 1528 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2736 bytes 03-build_abe-binutils/console.log.xz | Bin 52688 -> 51860 bytes 04-build_abe-gcc/console.log.xz | Bin 230672 -> 231628 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3824 -> 3796 bytes 06-build_abe-check_gcc/console.log.xz | Bin 2676 -> 3328 bytes 07-check_regression/console.log.xz | Bin 3244 -> 2784 bytes 07-check_regression/extra-bisect-params | 1 - 07-check_regression/fails.sum | 6 - 07-check_regression/results.compare | 30 +- 07-check_regression/results.compare2 | 108 +- 07-check_regression/results.regressions | 26 - 08-update_baseline/console.log | 433 ++- 08-update_baseline/extra-bisect-params | 1 - 08-update_baseline/fails.sum | 6 - 08-update_baseline/results.compare | 30 +- 08-update_baseline/results.compare2 | 108 +- 08-update_baseline/results.regressions | 26 - jenkins/manifest.sh | 8 +- sumfiles/g++.log.xz | Bin 2785820 -> 2762388 bytes sumfiles/g++.sum | 120 +- sumfiles/gcc.log.xz | Bin 2341404 -> 2329708 bytes sumfiles/gcc.sum | 4476 +++++++++++++++---------------- sumfiles/gfortran.log.xz | Bin 902364 -> 905748 bytes sumfiles/gfortran.sum | 45 +- sumfiles/libatomic.log.xz | Bin 2168 -> 2176 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 199596 -> 199284 bytes sumfiles/libgomp.sum | 22 +- sumfiles/libitm.log.xz | Bin 2552 -> 2532 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 462228 -> 454664 bytes sumfiles/libstdc++.sum | 10 +- 33 files changed, 2605 insertions(+), 2861 deletions(-) delete mode 100644 07-check_regression/extra-bisect-params delete mode 100644 07-check_regression/fails.sum delete mode 100644 07-check_regression/results.regressions delete mode 100644 08-update_baseline/extra-bisect-params delete mode 100644 08-update_baseline/fails.sum delete mode 100644 08-update_baseline/results.regressions -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allmodconfig updated (851cb882e -> 6819c0128)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards 851cb882e 0: update: binutils-gcc-linux-qemu: boot new 6819c0128 0: update: linux-89bfa55543a2e42ada0497ed63130d9795a1ed09: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (851cb882e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1560 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2796 -> 2772 bytes 03-build_abe-binutils/console.log.xz | Bin 30252 -> 29108 bytes 04-build_abe-stage1/console.log.xz | Bin 68000 -> 69084 bytes 05-build_abe-qemu/console.log.xz | Bin 32592 -> 33412 bytes 06-build_linux/console.log.xz | Bin 3908 -> 3376 bytes 07-boot_linux/console.log.xz | Bin 508 -> 508 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 11 ++++------- 10 files changed, 9 insertions(+), 12 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 7 months

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