Tcwg-commits February 2022

tcwg-commits@lists.linaro.org

5 participants
9652 discussions

[gcc] branch master updated (db5f1c17031 -> 676e987b850)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from db5f1c17031 c++: lambda in pack expansion using pack in constraint [PR103706] new 7ff201d85fa c++: satisfaction value of type const bool [PR104410] new 676e987b850 c++: deducing only from noexcept-spec [PR80951] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/cp/constraint.cc | 3 ++- gcc/cp/pt.cc | 5 +++++ gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C | 13 +++++++++++++ gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C | 6 ++++++ 4 files changed, 26 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (30a954525f -> 481153777e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/gdb. from 30a954525f i386: Allow GOT32 relocations against ABS symbols adds bafae5524e gdb: remove tailing newlines from index_cache_debug calls adds cb5a1d7db9 Re: elf: Check symbol version without any symbols adds 481153777e PR28862, heap-buffer-overflow in parse_stab_string No new revisions were added by this update. Summary of changes: binutils/stabs.c | 8 ++++---- gdb/dwarf2/index-cache.c | 20 ++++++++++---------- ld/testsuite/ld-elf/pr24718-1.d | 4 ++-- 3 files changed, 16 insertions(+), 16 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (0103c2e4082 -> decde11183b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/gcc. from 0103c2e4082 Don't propagate for a more expensive reg-reg move. adds a3621580973 MAINTAINERS: Remove Hartmut Penner as s390 maintainer adds 0af7ef050ae libgomp: Fix segfault with posthumous orphan tasks [PR104385] adds 04b54cc486c [nvptx] Fix .local atomic regressions adds f05cc4fd6f0 [testsuite] Require c99_runtime to run builtin-sprintf.c adds 73f4a989b7f [nvptx] Fix 'main (int argc)' compilation adds 3faeba72cf9 RISC-V: Add target machine headers as a dependency for riscv-sr.o adds 5e92fddad77 doc: RISC-V: Document the `-misa-spec=' option adds 6de582dd62d RISC-V/testsuite: Run target testing over all the usual opt [...] new decde11183b [nvptx] Choose -mptx default based on -misa The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: MAINTAINERS | 1 - gcc/config/nvptx/nvptx-opts.h | 2 + gcc/config/nvptx/nvptx-protos.h | 1 + gcc/config/nvptx/nvptx.cc | 167 ++++++++++++++++++--- gcc/config/nvptx/nvptx.md | 67 +++++---- gcc/config/nvptx/nvptx.opt | 2 +- gcc/config/riscv/t-riscv | 2 +- gcc/doc/install.texi | 14 ++ gcc/doc/invoke.texi | 17 +++ gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf.c | 3 +- gcc/testsuite/gcc.target/nvptx/softstack-2.c | 11 ++ gcc/testsuite/gcc.target/nvptx/uniform-simt-1.c | 18 +++ gcc/testsuite/gcc.target/riscv/arch-1.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-10.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-11.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-12.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-2.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-3.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-4.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-5.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-6.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-7.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-8.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-1.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-10.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-11.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-12.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-13.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-14.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-15.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-16.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-17.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-2.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-3.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-4.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-5.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-7.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-8.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-9.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-1.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-2.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-3.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-4.c | 3 +- .../gcc.target/riscv/interrupt-conflict-mode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-debug.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-mmode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-smode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-umode.c | 2 +- gcc/testsuite/gcc.target/riscv/li.c | 2 +- gcc/testsuite/gcc.target/riscv/load-immediate.c | 3 +- gcc/testsuite/gcc.target/riscv/losum-overflow.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-6.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-7.c | 2 +- gcc/testsuite/gcc.target/riscv/pr102957.c | 2 +- gcc/testsuite/gcc.target/riscv/pr103302.c | 3 +- gcc/testsuite/gcc.target/riscv/pr104140.c | 2 +- gcc/testsuite/gcc.target/riscv/pr84660.c | 2 +- gcc/testsuite/gcc.target/riscv/pr93202.c | 1 + gcc/testsuite/gcc.target/riscv/pr93304.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95252.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95683.c | 2 +- gcc/testsuite/gcc.target/riscv/pr98777.c | 3 +- gcc/testsuite/gcc.target/riscv/pr99702.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-1.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-10.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-11.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-12.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-13.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-14.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-15.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-16.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-2.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-3.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-4.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-5.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-6.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-7.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-8.c | 2 +- .../gcc.target/riscv/promote-type-for-libcall.c | 3 +- gcc/testsuite/gcc.target/riscv/riscv.exp | 4 +- gcc/testsuite/gcc.target/riscv/save-restore-1.c | 2 +- gcc/testsuite/gcc.target/riscv/save-restore-2.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-3.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-4.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-6.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-7.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-8.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-9.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c | 3 +- gcc/testsuite/gcc.target/riscv/switch-qi.c | 2 +- gcc/testsuite/gcc.target/riscv/switch-si.c | 2 +- gcc/testsuite/gcc.target/riscv/weak-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zba-adduw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-slliuw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-zextw.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-01.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c | 2 +- gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zbbw.c | 2 +- gcc/testsuite/gcc.target/riscv/zbs-bclr.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bext.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-binv.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bset.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-2.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-3.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-4.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-5.c | 2 +- libgomp/task.c | 2 + libgomp/testsuite/libgomp.c/pr104385.c | 26 ++++ 132 files changed, 445 insertions(+), 173 deletions(-) create mode 100644 gcc/testsuite/gcc.target/nvptx/softstack-2.c create mode 100644 gcc/testsuite/gcc.target/nvptx/uniform-simt-1.c create mode 100644 libgomp/testsuite/libgomp.c/pr104385.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (30a954525f -> 481153777e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/binutils-gdb. from 30a954525f i386: Allow GOT32 relocations against ABS symbols adds bafae5524e gdb: remove tailing newlines from index_cache_debug calls adds cb5a1d7db9 Re: elf: Check symbol version without any symbols adds 481153777e PR28862, heap-buffer-overflow in parse_stab_string No new revisions were added by this update. Summary of changes: binutils/stabs.c | 8 ++++---- gdb/dwarf2/index-cache.c | 20 ++++++++++---------- ld/testsuite/ld-elf/pr24718-1.d | 4 ++-- 3 files changed, 16 insertions(+), 16 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (821eb2b11 -> da3745198)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/base-artifacts. discards 821eb2b11 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 new da3745198 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (821eb2b11) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_build/master-a [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1552 -> 1540 bytes 02-prepare_abe/console.log.xz | Bin 2772 -> 2768 bytes 04-build_abe-binutils/console.log.xz | Bin 30104 -> 30184 bytes 05-build_abe-stage1/console.log.xz | Bin 89904 -> 90696 bytes 07-build_abe-linux/console.log.xz | Bin 9000 -> 9004 bytes 08-build_abe-glibc/console.log.xz | Bin 231788 -> 231184 bytes 09-build_abe-stage2/console.log.xz | Bin 221416 -> 222044 bytes 10-build_abe-gdb/console.log.xz | Bin 37188 -> 37116 bytes 11-build_abe-qemu/console.log.xz | Bin 30740 -> 30712 bytes 12-check_regression/console.log.xz | Bin 416 -> 416 bytes 13-update_baseline/console.log | 2 +- jenkins/manifest.sh | 18 +++++++++--------- 12 files changed, 10 insertions(+), 10 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto updated (202be9f69a5 -> a2cad467f72)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto in repository toolchain/ci/gcc. from 202be9f69a5 Daily bump. adds 7d636a3353a Daily bump. adds a2cad467f72 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto updated (5f62caec81 -> 7c4b20b958)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto in repository toolchain/ci/binutils-gdb. from 5f62caec81 Automatic date update in version.in adds 7c4b20b958 i386: Allow GOT32 relocations against ABS symbols No new revisions were added by this update. Summary of changes: bfd/elfxx-x86.c | 10 ++++++---- ld/testsuite/ld-i386/i386.exp | 1 + ld/testsuite/ld-i386/pr28870.d | 10 ++++++++++ ld/testsuite/ld-i386/pr28870.s | 6 ++++++ 4 files changed, 23 insertions(+), 4 deletions(-) create mode 100644 ld/testsuite/ld-i386/pr28870.d create mode 100644 ld/testsuite/ld-i386/pr28870.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto updated (02594fedf -> 9357fab1d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto in repository toolchain/ci/base-artifacts. discards 02594fedf 0: update: binutils-gcc: 1 new 9357fab1d 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (02594fedf) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check_bootstrap/rele [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1552 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2736 -> 2752 bytes 03-build_abe-binutils/console.log.xz | Bin 61260 -> 61668 bytes 04-build_abe-bootstrap_lto/console.log.xz | Bin 458760 -> 458532 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3796 -> 3792 bytes 06-build_abe-check_bootstrap_lto/console.log.xz | Bin 2320 -> 2324 bytes 07-check_regression/console.log.xz | Bin 2504 -> 2376 bytes 07-check_regression/results.compare | 16 +- 07-check_regression/results.compare2 | 22 +- 08-update_baseline/console.log | 375 ++- 08-update_baseline/results.compare | 16 +- 08-update_baseline/results.compare2 | 22 +- jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 2671744 -> 2659948 bytes sumfiles/g++.sum | 104 +- sumfiles/gcc.log.xz | Bin 2278020 -> 2315624 bytes sumfiles/gcc.sum | 3342 +++++++++++------------ sumfiles/gfortran.log.xz | Bin 844712 -> 854380 bytes sumfiles/gfortran.sum | 40 +- sumfiles/libatomic.log.xz | Bin 2288 -> 2296 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 144584 -> 143980 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2704 -> 2708 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 462064 -> 461672 bytes sumfiles/libstdc++.sum | 10 +- 27 files changed, 1974 insertions(+), 2011 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-master-arm-spec2k6-O3_LTO updated (0e0199a9e0 -> 1b0c60f95b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-master-arm-spec2k6-O3_LTO in repository toolchain/ci/glibc. from 0e0199a9e0 x86-64: Fix strcmp-evex.S adds 90cbb80636 Benchtests: move 'alloc_bufs' from loop in bench-memset.c adds 1283948f23 x86: Improve L to support L(XXX_SYMBOL (YYY, ZZZ)) adds a007ec4669 string: Sort headers, routines, tests and tests-translation adds c328d0152d x86_64/multiarch: Sort sysdep_routines and put one entry per line adds fa7ad1df19 elf: Replace tst-audit24bmod2.so with tst-audit24bmod2 adds 7e05d94ea1 x86-64: Add vector atan/atanf to libmvec microbenchmark adds e96f25427c x86-64: Add vector asin/asinf to libmvec microbenchmark adds b0a1107042 x86-64: Add vector hypot/hypotf to libmvec microbenchmark adds b0e4360778 x86-64: Add vector exp2/exp2f to libmvec microbenchmark adds abebb26108 x86-64: Add vector exp10/exp10f to libmvec microbenchmark adds 54cf4f31fe x86-64: Add vector cosh/coshf to libmvec microbenchmark adds 049555aad4 x86-64: Add vector expm1/expm1f to libmvec microbenchmark adds 6acc09c589 x86-64: Add vector sinh/sinhf to libmvec microbenchmark adds fec48238b2 x86-64: Add vector cbrt/cbrtf to libmvec microbenchmark adds 16aec30154 x86-64: Add vector atan2/atan2f to libmvec microbenchmark adds e43b757e06 x86-64: Add vector log10/log10f to libmvec microbenchmark adds b6b2be5c2f x86-64: Add vector log2/log2f to libmvec microbenchmark adds 171817d8c0 x86-64: Add vector log1p/log1pf to libmvec microbenchmark adds 0050c9a45d x86-64: Add vector atanh/atanhf to libmvec microbenchmark adds 157bdb5f89 x86-64: Add vector acosh/acoshf to libmvec microbenchmark adds 475ed201c2 x86-64: Add vector erf/erff to libmvec microbenchmark adds b263a0155e x86-64: Add vector tanh/tanhf to libmvec microbenchmark adds bef2d0ec25 x86-64: Add vector asinh/asinhf to libmvec microbenchmark adds d0086fe45c x86-64: Add vector erfc/erfcf to libmvec microbenchmark adds d7fca835e0 x86-64: Add vector tan/tanf to libmvec microbenchmark adds b62ace2740 x86: Improve vec generation in memset-vec-unaligned-erms.S adds 69e6992d79 Benchtests: Add length zero benchmark for memset in bench-memset.c adds 03c9c4fce4 benchtests: Sort benches in Makefile adds 1b0c60f95b x86: Remove SSSE3 instruction for broadcast in memset.S (SSE2 Only) No new revisions were added by this update. Summary of changes: benchtests/Makefile | 129 +- benchtests/bench-memset.c | 6 +- elf/Makefile | 2 +- string/Makefile | 210 +- sysdeps/x86/sysdep.h | 3 +- sysdeps/x86_64/fpu/Makeconfig | 20 + sysdeps/x86_64/fpu/libmvec-acosh-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-acoshf-inputs | 4100 ++++++++++++++++++++ .../{libmvec-acos-inputs => libmvec-asin-inputs} | 0 .../{libmvec-acosf-inputs => libmvec-asinf-inputs} | 0 sysdeps/x86_64/fpu/libmvec-asinh-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-asinhf-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-atan-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-atan2-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-atan2f-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-atanf-inputs | 4100 ++++++++++++++++++++ .../{libmvec-acos-inputs => libmvec-atanh-inputs} | 0 ...{libmvec-acosf-inputs => libmvec-atanhf-inputs} | 0 sysdeps/x86_64/fpu/libmvec-cbrt-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-cbrtf-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-cosh-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-coshf-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-erf-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-erfc-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-erfcf-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-erff-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-exp10-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-exp10f-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-exp2-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-exp2f-inputs | 4100 ++++++++++++++++++++ .../{libmvec-exp-inputs => libmvec-expm1-inputs} | 0 .../{libmvec-expf-inputs => libmvec-expm1f-inputs} | 0 sysdeps/x86_64/fpu/libmvec-hypot-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-hypotf-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log10-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log10f-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log1p-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log1pf-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log2-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log2f-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sinh-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sinhf-inputs | 4100 ++++++++++++++++++++ .../fpu/{libmvec-cos-inputs => libmvec-tan-inputs} | 0 .../{libmvec-cosf-inputs => libmvec-tanf-inputs} | 0 sysdeps/x86_64/fpu/libmvec-tanh-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-tanhf-inputs | 4100 ++++++++++++++++++++ sysdeps/x86_64/memset.S | 14 +- sysdeps/x86_64/multiarch/Makefile | 290 +- .../x86_64/multiarch/memset-avx2-unaligned-erms.S | 18 +- .../multiarch/memset-avx512-unaligned-erms.S | 18 +- .../x86_64/multiarch/memset-evex-unaligned-erms.S | 18 +- .../x86_64/multiarch/memset-vec-unaligned-erms.S | 164 +- 52 files changed, 131827 insertions(+), 265 deletions(-) create mode 100644 sysdeps/x86_64/fpu/libmvec-acosh-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-acoshf-inputs copy sysdeps/x86_64/fpu/{libmvec-acos-inputs => libmvec-asin-inputs} (100%) copy sysdeps/x86_64/fpu/{libmvec-acosf-inputs => libmvec-asinf-inputs} (100%) create mode 100644 sysdeps/x86_64/fpu/libmvec-asinh-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-asinhf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-atan-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-atan2-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-atan2f-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-atanf-inputs copy sysdeps/x86_64/fpu/{libmvec-acos-inputs => libmvec-atanh-inputs} (100%) copy sysdeps/x86_64/fpu/{libmvec-acosf-inputs => libmvec-atanhf-inputs} (100%) create mode 100644 sysdeps/x86_64/fpu/libmvec-cbrt-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-cbrtf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-cosh-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-coshf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-erf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-erfc-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-erfcf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-erff-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-exp10-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-exp10f-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-exp2-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-exp2f-inputs copy sysdeps/x86_64/fpu/{libmvec-exp-inputs => libmvec-expm1-inputs} (100%) copy sysdeps/x86_64/fpu/{libmvec-expf-inputs => libmvec-expm1f-inputs} (100%) create mode 100644 sysdeps/x86_64/fpu/libmvec-hypot-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-hypotf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log10-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log10f-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log1p-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log1pf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log2-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log2f-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sinh-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sinhf-inputs copy sysdeps/x86_64/fpu/{libmvec-cos-inputs => libmvec-tan-inputs} (100%) copy sysdeps/x86_64/fpu/{libmvec-cosf-inputs => libmvec-tanf-inputs} (100%) create mode 100644 sysdeps/x86_64/fpu/libmvec-tanh-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-tanhf-inputs -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-master-arm-spec2k6-O3_LTO updated (7878125accab -> b5079116db40)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-master-arm-spec2k6-O3_LTO in repository toolchain/ci/linux. from 7878125accab Merge v5.16.5 adds 6d6f1f0dac3e PCI: pciehp: Fix infinite loop in IRQ handler upon power fault adds 1223edb9e97e selftests: mptcp: fix ipv6 routing setup adds 74a0e0119120 net: ipa: use a bitmap for endpoint replenish_enabled adds 62600b0fbc6e net: ipa: prevent concurrent replenish adds 3a63b718200b drm/vc4: hdmi: Make sure the device is powered with CEC adds 9c9dbb954e61 cgroup-v1: Require capabilities to set release_agent adds b78021539762 Revert "mm/gup: small refactoring: simplify try_grab_page()" adds 2c6be97ad899 net: phy: Fix qca8081 with speeds lower than 2.5Gb/s adds 20842a8d93e3 ovl: don't fail copy up if no fileattr support on upper adds 75fe271b2f41 lockd: fix server crash on reboot of client holding lock adds 41332593b549 lockd: fix failure to cleanup client locks adds 95dde75d5207 net/mlx5e: IPsec: Fix crypto offload for non TCP/UDP encap [...] adds 15184af88d8a net/mlx5e: IPsec: Fix tunnel mode crypto offload for non T [...] adds 5ddd37044b9e net/mlx5e: TC, Reject rules with drop and modify hdr action adds b651c3642c77 net/mlx5: Bridge, take rtnl lock in init error handler adds ee719d38eca3 net/mlx5: Bridge, ensure dev_name is null-terminated adds 4fad499d7fec net/mlx5e: Fix handling of wrong devices during bond netevent adds 2a038dd1d942 net/mlx5: Use del_timer_sync in fw reset flow of halting poll adds 59879f296a84 net/mlx5e: Fix module EEPROM query adds c5a4a32fbe4b net/mlx5e: TC, Reject rules with forward and drop actions adds d7080574a77d net/mlx5: Fix offloading with ESWITCH_IPV4_TTL_MODIFY_ENABLE adds c65d61fc54b2 net/mlx5e: Don't treat small ceil values as unlimited in H [...] adds aff510fd8265 net/mlx5: Bridge, Fix devlink deadlock on net namespace deletion adds 8fbdf8c8b8ab net/mlx5e: Avoid field-overflowing memcpy() adds 66c6dbfc8493 net/mlx5e: Fix wrong calculation of header index in HW_GRO adds a4161e486113 net/mlx5e: Fix broken SKB allocation in HW-GRO adds 28929e393da4 net/mlx5: E-Switch, Fix uninitialized variable modact adds e23a2f4e43a4 net/mlx5e: Avoid implicit modify hdr for decap drop rule adds 7bf02718b736 ipheth: fix EOVERFLOW in ipheth_rcvbulk_callback adds c448999f0e86 i40e: Fix reset bw limit when DCB enabled with 1 TC adds 2754d83160c9 i40e: Fix reset path while removing the driver adds dc2c6fdbfc1a net: amd-xgbe: ensure to reset the tx_timer_active flag adds e8f73f620fee net: amd-xgbe: Fix skb data length underflow adds dea4fec0d87d fanotify: Fix stale file descriptor in copy_event_to_user() adds 95e34f61b58a net: sched: fix use-after-free in tc_new_tfilter() adds 36a9a0aee881 rtnetlink: make sure to refresh master_dev/m_ops in __rtnl [...] adds 577f932216d0 net: ipa: request IPA register values be retained adds ed1707d0a64d bpf: Fix possible race in inc_misses_counter adds f0c1ed004ea8 cpuset: Fix the bug that subpart_cpus updated wrongly in u [...] adds 0d208ee32f5b e1000e: Handshake with CSME starts from ADL platforms adds c074e2c8d67a af_packet: fix data-race in packet_setsockopt / packet_setsockopt adds 0c6e3cd1d5ed tcp: fix mem under-charging with zerocopy sendmsg() adds 5afee7b2b1b2 tcp: add missing tcp_skb_can_collapse() test in tcp_shift_ [...] adds 9c7f8a35c5a8 ovl: fix NULL pointer dereference in copy up warning adds 20e6a329f12d Linux 5.16.6 adds 920d84d2c7dd Revert "drm/vc4: hdmi: Make sure the device is powered with CEC" adds aec5a6ab2648 Revert "drm/vc4: hdmi: Make sure the device is powered wit [...] adds a8d80f1f3cb7 Linux 5.16.7 adds b5079116db40 Merge v5.16.7 No new revisions were added by this update. Summary of changes: Makefile | 2 +- drivers/gpu/drm/vc4/vc4_hdmi.c | 10 +---- drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 14 +++++- drivers/net/ethernet/intel/e1000e/netdev.c | 6 ++- drivers/net/ethernet/intel/i40e/i40e.h | 1 + drivers/net/ethernet/intel/i40e/i40e_main.c | 31 ++++++++++++- drivers/net/ethernet/mellanox/mlx5/core/en.h | 6 +-- drivers/net/ethernet/mellanox/mlx5/core/en/qos.c | 3 +- .../net/ethernet/mellanox/mlx5/core/en/rep/bond.c | 32 ++++++------- .../ethernet/mellanox/mlx5/core/en/rep/bridge.c | 6 ++- drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h | 5 +++ drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c | 4 +- .../mellanox/mlx5/core/en_accel/ipsec_rxtx.c | 13 +++++- .../mellanox/mlx5/core/en_accel/ipsec_rxtx.h | 9 ++-- drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 30 ++++++++----- drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 15 ++++++- .../net/ethernet/mellanox/mlx5/core/esw/bridge.c | 4 ++ .../mlx5/core/esw/diag/bridge_tracepoint.h | 2 +- drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c | 2 +- .../ethernet/mellanox/mlx5/core/lib/fs_chains.c | 9 ++-- drivers/net/ethernet/mellanox/mlx5/core/port.c | 9 ++-- drivers/net/ipa/ipa_endpoint.c | 21 +++++++-- drivers/net/ipa/ipa_endpoint.h | 17 ++++++- drivers/net/ipa/ipa_power.c | 52 ++++++++++++++++++++++ drivers/net/ipa/ipa_power.h | 7 +++ drivers/net/ipa/ipa_uc.c | 5 +++ drivers/net/phy/at803x.c | 26 +++++------ drivers/net/usb/ipheth.c | 6 +-- drivers/pci/hotplug/pciehp_hpc.c | 7 +-- fs/lockd/svcsubs.c | 18 ++++---- fs/notify/fanotify/fanotify_user.c | 6 +-- fs/overlayfs/copy_up.c | 16 +++++-- kernel/bpf/trampoline.c | 5 ++- kernel/cgroup/cgroup-v1.c | 14 ++++++ kernel/cgroup/cpuset.c | 3 +- mm/gup.c | 35 ++++++++++++--- net/core/rtnetlink.c | 6 ++- net/ipv4/tcp.c | 7 ++- net/ipv4/tcp_input.c | 2 + net/packet/af_packet.c | 8 +++- net/sched/cls_api.c | 11 +++-- tools/testing/selftests/net/mptcp/mptcp_join.sh | 5 ++- 42 files changed, 363 insertions(+), 127 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

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Tcwg-commits February 2022