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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm
in repository toolchain/ci/binutils-gdb.
from 7bf5587873 gdbsupport/gdb_regex.cc: replace defs.h include with common-defs.h
adds ec7194506d drop old unused stamp-h.in file
adds b13d7831eb gdb/doc: fill in two missing @r
No new revisions were added by this update.
Summary of changes:
bfd/stamp-h.in | 1 -
binutils/stamp-h.in | 1 -
gas/stamp-h.in | 1 -
gdb/doc/python.texi | 4 ++--
gprof/stamp-h.in | 1 -
ld/stamp-h.in | 1 -
opcodes/stamp-h.in | 1 -
7 files changed, 2 insertions(+), 8 deletions(-)
delete mode 100644 bfd/stamp-h.in
delete mode 100644 binutils/stamp-h.in
delete mode 100644 gas/stamp-h.in
delete mode 100644 gprof/stamp-h.in
delete mode 100644 ld/stamp-h.in
delete mode 100644 opcodes/stamp-h.in
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm
in repository toolchain/ci/base-artifacts.
discards e5e874661 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7
new 6a47e4558 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1552 -> 1532 bytes
02-prepare_abe/console.log.xz | Bin 2764 -> 2772 bytes
04-build_abe-binutils/console.log.xz | Bin 30808 -> 30380 bytes
05-build_abe-stage1/console.log.xz | Bin 90956 -> 90080 bytes
07-build_abe-linux/console.log.xz | Bin 9372 -> 9420 bytes
08-build_abe-glibc/console.log.xz | Bin 233404 -> 231768 bytes
09-build_abe-stage2/console.log.xz | Bin 232508 -> 228460 bytes
10-build_abe-gdb/console.log.xz | Bin 37868 -> 37116 bytes
11-build_abe-qemu/console.log.xz | Bin 30984 -> 30460 bytes
12-check_regression/console.log.xz | Bin 416 -> 416 bytes
13-update_baseline/console.log | 6 +++---
jenkins/manifest.sh | 26 +++++++++++++-------------
12 files changed, 16 insertions(+), 16 deletions(-)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig
in repository toolchain/ci/base-artifacts.
discards 1049dd742 2: update: linux-c94951012a748a0f8ed77cd8fc25640c6fe198f9: 22262
new aefc172b0 2: update: binutils-ec7194506d9cc9af2a57530f146fa175a8836399: 22262
This update added new revisions after undoing existing revisions.
That is to say, some revisions that were in the old version of the
branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
* -- * -- B -- O -- O -- O (1049dd742)
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N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...]
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1544 -> 1704 bytes
02-prepare_abe/console.log.xz | Bin 2760 -> 2764 bytes
03-build_abe-binutils/console.log.xz | Bin 29476 -> 30076 bytes
04-build_llvm/console.log.xz | Bin 60904 -> 59444 bytes
05-build_abe-qemu/console.log.xz | Bin 31484 -> 31744 bytes
06-build_linux/console.log.xz | Bin 4260 -> 6140 bytes
08-check_regression/console.log.xz | Bin 480 -> 480 bytes
09-update_baseline/console.log | 138 +++++++++++++++++------------------
jenkins/manifest.sh | 8 +-
9 files changed, 73 insertions(+), 73 deletions(-)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64
in repository toolchain/ci/qemu.
from 2c89b5af5e Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...]
new 28ca4689ae hw: timer: ibex_timer: Fixup reading w/o register
new 0df470c388 riscv: opentitan: fixup plic stride len
new dda94e5c66 hw: timer: ibex_timer: update/add reg address
new b91a0fa70c update-linux-headers: Add asm-riscv/kvm.h
new 91654e613b target/riscv: Add target/riscv/kvm.c to place the public kvm [...]
new 0a312b85cb target/riscv: Implement function kvm_arch_init_vcpu
new 937f0b4512 target/riscv: Implement kvm_arch_get_registers
new 9997cc1e19 target/riscv: Implement kvm_arch_put_registers
new ad40be2708 target/riscv: Support start kernel directly by KVM
new 2b650fbbcc target/riscv: Support setting external interrupt by KVM
new 4eb471258b target/riscv: Handle KVM_EXIT_RISCV_SBI exit
new 10f1ca27e0 target/riscv: Add host cpu type
new 27abe66f31 target/riscv: Add kvm_riscv_get/put_regs_timer
new 9ad3e016ae target/riscv: Implement virtual time adjusting with vm state [...]
new 1eb9a5da31 target/riscv: Support virtual time context synchronization
new fbf43c7dbf target/riscv: enable riscv kvm accel
new cfeeeb482a softmmu/device_tree: Silence compiler warning with --enable- [...]
new 22599b795c softmmu/device_tree: Remove redundant pointer assignment
new b4a99d4027 target/riscv: rvv-1.0: Add Zve64f extension into RISC-V
new c7a26fb2f6 target/riscv: rvv-1.0: Add Zve64f support for configuration insns
new 494104093f target/riscv: rvv-1.0: Add Zve64f support for load and store insns
new aaae69942f target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns
new 13dbc826fd target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and v [...]
new 40d78c85f6 target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns
new 193fb5c9bd target/riscv: rvv-1.0: Add Zve64f support for single-width f [...]
new 235d1161d4 target/riscv: rvv-1.0: Add Zve64f support for widening type- [...]
new 68fa38970e target/riscv: rvv-1.0: Add Zve64f support for narrowing type [...]
new bfefe406b7 target/riscv: rvv-1.0: Allow Zve64f extension to be turned on
new 32e579b8c5 target/riscv: rvv-1.0: Add Zve32f extension into RISC-V
new da61f1256f target/riscv: rvv-1.0: Add Zve32f support for configuration insns
new abe2d74032 target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns
new 8527b5db72 target/riscv: rvv-1.0: Add Zve32f support for single-width f [...]
new f4dcf51cdc target/riscv: rvv-1.0: Add Zve32f support for widening type- [...]
new 6db02328a7 target/riscv: rvv-1.0: Add Zve32f support for narrowing type [...]
new 2fc1b44dd0 target/riscv: rvv-1.0: Allow Zve32f extension to be turned on
new 8d8897accb hw/riscv: spike: Allow using binary firmware as bios
new 092dc6df92 hw/riscv: Remove macros for ELF BIOS image names
new 4211fc5532 roms/opensbi: Remove ELF images
new 79f26b3b95 target/riscv: Adjust pmpcfg access with mxl
new b655dc7cd9 target/riscv: Don't save pc when exception return
new a14db52f7f target/riscv: Sign extend link reg for jal and jalr
new 40f0c2046c target/riscv: Sign extend pc for different XLEN
new 440544e1cf target/riscv: Create xl field in env
new 8c796f1a15 target/riscv: Ignore the pc bits above XLEN
new bf9e776ec1 target/riscv: Extend pc for runtime pc write
new 1191be09a9 target/riscv: Use gdb xml according to max mxlen
new 47bdec821b target/riscv: Relax debug check for pm write
new 83b519b8a4 target/riscv: Adjust csr write mask with XLEN
new 40bfa5f695 target/riscv: Create current pm fields in env
new 0cff460de9 target/riscv: Alloc tcg global for cur_pm[mask|base]
new 4302bef9e1 target/riscv: Calculate address according to XLEN
new 4208dc7e9e target/riscv: Split pm_enabled into mask and base
new d96a271a8d target/riscv: Split out the vill from vtype
new 31961cfe50 target/riscv: Adjust vsetvl according to XLEN
new eef11ce325 target/riscv: Remove VILL field in VTYPE
new 01d09525da target/riscv: Fix check range for first fault only
new d6b9d93023 target/riscv: Adjust vector address with mask
new d8c40c24fd target/riscv: Adjust scalar reg in vector with XLEN
new 5a2ae2350e target/riscv: Set default XLEN for hypervisor
new f310df58bd target/riscv: Enable uxl field write
new f297245f6a target/riscv: Relax UXL field for debugging
new 5e9d14f2be Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...]
The 62 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
.gitlab-ci.d/opensbi.yml | 2 -
hw/char/riscv_htif.c | 33 +-
hw/intc/sifive_plic.c | 20 +-
hw/riscv/boot.c | 16 +-
hw/riscv/opentitan.c | 2 +-
hw/riscv/spike.c | 45 ++-
hw/riscv/virt.c | 83 ++--
hw/timer/ibex_timer.c | 25 +-
include/hw/char/riscv_htif.h | 5 +-
include/hw/riscv/boot.h | 3 +-
include/hw/riscv/spike.h | 1 +
include/hw/timer/ibex_timer.h | 1 -
linux-headers/asm-riscv/kvm.h | 128 ++++++
meson.build | 2 +
pc-bios/meson.build | 2 -
pc-bios/opensbi-riscv32-generic-fw_dynamic.elf | Bin 838904 -> 0 bytes
pc-bios/opensbi-riscv64-generic-fw_dynamic.elf | Bin 934696 -> 0 bytes
roms/Makefile | 2 -
softmmu/device_tree.c | 11 +-
target/riscv/cpu.c | 77 +++-
target/riscv/cpu.h | 58 ++-
target/riscv/cpu_bits.h | 3 +
target/riscv/cpu_helper.c | 99 ++---
target/riscv/csr.c | 90 ++++-
target/riscv/gdbstub.c | 71 +++-
target/riscv/helper.h | 4 +-
target/riscv/insn_trans/trans_privileged.c.inc | 9 +-
target/riscv/insn_trans/trans_rva.c.inc | 9 +-
target/riscv/insn_trans/trans_rvd.c.inc | 19 +-
target/riscv/insn_trans/trans_rvf.c.inc | 19 +-
target/riscv/insn_trans/trans_rvi.c.inc | 39 +-
target/riscv/insn_trans/trans_rvv.c.inc | 225 +++++++++--
target/{rx/cpu-param.h => riscv/kvm-stub.c} | 26 +-
target/riscv/kvm.c | 535 +++++++++++++++++++++++++
target/{rx/cpu-param.h => riscv/kvm_riscv.h} | 17 +-
target/riscv/machine.c | 46 ++-
target/riscv/meson.build | 1 +
target/riscv/op_helper.c | 7 +-
target/riscv/pmp.c | 12 +-
target/riscv/sbi_ecall_interface.h | 72 ++++
target/riscv/translate.c | 94 +++--
target/riscv/vector_helper.c | 39 +-
42 files changed, 1572 insertions(+), 380 deletions(-)
create mode 100644 linux-headers/asm-riscv/kvm.h
delete mode 100644 pc-bios/opensbi-riscv32-generic-fw_dynamic.elf
delete mode 100644 pc-bios/opensbi-riscv64-generic-fw_dynamic.elf
copy target/{rx/cpu-param.h => riscv/kvm-stub.c} (67%)
create mode 100644 target/riscv/kvm.c
copy target/{rx/cpu-param.h => riscv/kvm_riscv.h} (70%)
create mode 100644 target/riscv/sbi_ecall_interface.h
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64
in repository toolchain/ci/gdb.
from 7bf5587873 gdbsupport/gdb_regex.cc: replace defs.h include with common-defs.h
adds ec7194506d drop old unused stamp-h.in file
new b13d7831eb gdb/doc: fill in two missing @r
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
bfd/stamp-h.in | 1 -
binutils/stamp-h.in | 1 -
gas/stamp-h.in | 1 -
gdb/doc/python.texi | 4 ++--
gprof/stamp-h.in | 1 -
ld/stamp-h.in | 1 -
opcodes/stamp-h.in | 1 -
7 files changed, 2 insertions(+), 8 deletions(-)
delete mode 100644 bfd/stamp-h.in
delete mode 100644 binutils/stamp-h.in
delete mode 100644 gas/stamp-h.in
delete mode 100644 gprof/stamp-h.in
delete mode 100644 ld/stamp-h.in
delete mode 100644 opcodes/stamp-h.in
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64
in repository toolchain/ci/binutils-gdb.
from 7bf5587873 gdbsupport/gdb_regex.cc: replace defs.h include with common-defs.h
adds ec7194506d drop old unused stamp-h.in file
new b13d7831eb gdb/doc: fill in two missing @r
The 1 revisions listed above as "new" are entirely new to this
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Summary of changes:
bfd/stamp-h.in | 1 -
binutils/stamp-h.in | 1 -
gas/stamp-h.in | 1 -
gdb/doc/python.texi | 4 ++--
gprof/stamp-h.in | 1 -
ld/stamp-h.in | 1 -
opcodes/stamp-h.in | 1 -
7 files changed, 2 insertions(+), 8 deletions(-)
delete mode 100644 bfd/stamp-h.in
delete mode 100644 binutils/stamp-h.in
delete mode 100644 gas/stamp-h.in
delete mode 100644 gprof/stamp-h.in
delete mode 100644 ld/stamp-h.in
delete mode 100644 opcodes/stamp-h.in
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