Tcwg-commits January 2022

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[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (bd628d7f399d -> fbfc8b57f3d3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/linux. from bd628d7f399d Merge v5.15.15 adds d5df26479c82 devtmpfs regression fix: reconfigure on each mount adds ce258c74f8d9 drm/amd/display: explicitly set is_dsc_supported to false [...] adds b07490067dbc orangefs: Fix the size of a memory allocation in orangefs_ [...] adds c78c39a91dd4 remoteproc: qcom: pil_info: Don't memcpy_toio more than is [...] adds e192ccc17ecf vfs: fs_context: fix up param length parsing in legacy_par [...] adds 18c16cef8179 perf: Protect perf_guest_cbs with RCU adds 07667f43f8a8 KVM: x86: Register perf callbacks after calling vendor's h [...] adds 19f2dfb1a1f6 KVM: x86: Register Processor Trace interrupt hook iff PT e [...] adds 6e8b6dcec07c KVM: x86: don't print when fail to read/write pv eoi memory adds 252435941c33 KVM: s390: Clarify SIGP orders versus STOP/RESTART adds c2e7561ba7a8 remoteproc: qcom: pas: Add missing power-domain "mxc" for CDSP adds 7760404e8487 9p: only copy valid iattrs in 9P2000.L setattr implementation adds e2ece45f9450 video: vga16fb: Only probe for EGA and VGA 16 color graphic cards adds c671cb0b0087 media: uvcvideo: fix division by zero at stream start adds 898e91c32d04 rtlwifi: rtl8192cu: Fix WARNING when calling local_irq_res [...] adds bb08a4d10164 firmware: qemu_fw_cfg: fix sysfs information leak adds db3337ba6e4a firmware: qemu_fw_cfg: fix NULL-pointer deref on duplicate [...] adds 8840daa2f629 firmware: qemu_fw_cfg: fix kobject leak in probe error path adds adf791cf905a perf annotate: Avoid TUI crash when navigating in the anno [...] adds 3a1e48069798 KVM: x86: remove PMU FIXED_CTR3 from msrs_to_save_all adds c104edbb5a3f ALSA: hda/realtek: Add speaker fixup for some Yoga 15ITL5 devices adds 5b57c0efec9a ALSA: hda/realtek: Use ALC285_FIXUP_HP_GPIO_LED on another [...] adds 8b046b2a63c6 ALSA: hda/realtek - Fix silent output on Gigabyte X570 Aor [...] adds 7c452ca7bc7b ALSA: hda: ALC287: Add Lenovo IdeaPad Slim 9i 14ITL5 speak [...] adds f76d5f9391a5 ALSA: hda/tegra: Fix Tegra194 HDA reset failure adds 4942295ec2af ALSA: hda/realtek: Add quirk for Legion Y9000X 2020 adds 9dada19e1096 ALSA: hda/realtek: Re-order quirk entries for Lenovo adds ce2e7b97e588 mtd: fixup CFI on ixp4xx adds 63dcc388662c Linux 5.15.16 adds fbfc8b57f3d3 Merge v5.15.16 No new revisions were added by this update. Summary of changes: Makefile | 2 +- arch/arm/kernel/perf_callchain.c | 17 ++++--- arch/arm64/kernel/perf_callchain.c | 18 +++++--- arch/csky/kernel/perf_callchain.c | 6 ++- arch/nds32/kernel/perf_event_cpu.c | 17 ++++--- arch/riscv/kernel/perf_callchain.c | 7 ++- arch/s390/kvm/interrupt.c | 7 +++ arch/s390/kvm/kvm-s390.c | 9 +++- arch/s390/kvm/kvm-s390.h | 1 + arch/s390/kvm/sigp.c | 28 ++++++++++++ arch/x86/events/core.c | 17 ++++--- arch/x86/events/intel/core.c | 9 ++-- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/lapic.c | 18 +++----- arch/x86/kvm/vmx/vmx.c | 1 + arch/x86/kvm/x86.c | 14 +++--- drivers/base/devtmpfs.c | 7 +++ drivers/firmware/qemu_fw_cfg.c | 20 ++++----- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 + drivers/media/usb/uvc/uvc_video.c | 4 ++ drivers/mtd/chips/Kconfig | 2 + drivers/mtd/maps/Kconfig | 2 +- .../net/wireless/realtek/rtlwifi/rtl8192cu/hw.c | 1 + drivers/remoteproc/qcom_pil_info.c | 2 +- drivers/remoteproc/qcom_q6v5_pas.c | 1 + drivers/video/fbdev/vga16fb.c | 24 ++++++++++ fs/9p/vfs_inode_dotl.c | 29 ++++++++---- fs/fs_context.c | 2 +- fs/orangefs/orangefs-bufmap.c | 7 ++- fs/super.c | 4 +- include/linux/fs_context.h | 2 + include/linux/perf_event.h | 13 +++++- kernel/events/core.c | 13 ++++-- sound/pci/hda/hda_tegra.c | 43 ++++++++++++++---- sound/pci/hda/patch_realtek.c | 52 ++++++++++++++++++++-- tools/perf/ui/browsers/annotate.c | 23 ++++++---- 36 files changed, 318 insertions(+), 106 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (19c3026891e8 -> 946f29028e06)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project. from 19c3026891e8 [mlir] Fix PDL python bindings build adds 31355482e518 [mlir][linalg][bufferize][NFC] Split analysis-related code [...] adds cae932b6c6d3 [clangd] Sort targets before printing for tests adds 73cc8dd2d7d3 [bazel] Port 7ceffae18c43 adds 6c78703e3abc [AST] Fix the incorrect auto-keyword loc for constrained a [...] adds 579c4921c010 [bazel] Fix the python bindings for 7ceffae18c43 adds d649faff9c0c [LLD][COFF] Support GNU style == aliases adds f41d2d9469d6 [AVR] Remove redundant dynalloca SP save/restore pass adds 3d59d94a206a [AVR] Mark call-clobbered registers as clobbered in interr [...] adds ca27b026f990 [AVR] Do not clear r0 at interrupt entry adds 5ea98988c65b [clang-format] [docs] Fix link to avoid redirection. NFC. adds cd0a923b4c0c [mlir][linalg][bufferize][NFC] Move analysis-related code [...] adds 367c4ed2f8c3 [flang][NFC] Fix includes order adds 64d7d5a59787 [flang][NFC] Remove number of inlined elements adds 6df82597af78 [flang][NFC] Fix indentation adds db04d3e30b38 [AArch64][SVE][VLS] Move extends into arguments of comparisons adds dc18c5fa97e1 [JITLink] Add RISCV label subtraction and addition relocations adds 881b6a009fb6 [analyzer][NFC] Re-enable skipped SValTests by relaxing ex [...] adds c740a07863b4 [LoopVectorize] Test in-loop reductions with tail folding [...] adds 016022e5daa8 Recommit "[LoopFlatten] Move it to a LoopPassManager" adds f269ec230e2b [LoopFlatten] Move it from LPM2 to LPM1 adds 9c4e93c71a80 [LLDB] Adjust compiler-full-path.test for Windows/Arm64 adds 4dc4815f5613 [MemCpyOpt] Add some debug output to call slot optimization (NFC) adds 0db30adcfbaa [MemCpyOpt] Test invalid noalias metadata after call slot [...] adds 55b702c37b7e [clangd] NFC, emit source ranges in selection debug messages. adds 7f26a1027f0c AMDGPU/GlobalISel: Introduce pseudo to copy sp in call sequences adds b965617ccc36 GlobalISel: Fix assert on unmerge to different element of [...] adds 63eea41de63a [AMDGPU] Simplify SILoadStoreOptimizer::getSubRegIdxs. NFC. adds adab71711ea9 AMDGPU/GlobalISel: Fix legalize failure on i65 ctpop adds b8cb79404b55 [LangRef] Mangle all vector operands in insert/extract intrinsics adds e35c8f541cfa [openmp][amdgpu] Temporarily disable tests on old runtime adds 4f89157b9d73 [lldb] Make StatsDuration thread-safe adds 052503979e98 AMDGPU/GlobalISel: Fix introducing f16 fmed3 for gfx8 adds ca84c43d6955 [openmp][amdgpu] Disable tests on old runtime, enable test [...] adds aaa50e54e60f [gn build] port b2a162e63bd73 (liblldb.dll) adds 8baf4ba89085 [openmp][amdgpu] Remove xfail from test using declare targ [...] adds 14a793ab0589 [lit] Fix compatibility with upstream gtest adds d261660af96d Fix the use of -fno-approx-func along with -Ofast or -ffast-math adds 7260a926cfd8 [gn build] link lldb-vscode against ws2_32.lib adds 8e53ae3d3719 [clang][dataflow] Add a transfer function for conditional [...] adds 9fbd33ad623d [OMPIRBuilder] Add support for simd (loop) directive. adds cc639dde8c6d [gn build] port c22329972f02 (lldb REPL/Clang) adds 1324bb29f7ce [PowerPC] Fix issue with strict float to int conversion. adds bfed654e9888 [LLVM-C] Use NameLen in LLVMGetNamedGlobalAlias adds 89a92fb3ba66 [mlir] Rework subclass construction in PybindAdaptors.h adds 5ad96992ef90 [mlir][cmake] Use `GNUInstallDirs` to support custom insta [...] adds 3062a1469da0 [AIX] identify big archive magic as archive. Summary: adds 5fa826f4e284 [RISCV] Test expected inst opcode in sink-splat test adds ce9f2ab0cc4d [X86] Add mul(x,x) self-multiply known bits test coverage [...] adds d6fee6c3b0e7 [DAG] SelectionDAG::computeKnownBits - add mul(x,x) self-m [...] adds 32842c1bc9cd [CMake] Add explicit return to GetErrcMessages test program adds 85c2bd2a0e0e Prevent adding module flag amdgpu_hostcall multiple times adds eb5c0ea68180 [lldb] Initialize Python exactly once adds baa9b7c3c83a unique_ptrify the ModuleManager's VisitState linked list adds d492a7b2cac3 [mlir][Linalg] Add a useLinalgCopy option to Linalg buffer [...] adds d838bf2adc9c [ELF] Allow non-bitcode archive with an empty index adds 15f54dd5e496 AMDGPU: Account for usage HIP-style dynamic LDS adds f2dac557f574 [flang] Intrinsic assignment of distinct but "same" derived types adds fd0782a37bbf [DebugInfod] Prefix debuginfod cache directory adds 88d81770f110 [InstrProf] Restore InstrProfData.inc to fix Fuchsia builds adds 4f61749e16f6 [clang] support relative roots to vfs overlays adds 0aae2bf37318 [lld-macho] Add --start-lib --end-lib adds 81c66933292b [flang] Prevent any non constant result extent to be inlin [...] adds a4bdeb9a5634 [clang-tidy][NFC] replace some redundant std::string creations adds ccb09a48891f Fix broken comment in InstrProfData.inc adds a01523ea9939 [libc] improve error message for unsupported target platforms adds c167fa4a4f36 [dsymutil] Print the swift interface modification time in warning adds 4060b81e76e6 [RISCV] Obey -riscv-v-fixed-length-vector-elen-max when lo [...] adds d9edc1a585d7 [mlir][spirv] Add math.fma lowering to spirv adds 7cca13bc3a02 [PartialInline] Bail out on asm-goto/callbr adds e67430cca404 [MLGO] ML Regalloc Eviction Advisor adds bb8e7ebaad0d [BOLT] Remove unreachable uncond branch after return adds a9935b5db706 [openmp] Unconditionally set march commandline argument adds b9b10c0e615f [tosa][mlir] Lowering for dynamic shapes in the reduce_x o [...] adds c4017f9d0cf2 [mlir][sparse] Simplifying assertions in fromCOO adds d83ecd77cc0f [clang-tidy] Narrow cppguidelines-macro-usage to actual constants adds 3a1b178a0b8b [libcxx][test] Portably test that `{w,}format_context` is [...] adds 073e09683d0d Fix build break introduced by D117147 adds 438f80514521 [mlir] Configure mlir so that it can be directly included [...] adds 5bd38a2826b1 [ELF] Fix split-stack caller with hidden non-split-stack callee adds e7ab36f19110 Change elided large constant syntax to make it more explicit adds 67090e3446e8 [lld-macho] Implement -noall_load adds 3f38dc5c046c [lld-macho] Silence XAR deprecation warning adds 771613295d92 [docs][lli] Fix lli rst docs formatting adds 86cdff0e2123 [OpenMPOpt] Use SetVector to store list of kernels. adds a767ae2c5ce7 [RISCV] Fix incomplete asm statement parsing adds 429a717ea5ec [cmake] Move HandleOutOfTreeLLVM to common cmake utils adds ce8f365884e9 [openmp] Always pass valid triple to openmp-targets when u [...] adds 75d2fcb03fa5 [libc] Add a naming rule for global constants. adds 742bfb3581e7 [lldb] Fix LLDB_FULL_VERSION_STRING adds 058d2123792d [clang-tidy] Use literal block instead of code block (NFC) adds c7b71acef268 [AMDGPU][NFC] Add autogenerated tests for vgpr-tuple-alloc [...] adds 24bc072edb5b Fix modules build by moving implementation into .cpp file adds 4b12f4b2b1a2 Fix crash in MLIR opaque attribute parser adds fabbe8d5fdc6 [ORC] Fix typo in comment. adds d75c3e839605 [mlir] Don't print `// no predecessors` on entry blocks adds 1e09f0a97271 Preserve function argument locations. adds 10ed3c9d2ca4 [libc] Move type definitions to their own self contained h [...] adds ef95d45138ec [lld-macho] Mention string literal deduplication as a diff [...] adds b4a7559844d0 [OpenMP][FIX] Replace ICVs only with values valid at the g [...] adds dd75a6b2ae5c [DWARF][FIX] Try not to crash for nvptx with missing debug [...] adds aba5b91b699c Re-land [CodeView] Add full repro to LF_BUILDINFO record adds 1507786c2295 [LoopPeeling] Fix stale comments. NFC adds 70cef70b131e [docs] Put define DEBUG_TYPE after include directives. adds d93ffa1b37b3 [docs] Fix typo in the example code in ProgrammersManual. adds 28d718602ad2 [OpenMP] Expand short verisions of OpenMP offloading triples adds 2985d5623c88 [flang] Improve error message (initialized variable in pur [...] adds 028477758d19 [flang] Accept BOZ literals for some actual arguments adds 21c79be5d7a3 [RISCV] Add patterns to MIR sign-extension removal pass. adds e084679f961b [mlir] Make locations required when adding/creating block [...] adds bddfb81a312e [flang] Accept sparse argument keyword names for MAX/MIN adds 78649a8499a0 [flang] Accept INDEX(..., BACK=array) adds 02d9a4d56d7b [LoopPeel] Pass TripCount to computePeelCount by value ins [...] adds b6a7ae2c5ddc Optimize shift and accumulate pattern in AArch64. adds 30c17e70a4d7 [MLGO] Don't run the 'release' mode tests in non-autogener [...] adds e95ad93e6ef8 [llvm-dis] Add an option `dump-thinlto-index-only` in llvm [...] adds 70002a7a62c9 [gn build] (manually) port 30c17e70a4d7 adds 34570f4faf4c [RISCV] Add a test to show the bug in the RA caused by res [...] adds c1dd607463db [AVR][MC] Generate section '.progmemX.data' for extended f [...] adds 94173dc24cb5 [AVR] Generate ELPM for loading byte/word from extended pr [...] adds 5dea7a865e6f Combine to vpdpbusd when operand is constant and small enough. adds e39dae85f162 [mlir] Fix GCC5 build broken by improper name redefinition adds 03909c4400b5 [ELF] Remove StringRefZ adds eb675e972d74 [WebAssembly] Support Wasm EH + Wasm SjLj adds 1e447d03e2f6 [OpenMP] Introduce an environment variable to disable atom [...] adds b0789a1b12cd [OpenMP] Avoid costly shadow map traversals whenever possible adds 216ac31dd7d7 [M68k][NFC] Rename Bt(BT) to Btst(BTST) adds 6f2ee1ca5e39 [OpenMP][AMDGPU] Optimize the linked in math libraries adds 10ea7316995d [dsymutil] Don't print timestamp warning if we have no timestamp adds a7a4115bf3bc [ELF] Replace .zdebug string comparison with SHF_COMPRESSE [...] adds 9eb4939b862a [ORC] Allow JITDylib::getDFSLinkOrder and friends to fail [...] adds f8752e28fd3d [ORC] Fix missing std::move from 9eb4939b862. adds d5ae7a99d1e8 [ORC] Fix another missing std::move from 9eb4939b862. adds 8eae99dfe541 [RISCV] Add the zve extension according to the v1.0 spec adds 560eb2277bb5 [clang-format] Fix bug in parsing `operator<` with template adds 8f811effac48 [lld-macho] Fix grammar in doc adds 22ee510dac94 [Support] Remove incorrect noalias return attribute in Bum [...] adds d7bff2e9d2e4 [MemCpyOpt] Fix metadata merging during call slot optimization adds 0be3da1fab5a [RISCV] Add intrinsic for Zbt extension adds baa08d1ec3e2 [clang-tidy] Revert documentation change (NFC) adds 655a7024dbbc Reapply [MemCpyOpt] Make capture check during call slot op [...] adds 0d20407d1ac5 Reapply [MemCpyOpt] Look through pointer casts when checki [...] adds 794b1eebe749 [clang-format] Add tests for aligning `operator=` with `=d [...] adds c10c74887875 [LegalizeTypes][VP] Add widening support for vp.gather and [...] adds 6732c4389786 [llvm][AArch64] Accept armv8.8 "hbc" and "mops" in .arch_e [...] adds 7a1579ac67fd [mlir][bufferization] Move one-shot bufferization to Buffe [...] adds 96ca6d312ceb [flang][NFC] Fix header guard adds 60b6e73769f8 [RISCV] Imply extensions in RISCVTargetInfo::initFeatureMap adds 67d483aba23c [libcxx][test] Use TEST_HAS_BUILTIN in test code adds 90efbe697a39 [flang][NFC] Fix header guard and comment adds 782c0dd1a1c2 [IRBuilder] Migrate and-folding to value-based FoldAnd. adds 585abe3ba506 [lldb] Rename MemoryTagManager RemoveNonAddressBits to Rem [...] adds 787f91b0bb34 [lldb] Remove non-address bits from addresses given to mem [...] adds 770353cd94f8 [MLIR] The return type in the `computeSingleVarRepr` funct [...] adds 5a12024b95e4 [RISCV] Optimize lowering of floating-point -0.0 adds d4a6bf4d1a91 Revert "[AArch64][SVE][VLS] Move extends into arguments of [...] adds ca36cc56ac6c [RISCV] Match RVV VF variants also through masked operations adds 911c1370546f [flang][NFC] Cleanup dependent dialects and make def homogenous adds ccaaeca9106d [flang][NFC] Move current inliner files in Dialect directory adds 847bb26820b1 [AMDGPU] Regenerate some MIR checks adds c4f5fd76da93 [X86] combineConcatVectorOps - add handling for X86ISD::VS [...] adds 304cfc706ad4 [X86] combineConcatVectorOps - remove superfluous Subtarge [...] adds 69ecd2484f0d [clang-format] Indicate source location on test failure. NFC. adds d8b690409dae [AMDGPU] Set MemoryVT for truncstores in tblgen. adds 19b9cd4eae6f [MC] Add a disassembly test for Armv8-R sysregs. adds a4ac40e92f71 [AArch64] Remove PRBAR0_ELn and PRLAR0_ELn sysregs. adds 67aa314bcee7 [IRGen] Do not overwrite existing attributes in CGCall. adds 60147c6034e3 [EarlyCSE] Regenerate test checks (NFC) adds 35737df4dcd2 [Clang][AArch64][ARM] Unaligned Access Warning Added adds 010a10b73891 [flang][NFC] Remove extra braces adds c95cb4de1b66 [clang][dataflow] Intersect ExprToLoc when joining environments adds 6d45284618f0 [mlir][memref] Add better support for identity layouts in [...] adds 9e24d14ac89f [llvm][vfs] NFC: Virtualize in-memory `getStatus` adds 9011903e3613 [llvm][vfs] Abstract in-memory node creation adds 14c5fd920b0e [Clang][RISCV] Change TARGET_BUILTIN to require zve32x for [...] adds 4130357f96bf [X86] Fix v16f32 ADDSUB test adds 81d35f27ddec [DebugInstrRef] Memoize variable order during sorting (NFC) adds f29256a64ac1 [MLGO] Improved support for AOT cross-targeting scenarios adds 866311e71c8f [X86] lowerToAddSubOrFMAddSub - lower 512-bit ADDSUB patte [...] adds 0f283de9d195 [InstSimplify] Add test for reinterpret load of pointer ty [...] adds 3da69fb5a26c [Clang][AArch64][ARM] Unaligned Access Test Fix adds 805bc2486867 [InstSimplify] Add test for load of non-integral pointer (NFC) adds 91eca967b9eb [gn build] (manually) port f29256a64a adds 616f77172f0a [OpenMPIRBuilder] Detect and fix ambiguous InsertPoints fo [...] adds 3c422cbe6b7e [SLP] Add an asser to make a non-obvious precondition clear [NFC] adds 54ba376d0802 Add missing include to fix modular build adds c0957bd61794 Add missing include to fix modular build adds 990bab89fff7 [ScalableVectors] Warn instead of error for invalid size r [...] adds c43ebae838de [SLP] Reduce nesting depth in calculateDependencies via fo [...] adds c104fca36b96 {SLP] Delete dead code in favor of proper assert [NFC] adds fabf1de13202 [FuncSpec] Add a reference, and some other clarifying comm [...] adds 283f5a198a0e [GlobalISel] Fix incorrect sign extension when combining G [...] adds ee198df2e14c [mips] Improve vr4300 mulmul bugfix pass adds 89c447e4e6b5 AMDGPU: Stop reserving 36-bytes before kernel arguments fo [...] adds 8ff3c9e0be7a AMDGPU/GlobalISel: Fix selection of gfx90a FP atomics adds be7e938e2712 AMDGPU/GlobalISel: Stop handling llvm.amdgcn.buffer.atomic.fadd adds 75017db08cd3 [RISCV] Add tests for commuted vector/scalar VP patterns adds 81cbbe3e17a4 [flang][NFC] Remove unused/duplicated kStridePosInDim adds 191a6e9dfa1a optimize icmp-ugt-ashr adds feddf1150227 [lld][WebAssemlby] Convert test to check disassembly output. NFC adds 1455eddcf71d [NFC][SimplifyCFG] Add some tests for `invoke` merging adds 48224475222d [libc++] basic_string::resize_and_overwrite: Adopt LWG3645 [...] adds 2e49e0cfde43 AMDGPU/GlobalISel: Directly diagnose return value use for [...] adds c0f9592daae3 add tsan shared library adds 08549ba51e11 AMDGPU/GlobalISel: Explicitly set -global-isel-abort in fa [...] adds 2d1f9aa27dc4 AMDGPU/GlobalISel: Regenerate test checks with -NEXT adds 064cea9c9a02 AMDGPU/GlobalISel: Try to use s_and_b64 in ptrmask selection adds 237502c1a478 AMDGPU: Fix asm in test using wrong IR type for physical register adds 5af2433e1794 [clang-cl] Support the /HOTPATCH flag adds 5abf11632245 [mlir][vector] Allow values outside of [0; dim-size] in cr [...] adds af5600420b93 [OpenMP] Don't pass empty files to nvlink adds aad04534c419 [libc] Implement correct rounding with all rounding modes [...] adds b80db150cdba Add `isConsteval` matcher adds eb6c6e60585d [NFC][InstCombine] Add test showing failure to sink into ` [...] adds 9abc593e9889 [TargetLowering][InstCombine] Simplify BSwap demanded bits [...] adds b58cc9fb2348 [NFC][RISCV] Add end-of-line symbol in target-feature testcases adds 587dccfb1238 [InstCombine] avoid 'tmp' usage in test files; NFC adds 2d031ec5e53f [InstCombine] add one-use check to opposite shift folds adds c65186c89f35 [clang] Improve -Wdeclaration-after-statement adds df31ff1b29bc [cmake] Make include(GNUInstallDirs) always below project(..) adds 792853cb786b [SystemZ] Remove the ManipulatesSP flag from backend (NFC). adds 5fa4cf82dfa0 [Clang] Separate the 'debug-info-hotpatch' test in two par [...] adds 94a0660c14da [AMDGPU] Regenerate remat-vop.mir. NFC. adds 493c85648401 [clang][NFC] Small mangler cleanups adds 6b92bb47901f [Support] [DebugInfo] Lazily create cache dir. adds 94e69fbb4f3a [RISCV] Add DAG combine to fold (fp_to_int_sat (ffloor X)) [...] adds 63a991d03589 [libc++] Eliminate the `__function_like` helper. adds ba8eb31bd954 [InstCombine] Instruction sinking: fix check for function [...] adds 8105e404f186 [demangler][NFC] Small cleanups and sync adds 864b5b49fd3f [libcxx] chrono::month_weekday should not be default const [...] adds 57ebfea38c03 [lldb] Surround LLDB_API-defining code with #ifndef LLDB_API adds 83d59e05b201 Re-land [LLD] Remove global state in lldCommon adds d4baf3b1322b [libc] Use get_round() instead of floating point tricks in [...] adds 8b4fa2c98e07 clang: Auto-cleanup left-over file from before 3da69fb5a26 [...] adds 9122b5072aa7 [llvm] Remove an old bot cleanup command adds 608a9c0e7909 [gn build] Port 63a991d03589 adds 14a296469864 [gn build] Port 83d59e05b201 adds 860038e0d775 [SLP] Rename a couple lambdas to be more clearly separate [...] adds 82452be5cbd7 [clang-format] Refactor: add FormatToken::hasWhitespaceBef [...] adds f84023a812b6 [lld][macho] Stop grouping symbols by sections in mapfile. adds b8d38e8b4fca [libcxx][test] view_interface need not derive from view_base adds d0cace508714 [mlir][pdl] Some ops are missing `NoSideEffect` adds 7c471b56f2c2 [mlir][pdl] OperationOp should not be side-effect free adds e99835ffedc2 [mlir][pdl] Make `pdl` the default dialect when parsing/printing adds 7a275dc35411 [RISCV] Remove Zvlsseg extension. adds 118babe67adf [SLP] Use for loops for walking bundle elements adds 40aef79db0b0 [MLIR][GPU] Add debug output to enable dumping GPU assembly adds dd7b69a61fa3 [RISCV] Remove HadStdExtV and HasStdZve* Predicates from t [...] adds 4c1dc65015ae [InstCombine] add/adjust tests for multiply with extended [...] adds a7a2860d0eee [InstCombine] convert mul with sexted bool and constant to select adds 60f61918795b [SLP] Extract formBundle helper for readability [NFC] adds 5ef7abbc6f99 [mlir:TiingInterface] Remove unnecessary include of Tensor.h adds 1f3f90ab8869 [libc] Make log2f correctly rounded for all rounding modes [...] adds 8c9f62ea90c7 [compiler-rt][cmake] Use HandleOutOfTreeLLVM like libcxx a [...] adds 4af11272f57a [cmake] Duplicate `{llvm,compiler_rt}_check_linker_flag` f [...] adds 36cb29cbbe1b Work around a module build failure on the bots. adds 5a670f1378ae [SLP] Kill an unused param and use a for-loop in calculate [...] adds 41ebd1968165 [AMDGPU] Do not ignore exec use where exec is read as data adds c0906f6b21a1 [SLP] Remove stray semicolon to make bots happy adds 1d4ca42b4380 [OpenMPIRBuilder] Detect ambiguous InsertPoints for apply* [...] adds 39f779afb354 [clang-tidy][NFC] Remove redundant string creation for comparison adds c95afac89e00 [clang-format][NFC] Clean up tryMergeLessLess() adds cd2d7369639e [mlir][tosa] Limit right-shift to 31 bits adds fa8bb224661d [RISCV] Optimize vector_shuffles that are interleaving the [...] adds 284cd693f1c6 [libc] Move the remaining public types to their own type headers. adds 5e88f527da21 [RISCV] Remove RISCVSubtarget::hasStdExtV() and hasStdExtZ [...] adds a5684114445a [clang-tidy] Update bugprone-stringview-nullptr to consist [...] adds 8457b61699e8 [test] Add tests for bswap combining. NFC adds ac2f3df8396a [lld][WebAssembly] Remove redundant config setting adds d92e5412ea57 [libc] Use __builtin_clz to find leading 1 in hypot adds 5501c16edf0f [flang] Fix OPEN/WRITE(SIGN='SUPPRESS') adds 9ddd07922f65 [flang] Handle FLUSH(unknown unit) adds e1b7bd911d9e [OpenCL] opencl-c.h: add __opencl_c_images and __opencl_c [...] adds d3b188a2d72f [clang-tidy] Include constructor initializers in `bugprone [...] adds 7bf9065ad7d9 [Attributor][NFC] Clang format adds 37e0c58559ad [Attributor][FIX] AAValueConstantRange should not loop unc [...] adds 1d7604fdcebd [InstCombine] Simplify bswap -> shift adds cfae2c65dbbe [RISCV] Factor Zve32 support into RISCVSubtarget::getMaxEL [...] adds 922c29ccf143 [flang] Allow explicit '+' in NAMELIST input subscripts adds d1123e36922d [flang] Extension: skip over NAMELIST groups adds ad06e65dc4da [RISCV] Fix the bug in the register allocator caused by re [...] adds f811cb82a6cd [lldb] Revive lldb-instr adds 1755f5b1d7b7 [lldb] Decouple instrumentation from the reproducers adds 156b997251db [lldb] Instrument SB API with signposts adds 0dfe953294ba [OpenMP] Change default visibility to protected for device [...] adds 26feef084616 [Libomptarget] Change visibility to hidden for device RTL adds 58580e922a69 [llvm][cmake] Make `llvm_install_symlink` robust to absolu [...] adds a65934241c22 [gn build] Port 1755f5b1d7b7 adds cac164ff9cb6 [lldb] Update the modulemap adds d93a11c138bb Revert "[llvm][cmake] Make `llvm_install_symlink` robust t [...] adds 82af95029ec9 [X86] Enable ibt-seal optimization when LTO is used in Kernel adds 7ee1c162cc53 [RISCV][RFC] add inst support of zbkb adds 7b3d30728816 [RISCV] Add isel patterns for grevi, shfli, and unshfli to [...] adds 26167cae4515 Print the `// ----` separator between modules when using - [...] adds 308d8b8c6618 [mlir][python] 8b/16b DenseIntElements access adds 9006bf424847 Remove obsolete `getAsmResultNames` from OpAsmDialectInterface adds a7f8aea71485 [clang-tidy] Fix wrong FixIt in performance-move-const-arg adds 82bb8a588dde [CSKY] Add codegen support of GlobalTLSAddress lowering adds 8def89b5dc82 [RISCV] Set CostPerUse to 1 iff RVC is enabled adds 75184f14aecd [DebugInfo] Fix handling '# line "file"' for DWARFv5 adds 86b08ed6bb16 [DebugInfo][NFC] Do not call 'isRootFile' for DWARF Version < 5 adds 7f0f4cab18a9 [libc][NFC] Add 'struct_' prefix to type headers defining [...] adds e6de53b4de4a [RISCV] Bump rvv-related extensions from 0.10 to 1.0 adds a99e06aa869b [mlir][Linalg] Avoid generating illegal operations during [...] adds 05cd9a0596d8 [ConstantFold] Simplify type check in reinterpret load fol [...] adds 6a19cb837c9b [ConstantFold] Support pointers in reinterpret load folding adds 7950010e4983 [VE][NFC] Factor out helper functions adds 3f9d1f516e19 [InstSimplify] Add tests for reinterpret load of floats (NFC) adds b4900296e4a5 [ConstantFold] Allow all float types in reinterpret load folding adds 99b5a8049be4 Match bazel config with cmake after f29256a64 adds 69825f369302 [fir] Add array operations documentation adds d03c5bc8d437 [mlir] Fully qualify return types in OpAsmInterface.td and [...] adds a2f6921ef2a1 [llvm] Remove unused headers in LLVMDemangle adds c0cf209076a2 [VPlan] Add VPWidenIntOrFpInductionRecipe::isCanonical, us [...] adds 55689904d2e5 [VPlan] Move ::isCanonical outside ifdef. adds 1f9e18b6565f [llvm] Remove (some) LLVMDemangle header dependencies adds e7762653d3b0 [Attributor] Avoid some pointer element type accesses adds 065044c443f4 Fix 1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d adds 329feeb938ac [ORC][docs] Describe removing JITDylibs, using custom prog [...] adds b351ac3873db [AMDGPU][NFC] Regenerate InstCombine test adds 0530fdbbbb84 [AMDGPU] Fix LOD bias in A16 combine adds 603d18033c51 [AMDGPU][InstCombine] Remove zero LOD bias adds ae2f9c8be897 [AMDGPU] Remove lz and nomip combine from codegen adds f53d359816e6 Fix 1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d adds 9c5b856dac5c [CoroSplit] Avoid pointer element type accesses adds 0ca426d6ac65 [llvm-mca] Improve barriers for strict region marking (PR52198) adds bfbdb5e43e50 [Coroutines] Avoid some pointer element type accesses adds 597eae998a87 [clangd][Background] Make index validation logs verbose adds b6a41fddcfd3 [DWARF][DebugInfo] Fix off-by-one error in size of DW_TAG_ [...] adds 357f2d9ccf20 [mlir][LangRef] Add top-level production to the MLIR grammar adds 4d268dc94a6b [RISCV] Enable CGP to sink splat operands of VP intrinsics adds 825a3cd6b697 [clangd] Fail inlayHints requests on content changes adds 4727d29d908f [X86] Remove __builtin_ia32_pabs intrinsics and use generi [...] adds ced077e1ba52 [clang][deps] NFC: Simplify handling of cached FS errors adds 5daeada33051 [clang][deps] Ensure filesystem cache consistency adds 8cc2a1372704 [clang][deps] Handle symlinks in minimizing FS adds 68db0e25df4b [flang] Update tco tool pipline and add translation to LLVM IR adds 8ee135dcf8ff [X86] Remove `__builtin_ia32_pmax/min` intrinsics and use [...] adds 3ef88b31843e Revert rG8ee135dcf8ff060656ad481c3e980fe8763576f5 "[X86] R [...] adds 0abaf6458092 Revert rG4727d29d908f9dd608dd97a58c0af1ad579fd3ca "[X86] R [...] adds 75e164f61d39 [llvm] Cleanup header dependencies in ADT and Support adds 2b8e4c6e5fbd Add missing header in Support/ConvertUTF.h adds 38ac4093d9d2 [NFCI][Support] Avoid ASSERT_/EXPECT_TRUE(A <op> B) adds 51c53a0791cd Add apple-specific missing include adds 2a9e33db4f0a Add ms-specific missing header in Support/InitLLVM.cpp adds 622354a52207 [llvm][ADT] Implement `BitVector::{pop_,}back` adds 7e3bcae5069f Add apple-specific missing header in Support/GraphWriter.cpp adds d5ae039ed7b8 [SystemZ] Properly register machine passes. adds e9211e039377 Remove dependency from raw_ostream on <chrono> adds ad43217a0466 [InstCombine] Fold for masked gather when loading the same [...] adds 4d82ae67b208 Add security group 2021 transparency report. adds b8102449a72c [clang-tidy] Avoid binding nullptr to a reference adds e5fd3a7df917 Try to unbreak build on Windows after e9211e03937 adds 8bc661894299 Add missing llvm/support/Regex.h include in polly/lib/Anal [...] adds 3c9e3dada916 Try to unbreak build on Windows more after e9211e03937 adds 9900acacfb3f [libcxx][doc][nfc] Fixed typo in doc adds 9d3437fbf341 [ADT] [NFC] Add StringRef::detectEOL adds 5597ec2dc4f8 Include missing "llvm/Support/Path.h" in "flang/lib/Fronte [...] adds f24fe96f469b [ifs] Use a tmp file instead of "-" adds cab961693802 [libc++] Use addressof in unordered_map. adds b7fd91c84b4e Upstream MLIR PyTACO implementation. adds e4a556268ea9 Revert "[libc++] Use addressof in unordered_map." adds 23a7bb541dae [clang-format] Fix comment in spaceRequiredBefore. NFC. adds 565963841880 Revert "[compiler-rt][cmake] Use HandleOutOfTreeLLVM like [...] adds 26cbc430197a [flang] Remove target and require shell adds 10e5c513b59b Revert "[cmake] Duplicate `{llvm,compiler_rt}_check_linker [...] adds 5061eb6b0121 [Sparc] Don't define __sparcv9 and __sparcv9__ when targeting V8+ adds e6ceec9c1d19 [Clang][RISCV] Restrict rvv builtins with zve macros adds 754d6af7c359 [NFC] Improve code reuse. adds 11754a4dbbad [RISCV] Use RVBUnary in more places to simplify some table [...] adds 4710750854ce [mlir][spirv] Support size-1 vector inserts during conversion adds fd0c6f53913f [mlir] Move linalg::PadTensorOp to tensor::PadOp. adds 3c90ae5d0b71 Revert "[flang] Update tco tool pipline and add translatio [...] adds 48132bb1e437 [RISCV] Simplify interface to combineMUL_VLToVWMUL. NFC adds d6e2c95d2252 [libc++] Use addressof in unordered_map. adds 4d0a18d06e8e [mlir][sparse] Adding assertions for overhead storage types adds cb8b94f6efa9 [AArch64] Add extra tests useful in testing hadd. NFC adds f18fcdabda72 [BOLT][NFC] Expand auto types pt.2 adds 5a654b01133f [BOLT] Make ICP target selection (more) deterministic adds f8c7fb499be6 [BOLT][NFC] Reduce includes with include-what-you-use adds 2f9f9afa4e12 [mlir] Add polynomial approximation for atan and atan2 adds 0d9cc6995401 [Support] Update missed tests with lazy caching behavior. adds cd4e600f5f5c [Sema] Warn about printf %n on Android and Fuchsia adds 0379459fc586 [RISCV] Strengthen a SDTypeProfile. Fix formatting. adds 4f8ea3c84f3d [SystemZ][z/OS][NFC] Remove extra symbol adds d84d1135d80c Emit swift5 reflection section data in dsym bundle generat [...] adds 9f4cc5a6bb56 [gn build] Set HAVE_MALLINFO2=1 adds 6103b2d45bfb Revert "Emit swift5 reflection section data in dsym bundle [...] adds e39c262979e6 Revert "[gn build] Set HAVE_MALLINFO2=1" adds 705d8c49f9be [x86] regenerate smul-with-overflow.ll; add test which fai [...] adds 6df05697ca1d [gn build] Set HAVE_MALLINFO2=1 adds 653b007dc186 [CodeComplete] fix nullptr crash in 612f5ed8823120 adds b796709a62da Only run MLIR PyTACO tests when python bindings are enabled. adds ba093fe58b15 Fix a commit. adds 6ba1fb04214b [llvm-pdbutil] Fix gaps ouput. adds 58ee14e29e98 [lldb] Fix timer logging inverted quiet condition adds efa15f417847 [mlir][sparse] add ability for sparse tensor output adds 10d0d8c0c1db [clang][cmake] Use `GNUInstallDirs` to support custom inst [...] adds 1613f8b8d7d5 NFC (build fix): Add header for llvm::errs(). adds 08574ce4d625 [mlir][tosa] Add clamp + clamp as single clamp canonicalization adds 13fa17db3a72 [split-file] Respect input file's line endings adds 4f547ee8b8a7 [libc++][test] Add const and reference tests for enable_vi [...] adds 9cddfe3085c4 [CMake] Passthrough OSX CMake options to builtins and runtimes adds e6cdef187ed3 [XRay][test] Clean up llc RUN lines adds 04eb93b1d559 [flang] Fix repeated "DT" editing adds db07e082abaf [TSan] Omit vfork interceptor iOS simulator runtime adds 3726626a26ec [flang] Fix crash from USE-associated defined I/O subprograms adds b95150418fb6 [lldb] Allow aliases to aliases of raw input commands adds e796eaf2af65 [RISCV][RFC] add MC support for zbkc subextension adds b1856009fbc1 [flang] Allow INQUIRE() on a child unit in user-defined I/ [...] adds 55d887b83364 [time-trace] Add optimizer and codegen regions to NPM adds b6098c07cb20 [MLIR] Fix negative gcd in `normalizeDivisionByGCD` function. adds de8723829515 [JITLink] Add anonymous symbols in LinkGraph for unnamed t [...] adds fdb6578514dd Revert "[JITLink] Add anonymous symbols in LinkGraph for u [...] adds f7d4cafe5a6a [JITLink][RISCV] Support R_RISCV_SET* and R_RISCV_32_PCREL [...] adds 26544b98f7bf [libc++] Use addressof in unordered_set. adds 4041354b4c12 [mlir] Add SingleBlockImplicitTerminator<"tensor::YieldOp" [...] adds 93deac2e2ba9 [AArch64] Optimize add/sub with immediate through MIPeepholeOpt adds 0283b07746e8 reapply de872382951 "[JITLink] Add anonymous symbols in Li [...] adds b27e5459d51f [DAG] Convert truncstore(extend(x)) back to store(x) adds 8dedf9b58bff [PowerPC] Change CTR clobber estimation for 128-bit floati [...] adds 00d68c3824bf [PowerPC] Support parsing GNU attributes in MC adds 5f2854f1daa7 [LV] Always create VPWidenCanonicalIVRecipe, optimize away later. adds 26fffc1b8e75 [libc++] [test] {cpo,niebloid}.compile.pass.cpp: Also test [...] adds e9d0f8baf236 [flang] Don't drop format string for external child I/O adds 896a543e72fd [flang] Support DECIMAL='COMMA' mode in namelist I/O adds 0a6b4258ab0e [openmp][cmake] Use `GNUInstallDirs` to support custom ins [...] adds d44b6be6eaa8 [RISCV] Don't Custom legalize f16/f32/f64 bitcasts if thos [...] adds 39e602b6c433 [InstCombine] try to fold binop with phi operands adds 7c16647c3676 [clang-tools-extra][cmake] Use `GNUInstallDirs` to support [...] adds c1988dbf2d19 [openmp] Allow x87 fp functions only in Openmp runtime for x86. adds b8467952404c [docs] [clang] Small documentation change for compilation [...] adds 37d1d02200b9 [X86][MS] Change the alignment of f80 to 16 bytes on Windo [...] adds 2513b7903063 [libc++] Implement LWG3549: view_interface need not inheri [...] adds 3cf15af2daa9 [RISCV] Remove experimental prefix from rvv-related extensions. adds 85e42db1b6db [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds be6070c290e2 [RISCV] Use FP ABI for some RVV intrinsic tests. NFC adds 3dc6fd515135 [llvm-objcopy][MachO] Implement --update-section adds a4f202549208 [X86] Regenerate avx512-mask-op.ll new ff05b93a02d1 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] new 20d46fbd4a51 [CodeGenPrepare] Use dyn_cast result to check for null pointers new 946f29028e06 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bolt/include/bolt/Core/BinaryContext.h | 3 +- bolt/include/bolt/Core/BinaryData.h | 1 - bolt/include/bolt/Core/DebugData.h | 3 - bolt/include/bolt/Passes/AllocCombiner.h | 2 - bolt/include/bolt/Rewrite/DWARFRewriter.h | 3 +- bolt/lib/Core/BinaryFunction.cpp | 8 +- bolt/lib/Core/DebugData.cpp | 7 +- bolt/lib/Core/JumpTable.cpp | 1 - bolt/lib/Passes/IndirectCallPromotion.cpp | 24 +- bolt/lib/Passes/ThreeWayBranch.cpp | 2 - bolt/lib/Profile/YAMLProfileWriter.cpp | 2 +- bolt/lib/Rewrite/DWARFRewriter.cpp | 4 +- bolt/lib/Rewrite/MachORewriteInstance.cpp | 2 - bolt/lib/Rewrite/RewriteInstance.cpp | 2 - bolt/lib/Utils/Utils.cpp | 1 - bolt/test/AArch64/jmp-after-ret.s | 24 + bolt/test/X86/jmp-after-ret.s | 24 + clang-tools-extra/CMakeLists.txt | 1 + clang-tools-extra/clang-doc/tool/CMakeLists.txt | 4 +- .../find-all-symbols/tool/CMakeLists.txt | 2 +- .../clang-include-fixer/tool/CMakeLists.txt | 4 +- clang-tools-extra/clang-tidy/CMakeLists.txt | 2 +- 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2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vcompress.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vcpop.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfabs.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfclass.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfirst.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrec7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsqrt7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsgnj.c | 2 +- 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llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp | 64 +- llvm/lib/Transforms/Utils/Local.cpp | 5 +- llvm/lib/Transforms/Utils/LoopPeel.cpp | 8 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 36 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 271 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 8 + llvm/lib/Transforms/Vectorize/VPlan.h | 32 + llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 27 + llvm/lib/Transforms/Vectorize/VPlanTransforms.h | 4 + llvm/lib/Transforms/Vectorize/VPlanValue.h | 6 + llvm/runtimes/CMakeLists.txt | 14 +- .../CostModel/RISCV/fixed-vector-gather.ll | 2 +- .../CostModel/RISCV/fixed-vector-scatter.ll | 2 +- llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll | 2 +- .../thinlto-index-disassembled-by-llvm-dis.ll | 30 + llvm/test/Bitcode/upgrade-datalayout3.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout4.ll | 8 + llvm/test/CMakeLists.txt | 1 + .../AArch64/GlobalISel/combine-ptradd-int2ptr.mir | 15 + .../CodeGen/AArch64/GlobalISel/inttoptr_add.ll | 15 + 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.../AMDGPU/GlobalISel/image_ls_mipmap_zero.ll | 403 -- .../GlobalISel/inst-select-amdgpu-wave-address.mir | 41 + .../AMDGPU/GlobalISel/inst-select-ptrmask.mir | 416 +- .../GlobalISel/irtranslator-call-implicit-args.ll | 40 +- .../AMDGPU/GlobalISel/irtranslator-call-sret.ll | 8 +- .../CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll | 220 +- .../AMDGPU/GlobalISel/irtranslator-sibling-call.ll | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir | 617 +++ .../AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll | 272 +- .../llvm.amdgcn.image.sample.ltolz.a16.ll | 565 --- .../GlobalISel/llvm.amdgcn.image.sample.ltolz.ll | 293 -- .../llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll | 3 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll | 162 +- ...vm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll | 6 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll | 184 +- .../CodeGen/AMDGPU/GlobalISel/load-unaligned.ll | 56 +- .../postlegalizercombiner-load-and-mask.mir | 11 +- .../regbankselect-amdgpu-wave-address.mir | 32 + .../CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll | 16 +- .../CodeGen/AMDGPU/GlobalISel/store-local.128.ll | 72 +- .../CodeGen/AMDGPU/GlobalISel/store-local.96.ll | 72 +- .../AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll | 12 +- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 19 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 15 +- llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll | 28 +- llvm/test/CodeGen/AMDGPU/ds-alignment.ll | 183 +- llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll | 12 +- llvm/test/CodeGen/AMDGPU/ds_read2.ll | 170 +- llvm/test/CodeGen/AMDGPU/ds_write2.ll | 96 +- llvm/test/CodeGen/AMDGPU/flat-scratch.ll | 20 +- llvm/test/CodeGen/AMDGPU/image_ls_mipmap_zero.ll | 132 - llvm/test/CodeGen/AMDGPU/licm-valu.mir | 245 ++ llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 2 - .../AMDGPU/llvm.amdgcn.image.sample.ltolz.ll | 113 - .../CodeGen/AMDGPU/memory-legalizer-flat-agent.ll | 352 +- .../AMDGPU/memory-legalizer-flat-nontemporal.ll | 8 +- .../AMDGPU/memory-legalizer-flat-singlethread.ll | 352 +- .../CodeGen/AMDGPU/memory-legalizer-flat-system.ll | 352 +- .../AMDGPU/memory-legalizer-flat-volatile.ll | 14 +- .../AMDGPU/memory-legalizer-flat-wavefront.ll | 348 +- .../AMDGPU/memory-legalizer-flat-workgroup.ll | 336 +- .../AMDGPU/memory-legalizer-global-agent.ll | 348 +- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 8 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 352 +- .../AMDGPU/memory-legalizer-global-system.ll | 332 +- .../AMDGPU/memory-legalizer-global-volatile.ll | 14 +- .../AMDGPU/memory-legalizer-global-wavefront.ll | 352 +- .../AMDGPU/memory-legalizer-global-workgroup.ll | 352 +- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 604 ++- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 16 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 604 ++- .../AMDGPU/memory-legalizer-local-system.ll | 604 ++- .../AMDGPU/memory-legalizer-local-volatile.ll | 20 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 604 ++- .../AMDGPU/memory-legalizer-local-workgroup.ll | 604 ++- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 16 +- .../AMDGPU/memory-legalizer-private-volatile.ll | 16 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 20 +- .../promote-alloca-to-lds-constantexpr-use.ll | 51 + llvm/test/CodeGen/AMDGPU/remat-vop.mir | 2210 +++++----- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 9 +- .../CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll | 6 +- llvm/test/CodeGen/AMDGPU/store-local.128.ll | 96 +- llvm/test/CodeGen/AMDGPU/store-local.96.ll | 96 +- llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll | 4 +- llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll | 394 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 1 + .../ARM/xray-armv6-attribute-instrumentation.ll | 4 +- .../ARM/xray-armv7-attribute-instrumentation.ll | 4 +- llvm/test/CodeGen/ARM/xray-tail-call-sled.ll | 4 +- llvm/test/CodeGen/AVR/dynalloca.ll | 48 +- llvm/test/CodeGen/AVR/elpm.ll | 270 ++ llvm/test/CodeGen/AVR/interrupts.ll | 75 +- llvm/test/CodeGen/AVR/lpmx.ll | 148 + llvm/test/CodeGen/AVR/sections.ll | 41 +- llvm/test/CodeGen/CSKY/tls-models.ll | 179 + llvm/test/CodeGen/Hexagon/xray-pred-ret.ll | 2 +- llvm/test/CodeGen/Hexagon/xray.ll | 4 +- llvm/test/CodeGen/MLRegalloc/Inputs/input.ll | 687 ++++ .../test/CodeGen/MLRegalloc/dev-mode-log-2-fcts.ll | 58 + llvm/test/CodeGen/MLRegalloc/dev-mode-logging.ll | 33 + .../test/CodeGen/MLRegalloc/dev-rel-equivalence.ll | 19 + llvm/test/CodeGen/MLRegalloc/rel-codepath.ll | 16 + llvm/test/CodeGen/Mips/vr4300-mulmul.ll | 25 +- .../Mips/xray-mips-attribute-instrumentation.ll | 8 +- llvm/test/CodeGen/Mips/xray-section-group.ll | 8 +- llvm/test/CodeGen/PowerPC/O3-pipeline.ll | 1 + llvm/test/CodeGen/PowerPC/aix-fptoint.ll | 54 + llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll | 52 +- .../PowerPC/xray-attribute-instrumentation.ll | 5 +- .../CodeGen/PowerPC/xray-conditional-return.ll | 2 +- .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-hidden.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-sled.ll | 2 +- llvm/test/CodeGen/RISCV/add-before-shl.ll | 20 +- llvm/test/CodeGen/RISCV/addcarry.ll | 30 +- llvm/test/CodeGen/RISCV/atomic-rmw.ll | 2400 +++++------ llvm/test/CodeGen/RISCV/atomic-signext.ll | 480 +-- llvm/test/CodeGen/RISCV/attributes.ll | 24 +- llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 98 +- llvm/test/CodeGen/RISCV/callee-saved-gprs.ll | 796 ++-- .../calling-conv-ilp32-ilp32f-ilp32d-common.ll | 76 +- .../RISCV/calling-conv-lp64-lp64f-lp64d-common.ll | 38 +- llvm/test/CodeGen/RISCV/double-arith-strict.ll | 92 +- llvm/test/CodeGen/RISCV/double-arith.ll | 208 +- llvm/test/CodeGen/RISCV/double-convert.ll | 186 +- llvm/test/CodeGen/RISCV/double-fcmp-strict.ll | 64 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 32 +- llvm/test/CodeGen/RISCV/double-round-conv-sat.ll | 940 +++++ llvm/test/CodeGen/RISCV/float-arith-strict.ll | 32 +- llvm/test/CodeGen/RISCV/float-arith.ll | 124 +- llvm/test/CodeGen/RISCV/float-convert.ll | 88 +- llvm/test/CodeGen/RISCV/float-round-conv-sat.ll | 940 +++++ llvm/test/CodeGen/RISCV/fp-imm.ll | 24 +- llvm/test/CodeGen/RISCV/fp128.ll | 32 +- llvm/test/CodeGen/RISCV/fpclamptosat.ll | 414 +- llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll | 1177 +++--- llvm/test/CodeGen/RISCV/half-arith.ll | 708 ++-- llvm/test/CodeGen/RISCV/half-convert.ll | 112 +- llvm/test/CodeGen/RISCV/half-intrinsics.ll | 152 +- llvm/test/CodeGen/RISCV/half-round-conv-sat.ll | 970 +++++ llvm/test/CodeGen/RISCV/large-stack.ll | 4 - llvm/test/CodeGen/RISCV/mul.ll | 388 +- llvm/test/CodeGen/RISCV/remat.ll | 44 +- llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll | 24 +- llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll | 30 +- llvm/test/CodeGen/RISCV/rv32zbb.ll | 96 +- llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll | 18 + llvm/test/CodeGen/RISCV/rv32zbp.ll | 546 +-- llvm/test/CodeGen/RISCV/rv32zbt-intrinsic.ll | 43 + llvm/test/CodeGen/RISCV/rv32zbt.ll | 28 +- llvm/test/CodeGen/RISCV/rv64i-complex-float.ll | 8 +- llvm/test/CodeGen/RISCV/rv64zbp.ll | 56 +- llvm/test/CodeGen/RISCV/rv64zbt-intrinsic.ll | 83 + llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll | 4 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 2 +- .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 90 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-sats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 4 +- .../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 2 +- .../RISCV/rvv/commuted-op-indices-regression.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/constant-folding.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 8 +- .../CodeGen/RISCV/rvv/debug-info-rvv-dbg-value.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 95 +- llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll | 4 +- .../fixed-vector-strided-load-store-negative.ll | 2 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 92 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 8 +- .../rvv/fixed-vectors-bitcast-large-vector.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 182 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 88 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 32 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 86 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll | 38 +- .../RISCV/rvv/fixed-vectors-emergency-slot.mir | 2 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 8 +- .../RISCV/rvv/fixed-vectors-fp-interleave.ll | 378 ++ .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 18 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-interleave.ll | 484 +++ .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 19 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-marith-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 1767 +++++++- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 8 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 287 +- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-mask-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv32.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv64.ll | 4 +- .../RISCV/rvv/fixed-vectors-store-merge-crash.ll | 2 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 66 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 32 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll | 78 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll | 52 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 52 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 52 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 18 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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/inline-asm.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 4 +- .../CodeGen/RISCV/rvv/large-rvv-stack-size.mir | 2 +- .../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 4 +- .../RISCV/rvv/legalize-scalable-vectortype.ll | 4 +- .../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/marith-vp.ll | 4 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 2 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 4 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/pr52475.ll | 4 +- .../test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll | 77 + llvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 2 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 1469 +++++-- llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 4 +- .../RISCV/rvv/tail-agnostic-impdef-copy.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll | 2 +- .../CodeGen/RISCV/rvv/unaligned-loads-stores.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 186 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 154 +- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 186 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 154 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 148 +- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 124 +- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 148 +- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 124 +- llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 186 +- llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 154 +- llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 95 +- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 79 +- llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 186 +- llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 154 +- llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 148 +- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 124 +- 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+- llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 139 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 139 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 94 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 139 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 139 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 758 ---- llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 758 ---- llvm/test/CodeGen/RISCV/rvv/vid.ll | 760 ++++ llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 882 ---- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 ---- llvm/test/CodeGen/RISCV/rvv/viota.ll | 884 ++++ llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlm-rv32.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm.ll | 96 + llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmandn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmorn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsif.ll | 298 ++ llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 2 +- 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34 +- llvm/unittests/Support/CommandLineTest.cpp | 89 +- .../Support/DynamicLibrary/DynamicLibraryTest.cpp | 42 +- llvm/unittests/Support/ErrorTest.cpp | 23 +- llvm/unittests/Support/FSUniqueIDTest.cpp | 6 +- llvm/unittests/Support/IndexedAccessorTest.cpp | 2 +- llvm/unittests/Support/JSONTest.cpp | 4 +- llvm/unittests/Support/MemoryBufferTest.cpp | 20 +- llvm/unittests/Support/Path.cpp | 3 +- llvm/unittests/Support/ProgramTest.cpp | 4 +- llvm/unittests/Support/TarWriterTest.cpp | 4 +- llvm/unittests/Support/TargetParserTest.cpp | 29 +- llvm/unittests/Support/TimerTest.cpp | 2 +- llvm/unittests/Support/UnicodeTest.cpp | 6 +- llvm/unittests/Support/VirtualFileSystemTest.cpp | 106 +- llvm/unittests/Support/YAMLIOTest.cpp | 86 +- llvm/unittests/Support/YAMLParserTest.cpp | 24 +- llvm/unittests/Support/raw_ostream_test.cpp | 3 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 1 - llvm/utils/gn/secondary/lld/Common/BUILD.gn | 1 + llvm/utils/gn/secondary/lldb/source/API/BUILD.gn | 18 +- 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mlir/lib/Dialect/Tensor/Utils/Utils.cpp create mode 100644 mlir/test/Dialect/PDL/canonicalize.mlir create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/README.md create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/data/gold_A.tns create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/data/gold_y.tns create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/data/nell-2.tns create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/data/pwtk.mtx create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/lit.local.cfg create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/test_MTTKRP.py create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/test_SpMV.py create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/test_simple_ten [...] copy mlir/test/Integration/Dialect/SparseTensor/{python => taco}/tools/lit.local.c [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pytaco.py create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (8ffb6df2aa -> 35638469cb)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/binutils-gdb. from 8ffb6df2aa PowerPC64 DT_RELR ELFv1 adds 2ddd4c6082 fbsd-nat: Add include for gdb_argv. adds 476f77a94c Respect `set print repeats' with Fortran arrays adds 6b4338c868 Add `set print repeats' tests for C/C++ arrays adds 5d4c63a635 Respect `set print array-indexes' with Fortran arrays adds 101d68a9fa Add `set print array-indexes' tests for C/C++ arrays adds dd8a5a84a7 Automatic date update in version.in adds 6d263fe46e Avoid bad breakpoints with --gc-sections adds df9d50bb22 Automatic date update in version.in adds 7bf5587873 gdbsupport/gdb_regex.cc: replace defs.h include with common-defs.h adds ec7194506d drop old unused stamp-h.in file adds b13d7831eb gdb/doc: fill in two missing @r adds e901223d53 Updated Serbian translation for the ld sub-directory adds ed09c325ec gdb: include gdbsupport/buildargv.h in ser-mingw.c adds 5b4ea8a740 Automatic date update in version.in adds cb2562f553 RISC-V: create new frag after alignment. adds a74e1cb344 Add markers for 2.38 branch adds f908e960c5 Change version number to 2.38.50 and regenerate files adds 5f7a57f131 Update release makeing script with new release numbers adds cc5e40736d Adjust default page sizes for haiku arm. adds 58de646be2 Allow inferring tmp_prefix from the dll name from a def file. adds 3dd8e5b615 bfd: replace doc header generation with pattern rules adds cb803d3749 bfd: rename core.texi to corefile.texi adds bd32be01c9 bfd: merge doc subdir up a level adds 35638469cb Automatic date update in version.in No new revisions were added by this update. Summary of changes: ChangeLog | 4 + bfd/.gitignore | 2 +- bfd/ChangeLog | 10 + bfd/Makefile.am | 22 +- bfd/Makefile.in | 513 ++- bfd/configure | 24 +- bfd/configure.ac | 3 +- bfd/doc/Makefile.am | 217 - bfd/doc/Makefile.in | 1021 ----- bfd/doc/bfd.texi | 2 +- bfd/doc/local.mk | 156 + bfd/po/bfd.pot | 112 +- bfd/stamp-h.in | 1 - bfd/version.h | 2 +- bfd/version.m4 | 2 +- binutils/BRANCHES | 1 + binutils/ChangeLog | 14 + binutils/NEWS | 2 + binutils/README-how-to-make-a-release | 35 +- binutils/configure | 38 +- binutils/dlltool.c | 34 +- binutils/po/binutils.pot | 4084 ++++++++++--------- binutils/stamp-h.in | 1 - config/ChangeLog | 4 + cpu/ChangeLog | 4 + elfcpp/ChangeLog | 4 + gas/ChangeLog | 9 + gas/NEWS | 2 + gas/config/tc-riscv.c | 6 + gas/configure | 38 +- gas/po/gas.pot | 20 +- gas/stamp-h.in | 1 - gdb/doc/python.texi | 4 +- gdb/dwarf2/read.c | 9 +- gdb/f-array-walker.h | 83 +- gdb/f-lang.c | 22 +- gdb/f-lang.h | 6 + gdb/f-valprint.c | 237 +- gdb/fbsd-nat.c | 1 + gdb/ser-mingw.c | 1 + gdb/testsuite/gdb.ada/inline-section-gc.exp | 41 + gdb/testsuite/gdb.ada/inline-section-gc/callee.adb | 23 + gdb/testsuite/gdb.ada/inline-section-gc/callee.ads | 17 + gdb/testsuite/gdb.ada/inline-section-gc/caller.adb | 21 + gdb/testsuite/gdb.base/array-indices.exp | 20 + gdb/testsuite/gdb.base/array-indices.exp.tcl | 175 + gdb/testsuite/gdb.base/array-repeat.c | 63 + gdb/testsuite/gdb.base/array-repeat.exp | 20 + gdb/testsuite/gdb.base/array-repeat.exp.tcl | 138 + gdb/testsuite/gdb.cp/array-indices.exp | 22 + gdb/testsuite/gdb.cp/array-repeat.exp | 22 + gdb/testsuite/gdb.fortran/array-indices.exp | 200 + gdb/testsuite/gdb.fortran/array-repeat.exp | 167 + gdb/testsuite/gdb.fortran/array-repeat.f90 | 50 + gdb/testsuite/gdb.fortran/array-slices-repeat.f90 | 99 + gdb/testsuite/gdb.fortran/vla-value-sub-finish.exp | 2 + gdb/testsuite/gdb.fortran/vla-value-sub.exp | 2 + gdbsupport/gdb_regex.cc | 2 +- gold/ChangeLog | 11 + gold/Makefile.in | 1 + gold/configure | 14 +- gold/po/gold.pot | 248 +- gold/testsuite/Makefile.in | 1 + gprof/ChangeLog | 10 + gprof/Makefile.in | 1 + gprof/configure | 38 +- gprof/po/gprof.pot | 4 +- gprof/stamp-h.in | 1 - include/ChangeLog | 4 + ld/ChangeLog | 19 + ld/NEWS | 2 + ld/configure | 38 +- ld/configure.tgt | 2 +- ld/emulparams/armelf_haiku.sh | 4 +- ld/po/ld.pot | 218 +- ld/po/sr.po | 4255 +++++++++++--------- ld/stamp-h.in | 1 - libctf/ChangeLog | 4 + libiberty/ChangeLog | 4 + opcodes/ChangeLog | 9 + opcodes/configure | 38 +- opcodes/po/opcodes.pot | 2 +- opcodes/stamp-h.in | 1 - 83 files changed, 7086 insertions(+), 5679 deletions(-) delete mode 100644 bfd/doc/Makefile.am delete mode 100644 bfd/doc/Makefile.in create mode 100644 bfd/doc/local.mk delete mode 100644 bfd/stamp-h.in delete mode 100644 binutils/stamp-h.in delete mode 100644 gas/stamp-h.in create mode 100644 gdb/testsuite/gdb.ada/inline-section-gc.exp create mode 100644 gdb/testsuite/gdb.ada/inline-section-gc/callee.adb create mode 100644 gdb/testsuite/gdb.ada/inline-section-gc/callee.ads create mode 100644 gdb/testsuite/gdb.ada/inline-section-gc/caller.adb create mode 100644 gdb/testsuite/gdb.base/array-indices.exp create mode 100644 gdb/testsuite/gdb.base/array-indices.exp.tcl create mode 100644 gdb/testsuite/gdb.base/array-repeat.c create mode 100644 gdb/testsuite/gdb.base/array-repeat.exp create mode 100644 gdb/testsuite/gdb.base/array-repeat.exp.tcl create mode 100644 gdb/testsuite/gdb.cp/array-indices.exp create mode 100644 gdb/testsuite/gdb.cp/array-repeat.exp create mode 100644 gdb/testsuite/gdb.fortran/array-indices.exp create mode 100644 gdb/testsuite/gdb.fortran/array-repeat.exp create mode 100644 gdb/testsuite/gdb.fortran/array-repeat.f90 create mode 100644 gdb/testsuite/gdb.fortran/array-slices-repeat.f90 delete mode 100644 gprof/stamp-h.in delete mode 100644 ld/stamp-h.in delete mode 100644 opcodes/stamp-h.in -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (ce79c1985 -> 92815265e)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards ce79c1985 4: update: binutils-llvm-linux-qemu: 40 new 92815265e 4: update: binutils-llvm-linux-qemu: 40 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ce79c1985) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1600 -> 1568 bytes 02-prepare_abe/console.log.xz | Bin 2764 -> 2768 bytes 03-build_abe-binutils/console.log.xz | Bin 30548 -> 30136 bytes 04-build_llvm/console.log.xz | Bin 60236 -> 60176 bytes 05-build_abe-qemu/console.log.xz | Bin 30300 -> 30300 bytes 06-build_linux/console.log.xz | Bin 3764 -> 3788 bytes 08-check_regression/console.log.xz | Bin 472 -> 476 bytes 09-update_baseline/console.log | 214 +++++++++++++++++------------------ jenkins/manifest.sh | 20 ++-- 9 files changed, 117 insertions(+), 117 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto updated (f953701576b -> 8adfe466f55)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto in repository toolchain/ci/gcc. from f953701576b Daily bump. adds 0351d851f79 Fortran: handle expansion of zero-sized array constructors adds 448e9a53939 Daily bump. adds 99566992720 Daily bump. adds 8adfe466f55 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/fortran/ChangeLog | 9 +++++++++ gcc/fortran/array.c | 3 +++ gcc/testsuite/ChangeLog | 9 +++++++++ gcc/testsuite/gfortran.dg/pr102520.f90 | 6 ++---- gcc/testsuite/gfortran.dg/pr103692.f90 | 23 +++++++++++++++++++++++ 6 files changed, 47 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/pr103692.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto updated (589b6fc198 -> 5f62caec81)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto in repository toolchain/ci/binutils-gdb. from 589b6fc198 Automatic date update in version.in adds 544818c087 Automatic date update in version.in adds 5f62caec81 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto updated (2e3723c53 -> 5263182a7)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/release-arm-check_bootstrap_lto in repository toolchain/ci/base-artifacts. discards 2e3723c53 0: update: binutils-gcc: 1 new 5263182a7 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2e3723c53) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check_bootstrap/rele [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1540 -> 1544 bytes 02-prepare_abe/console.log.xz | Bin 2748 -> 2748 bytes 03-build_abe-binutils/console.log.xz | Bin 60964 -> 60104 bytes 04-build_abe-bootstrap_lto/console.log.xz | Bin 456320 -> 457552 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3840 -> 3840 bytes 06-build_abe-check_bootstrap_lto/console.log.xz | Bin 2348 -> 2336 bytes 07-check_regression/console.log.xz | Bin 2736 -> 2568 bytes 07-check_regression/results.compare | 37 +- 07-check_regression/results.compare2 | 33 +- 08-update_baseline/console.log | 382 +- 08-update_baseline/results.compare | 37 +- 08-update_baseline/results.compare2 | 33 +- jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 2675788 -> 2668956 bytes sumfiles/g++.sum | 106 +- sumfiles/gcc.log.xz | Bin 2290616 -> 2308668 bytes sumfiles/gcc.sum | 4268 +++++++++++------------ sumfiles/gfortran.log.xz | Bin 855508 -> 858136 bytes sumfiles/gfortran.sum | 45 +- sumfiles/libatomic.log.xz | Bin 2284 -> 2284 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 144612 -> 144684 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2704 -> 2708 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 461936 -> 459724 bytes sumfiles/libstdc++.sum | 10 +- 27 files changed, 2456 insertions(+), 2533 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (40c843218f11 -> e783362eb54c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/linux. from 40c843218f11 Merge tag 'perf-tools-for-v5.17-2022-01-22' of git://git.k [...] adds e783362eb54c Linux 5.17-rc1 No new revisions were added by this update. Summary of changes: Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (9718bc4b03c -> 603a9ab41f4)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/gcc. from 9718bc4b03c c++: array temporary at file scope [PR104182] adds 603a9ab41f4 contrib: filter out one more Clang warning. No new revisions were added by this update. Summary of changes: contrib/filter-clang-warnings.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (27b18e929 -> 1ffc5632f)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/base-artifacts. discards 27b18e929 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 new 1ffc5632f 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (27b18e929) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_build/master-a [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1540 -> 1536 bytes 02-prepare_abe/console.log.xz | Bin 2780 -> 2760 bytes 04-build_abe-binutils/console.log.xz | Bin 29860 -> 29788 bytes 05-build_abe-stage1/console.log.xz | Bin 90036 -> 90256 bytes 06-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 07-build_abe-linux/console.log.xz | Bin 9476 -> 8508 bytes 08-build_abe-glibc/console.log.xz | Bin 231312 -> 230636 bytes 09-build_abe-stage2/console.log.xz | Bin 229472 -> 226924 bytes 10-build_abe-gdb/console.log.xz | Bin 37008 -> 36896 bytes 11-build_abe-qemu/console.log.xz | Bin 30348 -> 30132 bytes 12-check_regression/console.log.xz | Bin 416 -> 416 bytes 13-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 14 +++++++------- 13 files changed, 15 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

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