Tcwg-commits January 2022

tcwg-commits@lists.linaro.org

4 participants
16484 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 updated (2b1ca85cf8 -> 7d9d9c1078)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 in repository toolchain/ci/binutils-gdb. from 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows adds 2f279a64a2 Fix a proble building the libiberty library with gcc-12. adds fdf55097a3 bfd/doc: Fix racy build failure from missing mkdir adds 94fd627d46 bfd: Update doc/local.mk adds 823f6c5f05 Automatic date update in version.in adds 9a84a44d5d gas: drop old cygnus install hack adds 7d9d9c1078 gold: drop old cygnus install hack No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 10 + bfd/Makefile.in | 8 +- bfd/doc/local.mk | 8 +- bfd/po/fr.po | 3116 ++++++------ bfd/po/ro.po | 10194 +++++++++++++++++++++++++++++++-------- bfd/po/uk.po | 3102 ++++++------ bfd/version.h | 2 +- binutils/ChangeLog | 7 + binutils/po/bg.po | 6039 +++++++++++++---------- binutils/po/fr.po | 4192 ++++++++-------- binutils/po/ro.po | 13085 ++++++++++++++++++++++++++++++++++++++++---------- binutils/po/uk.po | 4202 ++++++++-------- gas/ChangeLog | 4 + gas/Makefile.in | 14 +- gas/doc/local.mk | 4 - gas/po/uk.po | 4880 ++++++++++--------- gdb/doc/python.texi | 6 +- gold/ChangeLog | 4 + gold/Makefile.am | 4 - gold/Makefile.in | 24 +- gold/po/uk.po | 257 +- gprof/ChangeLog | 4 + gprof/po/ro.po | 386 +- ld/ChangeLog | 5 + ld/po/bg.po | 4373 +++++++++-------- ld/po/uk.po | 3264 +++++++------ libiberty/ChangeLog | 4 + libiberty/regex.c | 4 + opcodes/ChangeLog | 5 + opcodes/po/de.po | 512 +- opcodes/po/ro.po | 2948 +++++++++--- opcodes/po/uk.po | 530 +- 32 files changed, 40232 insertions(+), 20965 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 updated (53e9f7b0a -> 63ab1aef1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 in repository toolchain/ci/base-artifacts. discards 53e9f7b0a 0: update: binutils-gcc-linux-glibc-gdb: 1 new 63ab1aef1 0: update: binutils-gcc-linux-glibc-gdb: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (53e9f7b0a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_check_gdb/mas [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1556 -> 1604 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2792 bytes 03-build_abe-binutils/console.log.xz | Bin 37680 -> 39016 bytes 04-build_abe-gcc/console.log.xz | Bin 208640 -> 206480 bytes 05-clean_sysroot/console.log.xz | Bin 312 -> 312 bytes 06-build_abe-linux/console.log.xz | Bin 9060 -> 9080 bytes 07-build_abe-glibc/console.log.xz | Bin 236592 -> 236404 bytes 08-build_abe-gdb/console.log.xz | Bin 37128 -> 37368 bytes 09-build_abe-dejagnu/console.log.xz | Bin 3828 -> 3828 bytes 10-build_abe-check_gdb/console.log.xz | Bin 2016 -> 2180 bytes 11-check_regression/console.log.xz | Bin 4116 -> 4372 bytes 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/fails.sum | 35 +- 11-check_regression/results.compare | 67 +- 11-check_regression/results.compare2 | 203 +- 11-check_regression/results.regressions | 67 +- 12-update_baseline/console.log | 856 ++++--- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/fails.sum | 35 +- 12-update_baseline/results.compare | 67 +- 12-update_baseline/results.compare2 | 203 +- 12-update_baseline/results.regressions | 67 +- jenkins/manifest.sh | 20 +- sumfiles/gdb.log.xz | Bin 1652332 -> 1665996 bytes sumfiles/gdb.sum | 4137 ++++++++++++++++--------------- 25 files changed, 2974 insertions(+), 2787 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (e89d0befe3e -> bb99171b9b0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/gcc. from e89d0befe3e Fortran: provide a fallback implementation of issignaling adds ae36f839632 preprocessor: -Wbidi-chars and UCNs [PR104030] adds b8e4e48d93f Remove duplicate code block. adds bb99171b9b0 Daily bump. No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 7 ++ gcc/ChangeLog | 145 ++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 5 + gcc/c-family/c.opt | 13 ++- gcc/cp/ChangeLog | 13 +++ gcc/doc/invoke.texi | 8 +- gcc/fortran/ChangeLog | 10 ++ gcc/pointer-query.cc | 30 ----- gcc/testsuite/ChangeLog | 97 ++++++++++++++++ gcc/testsuite/c-c++-common/Wbidi-chars-10.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-11.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-14.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-16.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-17.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-18.c | 11 ++ gcc/testsuite/c-c++-common/Wbidi-chars-19.c | 11 ++ gcc/testsuite/c-c++-common/Wbidi-chars-20.c | 11 ++ gcc/testsuite/c-c++-common/Wbidi-chars-21.c | 11 ++ gcc/testsuite/c-c++-common/Wbidi-chars-22.c | 11 ++ gcc/testsuite/c-c++-common/Wbidi-chars-23.c | 11 ++ gcc/testsuite/c-c++-common/Wbidi-chars-4.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-5.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-6.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-7.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-8.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-9.c | 2 +- gcc/testsuite/c-c++-common/Wbidi-chars-ranges.c | 2 +- libatomic/ChangeLog | 6 + libcpp/ChangeLog | 10 ++ libcpp/include/cpplib.h | 11 +- libcpp/internal.h | 3 +- libcpp/lex.cc | 16 ++- libgfortran/ChangeLog | 6 + 34 files changed, 410 insertions(+), 62 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/Wbidi-chars-18.c create mode 100644 gcc/testsuite/c-c++-common/Wbidi-chars-19.c create mode 100644 gcc/testsuite/c-c++-common/Wbidi-chars-20.c create mode 100644 gcc/testsuite/c-c++-common/Wbidi-chars-21.c create mode 100644 gcc/testsuite/c-c++-common/Wbidi-chars-22.c create mode 100644 gcc/testsuite/c-c++-common/Wbidi-chars-23.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (94fd627d46 -> 7d9d9c1078)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/binutils-gdb. from 94fd627d46 bfd: Update doc/local.mk adds 823f6c5f05 Automatic date update in version.in adds 9a84a44d5d gas: drop old cygnus install hack adds 7d9d9c1078 gold: drop old cygnus install hack No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gas/Makefile.in | 14 +++++--------- gas/doc/local.mk | 4 ---- gold/Makefile.am | 4 ---- gold/Makefile.in | 24 ++++++++++-------------- 5 files changed, 16 insertions(+), 32 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (9078513e4 -> b5d7a80c8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/base-artifacts. discards 9078513e4 0: update: binutils-gcc: 1 new b5d7a80c8 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9078513e4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-arm (b5 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1536 -> 1516 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2752 bytes 03-build_abe-binutils/console.log.xz | Bin 51852 -> 50504 bytes 04-build_abe-gcc/console.log.xz | Bin 238004 -> 236920 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3804 -> 3828 bytes 06-build_abe-check_gcc/console.log.xz | Bin 2668 -> 2400 bytes 07-check_regression/console.log.xz | Bin 2580 -> 2704 bytes 07-check_regression/results.compare | 16 +- 07-check_regression/results.compare2 | 91 +- 08-update_baseline/console.log | 371 +-- 08-update_baseline/results.compare | 16 +- 08-update_baseline/results.compare2 | 91 +- jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 2748456 -> 2776476 bytes sumfiles/g++.sum | 176 +- sumfiles/gcc.log.xz | Bin 2289636 -> 2313152 bytes sumfiles/gcc.sum | 4268 +++++++++++++++++---------------- sumfiles/gfortran.log.xz | Bin 894496 -> 889688 bytes sumfiles/gfortran.sum | 40 +- sumfiles/libatomic.log.xz | Bin 2156 -> 2172 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 187956 -> 187856 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2544 -> 2552 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 450200 -> 458028 bytes sumfiles/libstdc++.sum | 10 +- 27 files changed, 2662 insertions(+), 2455 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (2c89b5af5e -> aeb0ae95b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/qemu. from 2c89b5af5e Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds 28ca4689ae hw: timer: ibex_timer: Fixup reading w/o register adds 0df470c388 riscv: opentitan: fixup plic stride len adds dda94e5c66 hw: timer: ibex_timer: update/add reg address adds b91a0fa70c update-linux-headers: Add asm-riscv/kvm.h adds 91654e613b target/riscv: Add target/riscv/kvm.c to place the public kvm [...] adds 0a312b85cb target/riscv: Implement function kvm_arch_init_vcpu adds 937f0b4512 target/riscv: Implement kvm_arch_get_registers adds 9997cc1e19 target/riscv: Implement kvm_arch_put_registers adds ad40be2708 target/riscv: Support start kernel directly by KVM adds 2b650fbbcc target/riscv: Support setting external interrupt by KVM adds 4eb471258b target/riscv: Handle KVM_EXIT_RISCV_SBI exit adds 10f1ca27e0 target/riscv: Add host cpu type adds 27abe66f31 target/riscv: Add kvm_riscv_get/put_regs_timer adds 9ad3e016ae target/riscv: Implement virtual time adjusting with vm state [...] adds 1eb9a5da31 target/riscv: Support virtual time context synchronization adds fbf43c7dbf target/riscv: enable riscv kvm accel adds cfeeeb482a softmmu/device_tree: Silence compiler warning with --enable- [...] adds 22599b795c softmmu/device_tree: Remove redundant pointer assignment adds b4a99d4027 target/riscv: rvv-1.0: Add Zve64f extension into RISC-V adds c7a26fb2f6 target/riscv: rvv-1.0: Add Zve64f support for configuration insns adds 494104093f target/riscv: rvv-1.0: Add Zve64f support for load and store insns adds aaae69942f target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns adds 13dbc826fd target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and v [...] adds 40d78c85f6 target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns adds 193fb5c9bd target/riscv: rvv-1.0: Add Zve64f support for single-width f [...] adds 235d1161d4 target/riscv: rvv-1.0: Add Zve64f support for widening type- [...] adds 68fa38970e target/riscv: rvv-1.0: Add Zve64f support for narrowing type [...] adds bfefe406b7 target/riscv: rvv-1.0: Allow Zve64f extension to be turned on adds 32e579b8c5 target/riscv: rvv-1.0: Add Zve32f extension into RISC-V adds da61f1256f target/riscv: rvv-1.0: Add Zve32f support for configuration insns adds abe2d74032 target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns adds 8527b5db72 target/riscv: rvv-1.0: Add Zve32f support for single-width f [...] adds f4dcf51cdc target/riscv: rvv-1.0: Add Zve32f support for widening type- [...] adds 6db02328a7 target/riscv: rvv-1.0: Add Zve32f support for narrowing type [...] adds 2fc1b44dd0 target/riscv: rvv-1.0: Allow Zve32f extension to be turned on adds 8d8897accb hw/riscv: spike: Allow using binary firmware as bios adds 092dc6df92 hw/riscv: Remove macros for ELF BIOS image names adds 4211fc5532 roms/opensbi: Remove ELF images adds 79f26b3b95 target/riscv: Adjust pmpcfg access with mxl adds b655dc7cd9 target/riscv: Don't save pc when exception return adds a14db52f7f target/riscv: Sign extend link reg for jal and jalr adds 40f0c2046c target/riscv: Sign extend pc for different XLEN adds 440544e1cf target/riscv: Create xl field in env adds 8c796f1a15 target/riscv: Ignore the pc bits above XLEN adds bf9e776ec1 target/riscv: Extend pc for runtime pc write adds 1191be09a9 target/riscv: Use gdb xml according to max mxlen adds 47bdec821b target/riscv: Relax debug check for pm write adds 83b519b8a4 target/riscv: Adjust csr write mask with XLEN adds 40bfa5f695 target/riscv: Create current pm fields in env adds 0cff460de9 target/riscv: Alloc tcg global for cur_pm[mask|base] adds 4302bef9e1 target/riscv: Calculate address according to XLEN adds 4208dc7e9e target/riscv: Split pm_enabled into mask and base adds d96a271a8d target/riscv: Split out the vill from vtype adds 31961cfe50 target/riscv: Adjust vsetvl according to XLEN adds eef11ce325 target/riscv: Remove VILL field in VTYPE adds 01d09525da target/riscv: Fix check range for first fault only adds d6b9d93023 target/riscv: Adjust vector address with mask adds d8c40c24fd target/riscv: Adjust scalar reg in vector with XLEN adds 5a2ae2350e target/riscv: Set default XLEN for hypervisor adds f310df58bd target/riscv: Enable uxl field write adds f297245f6a target/riscv: Relax UXL field for debugging adds 5e9d14f2be Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 1e4d8b31be python: pin setuptools below v60.0.0 adds 57a6b4478c python: use avocado's "new" runner adds dc6877bd2e python/aqmp: fix docstring typo adds 3bc72e3aed python/aqmp: add __del__ method to legacy interface adds 3b5bf136f5 python/aqmp: handle asyncio.TimeoutError on execute() adds 0e6bfd8b96 python/aqmp: copy type definitions from qmp adds 728dcac5e3 python/aqmp: add SocketAddrT to package root adds 6e7751dc38 python/aqmp: rename AQMPError to QMPError adds 7017f3853a python/qemu-ga-client: don't use deprecated CLI syntax in us [...] adds 26db07516f python/qmp: switch qemu-ga-client to AQMP adds 8d6cdc5118 python/qmp: switch qom tools to AQMP adds f3efd12930 python/qmp: switch qmp-shell to AQMP adds 0347c4c4cf python: move qmp utilities to python/qemu/utils adds fd9c3a6219 python: move qmp-shell under the AQMP package adds 9922125615 scripts/cpu-x86-uarch-abi: fix CLI parsing adds 0665410dcf scripts/cpu-x86-uarch-abi: switch to AQMP adds 0590860242 scripts/render-block-graph: switch to AQMP adds aeb0ae95b7 Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/pyth [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/opensbi.yml | 2 - hw/char/riscv_htif.c | 33 +- hw/intc/sifive_plic.c | 20 +- hw/riscv/boot.c | 16 +- hw/riscv/opentitan.c | 2 +- hw/riscv/spike.c | 45 ++- hw/riscv/virt.c | 83 ++-- hw/timer/ibex_timer.c | 25 +- include/hw/char/riscv_htif.h | 5 +- include/hw/riscv/boot.h | 3 +- include/hw/riscv/spike.h | 1 + include/hw/timer/ibex_timer.h | 1 - linux-headers/asm-riscv/kvm.h | 128 ++++++ meson.build | 2 + pc-bios/meson.build | 2 - pc-bios/opensbi-riscv32-generic-fw_dynamic.elf | Bin 838904 -> 0 bytes pc-bios/opensbi-riscv64-generic-fw_dynamic.elf | Bin 934696 -> 0 bytes python/Makefile | 2 + python/README.rst | 2 +- python/avocado.cfg | 2 +- python/qemu/aqmp/__init__.py | 16 +- python/qemu/aqmp/error.py | 12 +- python/qemu/aqmp/events.py | 4 +- python/qemu/aqmp/legacy.py | 41 +- python/qemu/aqmp/protocol.py | 24 +- python/qemu/aqmp/qmp_client.py | 16 +- python/qemu/{qmp => aqmp}/qmp_shell.py | 31 +- python/qemu/{qmp => utils}/qemu_ga_client.py | 24 +- python/qemu/{qmp => utils}/qom.py | 5 +- python/qemu/{qmp => utils}/qom_common.py | 3 +- python/qemu/{qmp => utils}/qom_fuse.py | 11 +- python/setup.cfg | 19 +- roms/Makefile | 2 - scripts/cpu-x86-uarch-abi.py | 7 +- scripts/qmp/qemu-ga-client | 2 +- scripts/qmp/qmp-shell | 2 +- scripts/qmp/qom-fuse | 2 +- scripts/qmp/qom-get | 2 +- scripts/qmp/qom-list | 2 +- scripts/qmp/qom-set | 2 +- scripts/qmp/qom-tree | 2 +- scripts/render_block_graph.py | 8 +- softmmu/device_tree.c | 11 +- target/riscv/cpu.c | 77 +++- target/riscv/cpu.h | 58 ++- target/riscv/cpu_bits.h | 3 + target/riscv/cpu_helper.c | 99 ++--- target/riscv/csr.c | 90 ++++- target/riscv/gdbstub.c | 71 +++- target/riscv/helper.h | 4 +- target/riscv/insn_trans/trans_privileged.c.inc | 9 +- target/riscv/insn_trans/trans_rva.c.inc | 9 +- target/riscv/insn_trans/trans_rvd.c.inc | 19 +- target/riscv/insn_trans/trans_rvf.c.inc | 19 +- target/riscv/insn_trans/trans_rvi.c.inc | 39 +- target/riscv/insn_trans/trans_rvv.c.inc | 225 +++++++++-- target/{rx/cpu-param.h => riscv/kvm-stub.c} | 26 +- target/riscv/kvm.c | 535 +++++++++++++++++++++++++ target/{rx/cpu-param.h => riscv/kvm_riscv.h} | 17 +- target/riscv/machine.c | 46 ++- target/riscv/meson.build | 1 + target/riscv/op_helper.c | 7 +- target/riscv/pmp.c | 12 +- target/riscv/sbi_ecall_interface.h | 72 ++++ target/riscv/translate.c | 94 +++-- target/riscv/vector_helper.c | 39 +- 66 files changed, 1723 insertions(+), 470 deletions(-) create mode 100644 linux-headers/asm-riscv/kvm.h delete mode 100644 pc-bios/opensbi-riscv32-generic-fw_dynamic.elf delete mode 100644 pc-bios/opensbi-riscv64-generic-fw_dynamic.elf rename python/qemu/{qmp => aqmp}/qmp_shell.py (96%) rename python/qemu/{qmp => utils}/qemu_ga_client.py (94%) rename python/qemu/{qmp => utils}/qom.py (98%) rename python/qemu/{qmp => utils}/qom_common.py (98%) rename python/qemu/{qmp => utils}/qom_fuse.py (97%) copy target/{rx/cpu-param.h => riscv/kvm-stub.c} (67%) create mode 100644 target/riscv/kvm.c copy target/{rx/cpu-param.h => riscv/kvm_riscv.h} (70%) create mode 100644 target/riscv/sbi_ecall_interface.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (2c271fe77d52 -> dd81e1c7d5fb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/linux. from 2c271fe77d52 Merge tag 'gpio-fixes-for-v5.17-rc1' of git://git.kernel.o [...] adds 9dec0368b964 xfs: remove the XFS_IOC_FSSETDM definitions adds 12a8fb20f1c2 Merge tag 'xfs-5.17-merge-4' of git://git.kernel.org/pub/s [...] adds 4d1b97f9ce7c xfs: kill the XFS_IOC_{ALLOC,FREE}SP* ioctls adds d701a8ccac7a Merge tag 'xfs-5.17-merge-5' of git://git.kernel.org/pub/s [...] adds b3bb9413e717 xfs: remove the XFS_IOC_{ALLOC,FREE}SP* definitions adds 31d949782e1d Merge tag 'xfs-5.17-merge-6' of git://git.kernel.org/pub/s [...] adds a87b0fd4f900 s390/cpumf: Support for CPU Measurement Facility CSVN 7 adds 745f5d20e793 s390/cpumf: Support for CPU Measurement Sampling Facility LS bit adds 012a224e1fa3 s390/uaccess: introduce bit field for OAC specifier adds 5754f9084f26 s390: add Sven Schnelle as reviewer adds 85e67d56ebde Merge tag 's390-5.17-2' of git://git.kernel.org/pub/scm/li [...] adds 9c494ca4d3a5 x86/gpu: Reserve stolen memory for first integrated Intel GPU adds 4141a5e69458 Merge tag 'pci-v5.17-fixes-1' of git://git.kernel.org/pub/ [...] adds 49a8f2bc8d88 clk: si5341: Fix clock HW provider cleanup adds 818d9150f2b2 clk: visconti: Fix uninitialized variable in printk adds b4966a7dc072 clk: mediatek: relicense mt7986 clock driver to GPL-2.0 adds 39e77c484bcd Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pu [...] adds ef3ac0156406 drm/i915/display/ehl: Update voltage swing table adds e26602be4869 drm/i915/display/adlp: Implement new step in the TC voltag [...] adds 410482b51afe Merge tag 'drm-intel-next-fixes-2022-01-20' of git://anong [...] adds 4175c32be5ef drm/amdgpu: Enable recovery on yellow carp adds 0ffb1fd1582a drm/amdgpu: invert the logic in amdgpu_device_should_recov [...] adds e8309d50e978 drm/amdgpu: don't do resets on APUs which don't support it adds 3993a799fc97 drm/amdgpu: Fix rejecting Tahiti GPUs adds d82ce3cd30aa drm/amdgpu: drop flags check for CHIP_IP_DISCOVERY adds c4849f88164b drm/amd/display: Revert W/A for hard hangs on DCN20/DCN21 adds 520d9cd26761 drm/amdgpu: apply vcn harvest quirk adds 9a458402fb69 drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV adds 4722f463896c drm/radeon: fix error handling in radeon_driver_open_kms adds ccf34586758c Merge tag 'amd-drm-fixes-5.17-2022-01-19' of https://gitla [...] adds c2c94b3b187d Merge tag 'drm-next-2022-01-21' of git://anongit.freedeskt [...] adds f601aa793066 rtc: rs5c372: Add RTC_VL_READ, RTC_VL_CLR ioctls adds 1c1b3098ae1e rtc: pcf85063: add i2c_device_id name matching support adds a478c433d72b rtc: da9063: switch to RTC_FEATURE_UPDATE_INTERRUPT adds 029d3a6f2f3c rtc: da9063: add as wakeup source adds 10d96b44a94e dt/bindings: rtc: rx8900: Add an entry for RX8804 adds 5c0189a8b52f rtc: rv8803: Add support for the Epson RX8804 RTC adds 86559400b3ef rtc: gamecube: Add a RTC driver for the GameCube, Wii and Wii U adds 322539a014bc rtc: gamecube: Report low battery as invalid data adds 5479618e1e26 powerpc: wii.dts: Expose HW_SRNPROT on this platform adds 57bd7d356506 powerpc: gamecube_defconfig: Enable the RTC driver adds c636783d594f powerpc: wii_defconfig: Enable the RTC driver adds 454f47ff4643 rtc: cmos: take rtc_lock while reading from CMOS adds d35786b3a28d rtc: mc146818-lib: change return values of mc146818_get_time() adds 0dd8d6cb9edd rtc: Check return value from mc146818_get_time() adds ea6fa4961aab rtc: mc146818-lib: fix RTC presence check adds ec5895c0f2d8 rtc: mc146818-lib: extract mc146818_avoid_UIP adds 2a61b0ac5493 rtc: mc146818-lib: refactor mc146818_get_time adds 2c7d47a45b06 rtc: mc146818-lib: refactor mc146818_does_rtc_work adds cdedc45c579f rtc: cmos: avoid UIP when reading alarm time adds cd17420ebea5 rtc: cmos: avoid UIP when writing alarm time adds dd93849d47ce rtc: rs5c372: add offset correction support adds ed0610661434 rtc: rs5c372: fix incorrect oscillation value on r2221tl adds fad6cbe9b2b4 rtc: Add driver for RTC in Sunplus SP7021 adds 8462904204ab dt-bindings: rtc: Add Sunplus RTC json-schema adds 7b69b54aaa48 rtc: pcf2127: Fix typo in comment adds ba52eac083e1 rtc: Move variable into switch case statement adds 05020a733b02 rtc: ftrtc010: Use platform_get_irq() to get the interrupt adds 34127b3632b2 rtc: pxa: fix null pointer dereference adds a12ac1f0ffa4 dt-bindings: rtc: qcom-pm8xxx-rtc: update register numbers adds 7372971c1be5 rtc: mc146818-lib: fix signedness bug in mc146818_get_time() adds 900ed72c8a19 rtc: gamecube: Fix an IS_ERR() vs NULL check adds ff164ae39b82 rtc: cmos: Evaluate century appropriate adds 5ceee540fdc7 rtc: sunplus: fix return value in sp_rtc_probe() adds 75242f31db6c Merge tag 'rtc-5.17' of git://git.kernel.org/pub/scm/linux [...] adds 91502a9a0b0d ALSA: hda/realtek: fix speakers and micmute on HP 855 G8 adds 5762f980ca10 ALSA: usb-audio: add mapping for MSI MPG X570S Carbon Max Wifi. adds 5576c4f24c56 ALSA: core: Fix SSID quirk lookup for subvendor=0 adds 2cb52046d186 ALSA: hda: cs35l41: Avoid overwriting register patch adds 6e4320d8ecbc ALSA: hda: cs35l41: Add calls to newly added test key function adds 77dc3a6ee2eb ALSA: hda: cs35l41: Move cs35l41* calls to its own symbol [...] adds cd8abf7d04c9 ALSA: hda: cs35l41: Add missing default cases adds a025df02ce42 ALSA: hda: cs35l41: Make use of the helper function dev_er [...] adds 8c286a0f973a ALSA: hda: cs35l41: Tidyup code adds 85c25662d189 ALSA: hda: cs35l41: Make cs35l41_hda_remove() return void adds 8c0ae778e287 ALSA: core: Simplify snd_power_ref_and_wait() with the sta [...] adds 2a1355f0bf41 ALSA: hda/cs8409: Add new Warlock SKUs to patch_cs8409 adds 1f40caa08047 Merge tag 'sound-fix-5.17-rc1' of git://git.kernel.org/pub [...] adds c84b8a3fef66 io_uring: Remove unused function req_ref_put adds 791f3465c4af io_uring: fix UAF due to missing POLLFREE handling adds ea6e7ceedaf1 io-wq: remove useless 'work' argument to __io_worker_busy() adds 081b58204629 io-wq: make io_worker lock a raw spinlock adds 36e4c58bf044 io-wq: invoke work cancelation with wqe->lock held adds efdf518459b1 io-wq: perform both unstarted and started work cancelation [...] adds 361aee450c6e io-wq: add intermediate work step between pending list and [...] adds ccbf726171b7 io_uring: perform poll removal even if async work removal [...] adds 73031f761cb7 io-wq: delete dead lock shuffling code adds f3a78227eef2 Merge tag 'io_uring-5.17-2022-01-21' of git://git.kernel.d [...] adds 180dccb0dba4 blk-mq: fix tag_get wait task can't be awakened adds 413ec8057bc3 loop: remove redundant initialization of pointer node adds a6431e351c6e aoe: remove redundant assignment on variable n adds 00358933f66c brd: remove brd_devices_mutex mutex adds e6a2e5116e07 block: Remove unnecessary variable assignment adds 850fd2abbe02 block: cleanup q->srcu adds fd9f4e62a39f block: assign bi_bdev for cloned bios in blk_rq_prep_clone adds 3ee859e384d4 block: Fix wrong offset in bio_truncate() adds 46cdc45acb08 block: fix async_depth sysfs interface for mq-deadline adds 3c7c25038b6c Merge tag 'block-5.17-2022-01-21' of git://git.kernel.dk/l [...] adds f3193ea1b677 HID: Ignore battery for Elan touchscreen on HP Envy X360 1 [...] adds 3fe6acd4dc92 HID: vivaldi: fix handling devices not using numbered reports adds e24aeff6db73 HID: vivaldi: Minor cleanups adds 4ea5763fb79e HID: uhid: Fix worker destroying device without any protection adds c8e7ff41f819 HID: uhid: Use READ_ONCE()/WRITE_ONCE() for ->running adds 546e41ac994c HID: wacom: Reset expected and received contact counts at [...] adds df03e9bd6d48 HID: wacom: Ignore the confidence flag when a touch is removed adds 20f3cf5f860f HID: wacom: Avoid using stale array indicies to read conta [...] adds 9b57f4589857 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/l [...] adds 6b0764598dc7 docs: staging/tee.rst: fix two typos found while reading adds cc2cf6796a90 docs: ftrace: fix ambiguous sentence adds b0ac702f3329 Documentation: fix firewire.rst ABI file path error adds 0854dc81e108 Merge tag 'docs-5.17-2' of git://git.lwn.net/linux adds 440323b6cf5b asm-generic: Add missing brackets for io_stop_wc macro adds 3364c6ce23c6 arm64: atomics: lse: Dereference matching size adds bb425a759847 arm64: mm: apply __ro_after_init to memory_limit adds b21bae9af1da Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/li [...] adds 902d6364aad5 riscv: mm: init: remove unnecessary "#ifdef CONFIG_CRASH_DUMP" adds 07aabe8fb6d1 riscv: mm: init: try best to use IS_ENABLED(CONFIG_64BIT) [...] adds 3274a6ef3b1b riscv: mm: init: remove _pt_ops and use pt_ops directly adds fe036db7d8a9 riscv: mm: init: try IS_ENABLED(CONFIG_XIP_KERNEL) instead [...] adds 805a3ebed59f riscv: mm: init: try best to remove #ifdef CONFIG_XIP_KERN [...] adds fc839c6d33c8 riscv: bpf: Fix eBPF's exception tables adds db1503d355a7 riscv: Get rid of MAXPHYSMEM configs adds f7ae02333d13 riscv: Move KASAN mapping next to the kernel mapping adds 2efad17e5794 riscv: Split early kasan mapping to prepare sv48 introduction adds 840125a97abc riscv: Introduce functions to switch pt_ops adds 3270bfdb9e4a riscv: Allow to dynamically define VA_BITS adds 60639f74c2f4 asm-generic: Prepare for riscv use of pud_alloc_one and pud_free adds e8a62cc26ddf riscv: Implement sv48 support adds 73c7c8f68e72 riscv: Use pgtable_l4_enabled to output mmu_type in cpuinfo adds c774de22c430 riscv: Explicit comment about user virtual address space size adds 0c34e79e52bb RISC-V: Introduce sv48 support without relocatable kernel adds 20aa49541a2e riscv: fix boolconv.cocci warnings adds 3938d5a2f936 riscv: default to CONFIG_RISCV_SBI_V01=n adds 9a2451f18663 RISC-V: Avoid using per cpu array for ordered booting adds 410bb20a698d RISC-V: Do not print the SBI version during HSM extension [...] adds c78f94f35cf6 RISC-V: Use __cpu_up_stack/task_pointer only for spinwait method adds 0b39eb38f859 RISC-V: Move the entire hart selection via lottery to SMP adds 2ffc48fc7071 RISC-V: Move spinwait booting method to its own config adds 26fb751ca378 RISC-V: Do not use cpumask data structure for hartid bitmap adds 3c2905ea7924 riscv: canaan: remove useless select of non-existing confi [...] adds db3f02df1853 riscv: dts: sifive unmatched: Add gpio poweroff adds 8da46c0f98a1 RISC-V: Remove redundant err variable adds c59cd507fb64 RISC-V: nommu_virt: Drop unused SLAB_MERGE_DEFAULT adds 7867e402787a Merge tag 'riscv-for-linus-5.17-mw1' of git://git.kernel.o [...] adds 180d0eb290a5 parisc: Add visible flag to toc_stack variable adds bd25c378527f parisc: Use safer strscpy() in setup_cmdline() adds 5f7ee6e37a3c parisc: Autodetect default output device and set console= [...] adds 30f308999426 parisc: Fix missing prototype for 'toc_intr' warning in toc.c adds d24846a4246b parisc: pdc_stable: Fix memory leak in pdcs_register_pathentries adds dc5341f41dc8 Merge tag 'for-5.17/parisc-2' of git://git.kernel.org/pub/ [...] adds a21864486f7e KVM: x86/pmu: Fix available_event_types check for REF_CPU_ [...] adds ee3a5f9e3d9b KVM: x86: Do runtime CPUID update before updating vcpu->ar [...] adds c6617c61e8fe KVM: x86: Partially allow KVM_SET_CPUID{,2} after KVM_RUN adds 9e6d484f9991 KVM: selftests: Rename 'get_cpuid_test' to 'cpuid_test' adds ecebb966acaa KVM: selftests: Test KVM_SET_CPUID2 after KVM_RUN adds 4732f2444acd KVM: x86: Making the module parameter of vPMU more common adds 7c8a4742c4ab KVM: x86/mmu: Fix write-protection of PTs mapped by the TDP MMU adds f082d86ea685 KVM: x86/mmu: Clear MMU-writable during changed_pte notifier adds 5f16bcac6e28 KVM: x86/mmu: Document and enforce MMU-writable and Host-w [...] adds 6ff94f27fd47 KVM: x86/mmu: Improve TLB flush comment in kvm_mmu_slot_re [...] adds e9737468829c KVM: x86/cpuid: Clear XFD for component i if the base feat [...] adds 1a1d1dbce6d5 kvm: selftests: conditionally build vm_xsave_req_perm() adds 7ff775aca48a KVM: x86/pmu: Use binary search to check filtered events adds b33b9c407861 selftests: kvm/x86: Parameterize the CPUID vendor string check adds 21066101f42c selftests: kvm/x86: Introduce is_amd_cpu() adds 398f9240f90f selftests: kvm/x86: Export x86_family() for use outside of [...] adds 2ba9047424fc selftests: kvm/x86: Introduce x86_model() adds bef9a701f3eb selftests: kvm/x86: Add test for KVM_SET_PMU_EVENT_FILTER adds fc4fad79fc3d KVM: VMX: Reject KVM_RUN if emulation is required with pen [...] adds e337f7e06364 KVM: selftests: Add a test to force emulation with a pendi [...] adds e09fccb5435d KVM: avoid warning on s390 in mark_page_dirty adds 5f02ef741a78 KVM: VMX: switch blocked_vcpu_on_cpu_lock to raw spinlock adds 4f5a884fc212 Merge branch 'kvm-pi-raw-spinlock' into HEAD adds d76fb40637fc KVM: VMX: Handle PI descriptor updates during vcpu_put/load adds e6eec09b7bc7 KVM: Drop unused kvm_vcpu.pre_pcpu field adds 12a8eee5686e KVM: Move x86 VMX's posted interrupt list_head to vcpu_vmx adds 98c25ead5eda KVM: VMX: Move preemption timer <=> hrtimer dance to common x86 adds b6d42baddf85 KVM: x86: Unexport LAPIC's switch_to_{hv,sw}_timer() helpers adds c3e8abf0f353 KVM: x86: Remove defunct pre_block/post_block kvm_x86_ops hooks adds 31f251d4ddfa KVM: SVM: Signal AVIC doorbell iff vCPU is in guest mode adds 202470d536b2 KVM: SVM: Don't bother checking for "running" AVIC when ki [...] adds e422b8896948 KVM: SVM: Remove unnecessary APICv/AVIC update in vCPU unb [...] adds af52f5aa5c1b KVM: SVM: Use kvm_vcpu_is_blocking() in AVIC load to handl [...] adds 782f64558de7 KVM: SVM: Skip AVIC and IRTE updates when loading blocking vCPU adds 0f65a9d33767 KVM: VMX: Don't do full kick when triggering posted interr [...] adds 296aa26644d0 KVM: VMX: Pass desired vector instead of bool for triggeri [...] adds ccf8d687542f KVM: VMX: Fold fallback path into triggering posted IRQ helper adds 635e6357f948 KVM: VMX: Don't do full kick when handling posted interrup [...] adds 935a7333958e KVM: SVM: Drop AVIC's intermediate avic_set_running() helper adds 54744e17f031 KVM: SVM: Move svm_hardware_setup() and its helpers below [...] adds a3c19d5beaad KVM: SVM: Nullify vcpu_(un)blocking() hooks if AVIC is disabled adds d5ad5b1c04c8 selftests: kvm: add amx_test to .gitignore adds fa68118144c6 kvm: selftests: sync uapi/linux/kvm.h with Linux header adds 96c852c8bf52 kvm: selftests: Do not indent with spaces adds a0f4ba7f51ea selftests: kvm/x86: Fix the warning in pmu_event_filter_test.c adds 83a34ad84893 selftests: kvm/x86: Fix the warning in lib/x86_64/processor.c adds e2e83a73d7ce docs: kvm: fix WARNINGs from api.rst adds 636b5284d8fa Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt [...] adds 2ba144e68edb dt-bindings: power: reset: gpio-restart: Correct default priority adds 38a9840e2e39 dt-bindings: vendor-prefixes: add 8devices adds 8316cbbafd8b dt-bindings: vendor-prefixes: add F(x)tec adds ca146834d6cd dt-bindings: vendor-prefixes: add Huawei adds 6f2dfed0b6f0 dt-bindings: vendor-prefixes: add Thundercomm adds 364da22cb30e dt-bindings: vendor-prefixes: add Wingtech adds 154e5f296e2a dt-bindings: trivial-devices: fix swapped comments adds af35a8b5bab7 dt-bindings: trivial-devices: fix double spaces in comments adds d8adf5b92a9d scripts/dtc: dtx_diff: remove broken example from help text adds c476d430bfc0 dt-bindings: display: Add SPI peripheral schema to SPI bas [...] adds 59449e5dc87e dt-bindings: mmc: arm,pl18x: Make each example a separate entry adds d9dfab097d90 dt-bindings: rtc: st,stm32-rtc: Make each example a separa [...] adds 58dfff3e984d dt-bindings: Drop unnecessary pinctrl properties adds 986536b952fd dt-bindings: Fix array schemas encoded as matrices adds 25e20b505e0e dt-bindings: mfd: cirrus,madera: Fix 'interrupts' in example adds 66a8f7f04979 of: base: make small of_parse_phandle() variants static inline adds 2ca42c3ad9ed of: property: define of_property_read_u{8,16,32,64}_array( [...] adds 9b22c17a3cc5 of: Check 'of_node_reused' flag on of_match_device() adds 5e547d60dae7 dt-bindings: display: bridge: drop Enric Balletbo i Serra [...] adds 18a86e5907f7 dt-bindings: google,cros-ec: drop Enric Balletbo i Serra f [...] adds 0809edbae347 Merge tag 'devicetree-fixes-for-5.17-1' of git://git.kerne [...] adds 5f51c7ce1dc3 ACPI: CPPC: Fix up I/O port access in cpc_read() adds f684b1075128 ACPI: CPPC: Drop redundant local variable from cpc_read() adds a510c78e5b6f ACPI: DPTF: Support Raptor Lake adds f6f02040e0ca Merge branches 'acpi-cppc' and 'acpi-dptf' adds 71f1b916d5ea Merge tag 'acpi-5.17-rc1-3' of git://git.kernel.org/pub/sc [...] adds a95be874d26b thermal: int340x: Support Raptor Lake adds e5b54867f47f thermal: int340x: Add Raptor Lake PCI device id adds 6bdfb259d6d6 Merge tag 'thermal-5.17-rc1-2' of git://git.kernel.org/pub [...] adds b875b39e7373 ata: pata_octeon_cf: fix call to trace_ata_bmdma_stop() adds b087788c20aa Merge tag 'ata-5.17-rc1-part2' of git://git.kernel.org/pub [...] adds aa7069d840da scsi: qedf: Fix potential dereference of NULL pointer adds 4d516e495235 scsi: aacraid: Fix spelling of "its" adds 81d3f500ee98 scsi: core: Fix scsi_mode_select() interface adds 9211faa39a03 scsi: mpt3sas: Update persistent trigger pages from sysfs [...] adds 5867b8569e64 scsi: mpi3mr: Fix some spelling mistakes adds 3bb3c24e268a scsi: mpi3mr: Fix formatting problems in some kernel-doc comments adds ee05cb71f9f7 scsi: pm80xx: Port reset timeout error handling correction adds c3b48443ba7c scsi: aic79xx: Remove redundant error variable adds 5d9224fb076e scsi: hisi_sas: Remove unused variable and check in hisi_s [...] adds 315d049ad195 scsi: megaraid: Avoid mismatched storage type sizes adds b114dda6f2f1 scsi: message: fusion: Remove usage of the deprecated "pci [...] adds 2d50607260a6 scsi: message: fusion: Use dma_alloc_coherent() in mpt_all [...] adds 5c5e6b6f61e0 scsi: message: fusion: mptbase: Use dma_alloc_coherent() adds 7a960b3a5e37 scsi: message: fusion: Use dma_alloc_coherent() in mptsas_ [...] adds 76a334d756c5 scsi: message: fusion: mptsas: Use dma_alloc_coherent() adds 706dc3b91989 scsi: message: fusion: mptctl: Use dma_alloc_coherent() adds 1aa7d9799e85 scsi: efct: Remove useless DMA-32 fallback configuration adds 9008661e1960 scsi: ufs: Modify Tactive time setting conditions adds 3ba880a12df5 scsi: ufs: ufs-mediatek: Fix error checking in ufs_mtk_ini [...] adds 2576e153cd98 scsi: nsp_cs: Check of ioremap return value adds 369af20a2c3f Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linu [...] adds 6840f9094f2b pagevec: Initialise folio_batch->percpu_pvec_drained adds 3fe7fa5843d2 mm: Add folio_put_refs() adds 3abb28e275bf filemap: Use folio_put_refs() in filemap_free_folio() adds b68b10b62660 Merge tag 'folio-5.17a' of git://git.infradead.org/users/w [...] adds 80a00ab8344f fscache: Fix the volume collision wait condition adds 5638b067d370 cachefiles: Calculate the blockshift in terms of bytes, not pages adds c7ca73155762 cachefiles: set default tag name if it's unspecified adds 8c39b8bc82aa cachefiles: Make some tracepoint adjustments adds b64a3314989d cachefiles: Trace active-mark failure adds 14b9d0902dfa cachefiles: Explain checks in a comment adds 6633213139d8 cachefiles: Check that the backing filesystem supports tmpfiles adds c522e3ad296b fscache: Add a comment explaining how page-release optimis [...] adds cef022319145 netfs: Make ops->init_rreq() optional adds 7fd350f6ff84 Merge tag 'fscache-fixes-20220121' of git://git.kernel.org [...] adds a8e422af6961 xfs: remove unused xfs_ioctl32.h declarations adds 6191cf3ad59f xfs: flush inodegc workqueue tasks before cancel adds 1cb69c8044fd Merge tag 'xfs-5.17-merge-7' of git://git.kernel.org/pub/s [...] adds e3548aaf41a2 cifs: free ntlmsspblob allocated in negotiate adds 74ce6135ae6e cifs: clean up an inconsistent indenting adds 7eacba3b00a3 cifs: alloc_path_with_tree_prefix: do not append sep. if t [...] adds a2809d0e1696 cifs: quirk for STATUS_OBJECT_NAME_INVALID returned for no [...] adds 5455b9ecaf23 cifs: serialize all mount attempts adds e4e2787bef7e smb3: add new defines from protocol specification adds 3663c9045f51 cifs: check reconnects for channels of active tcons too adds a05885ce13bd cifs: fix the connection state transitions with multichannel adds 88b024f556fc cifs: protect all accesses to chan_* with chan_lock adds 8a409cda978e cifs: remove unused variable ses_selected adds e154cb7b0ab9 cifs: fix the cifs_reconnect path for DFS adds ece076764174 cifs: remove repeated state change in dfs tree connect adds c1604da708d3 cifs: make status checks in version independent callers adds 47de760655f3 cifs: update tcpStatus during negotiate and sess setup adds ba978e83255a cifs: cifs_ses_mark_for_reconnect should also update recon [...] adds 70431bfd825d cifs: Support fscache indexing rewrite adds 52d005337b2c smb3: send NTLMSSP version information adds 51620150ca2d cifs: update internal module number adds 8205ae327e39 Merge tag '5.17-rc-part2-smb3-fixes' of git://git.samba.or [...] adds ffa65753c431 mm/migrate.c: rework migration_entry_wait() to not take a pageref adds 3ddd9a808cee sysctl: add a new register_sysctl_init() interface adds 78e36f3b0dae sysctl: move some boundary constants from sysctl.c to sysctl_vals adds bbe7a10ed83a hung_task: move hung_task sysctl interface to hung_task.c adds dd0693fdf054 watchdog: move watchdog sysctl interface to watchdog.c adds f628867da46f sysctl: make ngroups_max const adds d73840ec2f74 sysctl: use const for typically used max/min proc sysctls adds 2452dcb9f7f2 sysctl: use SYSCTL_ZERO to replace some static int zero uses adds 86b12b6c5d6b aio: move aio sysctl to aio.c adds 49a4de75719b dnotify: move dnotify sysctl to dnotify.c adds c8dd55410ba0 hpet: simplify subdirectory registration with register_sysctl() adds e5a1fd997cc2 i915: simplify subdirectory registration with register_sysctl() adds e99f5e747911 macintosh/mac_hid.c: simplify subdirectory registration wi [...] adds c42ff46f97c1 ocfs2: simplify subdirectory registration with register_sysctl() adds 04bc883c986d test_sysctl: simplify subdirectory registration with regis [...] adds 7b9ad122b52c inotify: simplify subdirectory registration with register_ [...] adds ad8f74315b33 cdrom: simplify subdirectory registration with register_sysctl() adds a8f5de894f76 eventpoll: simplify sysctl declaration with register_sysctl() adds 6aad36d421d8 firmware_loader: move firmware sysctl to its own files adds 5475e8f03c80 random: move the random sysctl declarations to its own file adds ee9efac48a08 sysctl: add helper to register a sysctl mount point adds 3ba442d5331f fs: move binfmt_misc sysctl to its own file adds faaa357a55e0 printk: move printk sysctl to printk/sysctl.c adds 26d1c80fd61e scsi/sg: move sg-big-buff sysctl to scsi/sg.c adds 0df8bdd5e3b3 stackleak: move stack_erasing sysctl to stackleak.c adds b1f2aff888af sysctl: share unsigned long const values adds 1d67fe585049 fs: move inode sysctls to its own file adds 204d5a24e155 fs: move fs stat sysctls to file_table.c adds c8c0c239d5ab fs: move dcache sysctls to its own file adds 54771613e8a7 sysctl: move maxolduid as a sysctl specific const adds d1d8ac9edf10 fs: move shared sysctls to fs/sysctls.c adds dd81faa88340 fs: move locking sysctls where they are used adds 9c011be13297 fs: move namei sysctls to its own file adds 66ad398634c2 fs: move fs/exec.c sysctls into its own file adds 1998f19324d2 fs: move pipe sysctls to is own file adds 51cb8dfc5a5c sysctl: add and use base directory declarer and registrati [...] adds ab171b952c6e fs: move namespace sysctls and declare fs base directory adds d8c0418aac78 kernel/sysctl.c: rename sysctl_init() to sysctl_init_bases() adds fdcd4073fccc printk: fix build warning when CONFIG_PRINTK=n adds f0bc21b268c1 fs/coredump: move coredump sysctls into its own file adds a737a3c6744b kprobe: move sysctl_kprobes_optimization to kprobes.c adds e565a8ed1ee4 kernel/sysctl.c: remove unused variable ten_thousand adds 1622ed7d0743 sysctl: returns -EINVAL when a negative value is passed to [...] adds 67f1c9cd0c56 zsmalloc: introduce some helper functions adds 3828a7647079 zsmalloc: rename zs_stat_type to class_stat_type adds 0a5f079b8107 zsmalloc: decouple class actions from zspage works adds 3ae92ac23bd8 zsmalloc: introduce obj_allocated adds a41ec880aa7b zsmalloc: move huge compressed obj from page to zspage adds c4549b871102 zsmalloc: remove zspage isolation for migration adds 4a57d6bbaecd locking/rwlocks: introduce write_lock_nested adds b475d42d2c43 zsmalloc: replace per zpage lock with pool->migrate_lock adds a37265995c86 zsmalloc: replace get_cpu_var with local_lock adds 6dfbbae14a7b fs: proc: store PDE()->data into inode->i_private adds 359745d78351 proc: remove PDE_DATA() completely adds 2dba5eb1c73b lib/stackdepot: allow optional init and stack_table alloca [...] adds e94006608949 lib/stackdepot: always do filter_irq_stacks() in stack_dep [...] adds 0a4ee518185e mm: remove cleancache adds 3d6035f13600 frontswap: remove frontswap_writethrough adds 71024cb4a0bf frontswap: remove frontswap_tmem_exclusive_gets adds 0b364446d734 frontswap: remove frontswap_shrink adds 3e8e1af63d7a frontswap: remove frontswap_curr_pages adds 1cf53c894d15 frontswap: simplify frontswap_init adds 360be5daa33f frontswap: remove the frontswap exports adds 10a9c496789f mm: simplify try_to_unuse adds bd9cd521496b frontswap: remove frontswap_test adds f328c1d16e4c frontswap: simplify frontswap_register_ops adds 633423a09cb5 mm: mark swap_lock and swap_active_head static adds 1da0d94a3ec8 frontswap: remove support for multiple ops adds 6e61dde82e8b mm: hide the FRONTSWAP Kconfig symbol adds 1c52283265a4 Merge branch 'akpm' (patches from Andrew) adds b7ec62d7ee0f bitops: protect find_first_{,zero}_bit properly adds 6b8ecb84f8f6 bitops: move find_bit_*_le functions from le.h to find.h adds 47d8c15615c0 include: move find.h from asm_generic to linux adds c126a53c2760 arch: remove GENERIC_FIND_FIRST_BIT entirely adds f68edc9297bf lib: add find_first_and_bit() adds 93ba139ba819 cpumask: use find_first_and_bit() adds b5c7e7ec7d34 all: replace find_next{,_zero}_bit with find_first{,_zero} [...] adds 4ade0818cf04 tools: sync tools/bitmap with mother linux adds 9b51d9d86648 cpumask: replace cpumask_next_* with cpumask_first_* where [...] adds bc9d6635c293 include/linux: move for_each_bit() macros from bitops.h to find.h adds 7516be9931b8 find: micro-optimize for_each_{set,clear}_bit() adds 749443de8dde Replace for_each_*_bit_from() with for_each_*_bit() where [...] adds 801a57365fc8 mm/percpu: micro-optimize pcpu_is_populated() adds ec288a2cf7ca bitmap: unify find_bit operations adds db7313005e9c lib: bitmap: add performance test for bitmap_print_to_pagebuf adds 15325b4f768f vsprintf: rework bitmap_list_string adds 3689f9f8b0c5 Merge tag 'bitmap-5.17-rc1' of git://github.com/norov/linux adds 10756dc5b02b usr/include/Makefile: add linux/nfc.h to the compile-test [...] adds e92e2634ef3a Revert "Makefile: Do not quote value for CONFIG_CC_IMPLICI [...] adds ad29a2fb3c20 certs: Fix build error when CONFIG_MODULE_SIG_KEY is PKCS#11 URI adds e6340b6526ee certs: Fix build error when CONFIG_MODULE_SIG_KEY is empty adds 473aec0e1f84 Merge tag 'kbuild-fixes-v5.17' of git://git.kernel.org/pub [...] adds 6b9b6413700e ftrace: Fix assuming build time sort works for s390 adds 67bfce0e0192 Merge tag 'trace-v5.17-3' of git://git.kernel.org/pub/scm/ [...] adds 4624f199327a perf probe: Fix ppc64 'perf probe add events failed' case adds 1855b796f2f6 perf affinity: Allow passing a NULL arg to affinity__cleanup() adds 49de179577e7 perf stat: No need to setup affinities when starting a workload adds f350ee95498a perf evlist: No need to setup affinities when enabling eve [...] adds 0d3d237651fd perf evlist: No need to setup affinities when disabling ev [...] adds 9d5f0c36438e perf machine: Use path__join() to compose a path instead o [...] adds 8326c79d10be tools headers UAPI: Sync x86 arch prctl headers with the k [...] adds 6e10e21915c1 tools headers UAPI: Sync files changed by new set_mempolic [...] adds 9edcde68d653 perf script: Fix printing 'phys_addr' failure issue adds 1d1d9af254ff perf python: Fix cpu_map__item() building adds 440286993960 perf cpumap: Migrate to libperf cpumap api adds 24ead7c254b4 perf cpumap: Remove duplicate include in cpumap.h adds 3606c0e1a105 perf evsel: Override attr->sample_period for non-libpfm4 events adds 864bc8c90526 perf parse-events: Support event alias in form foo-bar-baz adds 34fa67e72085 perf test: Add pmu-events test for aliases with hyphens adds b4a7276c5e9a perf test: Add parse-events test for aliases with hyphens adds f0ac5b85810a perf tools: Remove redundant err variable adds 40c843218f11 Merge tag 'perf-tools-for-v5.17-2022-01-22' of git://git.k [...] adds e783362eb54c Linux 5.17-rc1 adds 09f5e7dc7ad7 perf: Fix perf_event_read_local() time adds 7fa981cad216 perf/x86/intel: Add a quirk for the calculation of the num [...] adds 96fd2e89fba1 perf/x86/intel/uncore: Fix CAS_COUNT_WRITE issue for ICX adds 0036fb00a756 perf/x86/rapl: fix AMD event handling adds 1ac7fd8159a8 perf/x86/intel/lbr: Support LBR format V7 adds 6b19788ddc59 perf/x86/intel/lbr: Add static_branch for LBR INFO flags adds 5a4487f9ef5e perf/x86/intel/uncore: Add IMC uncore support for ADL adds 8c16dc047b5d x86/perf: Avoid warning for Arch LBR without XSAVE adds 0f9e04221227 Merge tag 'perf_urgent_for_v5.17_rc2' of git://git.kernel. [...] adds a06247c6804f psi: Fix uaf issue when psi trigger is destroyed while bei [...] adds 98b0d890220d sched/pelt: Relax the sync of util_sum with util_avg adds 7ceb77103001 sched/pelt: Continue to relax the sync of util_sum with util_avg adds 95246d1ec80b sched/pelt: Relax the sync of runnable_sum with runnable_avg adds 2d02fa8cc21a sched/pelt: Relax the sync of load_sum with load_avg adds b171501f2580 sched/core: Accounting forceidle time for all tasks except [...] adds a315da5e686b sched/fair: Fix all kernel-doc warnings adds 7e406d1ff39b sched: Avoid double preemption in __cond_resched_*lock*() adds 0e3872499de1 kernel/sched: Remove dl_boosted flag comment adds 10c64a0f2806 Merge tag 'sched_urgent_for_v5.17_rc2' of git://git.kernel [...] adds a0af3d1104f7 PCI/MSI: Prevent UAF in error path adds ac5a9bb6b4fa Merge tag 'irq_urgent_for_v5.17_rc2' of git://git.kernel.o [...] adds b992f01e6615 bpf: Guard against accessing NULL pt_regs in bpf_get_task_stack() adds fab07611fb2e powerpc32/bpf: Fix codegen for bpf-to-bpf calls adds f9320c49993c powerpc/bpf: Update ldimm64 instructions during extra pass adds 88a71086c48a tools/bpf: Rename 'struct event' to avoid naming conflict adds 3f5f766d5f7f powerpc64/bpf: Limit 'ldbrx' to processors compliant with [...] adds 252745240ba0 powerpc/audit: Fix syscall_get_arch() adds 87b9d74fb0be powerpc/time: Fix build failure due to do_hard_irq_enable( [...] adds d37823c3528e powerpc/32s: Fix kasan_init_region() for KASAN adds 429a64f6e91f powerpc/perf: Only define power_pmu_wants_prompt_pmi() for [...] adds aee101d7b95a powerpc/64s: Mask SRR0 before checking against the masked NIP adds dd81e1c7d5fb Merge tag 'powerpc-5.17-2' of git://git.kernel.org/pub/scm [...] No new revisions were added by this update. Summary of changes: Documentation/accounting/psi.rst | 3 +- .../bindings/display/bridge/analogix,anx7814.yaml | 4 +- .../display/bridge/google,cros-ec-anx7688.yaml | 1 - .../devicetree/bindings/display/bridge/ps8640.yaml | 1 - .../bindings/display/panel/abt,y030xx067a.yaml | 5 +- .../bindings/display/panel/ilitek,ili9322.yaml | 4 +- .../bindings/display/panel/innolux,ej030na.yaml | 5 +- .../display/panel/kingdisplay,kd035g6-54nt.yaml | 5 +- .../bindings/display/panel/lgphilips,lb035q02.yaml | 5 +- .../bindings/display/panel/samsung,ld9040.yaml | 7 +- .../bindings/display/panel/samsung,s6e63m0.yaml | 1 + .../bindings/display/panel/sitronix,st7789v.yaml | 5 +- .../bindings/display/panel/sony,acx565akm.yaml | 5 +- .../devicetree/bindings/display/panel/tpo,td.yaml | 5 +- .../display/rockchip/rockchip,rk3066-hdmi.yaml | 8 - .../bindings/extcon/extcon-usbc-cros-ec.yaml | 1 - .../bindings/i2c/google,cros-ec-i2c-tunnel.yaml | 1 - .../proximity/google,cros-ec-mkbp-proximity.yaml | 1 - .../bindings/input/google,cros-ec-keyb.yaml | 1 - .../devicetree/bindings/input/gpio-keys.yaml | 6 - .../bindings/media/nxp,imx7-mipi-csi2.yaml | 12 +- .../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 12 +- .../devicetree/bindings/mfd/cirrus,madera.yaml | 3 +- .../devicetree/bindings/mfd/google,cros-ec.yaml | 1 - .../devicetree/bindings/mmc/arm,pl18x.yaml | 6 +- .../devicetree/bindings/net/can/bosch,m_can.yaml | 52 +- .../bindings/net/ethernet-controller.yaml | 59 +- Documentation/devicetree/bindings/nvmem/nvmem.yaml | 17 +- .../bindings/pinctrl/cirrus,lochnagar.yaml | 9 - .../devicetree/bindings/pinctrl/cirrus,madera.yaml | 10 - .../bindings/power/reset/gpio-restart.yaml | 4 +- .../devicetree/bindings/rtc/epson,rx8900.yaml | 1 + .../devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml | 9 +- .../devicetree/bindings/rtc/st,stm32-rtc.yaml | 1 + .../bindings/rtc/sunplus,sp7021-rtc.yaml | 56 ++ .../devicetree/bindings/sound/samsung-i2s.yaml | 6 - .../devicetree/bindings/trivial-devices.yaml | 8 +- .../devicetree/bindings/vendor-prefixes.yaml | 10 + Documentation/driver-api/firewire.rst | 4 +- Documentation/riscv/vm-layout.rst | 12 +- Documentation/staging/tee.rst | 4 +- Documentation/trace/ftrace.rst | 2 +- Documentation/virt/kvm/api.rst | 6 +- Documentation/vm/cleancache.rst | 296 --------- Documentation/vm/frontswap.rst | 31 +- Documentation/vm/index.rst | 1 - MAINTAINERS | 19 +- Makefile | 6 +- arch/alpha/include/asm/bitops.h | 2 - arch/alpha/kernel/rtc.c | 7 +- arch/alpha/kernel/srm_env.c | 4 +- arch/arc/Kconfig | 1 - arch/arc/include/asm/bitops.h | 1 - arch/arm/configs/bcm2835_defconfig | 1 - arch/arm/configs/qcom_defconfig | 1 - arch/arm/include/asm/bitops.h | 1 - arch/arm/kernel/atags_proc.c | 2 +- arch/arm/mm/alignment.c | 2 +- arch/arm64/Kconfig | 1 - arch/arm64/include/asm/atomic_lse.h | 2 +- arch/arm64/include/asm/bitops.h | 1 - arch/arm64/include/asm/cmpxchg.h | 2 +- arch/arm64/mm/init.c | 2 +- arch/csky/include/asm/bitops.h | 1 - arch/h8300/include/asm/bitops.h | 1 - arch/hexagon/include/asm/bitops.h | 1 - arch/ia64/include/asm/bitops.h | 2 - arch/ia64/kernel/salinfo.c | 10 +- arch/m68k/configs/amiga_defconfig | 1 - arch/m68k/configs/apollo_defconfig | 1 - arch/m68k/configs/atari_defconfig | 1 - arch/m68k/configs/bvme6000_defconfig | 1 - arch/m68k/configs/hp300_defconfig | 1 - arch/m68k/configs/mac_defconfig | 1 - arch/m68k/configs/multi_defconfig | 1 - arch/m68k/configs/mvme147_defconfig | 1 - arch/m68k/configs/mvme16x_defconfig | 1 - arch/m68k/configs/q40_defconfig | 1 - arch/m68k/configs/sun3_defconfig | 1 - arch/m68k/configs/sun3x_defconfig | 1 - arch/m68k/include/asm/bitops.h | 2 - arch/mips/Kconfig | 1 - arch/mips/include/asm/bitops.h | 1 - arch/openrisc/include/asm/bitops.h | 1 - arch/parisc/include/asm/bitops.h | 1 - arch/parisc/include/asm/processor.h | 1 + arch/parisc/kernel/setup.c | 15 +- arch/parisc/kernel/toc.c | 3 +- arch/powerpc/boot/dts/wii.dts | 5 + arch/powerpc/configs/gamecube_defconfig | 2 +- arch/powerpc/configs/wii_defconfig | 2 +- arch/powerpc/include/asm/bitops.h | 2 - arch/powerpc/include/asm/book3s/32/mmu-hash.h | 2 + arch/powerpc/include/asm/hw_irq.h | 2 +- arch/powerpc/include/asm/ppc-opcode.h | 1 + arch/powerpc/include/asm/syscall.h | 4 +- arch/powerpc/include/asm/thread_info.h | 2 + arch/powerpc/kernel/interrupt_64.S | 2 + arch/powerpc/kernel/proc_powerpc.c | 4 +- arch/powerpc/mm/book3s32/mmu.c | 10 +- arch/powerpc/mm/kasan/book3s_32.c | 59 +- arch/powerpc/net/bpf_jit_comp.c | 29 +- arch/powerpc/net/bpf_jit_comp32.c | 9 + arch/powerpc/net/bpf_jit_comp64.c | 29 +- arch/powerpc/perf/core-book3s.c | 58 +- arch/powerpc/platforms/pasemi/dma_lib.c | 4 +- arch/riscv/Kconfig | 52 +- .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 5 + arch/riscv/configs/nommu_k210_defconfig | 1 - arch/riscv/configs/nommu_k210_sdcard_defconfig | 1 - arch/riscv/configs/nommu_virt_defconfig | 2 - arch/riscv/include/asm/bitops.h | 1 - arch/riscv/include/asm/cpu_ops.h | 2 - arch/riscv/include/asm/cpu_ops_sbi.h | 25 + arch/riscv/include/asm/csr.h | 3 +- arch/riscv/include/asm/fixmap.h | 1 + arch/riscv/include/asm/kasan.h | 11 +- arch/riscv/include/asm/page.h | 16 +- arch/riscv/include/asm/pgalloc.h | 40 ++ arch/riscv/include/asm/pgtable-64.h | 108 ++- arch/riscv/include/asm/pgtable.h | 65 +- arch/riscv/include/asm/sbi.h | 19 +- arch/riscv/include/asm/smp.h | 2 - arch/riscv/include/asm/sparsemem.h | 6 +- arch/riscv/kernel/Makefile | 3 +- arch/riscv/kernel/asm-offsets.c | 3 + arch/riscv/kernel/cpu.c | 23 +- arch/riscv/kernel/cpu_ops.c | 26 +- arch/riscv/kernel/cpu_ops_sbi.c | 26 +- arch/riscv/kernel/cpu_ops_spinwait.c | 27 +- arch/riscv/kernel/head.S | 38 +- arch/riscv/kernel/head.h | 6 +- arch/riscv/kernel/ptrace.c | 4 +- arch/riscv/kernel/sbi.c | 189 +++--- arch/riscv/kernel/setup.c | 10 - arch/riscv/kernel/smpboot.c | 2 +- arch/riscv/kvm/mmu.c | 4 +- arch/riscv/kvm/vcpu_sbi_replace.c | 11 +- arch/riscv/kvm/vcpu_sbi_v01.c | 11 +- arch/riscv/kvm/vmid.c | 4 +- arch/riscv/mm/cacheflush.c | 5 +- arch/riscv/mm/context.c | 4 +- arch/riscv/mm/init.c | 378 ++++++++--- arch/riscv/mm/kasan_init.c | 248 +++++-- arch/riscv/mm/tlbflush.c | 9 +- arch/riscv/net/bpf_jit_comp64.c | 2 +- arch/s390/Kconfig | 1 - arch/s390/configs/debug_defconfig | 1 - arch/s390/configs/defconfig | 1 - arch/s390/include/asm/bitops.h | 1 - arch/s390/include/asm/cpu_mf.h | 4 +- arch/s390/include/asm/uaccess.h | 120 ++-- arch/s390/kernel/perf_cpum_cf_common.c | 4 +- arch/s390/kernel/perf_cpum_cf_events.c | 6 +- arch/s390/kernel/perf_cpum_sf.c | 2 +- arch/s390/kvm/kvm-s390.c | 2 +- arch/s390/lib/uaccess.c | 24 +- arch/sh/include/asm/bitops.h | 1 - arch/sh/mm/alignment.c | 4 +- arch/sparc/include/asm/bitops_32.h | 1 - arch/sparc/include/asm/bitops_64.h | 2 - arch/x86/Kconfig | 1 - arch/x86/events/intel/core.c | 15 + arch/x86/events/intel/lbr.c | 168 +++-- arch/x86/events/intel/uncore.c | 2 +- arch/x86/events/intel/uncore.h | 3 +- arch/x86/events/intel/uncore_discovery.c | 4 +- arch/x86/events/intel/uncore_discovery.h | 2 + arch/x86/events/intel/uncore_snb.c | 214 +++++- arch/x86/events/intel/uncore_snbep.c | 2 +- arch/x86/events/perf_event.h | 10 +- arch/x86/events/rapl.c | 9 +- arch/x86/include/asm/bitops.h | 2 - arch/x86/include/asm/kvm-x86-ops.h | 3 +- arch/x86/include/asm/kvm_host.h | 13 +- arch/x86/kernel/apic/vector.c | 4 +- arch/x86/kernel/early-quirks.c | 10 +- arch/x86/kernel/hpet.c | 8 +- arch/x86/kvm/cpuid.c | 79 ++- arch/x86/kvm/lapic.c | 2 - arch/x86/kvm/mmu/mmu.c | 31 +- arch/x86/kvm/mmu/spte.c | 1 + arch/x86/kvm/mmu/spte.h | 42 +- arch/x86/kvm/mmu/tdp_mmu.c | 6 +- arch/x86/kvm/pmu.c | 33 +- arch/x86/kvm/svm/avic.c | 123 ++-- arch/x86/kvm/svm/pmu.c | 2 +- arch/x86/kvm/svm/svm.c | 490 +++++++------- arch/x86/kvm/svm/svm.h | 17 +- arch/x86/kvm/vmx/capabilities.h | 4 + arch/x86/kvm/vmx/pmu_intel.c | 20 +- arch/x86/kvm/vmx/posted_intr.c | 183 +++--- arch/x86/kvm/vmx/posted_intr.h | 8 +- arch/x86/kvm/vmx/vmx.c | 68 +- arch/x86/kvm/vmx/vmx.h | 3 + arch/x86/kvm/x86.c | 70 +- arch/x86/kvm/x86.h | 1 + arch/x86/um/Kconfig | 1 - arch/xtensa/include/asm/bitops.h | 1 - arch/xtensa/platforms/iss/simdisk.c | 4 +- block/bdev.c | 5 - block/bio.c | 3 +- block/blk-mq-tag.c | 40 +- block/blk-mq.c | 3 +- block/blk-sysfs.c | 4 +- block/mq-deadline.c | 4 +- certs/Makefile | 4 +- drivers/acpi/cppc_acpi.c | 11 +- drivers/acpi/dptf/dptf_pch_fivr.c | 1 + drivers/acpi/dptf/dptf_power.c | 2 + drivers/acpi/dptf/int340x_thermal.c | 6 + drivers/acpi/fan.h | 1 + drivers/acpi/proc.c | 2 +- drivers/ata/pata_octeon_cf.c | 2 +- drivers/base/firmware_loader/fallback.c | 7 +- drivers/base/firmware_loader/fallback.h | 11 + drivers/base/firmware_loader/fallback_table.c | 25 +- drivers/base/power/trace.c | 6 +- drivers/block/aoe/aoecmd.c | 2 +- drivers/block/brd.c | 73 +-- drivers/block/loop.c | 2 +- drivers/block/rnbd/rnbd-clt.c | 2 +- drivers/cdrom/cdrom.c | 23 +- drivers/char/hpet.c | 22 +- drivers/char/random.c | 14 +- drivers/clk/clk-si5341.c | 2 +- drivers/clk/mediatek/clk-mt7986-apmixed.c | 2 +- drivers/clk/mediatek/clk-mt7986-infracfg.c | 2 +- drivers/clk/mediatek/clk-mt7986-topckgen.c | 2 +- drivers/clk/visconti/pll.c | 3 +- drivers/firmware/efi/libstub/efi-stub.c | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 45 +- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 32 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 - drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 20 +- drivers/gpu/drm/amd/amdgpu/cik.c | 4 + drivers/gpu/drm/amd/amdgpu/vi.c | 4 + .../amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 11 +- .../drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 11 +- .../amd/display/dc/irq/dcn20/irq_service_dcn20.c | 25 - .../amd/display/dc/irq/dcn20/irq_service_dcn20.h | 2 - .../amd/display/dc/irq/dcn21/irq_service_dcn21.c | 25 - .../amd/display/dc/irq/dcn21/irq_service_dcn21.h | 2 - drivers/gpu/drm/amd/display/dc/irq/irq_service.c | 2 +- drivers/gpu/drm/amd/display/dc/irq/irq_service.h | 4 - drivers/gpu/drm/drm_dp_mst_topology.c | 1 + drivers/gpu/drm/drm_mm.c | 4 + drivers/gpu/drm/drm_modeset_lock.c | 9 + drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 4 +- drivers/gpu/drm/i915/display/intel_ddi.c | 22 + drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 10 +- drivers/gpu/drm/i915/i915_perf.c | 22 +- drivers/gpu/drm/i915/i915_reg.h | 8 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 3 + drivers/gpu/drm/radeon/radeon_kms.c | 22 +- drivers/hid/hid-ids.h | 1 + drivers/hid/hid-input.c | 2 + drivers/hid/hid-vivaldi.c | 41 +- drivers/hid/uhid.c | 49 +- drivers/hid/wacom_wac.c | 39 +- drivers/hwmon/dell-smm-hwmon.c | 4 +- drivers/hwmon/ltc2992.c | 3 +- drivers/iio/adc/ad7124.c | 2 +- drivers/infiniband/hw/irdma/hw.c | 16 +- drivers/macintosh/mac_hid.c | 24 +- drivers/media/cec/core/cec-core.c | 2 +- drivers/media/mc/mc-devnode.c | 2 +- drivers/message/fusion/mptbase.c | 149 +++-- drivers/message/fusion/mptctl.c | 82 ++- drivers/message/fusion/mptlan.c | 90 +-- drivers/message/fusion/mptsas.c | 94 +-- drivers/mmc/host/renesas_sdhi_core.c | 2 +- drivers/net/bonding/bond_procfs.c | 8 +- drivers/net/virtio_net.c | 2 +- drivers/net/wireless/cisco/airo.c | 22 +- drivers/net/wireless/intersil/hostap/hostap_ap.c | 16 +- .../net/wireless/intersil/hostap/hostap_download.c | 2 +- drivers/net/wireless/intersil/hostap/hostap_proc.c | 24 +- drivers/net/wireless/ray_cs.c | 2 +- drivers/nubus/proc.c | 36 +- drivers/of/base.c | 131 +--- drivers/of/device.c | 2 +- drivers/parisc/led.c | 4 +- drivers/parisc/pdc_stable.c | 4 +- drivers/pci/controller/dwc/pci-dra7xx.c | 2 +- drivers/pci/msi/irqdomain.c | 4 +- drivers/pci/msi/legacy.c | 1 - drivers/pci/proc.c | 10 +- drivers/platform/x86/thinkpad_acpi.c | 4 +- drivers/platform/x86/toshiba_acpi.c | 16 +- drivers/pnp/isapnp/proc.c | 2 +- drivers/pnp/pnpbios/proc.c | 4 +- drivers/rtc/Kconfig | 24 + drivers/rtc/Makefile | 2 + drivers/rtc/dev.c | 6 +- drivers/rtc/rtc-cmos.c | 201 ++++-- drivers/rtc/rtc-da9063.c | 16 +- drivers/rtc/rtc-ftrtc010.c | 8 +- drivers/rtc/rtc-gamecube.c | 377 +++++++++++ drivers/rtc/rtc-mc146818-lib.c | 182 ++++-- drivers/rtc/rtc-pcf2127.c | 2 +- drivers/rtc/rtc-pcf85063.c | 97 ++- drivers/rtc/rtc-pxa.c | 4 + drivers/rtc/rtc-rs5c372.c | 185 +++++- drivers/rtc/rtc-rv8803.c | 6 + drivers/rtc/rtc-sunplus.c | 362 +++++++++++ drivers/scsi/aacraid/aachba.c | 2 +- drivers/scsi/aic7xxx/aic79xx_osm.c | 6 +- drivers/scsi/elx/efct/efct_driver.c | 11 +- drivers/scsi/hisi_sas/hisi_sas_main.c | 5 - drivers/scsi/lpfc/lpfc_sli.c | 10 +- drivers/scsi/megaraid.c | 84 +-- drivers/scsi/mpi3mr/mpi3mr_fw.c | 11 +- drivers/scsi/mpt3sas/mpt3sas_base.h | 4 +- drivers/scsi/mpt3sas/mpt3sas_ctl.c | 87 ++- drivers/scsi/pcmcia/nsp_cs.c | 3 + drivers/scsi/pm8001/pm8001_sas.c | 7 +- drivers/scsi/pm8001/pm8001_sas.h | 3 + drivers/scsi/pm8001/pm80xx_hwi.c | 7 +- drivers/scsi/qedf/qedf_main.c | 2 + drivers/scsi/scsi_lib.c | 8 +- drivers/scsi/scsi_proc.c | 4 +- drivers/scsi/sd.c | 2 +- drivers/scsi/sg.c | 35 +- drivers/scsi/ufs/ufs-mediatek.c | 2 +- drivers/scsi/ufs/ufshcd.c | 2 +- drivers/soc/canaan/Kconfig | 1 - drivers/soc/fsl/qbman/bman_portal.c | 2 +- drivers/soc/fsl/qbman/qman_portal.c | 2 +- drivers/soc/ti/k3-ringacc.c | 4 +- .../intel/int340x_thermal/int3400_thermal.c | 1 + .../intel/int340x_thermal/int3403_thermal.c | 1 + .../int340x_thermal/processor_thermal_device.h | 1 + .../int340x_thermal/processor_thermal_device_pci.c | 1 + drivers/tty/n_tty.c | 2 +- drivers/usb/gadget/function/rndis.c | 4 +- drivers/virt/acrn/ioreq.c | 3 +- drivers/zorro/proc.c | 2 +- fs/Makefile | 2 + fs/afs/proc.c | 6 +- fs/aio.c | 31 +- fs/binfmt_misc.c | 6 +- fs/btrfs/extent_io.c | 10 - fs/btrfs/super.c | 2 - fs/cachefiles/cache.c | 17 +- fs/cachefiles/daemon.c | 11 + fs/cachefiles/internal.h | 2 +- fs/cachefiles/io.c | 2 +- fs/cachefiles/namei.c | 12 +- fs/ceph/addr.c | 5 - fs/cifs/Kconfig | 2 +- fs/cifs/Makefile | 2 +- fs/cifs/cache.c | 105 --- fs/cifs/cifs_swn.c | 9 +- fs/cifs/cifsfs.c | 19 +- fs/cifs/cifsfs.h | 3 +- fs/cifs/cifsglob.h | 7 +- fs/cifs/cifsproto.h | 8 + fs/cifs/connect.c | 142 ++-- fs/cifs/dfs_cache.c | 2 +- fs/cifs/dir.c | 5 + fs/cifs/file.c | 66 +- fs/cifs/fs_context.c | 8 +- fs/cifs/fscache.c | 333 +++------- fs/cifs/fscache.h | 128 ++-- fs/cifs/inode.c | 25 +- fs/cifs/misc.c | 49 ++ fs/cifs/netmisc.c | 5 +- fs/cifs/ntlmssp.h | 30 +- fs/cifs/sess.c | 112 +++- fs/cifs/smb2pdu.c | 112 +++- fs/cifs/smb2transport.c | 6 + fs/cifs/transport.c | 17 +- fs/coredump.c | 66 +- fs/dcache.c | 37 +- fs/eventpoll.c | 10 +- fs/exec.c | 35 + fs/ext4/mballoc.c | 14 +- fs/ext4/readpage.c | 6 - fs/ext4/super.c | 3 - fs/f2fs/data.c | 13 - fs/f2fs/segment.c | 8 +- fs/file_table.c | 47 +- fs/fscache/volume.c | 4 +- fs/inode.c | 39 +- fs/io-wq.c | 91 ++- fs/io_uring.c | 79 ++- fs/jbd2/journal.c | 2 +- fs/locks.c | 34 +- fs/mpage.c | 7 - fs/namei.c | 58 +- fs/namespace.c | 24 +- fs/netfs/read_helper.c | 3 +- fs/notify/dnotify/dnotify.c | 21 +- fs/notify/fanotify/fanotify_user.c | 10 +- fs/notify/inotify/inotify_user.c | 11 +- fs/ntfs3/ntfs_fs.h | 1 - fs/ocfs2/cluster/heartbeat.c | 2 +- fs/ocfs2/dlm/dlmdomain.c | 4 +- fs/ocfs2/dlm/dlmmaster.c | 18 +- fs/ocfs2/dlm/dlmrecovery.c | 2 +- fs/ocfs2/dlm/dlmthread.c | 2 +- fs/ocfs2/stackglue.c | 25 +- fs/ocfs2/super.c | 2 - fs/pipe.c | 64 +- fs/proc/generic.c | 6 - fs/proc/inode.c | 1 + fs/proc/internal.h | 5 - fs/proc/proc_net.c | 8 +- fs/proc/proc_sysctl.c | 63 +- fs/smbfs_common/smb2pdu.h | 2 +- fs/smbfs_common/smbfsctl.h | 2 + fs/super.c | 3 - fs/sysctls.c | 39 ++ fs/xfs/libxfs/xfs_fs.h | 37 +- fs/xfs/xfs_bmap_util.c | 7 +- fs/xfs/xfs_bmap_util.h | 2 +- fs/xfs/xfs_file.c | 3 +- fs/xfs/xfs_icache.c | 22 +- fs/xfs/xfs_ioctl.c | 102 +-- fs/xfs/xfs_ioctl.h | 6 - fs/xfs/xfs_ioctl32.c | 27 - fs/xfs/xfs_ioctl32.h | 22 - include/asm-generic/barrier.h | 2 +- include/asm-generic/bitops.h | 1 - include/asm-generic/bitops/le.h | 64 -- include/asm-generic/pgalloc.h | 24 +- include/linux/aio.h | 4 - include/linux/bitmap.h | 34 +- include/linux/bitops.h | 34 - include/linux/cleancache.h | 124 ---- include/linux/coredump.h | 10 +- include/linux/cpumask.h | 46 +- include/linux/dcache.h | 10 - include/linux/dnotify.h | 1 - include/linux/fanotify.h | 2 - include/linux/find.h | 372 +++++++++++ include/linux/frontswap.h | 35 +- include/linux/fs.h | 18 - include/linux/fscache.h | 5 + include/linux/inotify.h | 3 - include/linux/kprobes.h | 6 - include/linux/kvm_host.h | 3 - include/linux/mc146818rtc.h | 6 +- include/linux/migrate.h | 2 + include/linux/mm.h | 20 + include/linux/mount.h | 3 - include/linux/of.h | 422 +++++++----- include/linux/pagevec.h | 1 + include/linux/perf_event.h | 15 +- include/linux/pipe_fs_i.h | 4 - include/linux/poll.h | 2 - include/linux/printk.h | 4 - include/linux/proc_fs.h | 13 +- include/linux/psi.h | 2 +- include/linux/psi_types.h | 3 - include/linux/ref_tracker.h | 2 + include/linux/rwlock.h | 6 + include/linux/rwlock_api_smp.h | 8 + include/linux/rwlock_rt.h | 10 + include/linux/sbitmap.h | 11 + include/linux/sched.h | 4 - include/linux/sched/sysctl.h | 14 +- include/linux/seq_file.h | 2 +- include/linux/shmem_fs.h | 3 +- include/linux/spinlock_api_up.h | 1 + include/linux/stackdepot.h | 25 +- include/linux/stackleak.h | 5 - include/linux/swapfile.h | 3 - include/linux/sysctl.h | 67 +- include/scsi/scsi_device.h | 5 +- include/scsi/sg.h | 4 - include/trace/events/cachefiles.h | 103 ++- init/main.c | 9 +- ipc/util.c | 2 +- kernel/bpf/stackmap.c | 5 +- kernel/cgroup/cgroup.c | 11 +- kernel/events/core.c | 246 ++++--- kernel/hung_task.c | 81 ++- kernel/irq/proc.c | 8 +- kernel/kprobes.c | 30 +- kernel/locking/spinlock.c | 10 + kernel/locking/spinlock_rt.c | 12 + kernel/printk/Makefile | 5 +- kernel/printk/internal.h | 8 + kernel/printk/printk.c | 4 +- kernel/printk/sysctl.c | 85 +++ kernel/resource.c | 4 +- kernel/sched/core.c | 15 +- kernel/sched/core_sched.c | 2 +- kernel/sched/fair.c | 118 ++-- kernel/sched/pelt.h | 4 +- kernel/sched/psi.c | 66 +- kernel/stackleak.c | 26 +- kernel/sysctl.c | 724 ++------------------- kernel/time/clocksource.c | 4 +- kernel/trace/Kconfig | 9 +- kernel/trace/ftrace.c | 4 +- kernel/watchdog.c | 101 +++ lib/Kconfig | 7 +- lib/Kconfig.kasan | 2 +- lib/find_bit.c | 21 + lib/find_bit_benchmark.c | 21 + lib/genalloc.c | 2 +- lib/sbitmap.c | 25 +- lib/stackdepot.c | 46 +- lib/test_bitmap.c | 37 ++ lib/test_sysctl.c | 22 +- lib/vsprintf.c | 24 +- mm/Kconfig | 40 +- mm/Makefile | 1 - mm/cleancache.c | 315 --------- mm/filemap.c | 112 +++- mm/frontswap.c | 259 +------- mm/kasan/common.c | 1 - mm/migrate.c | 38 +- mm/page_owner.c | 2 + mm/percpu.c | 35 +- mm/shmem.c | 33 +- mm/swapfile.c | 90 +-- mm/truncate.c | 15 +- mm/zsmalloc.c | 529 ++++++--------- mm/zswap.c | 8 +- net/atm/proc.c | 4 +- net/bluetooth/af_bluetooth.c | 8 +- net/can/bcm.c | 2 +- net/can/proc.c | 2 +- net/core/neighbour.c | 6 +- net/core/pktgen.c | 6 +- net/ipv4/netfilter/ipt_CLUSTERIP.c | 6 +- net/ipv4/raw.c | 8 +- net/ipv4/tcp_ipv4.c | 2 +- net/ipv4/udp.c | 6 +- net/ncsi/ncsi-manage.c | 4 +- net/netfilter/x_tables.c | 10 +- net/netfilter/xt_hashlimit.c | 18 +- net/netfilter/xt_recent.c | 4 +- net/sunrpc/auth_gss/svcauth_gss.c | 4 +- net/sunrpc/cache.c | 24 +- net/sunrpc/stats.c | 2 +- scripts/dtc/dtx_diff | 8 +- sound/core/info.c | 4 +- sound/core/init.c | 25 +- sound/core/misc.c | 2 +- sound/pci/hda/cs35l41_hda.c | 134 ++-- sound/pci/hda/cs35l41_hda.h | 4 +- sound/pci/hda/cs35l41_hda_i2c.c | 6 +- sound/pci/hda/cs35l41_hda_spi.c | 6 +- sound/pci/hda/patch_cs8409-tables.c | 2 + sound/pci/hda/patch_realtek.c | 12 + sound/usb/mixer_maps.c | 12 + tools/arch/x86/include/uapi/asm/prctl.h | 26 +- tools/bpf/runqslower/runqslower.bpf.c | 2 +- tools/bpf/runqslower/runqslower.c | 2 +- tools/bpf/runqslower/runqslower.h | 2 +- tools/include/asm-generic/bitops.h | 1 - tools/include/asm-generic/bitops/find.h | 145 ----- tools/include/linux/bitmap.h | 7 +- .../bitops => tools/include/linux}/find.h | 54 +- tools/include/uapi/asm-generic/unistd.h | 5 +- tools/include/uapi/linux/kvm.h | 19 +- tools/lib/find_bit.c | 20 + tools/lib/perf/evsel.c | 4 +- .../perf/arch/mips/entry/syscalls/syscall_n64.tbl | 1 + tools/perf/arch/powerpc/entry/syscalls/syscall.tbl | 1 + tools/perf/arch/s390/entry/syscalls/syscall.tbl | 1 + tools/perf/arch/x86/entry/syscalls/syscall_64.tbl | 1 + tools/perf/bench/epoll-ctl.c | 2 +- tools/perf/bench/epoll-wait.c | 2 +- tools/perf/bench/evlist-open-close.c | 4 +- tools/perf/bench/futex-hash.c | 2 +- tools/perf/bench/futex-lock-pi.c | 2 +- tools/perf/bench/futex-requeue.c | 2 +- tools/perf/bench/futex-wake-parallel.c | 2 +- tools/perf/bench/futex-wake.c | 2 +- tools/perf/builtin-ftrace.c | 2 +- tools/perf/builtin-inject.c | 5 +- tools/perf/builtin-script.c | 2 +- tools/perf/builtin-stat.c | 24 +- .../pmu-events/arch/test/test_soc/cpu/uncore.json | 16 + tools/perf/tests/bitmap.c | 4 +- tools/perf/tests/event_update.c | 8 +- tools/perf/tests/mem2node.c | 9 +- tools/perf/tests/mmap-basic.c | 5 +- tools/perf/tests/parse-events.c | 49 ++ tools/perf/tests/pmu-events.c | 32 + tools/perf/tests/topology.c | 37 +- tools/perf/util/affinity.c | 8 +- tools/perf/util/auxtrace.c | 2 +- tools/perf/util/counts.c | 2 +- tools/perf/util/cpumap.h | 3 +- tools/perf/util/cputopo.c | 4 +- tools/perf/util/evlist-hybrid.c | 11 +- tools/perf/util/evlist.c | 28 +- tools/perf/util/evsel.c | 45 +- tools/perf/util/evsel.h | 3 +- tools/perf/util/machine.c | 3 +- tools/perf/util/mmap.c | 2 +- tools/perf/util/parse-events.c | 67 +- tools/perf/util/parse-events.h | 1 + tools/perf/util/parse-events.l | 2 + tools/perf/util/parse-events.y | 17 +- tools/perf/util/perf_api_probe.c | 4 +- tools/perf/util/probe-event.c | 3 + tools/perf/util/python.c | 6 +- tools/perf/util/record.c | 6 +- .../util/scripting-engines/trace-event-python.c | 4 +- tools/perf/util/session.c | 4 +- tools/perf/util/svghelper.c | 4 +- tools/perf/util/synthetic-events.c | 18 +- tools/perf/util/top.c | 6 +- tools/testing/selftests/kvm/.gitignore | 5 +- tools/testing/selftests/kvm/Makefile | 6 +- .../selftests/kvm/include/x86_64/processor.h | 25 + tools/testing/selftests/kvm/lib/kvm_util.c | 10 +- tools/testing/selftests/kvm/lib/x86_64/processor.c | 134 ++-- .../kvm/x86_64/{get_cpuid_test.c => cpuid_test.c} | 30 + .../selftests/kvm/x86_64/pmu_event_filter_test.c | 434 ++++++++++++ tools/testing/selftests/kvm/x86_64/tsc_msrs_test.c | 4 +- .../kvm/x86_64/vmx_close_while_nested_test.c | 4 +- .../vmx_exception_with_invalid_guest_state.c | 139 ++++ .../testing/selftests/kvm/x86_64/xen_shinfo_test.c | 34 +- usr/include/Makefile | 1 - virt/kvm/kvm_main.c | 5 +- 624 files changed, 9559 insertions(+), 7143 deletions(-) create mode 100644 Documentation/devicetree/bindings/rtc/sunplus,sp7021-rtc.yaml delete mode 100644 Documentation/vm/cleancache.rst create mode 100644 arch/riscv/include/asm/cpu_ops_sbi.h create mode 100644 drivers/rtc/rtc-gamecube.c create mode 100644 drivers/rtc/rtc-sunplus.c delete mode 100644 fs/cifs/cache.c create mode 100644 fs/sysctls.c delete mode 100644 include/linux/cleancache.h create mode 100644 include/linux/find.h create mode 100644 kernel/printk/sysctl.c delete mode 100644 mm/cleancache.c delete mode 100644 tools/include/asm-generic/bitops/find.h rename {include/asm-generic/bitops => tools/include/linux}/find.h (83%) rename tools/testing/selftests/kvm/x86_64/{get_cpuid_test.c => cpuid_test.c} (83%) create mode 100644 tools/testing/selftests/kvm/x86_64/pmu_event_filter_test.c create mode 100644 tools/testing/selftests/kvm/x86_64/vmx_exception_with_invalid_g [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (82af95029ec9 -> e7298464c5d0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/llvm-project. from 82af95029ec9 [X86] Enable ibt-seal optimization when LTO is used in Kernel adds 7ee1c162cc53 [RISCV][RFC] add inst support of zbkb adds 7b3d30728816 [RISCV] Add isel patterns for grevi, shfli, and unshfli to [...] adds 26167cae4515 Print the `// ----` separator between modules when using - [...] adds 308d8b8c6618 [mlir][python] 8b/16b DenseIntElements access adds 9006bf424847 Remove obsolete `getAsmResultNames` from OpAsmDialectInterface adds a7f8aea71485 [clang-tidy] Fix wrong FixIt in performance-move-const-arg adds 82bb8a588dde [CSKY] Add codegen support of GlobalTLSAddress lowering adds 8def89b5dc82 [RISCV] Set CostPerUse to 1 iff RVC is enabled adds 75184f14aecd [DebugInfo] Fix handling '# line "file"' for DWARFv5 adds 86b08ed6bb16 [DebugInfo][NFC] Do not call 'isRootFile' for DWARF Version < 5 adds 7f0f4cab18a9 [libc][NFC] Add 'struct_' prefix to type headers defining [...] adds e6de53b4de4a [RISCV] Bump rvv-related extensions from 0.10 to 1.0 adds a99e06aa869b [mlir][Linalg] Avoid generating illegal operations during [...] adds 05cd9a0596d8 [ConstantFold] Simplify type check in reinterpret load fol [...] adds 6a19cb837c9b [ConstantFold] Support pointers in reinterpret load folding adds 7950010e4983 [VE][NFC] Factor out helper functions adds 3f9d1f516e19 [InstSimplify] Add tests for reinterpret load of floats (NFC) adds b4900296e4a5 [ConstantFold] Allow all float types in reinterpret load folding adds 99b5a8049be4 Match bazel config with cmake after f29256a64 adds 69825f369302 [fir] Add array operations documentation adds d03c5bc8d437 [mlir] Fully qualify return types in OpAsmInterface.td and [...] adds a2f6921ef2a1 [llvm] Remove unused headers in LLVMDemangle adds c0cf209076a2 [VPlan] Add VPWidenIntOrFpInductionRecipe::isCanonical, us [...] adds 55689904d2e5 [VPlan] Move ::isCanonical outside ifdef. adds 1f9e18b6565f [llvm] Remove (some) LLVMDemangle header dependencies adds e7762653d3b0 [Attributor] Avoid some pointer element type accesses adds 065044c443f4 Fix 1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d adds 329feeb938ac [ORC][docs] Describe removing JITDylibs, using custom prog [...] adds b351ac3873db [AMDGPU][NFC] Regenerate InstCombine test adds 0530fdbbbb84 [AMDGPU] Fix LOD bias in A16 combine adds 603d18033c51 [AMDGPU][InstCombine] Remove zero LOD bias adds ae2f9c8be897 [AMDGPU] Remove lz and nomip combine from codegen adds f53d359816e6 Fix 1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d adds 9c5b856dac5c [CoroSplit] Avoid pointer element type accesses adds 0ca426d6ac65 [llvm-mca] Improve barriers for strict region marking (PR52198) adds bfbdb5e43e50 [Coroutines] Avoid some pointer element type accesses adds 597eae998a87 [clangd][Background] Make index validation logs verbose adds b6a41fddcfd3 [DWARF][DebugInfo] Fix off-by-one error in size of DW_TAG_ [...] adds 357f2d9ccf20 [mlir][LangRef] Add top-level production to the MLIR grammar adds 4d268dc94a6b [RISCV] Enable CGP to sink splat operands of VP intrinsics adds 825a3cd6b697 [clangd] Fail inlayHints requests on content changes adds 4727d29d908f [X86] Remove __builtin_ia32_pabs intrinsics and use generi [...] adds ced077e1ba52 [clang][deps] NFC: Simplify handling of cached FS errors adds 5daeada33051 [clang][deps] Ensure filesystem cache consistency adds 8cc2a1372704 [clang][deps] Handle symlinks in minimizing FS adds 68db0e25df4b [flang] Update tco tool pipline and add translation to LLVM IR adds 8ee135dcf8ff [X86] Remove `__builtin_ia32_pmax/min` intrinsics and use [...] adds 3ef88b31843e Revert rG8ee135dcf8ff060656ad481c3e980fe8763576f5 "[X86] R [...] adds 0abaf6458092 Revert rG4727d29d908f9dd608dd97a58c0af1ad579fd3ca "[X86] R [...] adds 75e164f61d39 [llvm] Cleanup header dependencies in ADT and Support adds 2b8e4c6e5fbd Add missing header in Support/ConvertUTF.h adds 38ac4093d9d2 [NFCI][Support] Avoid ASSERT_/EXPECT_TRUE(A <op> B) adds 51c53a0791cd Add apple-specific missing include adds 2a9e33db4f0a Add ms-specific missing header in Support/InitLLVM.cpp adds 622354a52207 [llvm][ADT] Implement `BitVector::{pop_,}back` adds 7e3bcae5069f Add apple-specific missing header in Support/GraphWriter.cpp adds d5ae039ed7b8 [SystemZ] Properly register machine passes. adds e9211e039377 Remove dependency from raw_ostream on <chrono> adds ad43217a0466 [InstCombine] Fold for masked gather when loading the same [...] adds 4d82ae67b208 Add security group 2021 transparency report. adds b8102449a72c [clang-tidy] Avoid binding nullptr to a reference adds e5fd3a7df917 Try to unbreak build on Windows after e9211e03937 adds 8bc661894299 Add missing llvm/support/Regex.h include in polly/lib/Anal [...] adds 3c9e3dada916 Try to unbreak build on Windows more after e9211e03937 adds 9900acacfb3f [libcxx][doc][nfc] Fixed typo in doc adds 9d3437fbf341 [ADT] [NFC] Add StringRef::detectEOL adds 5597ec2dc4f8 Include missing "llvm/Support/Path.h" in "flang/lib/Fronte [...] adds f24fe96f469b [ifs] Use a tmp file instead of "-" adds cab961693802 [libc++] Use addressof in unordered_map. adds b7fd91c84b4e Upstream MLIR PyTACO implementation. adds e4a556268ea9 Revert "[libc++] Use addressof in unordered_map." adds 23a7bb541dae [clang-format] Fix comment in spaceRequiredBefore. NFC. adds 565963841880 Revert "[compiler-rt][cmake] Use HandleOutOfTreeLLVM like [...] adds 26cbc430197a [flang] Remove target and require shell adds 10e5c513b59b Revert "[cmake] Duplicate `{llvm,compiler_rt}_check_linker [...] adds 5061eb6b0121 [Sparc] Don't define __sparcv9 and __sparcv9__ when targeting V8+ adds e6ceec9c1d19 [Clang][RISCV] Restrict rvv builtins with zve macros adds 754d6af7c359 [NFC] Improve code reuse. adds 11754a4dbbad [RISCV] Use RVBUnary in more places to simplify some table [...] adds 4710750854ce [mlir][spirv] Support size-1 vector inserts during conversion adds fd0c6f53913f [mlir] Move linalg::PadTensorOp to tensor::PadOp. adds 3c90ae5d0b71 Revert "[flang] Update tco tool pipline and add translatio [...] adds 48132bb1e437 [RISCV] Simplify interface to combineMUL_VLToVWMUL. NFC adds d6e2c95d2252 [libc++] Use addressof in unordered_map. adds 4d0a18d06e8e [mlir][sparse] Adding assertions for overhead storage types adds cb8b94f6efa9 [AArch64] Add extra tests useful in testing hadd. NFC adds f18fcdabda72 [BOLT][NFC] Expand auto types pt.2 adds 5a654b01133f [BOLT] Make ICP target selection (more) deterministic adds f8c7fb499be6 [BOLT][NFC] Reduce includes with include-what-you-use adds 2f9f9afa4e12 [mlir] Add polynomial approximation for atan and atan2 adds 0d9cc6995401 [Support] Update missed tests with lazy caching behavior. adds cd4e600f5f5c [Sema] Warn about printf %n on Android and Fuchsia adds 0379459fc586 [RISCV] Strengthen a SDTypeProfile. Fix formatting. adds 4f8ea3c84f3d [SystemZ][z/OS][NFC] Remove extra symbol adds d84d1135d80c Emit swift5 reflection section data in dsym bundle generat [...] adds 9f4cc5a6bb56 [gn build] Set HAVE_MALLINFO2=1 adds 6103b2d45bfb Revert "Emit swift5 reflection section data in dsym bundle [...] adds e39c262979e6 Revert "[gn build] Set HAVE_MALLINFO2=1" adds 705d8c49f9be [x86] regenerate smul-with-overflow.ll; add test which fai [...] adds 6df05697ca1d [gn build] Set HAVE_MALLINFO2=1 adds 653b007dc186 [CodeComplete] fix nullptr crash in 612f5ed8823120 adds b796709a62da Only run MLIR PyTACO tests when python bindings are enabled. adds ba093fe58b15 Fix a commit. adds 6ba1fb04214b [llvm-pdbutil] Fix gaps ouput. adds 58ee14e29e98 [lldb] Fix timer logging inverted quiet condition adds efa15f417847 [mlir][sparse] add ability for sparse tensor output adds 10d0d8c0c1db [clang][cmake] Use `GNUInstallDirs` to support custom inst [...] adds 1613f8b8d7d5 NFC (build fix): Add header for llvm::errs(). adds 08574ce4d625 [mlir][tosa] Add clamp + clamp as single clamp canonicalization adds 13fa17db3a72 [split-file] Respect input file's line endings adds 4f547ee8b8a7 [libc++][test] Add const and reference tests for enable_vi [...] adds 9cddfe3085c4 [CMake] Passthrough OSX CMake options to builtins and runtimes adds e6cdef187ed3 [XRay][test] Clean up llc RUN lines adds 04eb93b1d559 [flang] Fix repeated "DT" editing adds db07e082abaf [TSan] Omit vfork interceptor iOS simulator runtime adds 3726626a26ec [flang] Fix crash from USE-associated defined I/O subprograms adds b95150418fb6 [lldb] Allow aliases to aliases of raw input commands adds e796eaf2af65 [RISCV][RFC] add MC support for zbkc subextension adds b1856009fbc1 [flang] Allow INQUIRE() on a child unit in user-defined I/ [...] adds 55d887b83364 [time-trace] Add optimizer and codegen regions to NPM adds b6098c07cb20 [MLIR] Fix negative gcd in `normalizeDivisionByGCD` function. adds de8723829515 [JITLink] Add anonymous symbols in LinkGraph for unnamed t [...] adds fdb6578514dd Revert "[JITLink] Add anonymous symbols in LinkGraph for u [...] adds f7d4cafe5a6a [JITLink][RISCV] Support R_RISCV_SET* and R_RISCV_32_PCREL [...] adds 26544b98f7bf [libc++] Use addressof in unordered_set. adds 4041354b4c12 [mlir] Add SingleBlockImplicitTerminator<"tensor::YieldOp" [...] adds 93deac2e2ba9 [AArch64] Optimize add/sub with immediate through MIPeepholeOpt adds 0283b07746e8 reapply de872382951 "[JITLink] Add anonymous symbols in Li [...] adds b27e5459d51f [DAG] Convert truncstore(extend(x)) back to store(x) adds 8dedf9b58bff [PowerPC] Change CTR clobber estimation for 128-bit floati [...] adds 00d68c3824bf [PowerPC] Support parsing GNU attributes in MC adds 5f2854f1daa7 [LV] Always create VPWidenCanonicalIVRecipe, optimize away later. adds 26fffc1b8e75 [libc++] [test] {cpo,niebloid}.compile.pass.cpp: Also test [...] adds e9d0f8baf236 [flang] Don't drop format string for external child I/O adds 896a543e72fd [flang] Support DECIMAL='COMMA' mode in namelist I/O adds 0a6b4258ab0e [openmp][cmake] Use `GNUInstallDirs` to support custom ins [...] adds d44b6be6eaa8 [RISCV] Don't Custom legalize f16/f32/f64 bitcasts if thos [...] adds 39e602b6c433 [InstCombine] try to fold binop with phi operands adds 7c16647c3676 [clang-tools-extra][cmake] Use `GNUInstallDirs` to support [...] adds c1988dbf2d19 [openmp] Allow x87 fp functions only in Openmp runtime for x86. adds b8467952404c [docs] [clang] Small documentation change for compilation [...] adds 37d1d02200b9 [X86][MS] Change the alignment of f80 to 16 bytes on Windo [...] adds 2513b7903063 [libc++] Implement LWG3549: view_interface need not inheri [...] adds 3cf15af2daa9 [RISCV] Remove experimental prefix from rvv-related extensions. adds 85e42db1b6db [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds be6070c290e2 [RISCV] Use FP ABI for some RVV intrinsic tests. NFC adds 3dc6fd515135 [llvm-objcopy][MachO] Implement --update-section adds a4f202549208 [X86] Regenerate avx512-mask-op.ll adds ff05b93a02d1 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 20d46fbd4a51 [CodeGenPrepare] Use dyn_cast result to check for null pointers adds 946f29028e06 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 86497026a266 [clang-tidy] Use cast<>/castAs<> instead of dyn_cast<>/get [...] adds df0fd1c301d6 [clangd] Use castAs<> instead of getAs<> to avoid derefere [...] adds c93491352cf3 [lldb] CxxModuleHandler - use cast<> instead of dyn_cast<> [...] adds d7aa402b4b8a [lldb] PdbAstBuilder - use cast<> instead of dyn_cast<> to [...] adds d13847bbe5e6 [lldb] TerminalState::Save - fix unused variable warning adds 49d38b1d618c Fix "not all control paths return a value" warning. NFC. adds 938944445a1b [libc++] Mark LWG3541 as "Complete". NFC. adds 5d78fef6db15 [libc++] Fix LWG3437 "__cpp_lib_polymorphic_allocator is i [...] adds d4ed3eff9f9c [X86] Add vector signbit parity checks for non-popcnt targets adds eb3f20e8fa4b [clang-tidy] Remove gsl::at suggestion from cppcoreguideli [...] adds 153359180a9d [AVR] Remove regalloc workaround for LDDWRdPtrQ adds 116ab78694dd [AVR] Make use of the constant value 0 in R1 adds 7c66aaddb128 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 2e26633af0c8 [IR] document and update ctlz/cttz intrinsics to optionall [...] adds d2e8fb331835 [clang-tidy] Add readability-duplicate-include check adds 6605057992b1 Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] F [...] adds 631f3e621586 [gn build] Port d2e8fb331835 adds accc07e65465 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 0b799791807e [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds f69379d0a43b [InstCombine] Add test coverage for PR48683 adds 818cfb10c574 [libcxx][test] Make MSVC `<charconv>` test compile when te [...] adds 8e382ae91b97 [Support] Simplify parallelForEach{,N} adds 1a5dea9e2b97 [NewGVN][NFC] precommit tests for PR53277 adds 7a29b0b58383 [llvm] Fix header guards (NFC) adds abb0ed44957c [Commands] Remove redundant member initialization (NFC) adds f8ddcb413125 [Object] Remove a redundant return statement (NFC) adds ad36f37ce2b4 [MLIR][Presburger] Clean PresburgerSet identifier interfac [...] adds 413684313d9d [RISCV] Adjust the header comment in RISCVInstrInfoZb.td t [...] adds 32dc14f876c4 [X86] LowerFunnelShift - use supportedVectorShiftWithBaseA [...] adds ab1add6adc44 [clang] Move the definition of ASTDiff (NFC) adds ee591a64a795 [clang] Forward-declare DynTypedNode (NFC) adds e59964b67e02 [clang] Remove unused forward declarations (NFC) adds 4762c077e710 [X86] LowerFunnelShift - always lower vXi8 fshl by constan [...] adds 88f33cff4bee [RISCV] Add bitreverse tests to bswap-ctlz-cttz-ctpop.ll. [...] adds 3575700b286f [RISCV] Add tests that do a bitreverse before or after a b [...] adds 47d7e922d843 [mlir] Ensure a newline at the end of a file (NFC) adds fa90fc6e0566 [Sema] Fix a bugprone argument comment (NFC) adds 448d0dfab701 [Analysis] Remove a redundant const from a return type (NFC) adds ab4756338c5b DebugInfo: Don't put types in type units if they reference [...] adds 7c77df1528c8 [X86] Add some basic tests for PR46809 adds 2e58a1891086 DebugInfo: Include template parameters for simplified temp [...] adds 3a3af2bbc97e [C++20] [Module] fix bug 47716 and implement [module.inter [...] adds 3f24cdec2572 [RISCV][NFC] Remove tailing whitespaces in RISCVInstrInfoV [...] adds b574048239bc [NFC] [Coroutines] Rename tests in coro-align adds 943aa1bfacaa Add modernize-use-default-member-init.UseAssignment to .cl [...] adds f63a9cd99db7 [Vectorize] Remove unused variables (NFC) adds b752eb887f7e [Analysis] Use default member initialization (NFC) adds d3b26dea1610 Clang: Change the default DWARF version to 5 adds 90abe181da7c Add missing function implementation from DWARF default change adds 68b70d17d8de [GlobalISel] Fold or of shifts with constant amount to fun [...] adds 8b280df504b9 Rough guess at fixing lldb tests to handle Clang defaultin [...] adds 1f4a0531b3fd [TSan] Mark test unsupported on Darwin adds e29d8fb16978 [RISCV] Initially support the K-extension instructions on [...] adds bf039a8620f1 [Target] Use range-based for loops (NFC) adds ba16e3c31f66 [RISCV] Decouple Zve* extensions and the V extension. adds c5590396d041 [PowerPC] Emit warning for ieeelongdouble on older GNU toolchain adds ea2112ea15a0 [clang-format] Remove unused assignment. NFC. adds 3519dcfec229 Added OpenMP 5.0 specification based semantic checks for a [...] adds 670a721de2a1 [clang-format] Assert Line->First. NFC. adds f53301125257 [Hexagon] Use llvm::Register instead of unsigned in Hexago [...] adds d6f8f56da04b [MLIR][Presburger] Silence -Wdangling-else warning (NFC) adds 81793bd276af [clang-format] Assert Line->First and State.NextToken->Pre [...] adds 9aaa74aeeff3 [RISCV] Add patterns of SET[U]LT_VI for STECC forms adds ba845787b3fd [clang][sema] Add missing diagnostic parameter adds 3ad6de31c0cf [clang][tests] Fix a c++/libc++ -stdlib value typo adds d29e319263de [OpaquePtrs] Add getNonOpaquePointerElementType() method (NFC) adds 67346b43e0ed [Attributor] Use MemoryLocation to get pointer operand and [...] adds 7ccacaf4428d [flang][examples] Add missing CMake dependencies adds 4f8fdf78279f [ISEL] Canonicalise constant splats to RHS. adds e7c9a6cae09d [SDAG] Don't move DBG_VALUE instructions after insertion p [...] adds 0d1308a7b77c [AArch64][GlobalISel] Support returned argument with multi [...] adds a08447d0de5d [LLD][ELF][AArch64] Update test with incorrect REQUIRES li [...] adds 906ebd5830e6 [AMDGPU][GlobalISel] Regenerate checks in inst-select-*ext.mir adds aa50b93e7cf9 [AMDGPU][GlobalISel] Add more sign/zero/any-extension tests adds 7d19566c3bfb [lldb] Ignore non-address bits in "memory find" arguments adds 022600334dcb [flang] Update the description of `!fir.coordinate_of` adds 912af6b570d6 [AMDGPU][GlobalISel] Remove the post ':' part of vreg oper [...] adds 577a6dc9a186 [X86] getVectorMaskingNode - fix indentation. NFC. adds e7926e8d972e [RISCV] Match VF variants for masked VFRDIV/VFRSUB adds af773a18181d [RISCV][VP] Lower VP_MERGE to RVV instructions adds 3e6be0241b31 [lldb] Update release notes with non-address bit handling changes adds 12a499eb00e3 Pre-commit test case for trunc+lshr+load folds adds 46cacdbb21c2 [DAGCombiner] Adjust some checks in DAGCombiner::reduceLoadWidth adds e5147f82e1cb [X86] Remove __builtin_ia32_pabs intrinsics and use generi [...] adds b2499bf3e851 [mlir][bufferize][NFC] Refactor createAlloc function signature adds 3e50593b1884 [X86] Remove `__builtin_ia32_pmax/min` intrinsics and use [...] adds 3696c70e67d9 [clang-tidy] Add `readability-container-contains` check adds e4074432d5bf [X86] Remove avx512f integer and/or/xor/min/max reduction [...] adds 8082ab2fc391 [LoopVectorize] Support epilogue vectorisation of loops wi [...] adds 54f1d950667c [gn build] Port 3696c70e67d9 adds b7f69b8d4650 [LV] Name values and blocks in same induction tests (NFC). adds 70f83f308449 [RISCV] add support for zbkx subextension in MC layer. adds b754d09fde0b [MLIR][Presburger] Refactor duplicate division merging to Utils adds b4b6d6374e2e [NFC] New test case for BasicAA and memcy/memmove with deopt adds f1e36474b9e5 [AMDGPU][NFC] Fix debug prints adds 0e70dd858eb7 [X86] Add PR46249 test case showing poorly widened select [...] adds b2a8eff45c55 [LV] Make some tests more robust by adding missing users. adds 5f290c090a24 Move STLFunctionalExtras out of STLExtras adds 853e79d8d8af [flang] Update tco tool pipline and add translation to LLVM IR adds 38ffea9b4c1f [demangler] Resync demangler sources adds 897d1bb659c2 [demangler] write-protect non-canonical source adds 6184e565ad40 [demangler][NFC] Refactor some parsing adds 589a93907222 Add `isConstinit` matcher adds a0d5e938fe9c Add missing include llvm/ADT/STLExtras adds f6ac8088b0e8 [LoopFlatten] Added comments about usage of various Loop A [...] adds ada6d78a7802 [LoopFlatten] Address FIXME about getTripCountFromExitCount. NFC. adds d42678b453bc [RISCV] Add side-effect-free vsetvli intrinsics adds 25e8f5f827bf Add missing STLExtras.h include from lldb/unittests/Testin [...] adds f7079bf9ee68 [X86] Fix v8i8 -> v8i16 typo in bool reductions adds 4436d4cd7c86 [X86] Rename cmp-with-zero bool reductions adds 0553f5e61ac7 [X86] Add cmp-equality bool reductions adds 34aedbe90d76 [AArch64] Regenerate CHECK lines for llvm/test/CodeGen/AAr [...] adds 5e5efd8a91f2 [clang-format] Fix SeparateDefinitionBlocks issues adds 7a5b0a2934f3 Reapply "IR: Make getRetAlign check callee function attributes" adds 99e8e17313e7 Reapply "Revert "GlobalISel: Add G_ASSERT_ALIGN hint instruction" adds 354b2c36ee46 Pre-commit test cases for (sra (load)) -> (sextload) folds. NFC adds 18aabae8e2b6 AMDGPU: Fix assertion on fixed stack objects with VGPR->AG [...] adds 49e37000691a [mlir][tensor] Move BufferizableOpInterface impl to tensor [...] adds 473aa8e10c49 [llvm][docs] Fix code-block in the testing guide adds 2d9ed1aba236 [mlir] Fix broken __repr__ implementation in Linalg OpDSL adds d193f7be7898 [libc++][AIX] Do not assert chmod return value is non-zero. adds fc08d1c29406 [mlir][tensor][bufferize] Support tensor.rank in Bufferiza [...] adds 4d53f88d1a18 [flang] Add MemoryAllocation pass to the pipeline adds 3ad35ba4dea5 [Templight] Don't display empty strings for names of unnam [...] adds c30d2893a43d [mlir][bufferize] Change insertion point for ToTensorOps adds 217570b03bbe [MLIR][OpenMP] Suppress -Wreturn-type warnings (NFC) adds c1335166b265 Don't run test/ClangScanDeps/modules-symlink.c on Windows adds cd2a9ff39788 [RISCV] Select int_riscv_vsll with shift of 1 to vadd.vv. adds b8c7cdcc81a0 [SelectionDAG][RISCV] Teach getNode to fold bswap(bswap(x))->x. adds b00ee46b5e4b [mlir][bufferize][NFC] Implement BufferizableOpInterface o [...] adds a43ed49f5b16 [DAGCombiner][RISCV] Canonicalize (bswap(bitreverse(x))->b [...] adds e494278ceeb7 [mlir][linalg] Add transpose support to hoist padding. adds cfe17986c952 [libcxx][test] {move,reverse}_iterator cannot be instantia [...] adds 699e22a083f2 [ISEL] Move trivial step_vector folds to FoldConstantArithmetic. adds 6997f4d07fa4 [X86] combineSetCCMOVMSK - fold allof(cmpeq(x,y)) -> ptest [...] adds c03fdd340356 [ELF] Fix the branch range computation when reusing a thunk adds a2afc8249a99 [libc++] Fix benchmark failure adds 6be77561f82d [SLP][NFC] Add debug logs for entry. adds 7cd441ff537e [clang][NFC] Wrap TYPE_SWITCH in "do while (0)" in the int [...] adds 80532ebb508d [AMDGPU][InstCombine] Remove zero image offset adds 74db5c8c95e2 Revert rG6a605b97a200 due to excessive memory use adds 50999e82e884 [clang-format] Space between attribute closing parenthesis [...] adds db2944e34b16 [libc++][format] Adds formatter floating-point. adds 787ccd345cbb [libc++][format] Adds formatter pointer. adds 2b8b48c5a0c4 [libc++][format] Disable default formatter. adds ade6d0d8fa1d [libc++][format] Adds formatter handle. adds a922324590a1 [gn build] Port 787ccd345cbb adds 5fa40fb29324 [gn build] Port db2944e34b16 adds ea17d29a6c83 [llvm] Do not replace dead constant references in metadata [...] adds 11cea7e5ce4d [AArch64] NFC: Clarify and auto-generate some CodeGen tests. adds 57eb5033cdff [libc] Add bazel definition for hypot/hypotf. adds 38e16e1cebb8 Use -gdwarf-4 in compiler-rt/test/profile/Linux/instrprof- [...] adds d27f02261442 [NFC][DebugInfo] Strip out an undesired #if 0 block adds 830df62a0703 [ConstraintElimination] Add test from PR53123. adds 8a15caaae561 [ConstraintElimination] Fix sign of sub decomposition. adds 0a3d946e7bb4 [libc][cmake] Make `add_tablegen` calls match others adds eadf7268d578 [libc++] Fix bugs in common_iterator; add test coverage. adds 4684857abfd7 [libc++][format] Finish P0645 Text Formatting. adds b1af01fe6aa7 [NFC][MLGO] Simplify conditional compilation adds c27f8fb96882 [AMDGPU] Remove cndmask from readsExecAsData adds 4858fe04a157 [lldb/Plugins] Add ScriptedProcess::GetThreadsInfo interface adds 1b86344fa80b [lldb/Plugins] Move ScriptedThreadInterface to ScriptedThread adds d3e0f7e1503b [lldb/Plugins] Add support of multiple ScriptedThreads in [...] adds cfa55bfe7814 [lldb/Plugins] Enrich ScriptedThreads Stop Reasons with Ex [...] adds 45148bfe8aec [lldb/Plugins] Fix ScriptedThread IndexID reporting adds 91bb116190cd [lldb/Interpreter] Make `ScriptedInterface::ErrorWithMessa [...] adds bb1fe369774a [AMDGPU] Make v8i16/v8f16 legal adds 9d32847b3315 [DAGCombine] Remove unused param in combineCarryDiamond(). NFC adds d4be9720e7e6 [test] Fix no-undef-type-md.ll. adds c548bc258c69 [InstCombine] add tests for icmp with masked mul operand; NFC adds 6d020a5ac2d5 [BOLT] Add missing <memory> in InstrumentationRuntimeLibrary.h adds 0407ab4114db [libc++] Make sure basic_string::reserve(n) never shrinks [...] adds 1f6af9c9cefd [libc++][CI] Re-enable all CI jobs adds c3ca2c6b14f9 [lldb/test] Fix `TestScriptedProcess.test_scripted_process [...] adds 997e128e2a78 [libcxx][test] the domain of == for forward iterators is i [...] adds 6a028296fe62 [PowerPC] Emit warning when SP is clobbered by asm adds d3932c690d97 [LoopVectorize] Add tests with reductions that are stored [...] adds adb6494660eb [MLIR] Add generic walk support to OpState adds 8d298355ca37 [X86] combineSetCCMOVMSK - detect and(pcmpeq(),pcmpeq()) p [...] adds 3b64ab574d98 [NFC][clangd] Use table to collect option aliases adds d87459a0b8e9 [CMake] Fixes /INCREMENTAL detection when considering addi [...] adds da85307ba699 [CMake] Pass CMAKE_C/CXX_COMPILER_LAUNCHER down to cross-c [...] adds 4cfea311cb8e [AMDGPU][NFC] Update to AMDGPUUsage for default Code Objec [...] adds 11bb4a11116c [X86] combinePredicateReduction - split vXi16 allof(cmpeq( [...] adds 22b0fe3fd9d4 [SystemZ][z/OS]: fix lit tmp_dir to use - instead of _ adds c1562683ee9a [MLIR][Presburger] LinearTransform: rename multiplication [...] adds 0e98fadc7953 [MLIR][Presburger] use braces for single-line loop when in [...] adds fe0c5309c4a8 [Fuchsia] Remove i386 from iossim architectures adds f1c9e7bdc921 [ObjC Availability] Add missing const to getVersion functi [...] adds 572fa9642cb5 [mlir] Add a ControlFlowSink pass. adds 9407a701790f DWARFv5 default: Switch bolt tests to use DWARFv4 since Bo [...] adds cd8122b27f8f [lldb] Add ConstString memory usage statistics adds 52f37c24c3f8 [libc++][NFC] remove this-> when calling member functions [...] adds 014a673441c6 [libc++] Remove std::basic_string's base class in ABIv2 adds 59eb542f6070 [libc] Let header generator generate the type header inclu [...] adds 3628febcf8e3 [mlir] NFC control-flow sink cleanup adds 3e746c6d9ef0 [mlir] Add support for ExpM1 to GLSL/OpenCL SPIRV Backends adds d0d8d2d572cd [clang][Driver] use DWARF4 for wasm adds dd01d971aa2c [clang][dataflow] Avoid MaxIterations overflow adds 902184e6cc26 [X86] combinePredicateReduction - generalize allof(cmpeq(x [...] adds fd0a4bc76bd9 [RISCV] Add missing space to 'clang-format on' directive. NFC adds 15f7857412ae [tests] Refresh autogen tests for SLP adds 6693c562f909 [llvm-profgen] Support to load debug info from a second binary adds 8b29b84c99ac [libc++] Fix LWG3422 "Issues of seed_seq's constructors" adds 16bff06790a7 [lldb] Make PythonDataObjects work with Python 2 adds 06cfdd5224bf [OpenMP][Fix] Properly inherit calling convention adds 5eb49009ebe6 [OpenMP] Add more identifier to created shared globals adds 92c1c63daeaf [mlir][sparse] integration test for sparse output operation adds ff8f7904d14d Remove null check after dereferencing the pointer (NFC) adds 9ea3dfa5d015 [RISCV][NFC] Rename RequiredExtensions to RequiredFeatures. adds 0e55d4fab018 [AA] Refine ModRefInfo for llvm.memcpy.* in presence of op [...] adds 810f13f0ebde [clang-tools-extra] Fix documentation build (NFC) adds e01e4c9115ad Fix bugs in GPUToNVVM lowering adds 0e9a4a3b6536 [mlir] Move the Buffer related source files out of Transforms/ adds 2e2c0738e80e [mlir:Transforms] Move NormalizeMemRefs to MemRef/Transforms/ adds a70aa7bb0d9a [mlir:Transforms] Move out the remaining non-dialect indep [...] adds 88c1df64bdd3 [mlir:ArmSVE][NFC] Remove dead code and unnecessary dependencies adds 65e7cd13bbc6 [mlir] Remove a bunch of unnecessary dialect dependencies adds 03e9ba274072 [ObjCARC] Remove unused RetainRVDep dependency kind. NFC. adds e7298464c5d0 [ObjCARC] Use "UnsafeClaimRV" to refer to unsafeClaim in e [...] No new revisions were added by this update. Summary of changes: .clang-tidy | 2 + bolt/include/bolt/Core/BinaryContext.h | 3 +- bolt/include/bolt/Core/BinaryData.h | 1 - bolt/include/bolt/Core/DebugData.h | 3 - bolt/include/bolt/Passes/AllocCombiner.h | 2 - bolt/include/bolt/Rewrite/DWARFRewriter.h | 3 +- .../RuntimeLibs/InstrumentationRuntimeLibrary.h | 1 + bolt/lib/Core/BinaryFunction.cpp | 5 +- bolt/lib/Core/DebugData.cpp | 7 +- bolt/lib/Core/JumpTable.cpp | 1 - bolt/lib/Passes/IndirectCallPromotion.cpp | 24 +- bolt/lib/Passes/ThreeWayBranch.cpp | 2 - bolt/lib/Profile/YAMLProfileWriter.cpp | 2 +- bolt/lib/Rewrite/DWARFRewriter.cpp | 4 +- bolt/lib/Rewrite/MachORewriteInstance.cpp | 2 - bolt/lib/Rewrite/RewriteInstance.cpp | 2 - bolt/lib/Utils/Utils.cpp | 1 - bolt/test/X86/asm-func-debug.test | 2 +- bolt/test/X86/inline-debug-info.test | 2 +- bolt/test/X86/inlined-function-mixed.test | 2 +- bolt/test/keep-aranges.test | 2 +- bolt/test/non-empty-debug-line.test | 2 +- clang-tools-extra/CMakeLists.txt | 1 + clang-tools-extra/clang-doc/tool/CMakeLists.txt | 4 +- .../find-all-symbols/tool/CMakeLists.txt | 2 +- .../clang-include-fixer/tool/CMakeLists.txt | 4 +- clang-tools-extra/clang-tidy/CMakeLists.txt | 2 +- clang-tools-extra/clang-tidy/GlobList.cpp | 1 + .../abseil/DurationFactoryScaleCheck.cpp | 2 +- .../ProBoundsConstantArrayIndexCheck.cpp | 3 +- .../clang-tidy/performance/MoveConstArgCheck.cpp | 119 +- .../clang-tidy/performance/MoveConstArgCheck.h | 2 + .../clang-tidy/readability/CMakeLists.txt | 2 + .../readability/ContainerContainsCheck.cpp | 144 + .../readability/ContainerContainsCheck.h | 40 + .../readability/DuplicateIncludeCheck.cpp | 116 + .../clang-tidy/readability/DuplicateIncludeCheck.h | 35 + .../clang-tidy/readability/FunctionSizeCheck.cpp | 3 +- .../readability/ReadabilityTidyModule.cpp | 6 + .../readability/SuspiciousCallArgumentCheck.cpp | 4 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 2 +- clang-tools-extra/clangd/CompileCommands.cpp | 17 +- clang-tools-extra/clangd/DumpAST.h | 1 + clang-tools-extra/clangd/HeuristicResolver.cpp | 5 +- clang-tools-extra/clangd/Hover.cpp | 2 +- clang-tools-extra/clangd/SourceCode.cpp | 3 +- clang-tools-extra/clangd/index/Background.cpp | 2 +- clang-tools-extra/docs/ReleaseNotes.rst | 20 + ...eguidelines-pro-bounds-constant-array-index.rst | 2 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 2 + .../checks/readability-container-contains.rst | 25 + .../checks/readability-duplicate-include.rst | 35 + clang-tools-extra/modularize/CMakeLists.txt | 2 +- .../readability-duplicate-include.h | 15 + .../readability-duplicate-include2.h | 1 + .../readability-duplicate-include/system/iostream | 1 + .../readability-duplicate-include/system/string.h | 1 + .../system/sys/types.h | 1 + .../readability-duplicate-include/system/types.h | 1 + ...s-pro-bounds-constant-array-index-gslheader.cpp | 6 +- ...eguidelines-pro-bounds-constant-array-index.cpp | 6 +- .../checkers/performance-move-const-arg.cpp | 94 + .../checkers/readability-container-contains.cpp | 230 ++ .../checkers/readability-duplicate-include.cpp | 72 + clang/CMakeLists.txt | 14 +- clang/cmake/caches/Fuchsia-stage2.cmake | 3 +- clang/cmake/modules/AddClang.cmake | 5 +- clang/cmake/modules/CMakeLists.txt | 4 +- clang/docs/JSONCompilationDatabase.rst | 4 + clang/docs/LibASTMatchersReference.html | 13 + clang/docs/ReleaseNotes.rst | 10 + clang/include/clang/AST/ASTContext.h | 1 - clang/include/clang/AST/DeclBase.h | 14 + clang/include/clang/AST/ExprObjC.h | 2 +- clang/include/clang/AST/FormatString.h | 3 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 17 + clang/include/clang/Basic/BuiltinsX86.def | 72 - clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 10 +- clang/include/clang/Basic/DirectoryEntry.h | 1 + clang/include/clang/Basic/riscv_vector.td | 8 +- clang/include/clang/Driver/ToolChain.h | 2 +- clang/include/clang/Sema/Sema.h | 2 + clang/include/clang/Tooling/ASTDiff/ASTDiff.h | 28 +- .../clang/Tooling/ASTDiff/ASTDiffInternal.h | 3 - .../DependencyScanningFilesystem.h | 347 +- clang/lib/AST/DeclBase.cpp | 9 + clang/lib/AST/Interp/PrimType.h | 50 +- clang/lib/AST/OSLog.cpp | 4 +- clang/lib/AST/PrintfFormatString.cpp | 2 +- clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + .../FlowSensitive/TypeErasedDataflowAnalysis.cpp | 4 +- clang/lib/Basic/Targets/AArch64.h | 1 + clang/lib/Basic/Targets/ARM.h | 1 + clang/lib/Basic/Targets/PPC.cpp | 39 +- clang/lib/Basic/Targets/RISCV.cpp | 2 +- clang/lib/Basic/Targets/Sparc.cpp | 2 - clang/lib/Basic/Targets/X86.h | 11 +- clang/lib/CodeGen/BackendUtil.cpp | 14 +- clang/lib/CodeGen/CGBuiltin.cpp | 103 - clang/lib/Driver/SanitizerArgs.cpp | 1 + clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 1 + clang/lib/Driver/ToolChains/Arch/ARM.cpp | 1 + clang/lib/Driver/ToolChains/Arch/ARM.h | 1 + clang/lib/Driver/ToolChains/Linux.cpp | 6 + clang/lib/Driver/ToolChains/Linux.h | 1 + clang/lib/Driver/ToolChains/PPCLinux.cpp | 56 + clang/lib/Driver/ToolChains/PPCLinux.h | 7 +- clang/lib/Driver/ToolChains/WebAssembly.h | 1 + clang/lib/Format/AffectedRangeManager.cpp | 2 + clang/lib/Format/ContinuationIndenter.cpp | 9 +- clang/lib/Format/DefinitionBlockSeparator.cpp | 86 +- clang/lib/Format/DefinitionBlockSeparator.h | 2 +- clang/lib/Format/FormatToken.cpp | 1 + clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/QualifierAlignmentFixer.cpp | 4 +- clang/lib/Format/SortJavaScriptImports.cpp | 1 + clang/lib/Format/TokenAnnotator.cpp | 29 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 3 +- clang/lib/Format/UnwrappedLineParser.cpp | 7 +- clang/lib/Format/UnwrappedLineParser.h | 3 +- clang/lib/Frontend/FrontendActions.cpp | 95 +- clang/lib/Frontend/Rewrite/InclusionRewriter.cpp | 20 +- clang/lib/Headers/avx2intrin.h | 30 +- clang/lib/Headers/avx512bwintrin.h | 20 +- clang/lib/Headers/avx512fintrin.h | 72 +- clang/lib/Headers/avx512vlintrin.h | 20 +- clang/lib/Headers/emmintrin.h | 8 +- clang/lib/Headers/smmintrin.h | 16 +- clang/lib/Headers/tmmintrin.h | 6 +- clang/lib/Sema/SemaChecking.cpp | 72 +- clang/lib/Sema/SemaCodeComplete.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 49 +- clang/lib/Sema/SemaDeclCXX.cpp | 2 +- clang/lib/Sema/SemaModule.cpp | 2 +- clang/lib/Sema/SemaTemplate.cpp | 2 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 2 +- .../DependencyScanningFilesystem.cpp | 255 +- clang/runtime/CMakeLists.txt | 2 + clang/test/CXX/module/module.interface/p2-2.cpp | 37 + clang/test/CXX/module/module.interface/p6.cpp | 93 + clang/test/ClangScanDeps/modules-symlink.c | 55 + .../CodeGen/RISCV/riscv-attr-builtin-alias-err.c | 2 +- .../test/CodeGen/RISCV/riscv-attr-builtin-alias.c | 2 +- clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c | 4 +- clang/test/CodeGen/RISCV/riscv-v-debuginfo.c | 2 +- clang/test/CodeGen/RISCV/riscv-v-lifetime.cpp | 2 +- .../RISCV/rvb-intrinsics/riscv32-zbb-error.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vaadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vasub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcompress.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcpop.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfabs.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfclass.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfirst.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfncvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrec7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsgnj.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsqrt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vid.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/viota.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vlse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlseg.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsegff.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmand.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfeq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmflt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfne.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnot.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbf.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmseq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsif.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmslt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsne.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsof.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnclip.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vncvt.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vreinterpret.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrgather.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsbc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vse.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vset.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsext.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslidedown.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslideup.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssrl.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vzext.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/rvv-error.c | 18 + clang/test/CodeGen/RISCV/rvv-intrinsics/vaadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vcompress.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vcpop.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfabs.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfclass.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfirst.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrec7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsqrt7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsgnj.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vfslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfslide1up.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsqrt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmsac.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vid.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/viota.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vleff.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlseg.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsegff.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmclr.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfeq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmflt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbf.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmseq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsif.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmslt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsof.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnclip.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredxor.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vreinterpret.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrgather.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsetvl.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vsetvlmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsext.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslide1up.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslidedown.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vslideup.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxseg.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vundefined.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vzext.c | 2 +- clang/test/CodeGen/RISCV/rvv_errors.c | 2 +- clang/test/CodeGen/builtins-x86.c | 15 - clang/test/CodeGen/debug-info-extern-call.c | 4 +- clang/test/CodeGen/dwarf-version.c | 8 +- clang/test/CodeGen/target-data.c | 2 +- .../lib/gcc/powerpc64le-linux-gnu/11.2.0}/.keep | 0 clang/test/Driver/cl-options.c | 2 +- clang/test/Driver/clang-g-opts.c | 2 +- clang/test/Driver/debug-options.c | 7 + clang/test/Driver/ppc-float-abi-warning.cpp | 13 + clang/test/Driver/riscv-arch.c | 49 +- clang/test/Driver/ve-toolchain.c | 2 +- clang/test/Driver/ve-toolchain.cpp | 2 +- clang/test/Driver/wasm-toolchain.cpp | 10 +- clang/test/FixIt/format.m | 16 +- clang/test/Headers/riscv-vector-header.c | 2 +- clang/test/InterfaceStubs/object.c | 3 +- clang/test/Misc/ppc-inline-asm-clobber-warning.c | 38 + clang/test/Modules/cxx20-export-import.cpp | 3 + clang/test/Preprocessor/predefined-arch-macros.c | 4 +- clang/test/Preprocessor/riscv-target-features.c | 98 +- clang/test/Sema/format-strings.c | 84 +- clang/test/Sema/riscv-types.c | 2 +- .../test/Templight/templight-empty-entries-fix.cpp | 333 ++ clang/tools/c-index-test/CMakeLists.txt | 2 +- clang/tools/clang-format/CMakeLists.txt | 12 +- clang/tools/clang-nvlink-wrapper/CMakeLists.txt | 2 +- clang/tools/clang-rename/CMakeLists.txt | 4 +- clang/tools/diagtool/DiagTool.cpp | 1 + clang/tools/libclang/BuildSystem.cpp | 1 + clang/tools/libclang/CMakeLists.txt | 2 +- clang/tools/scan-build-py/CMakeLists.txt | 6 +- clang/tools/scan-build/CMakeLists.txt | 6 +- clang/tools/scan-view/CMakeLists.txt | 4 +- .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 19 + .../Format/DefinitionBlockSeparatorTest.cpp | 117 +- clang/unittests/Format/FormatTest.cpp | 2 + clang/unittests/Tooling/DependencyScannerTest.cpp | 4 + clang/utils/TableGen/RISCVVEmitter.cpp | 90 +- clang/utils/hmaptool/CMakeLists.txt | 2 +- cmake/Modules/CheckLinkerFlag.cmake | 17 + compiler-rt/CMakeLists.txt | 17 +- compiler-rt/cmake/config-ix.cmake | 20 +- .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 2 + .../profile/Linux/instrprof-debug-info-correlate.c | 2 +- compiler-rt/test/tsan/vfork.cpp | 2 + flang/docs/FIRArrayOperations.md | 342 ++ flang/examples/CMakeLists.txt | 2 +- flang/examples/FlangOmpReport/CMakeLists.txt | 9 + flang/examples/FlangOmpReport/FlangOmpReport.cpp | 75 + .../FlangOmpReport/FlangOmpReportVisitor.cpp | 229 ++ .../FlangOmpReportVisitor.h} | 0 .../requirements.txt | 0 .../yaml_summarizer.py | 0 .../PrintFlangFunctionNames/CMakeLists.txt | 7 +- .../flang-omp-report-plugin/CMakeLists.txt | 6 - .../flang-omp-report-visitor.cpp | 229 -- .../flang-omp-report-plugin/flang-omp-report.cpp | 75 - flang/include/flang/Optimizer/CodeGen/CodeGen.h | 10 +- flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- flang/include/flang/Optimizer/Support/InitFIR.h | 12 +- flang/include/flang/Optimizer/Transforms/Passes.h | 2 + flang/include/flang/Tools/CLOptions.inc | 168 + flang/lib/Frontend/CompilerInvocation.cpp | 1 + flang/lib/Optimizer/CodeGen/CodeGen.cpp | 37 + flang/lib/Optimizer/Support/CMakeLists.txt | 1 + flang/lib/Optimizer/Support/InitFIR.cpp | 20 + .../lib/Optimizer/Transforms/MemoryAllocation.cpp | 39 +- flang/lib/Semantics/check-omp-structure.cpp | 154 +- flang/lib/Semantics/check-omp-structure.h | 6 + flang/lib/Semantics/runtime-type-info.cpp | 2 +- flang/runtime/descriptor-io.cpp | 2 +- flang/runtime/descriptor-io.h | 1 + flang/runtime/edit-input.cpp | 10 +- flang/runtime/format-implementation.h | 137 +- flang/runtime/format.h | 14 +- flang/runtime/io-api.cpp | 51 +- flang/runtime/io-error.cpp | 8 +- flang/runtime/io-stmt.cpp | 5 +- flang/runtime/io-stmt.h | 12 +- flang/runtime/namelist.cpp | 17 +- flang/runtime/unit.h | 2 +- flang/test/Fir/basic-program.fir | 11 + flang/test/Fir/convert-to-llvm.fir | 18 +- flang/test/Semantics/omp-atomic01.f90 | 48 +- flang/test/Semantics/omp-atomic02.f90 | 109 + flang/test/Semantics/omp-atomic03.f90 | 93 + flang/test/Semantics/omp-atomic04.f90 | 168 + flang/test/Semantics/omp-atomic05.f90 | 26 + flang/tools/tco/CMakeLists.txt | 15 +- flang/tools/tco/tco.cpp | 44 +- flang/unittests/Runtime/Namelist.cpp | 31 + libc/config/linux/api.td | 227 +- libc/config/public_api.td | 7 +- libc/include/CMakeLists.txt | 4 +- libc/include/llvm-libc-types/CMakeLists.txt | 4 +- .../{__sigaction.h => struct_sigaction.h} | 0 libc/include/llvm-libc-types/{tm.h => struct_tm.h} | 0 libc/utils/HdrGen/PrototypeTestGen/CMakeLists.txt | 2 +- libc/utils/HdrGen/PublicAPICommand.cpp | 21 +- libc/utils/LibcTableGenUtil/APIIndexer.cpp | 6 +- libc/utils/LibcTableGenUtil/APIIndexer.h | 2 +- libc/utils/tools/WrapperGen/CMakeLists.txt | 2 +- libcxx/benchmarks/filesystem.bench.cpp | 4 +- libcxx/benchmarks/formatter_float.bench.cpp | 241 ++ libcxx/cmake/config-ix.cmake | 4 +- libcxx/docs/DesignDocs/UniquePtrTrivialAbi.rst | 2 +- libcxx/docs/ReleaseNotes.rst | 23 +- libcxx/docs/Status/Cxx20.rst | 1 + libcxx/docs/Status/Cxx20Issues.csv | 8 +- libcxx/docs/Status/Cxx20Papers.csv | 4 +- libcxx/docs/Status/Cxx2bIssues.csv | 16 +- libcxx/docs/Status/FormatIssues.csv | 2 +- libcxx/include/CMakeLists.txt | 2 + libcxx/include/__config | 2 + libcxx/include/__format/format_arg.h | 44 +- libcxx/include/__format/formatter.h | 58 +- libcxx/include/__format/formatter_bool.h | 2 +- libcxx/include/__format/formatter_floating_point.h | 717 ++++ libcxx/include/__format/formatter_integer.h | 24 +- libcxx/include/__format/formatter_integral.h | 2 +- libcxx/include/__format/formatter_pointer.h | 91 + libcxx/include/__format/formatter_string.h | 10 +- libcxx/include/__format/parser_std_format_spec.h | 261 +- libcxx/include/__hash_table | 40 +- libcxx/include/__iterator/common_iterator.h | 67 +- libcxx/include/__iterator/readable_traits.h | 10 +- libcxx/include/__locale | 4 +- libcxx/include/__random/seed_seq.h | 31 +- libcxx/include/__ranges/enable_view.h | 12 +- libcxx/include/__ranges/view_interface.h | 3 +- libcxx/include/format | 162 +- libcxx/include/module.modulemap | 30 +- libcxx/include/string | 96 +- libcxx/include/unordered_map | 21 +- libcxx/include/unordered_set | 15 +- libcxx/include/version | 2 +- libcxx/src/string.cpp | 2 + .../formatter_floating_point.module.verify.cpp | 15 + .../format/formatter_pointer.module.verify.cpp | 15 + .../basic.string/string.capacity/PR53170.pass.cpp | 79 + .../basic.string/string.capacity/reserve.pass.cpp | 50 - .../format.arg/visit_format_arg.pass.cpp | 6 + .../format.arguments/format.args/get.pass.cpp | 2 + .../std_format_spec_floating_point.pass.cpp | 353 ++ .../std_format_spec_pointer.pass.cpp | 254 ++ .../iterator.operators.addressof.compile.pass.cpp | 49 + .../assign_move.addressof.compile.pass.cpp | 42 + .../move.addressof.compile.pass.cpp | 33 + .../move_alloc.addressof.compile.pass.cpp | 36 + .../emplace_hint.addressof.compile.pass.cpp | 30 + .../erase_const_iter.addressof.compile.pass.cpp | 27 + .../erase_range.addressof.compile.pass.cpp | 27 + ...rt_hint_const_lvalue.addressof.compile.pass.cpp | 28 + ...tructible_value_type.addressof.compile.pass.cpp | 28 + ...rt_rvalue_value_type.addressof.compile.pass.cpp | 28 + .../try_emplace_hint.addressof.compile.pass.cpp | 40 + .../unord.map.swap/swap.addressof.compile.pass.cpp | 29 + .../move.addressof.compile.pass.cpp | 33 + .../move_alloc.addressof.compile.pass.cpp | 36 + .../emplace_hint.addressof.compile.pass.cpp | 30 + .../move.addressof.compile.pass.cpp | 29 + .../move_alloc.addressof.compile.pass.cpp | 33 + .../emplace_hint.addressof.compile.pass.cpp | 30 + ...rt_hint_const_lvalue.addressof.compile.pass.cpp | 28 + .../insert_hint_rvalue.addressof.compile.pass.cpp | 27 + .../iterator.operators.addressof.compile.pass.cpp | 47 + .../move.addressof.compile.pass.cpp | 29 + .../move_alloc.addressof.compile.pass.cpp | 35 + .../directory_entry.cons/path.pass.cpp | 2 - .../directory_entry.mods/refresh.pass.cpp | 2 - .../directory_entry.mods/replace_filename.pass.cpp | 2 - .../directory_entry.obs/file_size.pass.cpp | 2 - .../directory_entry.obs/file_type_obs.pass.cpp | 2 - .../directory_entry.obs/hard_link_count.pass.cpp | 2 - .../directory_entry.obs/last_write_time.pass.cpp | 2 - .../directory_entry.obs/status.pass.cpp | 2 - .../directory_entry.obs/symlink_status.pass.cpp | 2 - .../directory_iterator.members/copy.pass.cpp | 2 - .../copy_assign.pass.cpp | 2 - .../directory_iterator.members/ctor.pass.cpp | 2 - .../directory_iterator.members/increment.pass.cpp | 2 - .../directory_iterator.members/move.pass.cpp | 2 - .../move_assign.pass.cpp | 2 - .../begin_end.pass.cpp | 2 - .../rec.dir.itr.members/copy.pass.cpp | 2 - .../rec.dir.itr.members/copy_assign.pass.cpp | 2 - .../rec.dir.itr.members/ctor.pass.cpp | 2 - .../rec.dir.itr.members/depth.pass.cpp | 2 - .../disable_recursion_pending.pass.cpp | 2 - .../rec.dir.itr.members/increment.pass.cpp | 2 - .../rec.dir.itr.members/move.pass.cpp | 2 - .../rec.dir.itr.members/move_assign.pass.cpp | 2 - .../rec.dir.itr.members/pop.pass.cpp | 2 - .../rec.dir.itr.members/recursion_pending.pass.cpp | 2 - .../rec.dir.itr.nonmembers/begin_end.pass.cpp | 2 - .../fs.op.funcs/fs.op.canonical/canonical.pass.cpp | 2 - .../fs.op.funcs/fs.op.copy/copy.pass.cpp | 2 - .../create_directories.pass.cpp | 2 - .../create_directory_with_attributes.pass.cpp | 2 - .../fs.op.current_path/current_path.pass.cpp | 2 - .../fs.op.equivalent/equivalent.pass.cpp | 2 - .../fs.op.funcs/fs.op.exists/exists.pass.cpp | 2 - .../fs.op.funcs/fs.op.file_size/file_size.pass.cpp | 2 - .../fs.op.hard_lk_ct/hard_link_count.pass.cpp | 2 - .../fs.op.is_block_file/is_block_file.pass.cpp | 2 - .../fs.op.is_char_file/is_character_file.pass.cpp | 2 - .../fs.op.is_directory/is_directory.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_empty/is_empty.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_fifo/is_fifo.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_other/is_other.pass.cpp | 2 - .../fs.op.is_regular_file/is_regular_file.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_socket/is_socket.pass.cpp | 2 - .../fs.op.is_symlink/is_symlink.pass.cpp | 2 - .../fs.op.read_symlink/read_symlink.pass.cpp | 2 - .../fs.op.funcs/fs.op.relative/relative.pass.cpp | 2 - .../fs.op.funcs/fs.op.rename/rename.pass.cpp | 2 - .../fs.op.resize_file/resize_file.pass.cpp | 2 - .../fs.op.funcs/fs.op.space/space.pass.cpp | 2 - .../fs.op.funcs/fs.op.status/status.pass.cpp | 2 - .../fs.op.symlink_status/symlink_status.pass.cpp | 2 - .../weakly_canonical.pass.cpp | 2 - .../iterators.common/constraints.compile.pass.cpp | 28 + .../iterators.common/ctor.converting.pass.cpp | 48 + .../iterators.common/ctor.default.pass.cpp | 41 + .../iterators.common/ctor.iter.pass.cpp | 50 + .../iterators.common/ctor.pass.cpp | 90 - .../iterators.common/ctor.sentinel.pass.cpp | 63 + .../iterators.common/iter_move.pass.cpp | 74 +- .../iterators.common/iter_swap.pass.cpp | 121 +- .../predef.iterators/iterators.common/types.h | 26 - .../move.iter.op=/move_iterator.pass.cpp | 4 +- .../reverse.iter.cmp/three-way.pass.cpp | 4 + .../reverse.iter.cons/assign.pass.cpp | 2 + .../support.limits.general/memory.version.pass.cpp | 39 - .../cpo.compile.pass.cpp | 3 + .../niebloid.compile.pass.cpp | 1 + .../rand.util/rand.util.seedseq/default.pass.cpp | 3 + .../rand.util/rand.util.seedseq/iterator.pass.cpp | 42 +- .../rand.util.seedseq/iterator.verify.cpp | 30 + .../range.all/range.owning.view/begin_end.pass.cpp | 8 +- .../range.transform/iterator/plus_minus.pass.cpp | 4 +- .../range.view/enable_view.compile.pass.cpp | 65 +- .../view.interface/view.interface.pass.cpp | 9 + .../string.iterators/iterators.pass.cpp | 1 - .../utilities/charconv/charconv.msvc/test.pass.cpp | 5 + .../format.arg.store/class.pass.cpp | 2 + .../format.arg.store/make_format_args.sh.cpp | 2 + .../format.arg/operator_bool.pass.cpp | 2 + .../format.arguments/format.args/ctor.pass.cpp | 2 + .../format.context/format.context/arg.pass.cpp | 2 + .../format.context/format.context/ctor.pass.cpp | 2 + .../format.context/format.context/locale.pass.cpp | 2 + .../format.formatter.spec/formatter.char.pass.cpp | 2 + .../formatter.floating_point.pass.cpp | 418 ++- .../formatter.handle.pass.cpp | 76 + .../formatter.pointer.pass.cpp | 107 + .../formatter.signed_integral.pass.cpp | 2 + .../formatter.unsigned_integral.pass.cpp | 2 + .../format.formatter.spec/types.compile.pass.cpp | 370 +++ .../format.parse.ctx/advance_to.pass.cpp | 4 +- .../format/format.functions/format_tests.h | 1665 +++++++++- .../format.functions/locale-specific_form.pass.cpp | 1717 ++++++++++ .../ranges_uninitialized_copy.pass.cpp | 10 +- .../ranges_uninitialized_copy_n.pass.cpp | 4 +- .../ranges_uninitialized_move.pass.cpp | 10 +- .../ranges_uninitialized_move_n.pass.cpp | 4 +- libcxx/test/support/filesystem_test_helper.h | 6 + libcxx/test/support/test_iterators.h | 32 - libcxx/utils/ci/buildkite-pipeline.yml | 467 ++- .../generate_feature_test_macro_components.py | 2 +- libcxxabi/src/demangle/ItaniumDemangle.h | 85 +- libcxxabi/src/demangle/StringView.h | 14 +- libcxxabi/src/demangle/Utility.h | 9 +- libcxxabi/src/demangle/cp-to-llvm.sh | 14 +- libcxxabi/test/test_demangle.pass.cpp | 2 + libunwind/cmake/config-ix.cmake | 8 +- lld/ELF/Relocations.cpp | 5 +- lld/ELF/Relocations.h | 1 + lld/test/ELF/aarch64-combined-dynrel-ifunc.s | 5 +- lld/test/ELF/aarch64-combined-dynrel.s | 3 +- lld/test/ELF/aarch64-thunk-reuse.s | 49 + lld/test/ELF/arm-thunk-reuse.s | 52 + .../python/scripted_process/scripted_process.py | 20 +- lldb/include/lldb/Interpreter/ScriptedInterface.h | 9 +- .../lldb/Interpreter/ScriptedProcessInterface.h | 12 +- lldb/include/lldb/Target/Statistics.h | 6 + lldb/include/lldb/Target/Thread.h | 2 +- lldb/include/lldb/Utility/ConstString.h | 10 + lldb/include/lldb/Utility/UserIDResolver.h | 1 + lldb/source/Commands/CommandCompletions.cpp | 2 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 56 +- .../Commands/CommandObjectBreakpointCommand.cpp | 9 +- lldb/source/Commands/CommandObjectCommands.cpp | 34 +- lldb/source/Commands/CommandObjectDisassemble.cpp | 3 +- lldb/source/Commands/CommandObjectExpression.cpp | 6 +- lldb/source/Commands/CommandObjectFrame.cpp | 18 +- lldb/source/Commands/CommandObjectHelp.cpp | 3 +- lldb/source/Commands/CommandObjectHelp.h | 2 +- lldb/source/Commands/CommandObjectLog.cpp | 5 +- lldb/source/Commands/CommandObjectMemory.cpp | 31 +- lldb/source/Commands/CommandObjectMemoryTag.cpp | 5 +- lldb/source/Commands/CommandObjectPlatform.cpp | 36 +- lldb/source/Commands/CommandObjectProcess.cpp | 45 +- lldb/source/Commands/CommandObjectRegexCommand.cpp | 2 +- lldb/source/Commands/CommandObjectRegister.cpp | 6 +- lldb/source/Commands/CommandObjectReproducer.cpp | 6 +- lldb/source/Commands/CommandObjectScript.h | 2 +- lldb/source/Commands/CommandObjectSession.cpp | 6 +- lldb/source/Commands/CommandObjectSettings.cpp | 15 +- lldb/source/Commands/CommandObjectSource.cpp | 12 +- lldb/source/Commands/CommandObjectStats.cpp | 2 +- lldb/source/Commands/CommandObjectTarget.cpp | 50 +- lldb/source/Commands/CommandObjectThread.cpp | 43 +- lldb/source/Commands/CommandObjectTrace.cpp | 15 +- lldb/source/Commands/CommandObjectType.cpp | 44 +- lldb/source/Commands/CommandObjectWatchpoint.cpp | 26 +- .../Commands/CommandObjectWatchpointCommand.cpp | 5 +- lldb/source/Commands/CommandOptionsProcessLaunch.h | 2 +- lldb/source/Host/common/Socket.cpp | 1 + lldb/source/Host/common/Terminal.cpp | 2 +- .../ExpressionParser/Clang/CxxModuleHandler.cpp | 2 +- .../Plugins/Language/CPlusPlus/GenericBitset.cpp | 1 + .../Plugins/Process/scripted/ScriptedProcess.cpp | 70 +- .../Plugins/Process/scripted/ScriptedThread.cpp | 91 +- .../Plugins/Process/scripted/ScriptedThread.h | 12 +- .../ScriptInterpreter/Python/PythonDataObjects.cpp | 6 +- .../Python/ScriptedProcessPythonInterface.cpp | 24 +- .../Python/ScriptedProcessPythonInterface.h | 7 +- .../Python/ScriptedThreadPythonInterface.cpp | 17 +- .../Python/ScriptedThreadPythonInterface.h | 3 +- .../Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp | 4 +- lldb/source/Target/Statistics.cpp | 14 + lldb/source/Utility/ConstString.cpp | 15 + lldb/source/Utility/Timer.cpp | 4 +- .../command/nested_alias/TestNestedAlias.py | 7 + .../API/commands/statistics/basic/TestStats.py | 45 + .../basic_entry_values/TestBasicEntryValues.py | 2 +- .../API/functionalities/scripted_process/Makefile | 4 +- .../scripted_process/TestScriptedProcess.py | 20 +- .../scripted_process/dummy_scripted_process.py | 1 + .../scripted_process/invalid_scripted_process.py | 3 +- .../API/functionalities/scripted_process/main.c | 8 - .../API/functionalities/scripted_process/main.cpp | 34 + .../stack_core_scripted_process.py | 71 +- .../TestUnambiguousTailCalls.py | 2 +- .../Makefile | 0 .../TestAArch64LinuxTaggedMemoryAccess.py | 83 + .../API/linux/aarch64/tagged_memory_access/main.c | 19 + .../TestAArch64LinuxTaggedMemoryRead.py | 55 - .../API/linux/aarch64/tagged_memory_read/main.c | 15 - .../DWARF/x86/debug-types-dwo-cross-reference.cpp | 4 +- lldb/tools/lldb-vscode/FifoFiles.h | 2 + .../TestingSupport/MockTildeExpressionResolver.cpp | 1 + llvm/.gitattributes | 2 + llvm/cmake/modules/CrossCompile.cmake | 2 + llvm/cmake/modules/HandleLLVMOptions.cmake | 21 +- llvm/cmake/modules/LLVMCheckLinkerFlag.cmake | 12 +- llvm/cmake/modules/LLVMExternalProjectUtils.cmake | 2 + llvm/docs/AMDGPUUsage.rst | 14 +- llvm/docs/CommandGuide/llvm-mca.rst | 4 +- llvm/docs/LangRef.rst | 42 +- llvm/docs/ORCv2.rst | 92 + llvm/docs/Reference.rst | 1 + llvm/docs/ReleaseNotes.rst | 11 +- llvm/docs/Security.rst | 2 + llvm/docs/SecurityTransparencyReports.rst | 44 + llvm/docs/TestingGuide.rst | 2 +- llvm/include/llvm/ADT/BitVector.h | 12 + llvm/include/llvm/ADT/CoalescingBitVector.h | 1 + llvm/include/llvm/ADT/CombinationGenerator.h | 2 +- llvm/include/llvm/ADT/Optional.h | 1 - llvm/include/llvm/ADT/STLExtras.h | 61 +- llvm/include/llvm/ADT/STLFunctionalExtras.h | 76 + llvm/include/llvm/ADT/SmallBitVector.h | 12 + llvm/include/llvm/ADT/SmallSet.h | 1 + llvm/include/llvm/ADT/SmallVector.h | 2 - llvm/include/llvm/ADT/SparseMultiSet.h | 2 +- llvm/include/llvm/ADT/SparseSet.h | 2 +- llvm/include/llvm/ADT/StringMap.h | 1 + llvm/include/llvm/ADT/StringMapEntry.h | 2 + llvm/include/llvm/ADT/StringRef.h | 30 +- llvm/include/llvm/ADT/StringSwitch.h | 1 + llvm/include/llvm/ADT/identity.h | 34 + .../include/llvm/Analysis/AliasAnalysisEvaluator.h | 16 +- llvm/include/llvm/Analysis/DependenceAnalysis.h | 17 +- llvm/include/llvm/Analysis/DivergenceAnalysis.h | 2 +- .../include/llvm/Analysis/IRSimilarityIdentifier.h | 2 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 2 +- .../include/llvm/Analysis/LazyBlockFrequencyInfo.h | 11 +- .../llvm/Analysis/LazyBranchProbabilityInfo.h | 4 +- llvm/include/llvm/Analysis/LoopAccessAnalysis.h | 33 +- llvm/include/llvm/Analysis/LoopAnalysisManager.h | 4 +- llvm/include/llvm/Analysis/MemorySSA.h | 4 +- .../include/llvm/Analysis/NoInferenceModelRunner.h | 2 +- llvm/include/llvm/Analysis/ObjCARCInstKind.h | 2 +- llvm/include/llvm/Analysis/ObjCARCUtil.h | 6 +- llvm/include/llvm/Analysis/PHITransAddr.h | 4 +- .../include/llvm/Analysis/ReleaseModeModelRunner.h | 6 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 14 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 25 +- llvm/include/llvm/Debuginfod/Debuginfod.h | 2 + llvm/include/llvm/Debuginfod/HTTPClient.h | 2 + llvm/include/llvm/Demangle/ItaniumDemangle.h | 87 +- llvm/include/llvm/Demangle/MicrosoftDemangle.h | 2 - .../include/llvm/Demangle/MicrosoftDemangleNodes.h | 1 - llvm/include/llvm/Demangle/StringView.h | 16 +- llvm/include/llvm/Demangle/Utility.h | 11 +- .../llvm/ExecutionEngine/JITLink/MemoryFlags.h | 1 + llvm/include/llvm/ExecutionEngine/JITLink/riscv.h | 32 +- llvm/include/llvm/IR/InstrTypes.h | 8 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 23 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 16 + llvm/include/llvm/IR/LLVMContext.h | 1 + llvm/include/llvm/IR/Type.h | 9 + llvm/include/llvm/MC/MCStreamer.h | 1 + llvm/include/llvm/MC/SubtargetFeature.h | 1 + llvm/include/llvm/Object/ELFObjectFile.h | 1 + llvm/include/llvm/ProfileData/MemProfData.inc | 4 +- llvm/include/llvm/Support/AArch64TargetParser.h | 1 - llvm/include/llvm/Support/ARMAttributeParser.h | 7 +- llvm/include/llvm/Support/Allocator.h | 4 - llvm/include/llvm/Support/BinaryStreamReader.h | 2 - llvm/include/llvm/Support/BinaryStreamRef.h | 1 - llvm/include/llvm/Support/BinaryStreamWriter.h | 1 - llvm/include/llvm/Support/BlockFrequency.h | 5 +- llvm/include/llvm/Support/BranchProbability.h | 1 - llvm/include/llvm/Support/CrashRecoveryContext.h | 2 +- llvm/include/llvm/Support/Duration.h | 28 + llvm/include/llvm/Support/ELFAttributeParser.h | 3 +- llvm/include/llvm/Support/Error.h | 1 - llvm/include/llvm/Support/ExtensibleRTTI.h | 2 - llvm/include/llvm/Support/FileCollector.h | 1 - llvm/include/llvm/Support/FileUtilities.h | 6 +- llvm/include/llvm/Support/FormatVariadic.h | 3 +- llvm/include/llvm/Support/GraphWriter.h | 2 - .../llvm/Support/ItaniumManglingCanonicalizer.h | 1 - llvm/include/llvm/Support/JSON.h | 1 + llvm/include/llvm/Support/Parallel.h | 80 +- llvm/include/llvm/Support/RISCVISAInfo.h | 2 - llvm/include/llvm/Support/SymbolRemappingReader.h | 3 +- llvm/include/llvm/Support/TargetOpcodes.def | 3 +- llvm/include/llvm/Support/TargetParser.h | 2 - llvm/include/llvm/Support/TimeProfiler.h | 4 +- llvm/include/llvm/Support/Timer.h | 3 +- llvm/include/llvm/Support/TrigramIndex.h | 1 - llvm/include/llvm/Support/TypeSize.h | 2 +- llvm/include/llvm/Support/VirtualFileSystem.h | 1 + llvm/include/llvm/Support/YAMLTraits.h | 4 - llvm/include/llvm/Support/raw_ostream.h | 5 +- llvm/include/llvm/Target/GenericOpcodes.td | 7 + llvm/include/llvm/Testing/Support/Annotations.h | 2 + llvm/lib/Analysis/BasicAliasAnalysis.cpp | 4 +- llvm/lib/Analysis/CaptureTracking.cpp | 12 +- llvm/lib/Analysis/ConstantFolding.cpp | 23 +- llvm/lib/Analysis/CostModel.cpp | 6 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 2 +- llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 2 +- llvm/lib/Analysis/InlineCost.cpp | 7 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 10 +- llvm/lib/Analysis/LoopInfo.cpp | 5 +- llvm/lib/Analysis/MLInlineAdvisor.cpp | 9 +- llvm/lib/Analysis/MemorySSA.cpp | 4 +- llvm/lib/Analysis/ObjCARCInstKind.cpp | 28 +- llvm/lib/Analysis/ReplayInlineAdvisor.cpp | 3 +- llvm/lib/Analysis/ScalarEvolution.cpp | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 4 +- llvm/lib/AsmParser/LLParser.cpp | 12 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 3 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 12 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 24 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 16 +- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 38 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 47 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 17 + llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 12 - llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 3 +- .../CodeGen/LiveDebugValues/LiveDebugValues.cpp | 7 +- llvm/lib/CodeGen/MLRegallocEvictAdvisor.cpp | 22 +- llvm/lib/CodeGen/NonRelocatableStringpool.cpp | 1 + llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 56 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 37 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 19 +- llvm/lib/Debuginfod/Debuginfod.cpp | 2 + llvm/lib/Demangle/ItaniumDemangle.cpp | 2 - llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 1 - .../ExecutionEngine/JITLink/ELFLinkGraphBuilder.h | 12 +- llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 43 + llvm/lib/ExecutionEngine/JITLink/riscv.cpp | 10 + llvm/lib/IR/AutoUpgrade.cpp | 31 +- llvm/lib/IR/Constants.cpp | 9 +- llvm/lib/IR/Core.cpp | 25 +- llvm/lib/MC/MCDwarf.cpp | 4 +- llvm/lib/MC/MCParser/MasmParser.cpp | 3 +- llvm/lib/Object/Archive.cpp | 1 - llvm/lib/Object/Object.cpp | 1 + llvm/lib/Support/APInt.cpp | 2 - llvm/lib/Support/ARMAttributeParser.cpp | 2 - llvm/lib/Support/ARMWinEH.cpp | 1 - llvm/lib/Support/BlockFrequency.cpp | 1 + llvm/lib/Support/CommandLine.cpp | 2 +- llvm/lib/Support/DAGDeltaAlgorithm.cpp | 1 - llvm/lib/Support/DataExtractor.cpp | 1 - llvm/lib/Support/ELFAttributeParser.cpp | 2 - llvm/lib/Support/FileOutputBuffer.cpp | 2 - llvm/lib/Support/FileUtilities.cpp | 3 - llvm/lib/Support/GraphWriter.cpp | 7 +- llvm/lib/Support/InitLLVM.cpp | 7 +- llvm/lib/Support/JSON.cpp | 1 + llvm/lib/Support/MSP430AttributeParser.cpp | 3 +- llvm/lib/Support/MemoryBuffer.cpp | 5 +- llvm/lib/Support/NativeFormatting.cpp | 1 - llvm/lib/Support/Parallel.cpp | 32 + llvm/lib/Support/PrettyStackTrace.cpp | 5 +- llvm/lib/Support/RISCVISAInfo.cpp | 75 +- llvm/lib/Support/ScopedPrinter.cpp | 1 - llvm/lib/Support/Signals.cpp | 1 + llvm/lib/Support/Signposts.cpp | 1 - llvm/lib/Support/SmallPtrSet.cpp | 1 - llvm/lib/Support/SmallVector.cpp | 1 + llvm/lib/Support/SpecialCaseList.cpp | 1 - llvm/lib/Support/StringMap.cpp | 1 - llvm/lib/Support/StringRef.cpp | 8 + llvm/lib/Support/SymbolRemappingReader.cpp | 1 + llvm/lib/Support/TargetParser.cpp | 2 - llvm/lib/Support/TimeProfiler.cpp | 4 +- llvm/lib/Support/ToolOutputFile.cpp | 1 - llvm/lib/Support/Triple.cpp | 2 +- llvm/lib/Support/TypeSize.cpp | 1 + llvm/lib/Support/VirtualFileSystem.cpp | 3 - llvm/lib/Support/X86TargetParser.cpp | 1 - llvm/lib/Support/YAMLParser.cpp | 1 - llvm/lib/Support/YAMLTraits.cpp | 2 - llvm/lib/Support/raw_ostream.cpp | 7 +- llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp | 204 +- llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 1 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 1 + .../Target/AArch64/GISel/AArch64CallLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 7 + .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 162 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 7 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 24 - llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 43 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.h | 1 + llvm/lib/Target/AMDGPU/MIMGInstructions.td | 106 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 194 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 5 - llvm/lib/Target/AMDGPU/SIInstructions.td | 40 + llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 8 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 2 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 17 + llvm/lib/Target/ARM/ARMSubtarget.cpp | 1 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 1 + llvm/lib/Target/AVR/AVRISelLowering.cpp | 14 + llvm/lib/Target/AVR/AVRISelLowering.h | 2 + llvm/lib/Target/AVR/AVRInstrInfo.td | 6 +- llvm/lib/Target/AVR/AVRRegisterInfo.td | 20 - llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp | 30 + llvm/lib/Target/CSKY/CSKYAsmPrinter.h | 1 + llvm/lib/Target/CSKY/CSKYISelLowering.cpp | 115 + llvm/lib/Target/CSKY/CSKYISelLowering.h | 4 + llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp | 13 +- llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 9 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 12 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 5 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 8 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 12 + llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 2 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 21 +- llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp | 12 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 13 + llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 1 + llvm/lib/Target/RISCV/RISCV.td | 152 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 121 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 2 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 70 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 5 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 99 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 16 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 93 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 124 +- llvm/lib/Target/RISCV/RISCVInstrInfoZk.td | 123 + llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 5 + llvm/lib/Target/RISCV/RISCVRegisterInfo.h | 2 + llvm/lib/Target/RISCV/RISCVRegisterInfo.td | 7 +- llvm/lib/Target/RISCV/RISCVSchedRocket.td | 5 +- llvm/lib/Target/RISCV/RISCVSchedSiFive7.td | 5 +- llvm/lib/Target/RISCV/RISCVSubtarget.h | 38 +- llvm/lib/Target/RISCV/RISCVSystemOperands.td | 6 + llvm/lib/Target/SystemZ/SystemZ.h | 10 + llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp | 10 +- llvm/lib/Target/SystemZ/SystemZElimCompare.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZLongBranch.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp | 18 +- llvm/lib/Target/SystemZ/SystemZShortenInst.cpp | 17 +- llvm/lib/Target/SystemZ/SystemZTDC.cpp | 4 - llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp | 8 + llvm/lib/Target/VE/LVLGen.cpp | 4 +- llvm/lib/Target/VE/VECustomDAG.cpp | 30 + llvm/lib/Target/VE/VECustomDAG.h | 6 + llvm/lib/Target/VE/VEISelLowering.cpp | 37 +- llvm/lib/Target/VE/VEMCInstLower.cpp | 3 +- .../Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 100 +- llvm/lib/Target/X86/X86PadShortFunction.cpp | 7 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 6 +- llvm/lib/Transforms/Coroutines/Coroutines.cpp | 18 +- llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 86 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 59 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 12 + .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 9 + .../Transforms/InstCombine/InstCombineCalls.cpp | 26 +- .../Transforms/InstCombine/InstCombineInternal.h | 10 + .../InstCombine/InstCombineMulDivRem.cpp | 18 + .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 3 + .../InstCombine/InstructionCombining.cpp | 64 + .../Instrumentation/HWAddressSanitizer.cpp | 17 +- .../lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h | 10 +- llvm/lib/Transforms/ObjCARC/DependencyAnalysis.cpp | 3 - llvm/lib/Transforms/ObjCARC/DependencyAnalysis.h | 3 +- llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp | 2 +- llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp | 20 +- .../Transforms/Scalar/ConstraintElimination.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopFlatten.cpp | 432 ++- llvm/lib/Transforms/Scalar/SROA.cpp | 6 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 4 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 115 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 7 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 8 + llvm/lib/Transforms/Vectorize/VPlan.h | 32 + llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 27 + llvm/lib/Transforms/Vectorize/VPlanTransforms.h | 4 + llvm/lib/Transforms/Vectorize/VPlanValue.h | 6 + llvm/runtimes/CMakeLists.txt | 14 +- llvm/test/Analysis/BasicAA/deoptimize.ll | 41 +- llvm/test/Analysis/CostModel/AMDGPU/add-sub.ll | 4 +- llvm/test/Analysis/CostModel/AMDGPU/arith-ssat.ll | 32 +- llvm/test/Analysis/CostModel/AMDGPU/arith-usat.ll | 32 +- llvm/test/Analysis/CostModel/AMDGPU/cast.ll | 76 +- llvm/test/Analysis/CostModel/AMDGPU/fadd.ll | 4 +- llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll | 8 +- llvm/test/Analysis/CostModel/AMDGPU/fma.ll | 92 +- llvm/test/Analysis/CostModel/AMDGPU/fmul.ll | 4 +- llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll | 12 +- llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll | 12 +- llvm/test/Analysis/CostModel/AMDGPU/fsub.ll | 4 +- llvm/test/Analysis/CostModel/AMDGPU/mul.ll | 20 +- .../CostModel/RISCV/fixed-vector-gather.ll | 2 +- .../CostModel/RISCV/fixed-vector-scatter.ll | 2 +- llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout3.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout4.ll | 8 + .../CodeGen/AArch64/GlobalISel/assert-align.ll | 28 + .../AArch64/GlobalISel/regbank-assert-align.mir | 30 + llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir | 63 + llvm/test/CodeGen/AArch64/addsub.ll | 96 +- llvm/test/CodeGen/AArch64/arm64-rev.ll | 7 +- llvm/test/CodeGen/AArch64/arm64-vhadd.ll | 427 +++ llvm/test/CodeGen/AArch64/concat-vector.ll | 2 +- llvm/test/CodeGen/AArch64/ext-narrow-index.ll | 229 +- .../CodeGen/AArch64/named-vector-shuffles-sve.ll | 48 +- llvm/test/CodeGen/AArch64/neon-stepvector.ll | 1 - llvm/test/CodeGen/AArch64/pr53315-returned-i128.ll | 25 + llvm/test/CodeGen/AArch64/shift_minsize.ll | 66 + llvm/test/CodeGen/AArch64/sve-cmp-select.ll | 37 +- .../CodeGen/AArch64/sve-fixed-length-sdiv-pow2.ll | 17 +- llvm/test/CodeGen/AArch64/sve-punpklo-combine.ll | 8 +- llvm/test/CodeGen/AArch64/sve2-int-mul.ll | 208 +- ...nfold-masked-merge-vector-variablemask-const.ll | 8 +- .../AArch64/xray-attribute-instrumentation.ll | 2 +- .../CodeGen/AArch64/xray-omit-function-index.ll | 4 +- .../xray-partial-instrumentation-skip-entry.ll | 2 +- .../xray-partial-instrumentation-skip-exit.ll | 2 +- llvm/test/CodeGen/AArch64/xray-tail-call-sled.ll | 2 +- .../test/CodeGen/AMDGPU/GlobalISel/assert-align.ll | 55 + .../test/CodeGen/AMDGPU/GlobalISel/combine-fsh.mir | 107 +- .../test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir | 104 +- .../AMDGPU/GlobalISel/image_ls_mipmap_zero.a16.ll | 667 ---- .../AMDGPU/GlobalISel/image_ls_mipmap_zero.ll | 403 --- .../AMDGPU/GlobalISel/inst-select-anyext.mir | 116 +- .../GlobalISel/inst-select-load-constant.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-load-global.mir | 30 +- .../GlobalISel/inst-select-load-local-128.mir | 64 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 99 +- .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-store-global.mir | 30 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 99 +- .../AMDGPU/GlobalISel/irtranslator-assert-align.ll | 208 ++ .../llvm.amdgcn.image.sample.ltolz.a16.ll | 565 ---- .../GlobalISel/llvm.amdgcn.image.sample.ltolz.ll | 293 -- .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 24 +- .../GlobalISel/regbankselect-assert-align.mir | 62 + llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll | 146 +- llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll | 146 +- llvm/test/CodeGen/AMDGPU/add.v2i16.ll | 5 +- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 19 +- .../test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll | 1 - llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 15 +- llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll | 28 +- .../test/CodeGen/AMDGPU/extract-subvector-16bit.ll | 437 +++ llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll | 13 + llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll | 49 + llvm/test/CodeGen/AMDGPU/function-returns.ll | 4 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 586 ++-- llvm/test/CodeGen/AMDGPU/idot8u.ll | 896 ++--- llvm/test/CodeGen/AMDGPU/image_ls_mipmap_zero.ll | 132 - llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll | 6 +- .../test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 339 ++ llvm/test/CodeGen/AMDGPU/kernel-args.ll | 11 +- llvm/test/CodeGen/AMDGPU/licm-valu.mir | 144 - .../AMDGPU/llvm.amdgcn.image.sample.ltolz.ll | 113 - llvm/test/CodeGen/AMDGPU/load-constant-i16.ll | 8 +- llvm/test/CodeGen/AMDGPU/load-global-i16.ll | 6 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 9 +- llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll | 39 + llvm/test/CodeGen/AMDGPU/sub.v2i16.ll | 10 +- llvm/test/CodeGen/ARM/shift-combine.ll | 20 +- .../ARM/xray-armv6-attribute-instrumentation.ll | 4 +- .../ARM/xray-armv7-attribute-instrumentation.ll | 4 +- llvm/test/CodeGen/ARM/xray-tail-call-sled.ll | 4 +- llvm/test/CodeGen/AVR/lpmx.ll | 22 +- llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 +- llvm/test/CodeGen/AVR/store-undef.ll | 3 +- llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 +- llvm/test/CodeGen/CSKY/tls-models.ll | 179 + llvm/test/CodeGen/Hexagon/xray-pred-ret.ll | 2 +- llvm/test/CodeGen/Hexagon/xray.ll | 4 +- .../Mips/xray-mips-attribute-instrumentation.ll | 8 +- llvm/test/CodeGen/Mips/xray-section-group.ll | 8 +- llvm/test/CodeGen/PowerPC/combine-fneg.ll | 8 +- llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll | 52 +- .../CodeGen/PowerPC/inline-asm-clobber-warning.ll | 22 + llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll | 4 +- .../PowerPC/xray-attribute-instrumentation.ll | 5 +- .../CodeGen/PowerPC/xray-conditional-return.ll | 2 +- .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-hidden.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-sled.ll | 2 +- llvm/test/CodeGen/RISCV/add-before-shl.ll | 20 +- llvm/test/CodeGen/RISCV/addcarry.ll | 30 +- llvm/test/CodeGen/RISCV/atomic-rmw.ll | 2400 +++++++------- llvm/test/CodeGen/RISCV/atomic-signext.ll | 480 +-- llvm/test/CodeGen/RISCV/attributes.ll | 69 +- .../RISCV/bswap-bitreverse-ctlz-cttz-ctpop.ll | 2441 ++++++++++++++ llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 1032 ------ llvm/test/CodeGen/RISCV/callee-saved-gprs.ll | 796 ++--- .../calling-conv-ilp32-ilp32f-ilp32d-common.ll | 76 +- .../RISCV/calling-conv-lp64-lp64f-lp64d-common.ll | 38 +- llvm/test/CodeGen/RISCV/double-arith-strict.ll | 92 +- llvm/test/CodeGen/RISCV/double-arith.ll | 208 +- llvm/test/CodeGen/RISCV/double-convert.ll | 186 +- llvm/test/CodeGen/RISCV/double-fcmp-strict.ll | 64 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 32 +- llvm/test/CodeGen/RISCV/float-arith-strict.ll | 32 +- llvm/test/CodeGen/RISCV/float-arith.ll | 124 +- llvm/test/CodeGen/RISCV/float-convert.ll | 88 +- llvm/test/CodeGen/RISCV/fp128.ll | 32 +- llvm/test/CodeGen/RISCV/fpclamptosat.ll | 414 +-- llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll | 1177 ++++--- llvm/test/CodeGen/RISCV/half-arith.ll | 708 ++-- llvm/test/CodeGen/RISCV/half-convert.ll | 112 +- llvm/test/CodeGen/RISCV/half-intrinsics.ll | 152 +- llvm/test/CodeGen/RISCV/mul.ll | 388 ++- llvm/test/CodeGen/RISCV/remat.ll | 44 +- llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll | 24 +- llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll | 30 +- llvm/test/CodeGen/RISCV/rv32zbb.ll | 96 +- llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll | 18 + llvm/test/CodeGen/RISCV/rv32zbp.ll | 620 ++-- llvm/test/CodeGen/RISCV/rv32zbt.ll | 28 +- llvm/test/CodeGen/RISCV/rv64i-complex-float.ll | 8 +- llvm/test/CodeGen/RISCV/rv64zbp.ll | 130 +- llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll | 4 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 2 +- .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 90 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-sats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 4 +- .../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 2 +- .../RISCV/rvv/commuted-op-indices-regression.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/constant-folding.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 8 +- .../CodeGen/RISCV/rvv/debug-info-rvv-dbg-value.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll | 4 +- .../fixed-vector-strided-load-store-negative.ll | 2 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 92 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 8 +- .../rvv/fixed-vectors-bitcast-large-vector.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 182 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 88 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 86 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll | 36 +- .../RISCV/rvv/fixed-vectors-emergency-slot.mir | 2 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 8 +- .../RISCV/rvv/fixed-vectors-fp-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 18 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 26 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-marith-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 28 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 8 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-mask-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv32.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv64.ll | 4 +- .../RISCV/rvv/fixed-vectors-store-merge-crash.ll | 2 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 52 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 52 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll | 22 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll | 953 ++++++ .../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll | 4 +- .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/inline-asm.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 4 +- .../CodeGen/RISCV/rvv/large-rvv-stack-size.mir | 2 +- .../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 4 +- .../RISCV/rvv/legalize-scalable-vectortype.ll | 4 +- .../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/marith-vp.ll | 4 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 2 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 4 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/pr52475.ll | 4 +- .../test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 66 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 66 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 1459 +++++++-- llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 4 +- .../RISCV/rvv/tail-agnostic-impdef-copy.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll | 2 +- .../CodeGen/RISCV/rvv/unaligned-loads-stores.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 1386 -------- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfclass.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfmacc.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmadd.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmax.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 933 ------ llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 917 ------ llvm/test/CodeGen/RISCV/rvv/vfmerge.ll | 904 +++++ llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmin.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfmsac.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmsub.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 197 -- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 197 -- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll | 200 ++ llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 482 --- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 482 --- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f.ll | 484 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f.ll | 634 ++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 632 ---- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfnmacc.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfnmsac.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 1154 ------- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 1130 ------- llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub.ll | 1108 +++++++ llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 739 ----- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfrec7.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmax.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredmin.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredosum.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredusum-rv64.ll | 692 ---- llvm/test/CodeGen/RISCV/rvv/vfredusum.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll | 617 ---- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 739 ----- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll | 708 ---- llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrsub.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1385 -------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 739 ----- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfslide1down.ll | 679 ++++ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 754 ----- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 722 ---- llvm/test/CodeGen/RISCV/rvv/vfslide1up.ll | 694 ++++ llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 548 ---- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 707 ---- llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt.ll | 619 ++++ llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 1417 -------- llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll | 1386 -------- llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub.ll | 1357 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 1275 -------- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 1275 -------- llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll | 1250 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 632 ---- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu.ll | 634 ++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f.ll | 382 +++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 380 --- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmacc.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmsac.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwmul.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwnmacc.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwnmsac.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredosum.ll | 510 +++ llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv32.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv64.ll | 508 --- llvm/test/CodeGen/RISCV/rvv/vfwredusum.ll | 510 +++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 848 ----- llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.ll | 832 +++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 1275 -------- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 1275 -------- llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll | 1250 +++++++ llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 758 ----- llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 758 ----- llvm/test/CodeGen/RISCV/rvv/vid.ll | 760 +++++ llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 882 ----- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 ----- llvm/test/CodeGen/RISCV/rvv/viota.ll | 884 +++++ llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlm-rv32.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm.ll | 96 + llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmandn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmorn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsif.ll | 298 ++ llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 296 -- llvm/test/CodeGen/RISCV/rvv/vmsof.ll | 298 ++ llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpload.ll | 54 +- llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll | 1280 ++++++++ llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpstore.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvl-ext.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll | 137 - llvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll | 137 - llvm/test/CodeGen/RISCV/rvv/vsm.ll | 139 + llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv32.mir | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv64.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-copy.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll | 2 +- llvm/test/CodeGen/RISCV/sadd_sat.ll | 8 +- llvm/test/CodeGen/RISCV/sadd_sat_plus.ll | 12 +- llvm/test/CodeGen/RISCV/scalable-vector-struct.ll | 2 +- .../test/CodeGen/RISCV/select-optimize-multiple.ll | 98 +- llvm/test/CodeGen/RISCV/sextw-removal.ll | 12 +- llvm/test/CodeGen/RISCV/shadowcallstack.ll | 16 +- llvm/test/CodeGen/RISCV/shifts.ll | 484 ++- llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll | 2 +- .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 36 +- llvm/test/CodeGen/RISCV/srem-vector-lkk.ll | 948 +++--- llvm/test/CodeGen/RISCV/ssub_sat.ll | 14 +- llvm/test/CodeGen/RISCV/ssub_sat_plus.ll | 16 +- llvm/test/CodeGen/RISCV/stack-store-check.ll | 84 +- llvm/test/CodeGen/RISCV/tail-calls.ll | 8 +- .../RISCV/umulo-128-legalisation-lowering.ll | 146 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 16 +- llvm/test/CodeGen/RISCV/urem-vector-lkk.ll | 950 +++--- llvm/test/CodeGen/RISCV/vec3-setcc-crash.ll | 20 +- llvm/test/CodeGen/RISCV/xaluo.ll | 840 +++-- llvm/test/CodeGen/X86/avx512-mask-op.ll | 112 +- llvm/test/CodeGen/X86/combine-sra-load.ll | 107 + llvm/test/CodeGen/X86/dpbusd_const.ll | 17 +- llvm/test/CodeGen/X86/extractelement-fp.ll | 8 +- llvm/test/CodeGen/X86/fp-round.ll | 14 +- llvm/test/CodeGen/X86/fp128-cast.ll | 2 +- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 16 +- llvm/test/CodeGen/X86/long-double-abi-align.ll | 4 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 10 +- llvm/test/CodeGen/X86/parity-vec.ll | 165 +- llvm/test/CodeGen/X86/pr43509.ll | 8 +- .../test/CodeGen/X86/pr53243-tail-call-fastisel.ll | 39 + llvm/test/CodeGen/X86/scalar-fp-to-i32.ll | 219 +- llvm/test/CodeGen/X86/scalar-fp-to-i64.ll | 32 +- llvm/test/CodeGen/X86/select-lea.ll | 177 + llvm/test/CodeGen/X86/shift-folding.ll | 25 + llvm/test/CodeGen/X86/smul-with-overflow.ll | 734 ++++- ...nfold-masked-merge-vector-variablemask-const.ll | 47 +- llvm/test/CodeGen/X86/vector-compare-all_of.ll | 51 +- llvm/test/CodeGen/X86/vector-compare-any_of.ll | 10 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 165 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 117 +- llvm/test/CodeGen/X86/vector-fshl-512.ll | 130 +- llvm/test/CodeGen/X86/vector-reduce-and-bool.ll | 1217 +++++-- llvm/test/CodeGen/X86/vector-reduce-or-bool.ll | 1063 +++++- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 1159 ++++++- llvm/test/CodeGen/X86/vselect-avx512.ll | 111 + .../CodeGen/X86/xray-attribute-instrumentation.ll | 7 +- llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-empty-firstmbb.mir | 2 +- .../test/CodeGen/X86/xray-ignore-loop-detection.ll | 4 +- llvm/test/CodeGen/X86/xray-log-args.ll | 4 +- llvm/test/CodeGen/X86/xray-loop-detection.ll | 4 +- .../CodeGen/X86/xray-multiplerets-in-blocks.mir | 2 +- .../X86/xray-partial-instrumentation-skip-entry.ll | 7 +- .../X86/xray-partial-instrumentation-skip-exit.ll | 6 +- llvm/test/CodeGen/X86/xray-section-group.ll | 6 +- .../CodeGen/X86/xray-selective-instrumentation.ll | 2 +- llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +- llvm/test/DebugInfo/X86/base-type-size.ll | 50 + llvm/test/DebugInfo/X86/instr-ref-flag.ll | 4 + llvm/test/DebugInfo/X86/tu-to-non-tu.ll | 330 +- .../JITLink/RISCV/ELF_pc_relative.s | 19 + .../ExecutionEngine/JITLink/RISCV/ELF_reloc_set.s | 31 + .../JITLink/RISCV/anonymous_symbol.s | 21 + .../LTO/Resolution/X86/Inputs/no-undef-type-md.ll | 13 + llvm/test/LTO/Resolution/X86/no-undef-type-md.ll | 37 + llvm/test/MC/ELF/debug-hash-file.s | 20 +- llvm/test/MC/PowerPC/gnu-attribute.s | 11 + llvm/test/MC/RISCV/attribute-arch-invalid.s | 6 - llvm/test/MC/RISCV/attribute-arch.s | 124 +- llvm/test/MC/RISCV/rv32zbkb-only-valid.s | 16 + llvm/test/MC/RISCV/rv32zbkb-valid.s | 45 + llvm/test/MC/RISCV/rv32zbkc-invalid.s | 9 + llvm/test/MC/RISCV/rv32zbkc-valid.s | 23 + llvm/test/MC/RISCV/rv32zbkx-invalid.s | 9 + llvm/test/MC/RISCV/rv32zbkx-valid.s | 17 + llvm/test/MC/RISCV/rv32zbp-aliases-valid.s | 10 +- llvm/test/MC/RISCV/rv32zbp-only-valid.s | 6 + llvm/test/MC/RISCV/rv32zbp-valid.s | 2 +- llvm/test/MC/RISCV/rv32zknd-only-invalid.s | 17 + llvm/test/MC/RISCV/rv32zknd-only-valid.s | 13 + llvm/test/MC/RISCV/rv32zkne-only-invalid.s | 17 + llvm/test/MC/RISCV/rv32zkne-only-valid.s | 13 + llvm/test/MC/RISCV/rv32zknh-only-valid.s | 29 + llvm/test/MC/RISCV/rv32zknh-valid.s | 26 + llvm/test/MC/RISCV/rv32zksed-invalid.s | 13 + llvm/test/MC/RISCV/rv32zksed-valid.s | 18 + llvm/test/MC/RISCV/rv32zksh-valid.s | 18 + llvm/test/MC/RISCV/rv64-zbkb-valid.s | 20 + llvm/test/MC/RISCV/rv64zbkb-only-valid.s | 9 + llvm/test/MC/RISCV/rv64zbp-aliases-valid.s | 2 +- llvm/test/MC/RISCV/rv64zknd-only-valid.s | 25 + llvm/test/MC/RISCV/rv64zkne-only-invalid.s | 17 + llvm/test/MC/RISCV/rv64zkne-only-valid.s | 21 + llvm/test/MC/RISCV/rv64zknh-only-valid.s | 21 + llvm/test/MC/RISCV/rv64zksed-invalid.s | 13 + llvm/test/MC/RISCV/rvk-user-csr-name.s | 29 + llvm/test/MC/RISCV/rvv/add.s | 8 +- llvm/test/MC/RISCV/rvv/aliases.s | 4 +- llvm/test/MC/RISCV/rvv/and.s | 8 +- llvm/test/MC/RISCV/rvv/clip.s | 8 +- llvm/test/MC/RISCV/rvv/compare.s | 8 +- llvm/test/MC/RISCV/rvv/convert.s | 8 +- llvm/test/MC/RISCV/rvv/div.s | 8 +- llvm/test/MC/RISCV/rvv/ext.s | 8 +- llvm/test/MC/RISCV/rvv/fadd.s | 8 +- llvm/test/MC/RISCV/rvv/fcompare.s | 8 +- llvm/test/MC/RISCV/rvv/fdiv.s | 8 +- llvm/test/MC/RISCV/rvv/fmacc.s | 8 +- llvm/test/MC/RISCV/rvv/fminmax.s | 8 +- llvm/test/MC/RISCV/rvv/fmul.s | 8 +- llvm/test/MC/RISCV/rvv/fmv.s | 8 +- llvm/test/MC/RISCV/rvv/fothers.s | 8 +- llvm/test/MC/RISCV/rvv/freduction.s | 8 +- llvm/test/MC/RISCV/rvv/fsub.s | 8 +- llvm/test/MC/RISCV/rvv/invalid-eew.s | 2 +- llvm/test/MC/RISCV/rvv/invalid.s | 2 +- llvm/test/MC/RISCV/rvv/load.s | 8 +- llvm/test/MC/RISCV/rvv/macc.s | 8 +- llvm/test/MC/RISCV/rvv/mask.s | 8 +- llvm/test/MC/RISCV/rvv/minmax.s | 8 +- llvm/test/MC/RISCV/rvv/mul.s | 8 +- llvm/test/MC/RISCV/rvv/mv.s | 8 +- llvm/test/MC/RISCV/rvv/or.s | 8 +- llvm/test/MC/RISCV/rvv/others.s | 8 +- llvm/test/MC/RISCV/rvv/reduction.s | 8 +- llvm/test/MC/RISCV/rvv/shift.s | 8 +- llvm/test/MC/RISCV/rvv/sign-injection.s | 8 +- llvm/test/MC/RISCV/rvv/snippet.s | 4 +- llvm/test/MC/RISCV/rvv/store.s | 8 +- llvm/test/MC/RISCV/rvv/sub.s | 8 +- llvm/test/MC/RISCV/rvv/vsetvl-invalid.s | 4 +- llvm/test/MC/RISCV/rvv/vsetvl.s | 8 +- llvm/test/MC/RISCV/rvv/xor.s | 8 +- llvm/test/MC/RISCV/rvv/zvlsseg.s | 8 +- .../CodeGenPrepare/AArch64/large-offset-gep.ll | 5 +- .../Transforms/ConstraintElimination/sub-nuw.ll | 34 + .../{coro-align-03.ll => coro-align16.ll} | 0 llvm/test/Transforms/Coroutines/coro-align32.ll | 60 + .../{coro-align-05.ll => coro-align64-02.ll} | 0 .../{coro-align-04.ll => coro-align64.ll} | 0 .../{coro-align-02.ll => coro-align8-02.ll} | 0 .../{coro-align-01.ll => coro-align8.ll} | 0 .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 1610 ++++++++- .../Transforms/InstCombine/binop-phi-operands.ll | 122 +- llvm/test/Transforms/InstCombine/icmp-mul-and.ll | 97 + .../Transforms/InstCombine/intrinsic-select.ll | 2 +- llvm/test/Transforms/InstCombine/intrinsics.ll | 56 +- .../Transforms/InstCombine/masked_intrinsics.ll | 62 + .../test/Transforms/InstCombine/mul-masked-bits.ll | 47 +- llvm/test/Transforms/InstCombine/zext-or-icmp.ll | 12 +- .../Transforms/InstSimplify/ConstProp/bitcount.ll | 36 +- .../Transforms/InstSimplify/ConstProp/loads.ll | 58 +- .../reductions-across-inner-and-outer-loop.ll | 38 + .../LoopVectorize/AArch64/induction-trunc.ll | 8 +- .../Transforms/LoopVectorize/AArch64/pr31900.ll | 12 +- .../LoopVectorize/AArch64/scalable-reductions.ll | 25 + .../LoopVectorize/AArch64/strict-fadd.ll | 31 + .../AArch64/sve-epilog-vect-inloop-reductions.ll | 121 + .../AArch64/sve-epilog-vect-reductions.ll | 121 + .../AArch64/sve-epilog-vect-strict-reductions.ll | 116 + .../LoopVectorize/RISCV/masked_gather_scatter.ll | 4 +- .../Transforms/LoopVectorize/RISCV/reg-usage.ll | 8 +- .../LoopVectorize/RISCV/riscv-interleaved.ll | 2 +- .../Transforms/LoopVectorize/RISCV/riscv-unroll.ll | 8 +- .../LoopVectorize/RISCV/scalable-reductions.ll | 2 +- .../LoopVectorize/RISCV/scalable-vf-hint.ll | 2 +- .../RISCV/unroll-in-loop-vectorizer.ll | 2 +- .../X86/invariant-store-vectorization.ll | 106 +- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr42674.ll | 2 +- .../epilog-vectorization-reductions.ll | 529 +++ llvm/test/Transforms/LoopVectorize/induction.ll | 138 +- .../optimal-epilog-vectorization-limitations.ll | 33 - .../reduction-with-invariant-store.ll | 333 ++ .../LoopVectorize/single-value-blend-phis.ll | 96 +- .../tail-folding-vectorization-factor-1.ll | 96 +- .../LoopVectorize/vector-intrinsic-call-cost.ll | 26 +- llvm/test/Transforms/NewGVN/phi-of-ops-loads.ll | 148 + .../Transforms/OpenMP/replace_globalization.ll | 8 +- llvm/test/Transforms/OpenMP/spmdization.ll | 62 +- .../SLPVectorizer/AArch64/64-bit-vector.ll | 8 +- .../SLPVectorizer/AArch64/slp-or-reduction.ll | 1 + .../SLPVectorizer/AArch64/spillcost-di.ll | 28 +- .../AMDGPU/add_sub_sat-inseltpoison.ll | 8 +- .../Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll | 8 +- .../address-space-ptr-sze-gep-index-assert.ll | 28 +- .../Transforms/SLPVectorizer/PowerPC/aggregate.ll | 2 +- .../SLPVectorizer/RISCV/rvv-min-vector-size.ll | 6 +- llvm/test/Transforms/SLPVectorizer/X86/PR34635.ll | 2 +- llvm/test/Transforms/SLPVectorizer/X86/PR36280.ll | 4 +- .../test/Transforms/SLPVectorizer/X86/aggregate.ll | 2 +- .../X86/alternate-cast-inseltpoison.ll | 16 +- .../Transforms/SLPVectorizer/X86/alternate-cast.ll | 16 +- .../Transforms/SLPVectorizer/X86/arith-add-ssat.ll | 28 +- .../Transforms/SLPVectorizer/X86/arith-sub-ssat.ll | 28 +- llvm/test/Transforms/SLPVectorizer/X86/call.ll | 13 +- .../SLPVectorizer/X86/crash_netbsd_decompress.ll | 8 +- .../X86/crash_scheduling-inseltpoison.ll | 4 +- .../SLPVectorizer/X86/crash_scheduling.ll | 4 +- .../SLPVectorizer/X86/crash_vectorizeTree.ll | 27 +- .../Transforms/SLPVectorizer/X86/debug_info.ll | 30 +- .../Transforms/SLPVectorizer/X86/external_user.ll | 2 +- .../SLPVectorizer/X86/extract_in_tree_user.ll | 6 +- .../Transforms/SLPVectorizer/X86/gep_mismatch.ll | 2 +- .../SLPVectorizer/X86/hadd-inseltpoison.ll | 16 +- llvm/test/Transforms/SLPVectorizer/X86/hadd.ll | 16 +- .../SLPVectorizer/X86/hsub-inseltpoison.ll | 16 +- llvm/test/Transforms/SLPVectorizer/X86/hsub.ll | 16 +- .../Transforms/SLPVectorizer/X86/insertvalue.ll | 8 +- llvm/test/Transforms/SLPVectorizer/X86/metadata.ll | 13 +- .../Transforms/SLPVectorizer/X86/multi_block.ll | 6 +- .../SLPVectorizer/X86/no_alternate_divrem.ll | 32 +- llvm/test/Transforms/SLPVectorizer/X86/pr16899.ll | 6 +- .../test/Transforms/SLPVectorizer/X86/reduction.ll | 10 +- .../SLPVectorizer/X86/remark_listcost.ll | 14 +- .../Transforms/SLPVectorizer/X86/undef_vect.ll | 10 +- llvm/test/tools/gold/X86/cache.ll | 4 +- .../tools/llvm-objcopy/MachO/update-section.test | 115 + .../llvm-profgen/separate-debuginfo-binary.test | 57 + .../Inputs/{basic-aa.txt => basic-aa.crlf} | 0 llvm/test/tools/split-file/Inputs/basic-bb.crlf | 4 + llvm/test/tools/split-file/basic.crlf.test | 10 + llvm/tools/llvm-diff/llvm-diff.cpp | 1 + llvm/tools/llvm-lto/llvm-lto.cpp | 1 + llvm/tools/llvm-modextract/llvm-modextract.cpp | 1 + llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp | 56 + llvm/tools/llvm-objdump/MachODump.cpp | 4 +- llvm/tools/llvm-objdump/WasmDump.cpp | 2 +- llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp | 11 +- llvm/tools/llvm-profgen/ProfiledBinary.cpp | 19 +- llvm/tools/llvm-profgen/ProfiledBinary.h | 12 +- llvm/tools/llvm-profgen/llvm-profgen.cpp | 14 +- llvm/tools/llvm-readobj/COFFDumper.cpp | 1 + llvm/tools/llvm-readobj/XCOFFDumper.cpp | 1 + llvm/tools/llvm-reduce/llvm-reduce.cpp | 1 + llvm/tools/llvm-split/llvm-split.cpp | 1 + llvm/tools/llvm-stress/llvm-stress.cpp | 1 + llvm/tools/split-file/split-file.cpp | 3 +- llvm/unittests/ADT/BitVectorTest.cpp | 26 + llvm/unittests/ADT/SequenceTest.cpp | 1 + llvm/unittests/ADT/SimpleIListTest.cpp | 1 + llvm/unittests/ADT/SmallPtrSetTest.cpp | 1 + llvm/unittests/ADT/StringMapTest.cpp | 1 + llvm/unittests/ADT/StringRefTest.cpp | 30 + llvm/unittests/ADT/StringSetTest.cpp | 1 + llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp | 2 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 55 + llvm/unittests/Support/Casting.cpp | 34 +- llvm/unittests/Support/CommandLineTest.cpp | 89 +- .../Support/DynamicLibrary/DynamicLibraryTest.cpp | 42 +- llvm/unittests/Support/ErrorTest.cpp | 23 +- llvm/unittests/Support/FSUniqueIDTest.cpp | 6 +- llvm/unittests/Support/IndexedAccessorTest.cpp | 2 +- llvm/unittests/Support/JSONTest.cpp | 4 +- llvm/unittests/Support/MemoryBufferTest.cpp | 20 +- llvm/unittests/Support/Path.cpp | 3 +- llvm/unittests/Support/ProgramTest.cpp | 4 +- llvm/unittests/Support/ReverseIterationTest.cpp | 1 + llvm/unittests/Support/TarWriterTest.cpp | 4 +- llvm/unittests/Support/TargetParserTest.cpp | 29 +- llvm/unittests/Support/TimerTest.cpp | 2 +- llvm/unittests/Support/UnicodeTest.cpp | 6 +- llvm/unittests/Support/VirtualFileSystemTest.cpp | 76 +- llvm/unittests/Support/YAMLIOTest.cpp | 86 +- llvm/unittests/Support/YAMLParserTest.cpp | 24 +- llvm/unittests/Support/raw_ostream_test.cpp | 3 +- .../clang-tidy/readability/BUILD.gn | 2 + llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 2 + .../gn/secondary/llvm/include/llvm/Config/BUILD.gn | 3 +- llvm/utils/lit/lit/main.py | 3 +- mlir/docs/LangRef.md | 13 + mlir/include/mlir-c/BuiltinAttributes.h | 8 + .../mlir/Analysis/Presburger/LinearTransform.h | 5 +- .../mlir/Analysis/Presburger/PresburgerSet.h | 18 +- mlir/include/mlir/Analysis/Presburger/Utils.h | 17 + .../mlir/Conversion/GPUCommon/GPUCommonPass.h | 1 + mlir/include/mlir/Dialect/Affine/LoopFusionUtils.h | 170 + mlir/include/mlir/Dialect/Affine/LoopUtils.h | 291 ++ mlir/include/mlir/Dialect/Affine/Passes.h | 21 + mlir/include/mlir/Dialect/Affine/Passes.td | 208 ++ mlir/include/mlir/Dialect/Affine/Utils.h | 119 + mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 1 - .../Bufferization/IR/BufferizableOpInterface.h | 16 +- .../mlir/Dialect/Bufferization/IR/Bufferization.h | 1 + .../Bufferization/IR/BufferizationInterfaceImpl.h | 25 - .../Dialect/Bufferization/IR/BufferizationOps.td | 95 +- .../Dialect/Bufferization/Transforms/BufferUtils.h | 143 + .../Dialect/Bufferization/Transforms/Bufferize.h | 7 +- .../mlir/Dialect/Bufferization/Transforms/Passes.h | 24 + .../Dialect/Bufferization/Transforms/Passes.td | 69 + mlir/include/mlir/Dialect/GPU/GPUOps.td | 1 - .../ComprehensiveBufferize/TensorInterfaceImpl.h | 27 - mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 202 -- .../mlir/Dialect/Linalg/Transforms/HoistPadding.h | 25 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 72 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 16 +- .../mlir/Dialect/MemRef/Transforms/Passes.h | 4 + .../mlir/Dialect/MemRef/Transforms/Passes.td | 116 + mlir/include/mlir/Dialect/SCF/Passes.h | 4 + mlir/include/mlir/Dialect/SCF/Passes.td | 16 + mlir/include/mlir/Dialect/SCF/Utils.h | 60 + .../Dialect/SparseTensor/IR/SparseTensorOps.td | 20 + .../mlir/Dialect/StandardOps/Transforms/Passes.h | 4 +- mlir/include/mlir/Dialect/Tensor/IR/Tensor.h | 1 + mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 191 +- .../Dialect/Tensor/IR/TensorTilingInterfaceImpl.h | 36 + .../Transforms/BufferizableOpInterfaceImpl.h | 20 + mlir/include/mlir/Dialect/Tensor/Utils/Utils.h | 34 + mlir/include/mlir/IR/FunctionInterfaces.td | 6 +- mlir/include/mlir/IR/OpAsmInterface.td | 2 +- mlir/include/mlir/IR/OpDefinition.h | 32 +- mlir/include/mlir/IR/OpImplementation.h | 4 - mlir/include/mlir/InitAllDialects.h | 2 + .../mlir/Interfaces/ControlFlowInterfaces.h | 29 + .../mlir/Interfaces/ControlFlowInterfaces.td | 31 +- mlir/include/mlir/Interfaces/LoopLikeInterface.h | 13 + mlir/include/mlir/Transforms/BufferUtils.h | 142 - .../include/mlir/Transforms/ControlFlowSinkUtils.h | 70 + mlir/include/mlir/Transforms/LoopFusionUtils.h | 170 - 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mlir/lib/Interfaces/LoopLikeInterface.cpp | 83 + mlir/lib/Parser/Token.h | 1 + mlir/lib/Support/MlirOptMain.cpp | 10 +- mlir/lib/TableGen/Format.cpp | 2 + mlir/lib/TableGen/Predicate.cpp | 1 + .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 6 +- mlir/lib/Transforms/BufferOptimizations.cpp | 444 --- mlir/lib/Transforms/BufferResultsToOutParams.cpp | 144 - mlir/lib/Transforms/BufferUtils.cpp | 141 - mlir/lib/Transforms/CMakeLists.txt | 15 +- mlir/lib/Transforms/CSE.cpp | 1 - mlir/lib/Transforms/ControlFlowSink.cpp | 72 + mlir/lib/Transforms/LoopCoalescing.cpp | 101 - mlir/lib/Transforms/LoopFusion.cpp | 1996 ------------ mlir/lib/Transforms/LoopInvariantCodeMotion.cpp | 79 +- mlir/lib/Transforms/NormalizeMemRefs.cpp | 520 --- mlir/lib/Transforms/ParallelLoopCollapsing.cpp | 45 - mlir/lib/Transforms/PassDetail.h | 19 - mlir/lib/Transforms/PipelineDataTransfer.cpp | 369 --- mlir/lib/Transforms/Utils/CMakeLists.txt | 14 +- mlir/lib/Transforms/Utils/ControlFlowSinkUtils.cpp | 153 + mlir/lib/Transforms/Utils/DialectConversion.cpp | 1 - mlir/lib/Transforms/Utils/LoopFusionUtils.cpp | 665 ---- mlir/lib/Transforms/Utils/LoopUtils.cpp | 3443 -------------------- mlir/lib/Transforms/Utils/Utils.cpp | 767 ----- .../dialects/linalg/opdsl/lang/comprehension.py | 2 +- mlir/python/requirements.txt | 1 + mlir/test/CAPI/ir.c | 11 + mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 15 +- .../Conversion/MathToSPIRV/math-to-glsl-spirv.mlir | 38 +- .../MathToSPIRV/math-to-opencl-spirv.mlir | 40 +- .../TosaToLinalg/tosa-to-linalg-named.mlir | 20 +- .../Conversion/TosaToLinalg/tosa-to-linalg.mlir | 16 +- mlir/test/Conversion/VectorToSPIRV/simple.mlir | 22 + mlir/test/Dialect/Linalg/bufferize.mlir | 4 +- mlir/test/Dialect/Linalg/canonicalize.mlir | 204 +- mlir/test/Dialect/Linalg/codegen-strategy.mlir | 2 +- .../Linalg/comprehensive-function-bufferize.mlir | 2 +- .../comprehensive-module-bufferize-alloca.mlir | 6 +- .../Linalg/comprehensive-module-bufferize.mlir | 17 +- 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mlir/test/lib/Transforms/CMakeLists.txt | 4 - mlir/test/lib/Transforms/TestConstantFold.cpp | 1 - mlir/test/lib/Transforms/TestLoopFusion.cpp | 208 -- mlir/test/lib/Transforms/TestLoopMapping.cpp | 69 - .../lib/Transforms/TestLoopParametricTiling.cpp | 66 - mlir/test/lib/Transforms/TestLoopUnrolling.cpp | 91 - .../mlir-cpu-runner/math-polynomial-approx.mlir | 118 + mlir/test/python/ir/attributes.py | 44 + mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp | 1 + mlir/tools/mlir-tblgen/OpFormatGen.cpp | 1 + .../Analysis/Presburger/IntegerPolyhedronTest.cpp | 30 +- .../Analysis/Presburger/LinearTransformTest.cpp | 3 +- mlir/unittests/Transforms/CMakeLists.txt | 1 + openmp/CMakeLists.txt | 5 + openmp/libompd/src/CMakeLists.txt | 2 +- openmp/runtime/cmake/LibompCheckLinkerFlag.cmake | 2 + openmp/runtime/src/CMakeLists.txt | 6 +- openmp/runtime/src/kmp_atomic.cpp | 15 +- openmp/tools/multiplex/CMakeLists.txt | 2 +- polly/lib/Analysis/ScopDetection.cpp | 1 + runtimes/CMakeLists.txt | 6 +- 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[...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pytaco.py create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/tools/mlir_pyta [...] create mode 100644 mlir/test/Transforms/control-flow-sink.mlir create mode 100644 mlir/test/lib/Dialect/Affine/TestLoopFusion.cpp create mode 100644 mlir/test/lib/Dialect/Affine/TestLoopMapping.cpp create mode 100644 mlir/test/lib/Dialect/SCF/TestLoopParametricTiling.cpp create mode 100644 mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp delete mode 100644 mlir/test/lib/Transforms/TestLoopFusion.cpp delete mode 100644 mlir/test/lib/Transforms/TestLoopMapping.cpp delete mode 100644 mlir/test/lib/Transforms/TestLoopParametricTiling.cpp delete mode 100644 mlir/test/lib/Transforms/TestLoopUnrolling.cpp -- To stop receiving notification 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3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (df9d50bb22 -> 7d9d9c1078)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/binutils-gdb. from df9d50bb22 Automatic date update in version.in adds 7bf5587873 gdbsupport/gdb_regex.cc: replace defs.h include with common-defs.h adds ec7194506d drop old unused stamp-h.in file adds b13d7831eb gdb/doc: fill in two missing @r adds e901223d53 Updated Serbian translation for the ld sub-directory adds ed09c325ec gdb: include gdbsupport/buildargv.h in ser-mingw.c adds 5b4ea8a740 Automatic date update in version.in adds cb2562f553 RISC-V: create new frag after alignment. adds a74e1cb344 Add markers for 2.38 branch adds f908e960c5 Change version number to 2.38.50 and regenerate files adds 5f7a57f131 Update release makeing script with new release numbers adds cc5e40736d Adjust default page sizes for haiku arm. adds 58de646be2 Allow inferring tmp_prefix from the dll name from a def file. adds 3dd8e5b615 bfd: replace doc header generation with pattern rules adds cb803d3749 bfd: rename core.texi to corefile.texi adds bd32be01c9 bfd: merge doc subdir up a level adds 35638469cb Automatic date update in version.in adds 31b0378d53 Regenerate configure files with autoconf 2.69 adds ad69b6b861 Regenerate Makefile.in files with automake 1.15.1 adds 0e3839bde6 bfd: Properly install library and header files adds 451c003d5f bfd: Partially revert commit 0e3839bde6f adds f10522c0e7 Simplify some Rust expression-evaluation code adds 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows adds 2f279a64a2 Fix a proble building the libiberty library with gcc-12. adds fdf55097a3 bfd/doc: Fix racy build failure from missing mkdir adds 94fd627d46 bfd: Update doc/local.mk adds 823f6c5f05 Automatic date update in version.in adds 9a84a44d5d gas: drop old cygnus install hack adds 7d9d9c1078 gold: drop old cygnus install hack No new revisions were added by this update. Summary of changes: ChangeLog | 4 + bfd/.gitignore | 2 +- bfd/ChangeLog | 20 + bfd/Makefile.am | 22 +- bfd/Makefile.in | 508 +- bfd/configure | 42 +- bfd/configure.ac | 3 +- bfd/doc/Makefile.am | 217 - bfd/doc/Makefile.in | 1021 --- bfd/doc/bfd.texi | 2 +- bfd/doc/local.mk | 154 + bfd/po/bfd.pot | 112 +- bfd/po/fr.po | 3116 ++++---- bfd/po/ro.po | 10194 ++++++++++++++++++++----- bfd/po/uk.po | 3102 ++++---- bfd/stamp-h.in | 1 - bfd/version.h | 2 +- bfd/version.m4 | 2 +- binutils/BRANCHES | 1 + binutils/ChangeLog | 21 + binutils/Makefile.in | 1 - binutils/NEWS | 2 + binutils/README-how-to-make-a-release | 35 +- binutils/configure | 20 +- binutils/dlltool.c | 34 +- binutils/po/bg.po | 6039 +++++++++------ binutils/po/binutils.pot | 4084 +++++----- binutils/po/fr.po | 4192 +++++----- binutils/po/ro.po | 13085 +++++++++++++++++++++++++------- binutils/po/uk.po | 4202 +++++----- binutils/stamp-h.in | 1 - config/ChangeLog | 4 + cpu/ChangeLog | 4 + elfcpp/ChangeLog | 4 + gas/ChangeLog | 13 + gas/Makefile.in | 15 +- gas/NEWS | 2 + gas/config/tc-riscv.c | 6 + gas/configure | 20 +- gas/doc/local.mk | 4 - gas/po/gas.pot | 20 +- gas/po/uk.po | 4880 ++++++------ gas/stamp-h.in | 1 - gdb/doc/python.texi | 10 +- gdb/rust-exp.h | 39 +- gdb/rust-lang.c | 44 +- gdb/ser-mingw.c | 1 + gdbsupport/gdb_regex.cc | 2 +- gold/ChangeLog | 15 + gold/Makefile.am | 4 - gold/Makefile.in | 24 +- gold/po/gold.pot | 248 +- gold/po/uk.po | 257 +- gprof/ChangeLog | 14 + gprof/configure | 20 +- gprof/po/gprof.pot | 4 +- gprof/po/ro.po | 386 +- gprof/stamp-h.in | 1 - include/ChangeLog | 4 + ld/ChangeLog | 24 + ld/Makefile.in | 1 - ld/NEWS | 2 + ld/configure | 20 +- ld/configure.tgt | 2 +- ld/emulparams/armelf_haiku.sh | 4 +- ld/po/bg.po | 4373 ++++++----- ld/po/ld.pot | 218 +- ld/po/sr.po | 4255 ++++++----- ld/po/uk.po | 3264 ++++---- ld/stamp-h.in | 1 - libctf/ChangeLog | 4 + libiberty/ChangeLog | 8 + libiberty/regex.c | 4 + opcodes/ChangeLog | 14 + opcodes/Makefile.in | 1 - opcodes/configure | 20 +- opcodes/po/de.po | 512 +- opcodes/po/opcodes.pot | 2 +- opcodes/po/ro.po | 2948 +++++-- opcodes/po/uk.po | 530 +- opcodes/stamp-h.in | 1 - 81 files changed, 45841 insertions(+), 26654 deletions(-) delete mode 100644 bfd/doc/Makefile.am delete mode 100644 bfd/doc/Makefile.in create mode 100644 bfd/doc/local.mk delete mode 100644 bfd/stamp-h.in delete mode 100644 binutils/stamp-h.in delete mode 100644 gas/stamp-h.in delete mode 100644 gprof/stamp-h.in delete mode 100644 ld/stamp-h.in delete mode 100644 opcodes/stamp-h.in -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (4bb1c6521 -> dc293a2b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 4bb1c6521 4: update: llvm-82af95029ec947fed8b9c516f04d4f217bd87930: 20980 new dc293a2b9 4: update: binutils-llvm-linux-qemu: 20983 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4bb1c6521) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1612 -> 1612 bytes 02-prepare_abe/console.log.xz | Bin 2776 -> 2760 bytes 03-build_abe-binutils/console.log.xz | Bin 29084 -> 29960 bytes 04-build_llvm/console.log.xz | Bin 59756 -> 58996 bytes 05-build_abe-qemu/console.log.xz | Bin 31760 -> 29280 bytes 06-build_linux/console.log.xz | Bin 42496 -> 41624 bytes 08-check_regression/console.log.xz | Bin 476 -> 484 bytes 09-update_baseline/console.log | 95 +++++++++++++++++++++++++---------- jenkins/manifest.sh | 19 ++++--- results | 2 +- 10 files changed, 81 insertions(+), 35 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

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